JPH0738545A - 平滑出力クロック信号抽出方法 - Google Patents

平滑出力クロック信号抽出方法

Info

Publication number
JPH0738545A
JPH0738545A JP3074684A JP7468491A JPH0738545A JP H0738545 A JPH0738545 A JP H0738545A JP 3074684 A JP3074684 A JP 3074684A JP 7468491 A JP7468491 A JP 7468491A JP H0738545 A JPH0738545 A JP H0738545A
Authority
JP
Japan
Prior art keywords
clock signal
byte
data
output
adjustment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3074684A
Other languages
English (en)
Japanese (ja)
Inventor
David L Archer
デイビッド・ローレンス・アーチャー
Timothy C Rayner
ティモスィー・チャールス・レイナー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent NV
Original Assignee
Alcatel NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel NV filed Critical Alcatel NV
Publication of JPH0738545A publication Critical patent/JPH0738545A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/062Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0623Synchronous multiplexing systems, e.g. synchronous digital hierarchy/synchronous optical network (SDH/SONET), synchronisation with a pointer process

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Control Of Motors That Do Not Use Commutators (AREA)
  • Materials For Medical Uses (AREA)
  • Dc Digital Transmission (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
JP3074684A 1990-03-14 1991-03-14 平滑出力クロック信号抽出方法 Pending JPH0738545A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
AU9104 1990-03-14
AUPJ910490 1990-03-14

Publications (1)

Publication Number Publication Date
JPH0738545A true JPH0738545A (ja) 1995-02-07

Family

ID=3774550

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3074684A Pending JPH0738545A (ja) 1990-03-14 1991-03-14 平滑出力クロック信号抽出方法

Country Status (7)

Country Link
US (1) US5255293A (OSRAM)
EP (1) EP0450269B1 (OSRAM)
JP (1) JPH0738545A (OSRAM)
AT (1) ATE193791T1 (OSRAM)
CA (1) CA2038102C (OSRAM)
DE (1) DE69132247T2 (OSRAM)
ES (1) ES2146576T3 (OSRAM)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI90709C (fi) * 1992-02-14 1994-03-10 Nokia Telecommunications Oy Järjestely osoitinvärinän vaimentamiseksi desynkronisaattorissa
US5691976A (en) * 1992-04-02 1997-11-25 Applied Digital Access Performance monitoring and test system for a telephone network
FI90486C (fi) * 1992-06-03 1999-08-11 Nokia Telecommunications Oy Menetelmä ja laite synkronisessa digitaalisessa tietoliikennejärjestelmässä suoritettavan elastisen puskuroinnin toteuttamiseksi
GB9323187D0 (en) * 1993-11-10 1994-01-05 Northern Telecom Ltd Pointer justification even leak control
IT1265424B1 (it) * 1993-12-22 1996-11-22 Alcatel Italia Metodo e disposizione ciruitale di realizzazione della funzione di hpa negli apparati sdh
US5883900A (en) * 1994-03-23 1999-03-16 Gpt Limited Telecommunications transmission
GB9405748D0 (en) * 1994-03-23 1994-05-11 Plessey Telecomm Complementary justification algorithm
US5757872A (en) * 1994-11-30 1998-05-26 Lucent Technologies Inc. Clock recovery circuit
DE4442506A1 (de) * 1994-11-30 1996-06-05 Sel Alcatel Ag Synchronisierungsüberachung in einem Netzwerk
US6202108B1 (en) * 1997-03-13 2001-03-13 Bull S.A. Process and system for initializing a serial link between two integrated circuits comprising a parallel-serial port using two clocks with different frequencies
DE69735527D1 (de) 1997-05-02 2006-05-11 Lsi Logic Corp Digitales Verfahren zur adaptiven Taktrückgewinnung
US6370158B1 (en) 1997-11-14 2002-04-09 Wireless Facilities, Inc. Wireless T/E Transceiver frame signaling subcontroller
DE19943779A1 (de) 1999-09-13 2001-03-22 Siemens Ag Anordnung zum Synchronisieren von über ein Kommunikationsnetz gekoppelten Kommunikationssystemkomponenten
US6463111B1 (en) * 2001-05-25 2002-10-08 Transwitch Corporaton Method and apparatus for desynchronizing a DS-3 signal and/or an E3 signal from the data portion of an STS-STM payload
DE10136662A1 (de) * 2001-07-27 2003-02-13 Siemens Ag Verfahren und Anordnung zur Anpassung der Taktraten digitaler Signale
US6910145B2 (en) * 2001-12-13 2005-06-21 Emc Corporation Data transmission across asynchronous clock domains
US7123675B2 (en) * 2002-09-25 2006-10-17 Lucent Technologies Inc. Clock, data and time recovery using bit-resolved timing registers
US8094562B1 (en) * 2004-06-24 2012-01-10 Cypress Semiconductor Corporation Transmission of a continuous datastream through a re-clocked frame-based transport network
US20070220184A1 (en) * 2006-03-17 2007-09-20 International Business Machines Corporation Latency-locked loop (LLL) circuit, buffer including the circuit, and method of adjusting a data rate
US7984209B1 (en) * 2006-12-12 2011-07-19 Altera Corporation Data interface methods and circuitry with reduced latency

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE414104B (sv) * 1978-10-13 1980-07-07 Ellemtel Utvecklings Ab Digital faslast slinga
US4347620A (en) * 1980-09-16 1982-08-31 Northern Telecom Limited Method of and apparatus for regenerating a signal frequency in a digital signal transmission system
DE3309270A1 (de) * 1983-03-15 1984-09-20 Siemens AG, 1000 Berlin und 8000 München Synchronisation nachziehbarer taktoszillatoren bei der uebertragung digitaler signale
US4876700A (en) * 1986-04-16 1989-10-24 E. F. Johnson Company Data demodulator
US4791652A (en) * 1987-06-04 1988-12-13 Northern Telecom Limited Synchronization of asynchronous data signals
US4882754A (en) * 1987-08-25 1989-11-21 Digideck, Inc. Data compression system and method with buffer control

Also Published As

Publication number Publication date
ES2146576T3 (es) 2000-08-16
CA2038102C (en) 1996-04-16
ATE193791T1 (de) 2000-06-15
CA2038102A1 (en) 1991-09-15
DE69132247D1 (de) 2000-07-13
EP0450269B1 (en) 2000-06-07
EP0450269A3 (OSRAM) 1994-03-30
US5255293A (en) 1993-10-19
EP0450269A2 (en) 1991-10-09
DE69132247T2 (de) 2000-12-21

Similar Documents

Publication Publication Date Title
JPH0738545A (ja) 平滑出力クロック信号抽出方法
US5065396A (en) Inverse multiplexer and demultiplexer techniques
CA1232693A (en) Network multiplex structure
EP2037603B1 (en) A clock recovery method and apparatus
JP3429308B2 (ja) ポインタを含むフレーム構造を分解及び組立する方法
EP0473338B1 (en) Bit synchronization with elastic memory
US7830909B2 (en) Transparent sub-wavelength network
US5263057A (en) Method of reducing waiting time jitter
CA2349344C (en) Reducing waiting time jitter
US5859882A (en) Transmission system control circuit including comparator apparatus
US5331671A (en) Circuit arrangement for bit rate adjustment to two digital signals
US5471511A (en) Digital phase-locked loop arrangement for use in a desynchronizer
EP2323419A1 (en) A method, a device and a system for constant rate data stream transmission
CN1051187C (zh) 同步数字系列数据传输系统
US20100098421A1 (en) Optical interface method and apparatus
US20020186719A1 (en) Pointer adjustment wander and jitter reduction apparatus for a desynchronizer
EP0539758A1 (en) Sonet pointer interpretation system
EP1804440B9 (en) A method and circuit for acquiring an asynchronously de-map clock
US4595907A (en) PCM data translating apparatus
EP1436923A2 (en) Method and apparatus for digital data synchronization
JP3429309B2 (ja) 同期デジタル遠隔通信システムにおけるエラスティックバッファメモリの充填率を監視する方法及び装置
US5703915A (en) Transmission system and multiplexing/demultiplexing equipment involving a justifiable bit stream
US5724342A (en) Method for receiving a signal in a synchronous digital telecommunications system
JPH07226760A (ja) ポインタ調整イベント漏れ制御方法および装置
WO1993016535A1 (en) Pointer jitter suppression in a desynchronizer