JPH0737249A - Optical disk recording and reproducing device - Google Patents

Abstract

PURPOSE:To prevent the occurrence of an error at the time of reproducing in the optical disk recording and reproducing device of a ZCAV system by recording a signal in an accurate recording position. CONSTITUTION:A reference mark is detected from a read signal from a pickup 12 on an optical disk 11 and a reference mark detecting signal is generated by a reference mark detecting means 14. Whether a sector to be recorded with data is in an area referred to the reference mark or not is discriminated by a area discriminating means 15. A data send-out timing signal is generated at the time delayed by a prescribed time corresponding to the discriminated area from the time of detecting the reference mark by a data send-out timing signal generating means 16. Modulation data by modulating write-in data is sent out in synchronization with the data send-out timing signal to be supplied from the data send-out timing signal generating means 16 by a modulation data send-out means 17. A light source driving signal is supplied to a light source 13 by a light source driving means 18 in accordance with the modulation data to be supplied from the modulation data send-out means 17.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical disk recording / reproducing apparatus, and more particularly to an optical disk recording / reproducing apparatus for recording in the ZCAV system.

[0002]

2. Description of the Related Art FIG. 7 shows a conventional CAV (Constan).
FIG. 1 shows a configuration diagram of a magneto-optical disk recording / reproducing apparatus of a t Angular Velocity) system. The interface circuit 36 is, for example, a general SCSI (Small).
Computer System Interfac
e) An interface, which sends a predetermined processing command to each unit in the device in response to various commands coming from outside the device. The reproduction signal processing circuit 37 reproduces address data and read data from the high frequency signal read from the pickup 33.

The recording circuit is a sector mark detection circuit 4
2. A recording sector length counter 43 for generating a gate signal which is a data transmission timing signal and a gate forming circuit 4
4. ECC (Er to generate error collection code
error correction code) circuit 46, a selection circuit 47 for selecting synchronization data and write data,
Modulation circuit 48, ALPC driving laser diode
(Automatic Laser Power Co
control circuit 49. Also, the ALPC circuit 4
It has a switch circuit 45 for switching 9 valid / invalid.

The recording circuit controls the laser diode (LD) 41 of the pickup 33 to record the write data supplied from the outside of the device through the interface circuit 36 in the data section in the sector of the magneto-optical disk 31. To do.

FIG. 8 is a schematic explanatory diagram of the sector format of the magneto-optical disk, and FIG. 9 is an explanatory diagram of the function of each part in the sector.

A sector mark SM is provided at the head of the pre-formatted area, and address marks AM1 to AM3 are provided after the sector mark SM. Following the respective address marks AM1 to AM3, three address parts ID1 to I
There is D3.

In the preformat area, the PLL is
VFO1 to V, which are data patterns for locking the circuit
FO3 is recorded.

After the preformatted area, there are a flag portion, a data portion in which user data is recorded, and a buffer portion.

Next, writing of data will be described. In the conventional magneto-optical disk recording / reproducing apparatus, after recognizing the preformatted area and detecting the sector mark, the reference clock for recording is counted, the timing of writing to the data section is determined, and the write data is recorded to the data section. It is carried out.

The interface circuit 36 is externally connected to
The write data to be recorded comes in along with the logical write command. The interface circuit 36 has a data buffer for recording and temporarily stores incoming write data.

The interface circuit 36 transfers the logical address data included in the write command to the disk 3
1 is converted into physical address data (target address data), and a seek command up to the target address is sent to the servo circuit 35 of the pickup control system.

The servo circuit 35 includes a spindle motor 32.
Drive the disc 31 by the pickup motor 34, and according to the seek command, the pickup motor 34 picks up the disc 3
Move 3 to the destination address.

The sector mark detection circuit 42 detects the sector mark at the beginning of the sector and outputs a sector mark detection pulse at the end of the sector mark. The reproduction signal processing circuit 37 uses the supplied sector mark detection pulse to
The physical address data is reproduced from the read signal supplied from the pickup 33 and supplied to the interface circuit 36.

When the address signal of the sector immediately before the target address is supplied from the reproduction signal processing circuit 37, the interface circuit 36 issues a write command in order to enable the recording of the data in the sector of the target address. , To the recording sector length counter 43. Further, the write data is supplied to the ECC circuit 46 described later.

The recording sector length counter 43 becomes valid when a write command is supplied from the interface circuit 36, is activated by the sector mark detection pulse supplied from the sector mark detection circuit 42, and counts the reference clock for recording. To do. The recording sector length counter 43, when the count value reaches the count value corresponding to the data length from the sector mark position to the data recording start position,
A gate creation timing pulse is generated and supplied to the gate creation circuit 44.

The gate creation timing pulse is generated in correspondence with write data and synchronization data such as VFO4, SYNC, and RESYNC.

The gate forming circuit 44 synchronizes with each gate forming timing pulse supplied from the recording sector length counter 43, and generates a gate signal which substantially matches the time length of the data to be recorded. The timing of this gate signal determines the timing of data transmission from the ECC circuit 46. The gate signal is supplied to the ECC circuit 46 and the modulation circuit 48.

The ECC circuit 46 is supplied with write data from the interface circuit 36 for each sector, performs an ECC process for adding an error correction code to the write data in advance, and stores it in a built-in buffer.

When the gate signal is supplied from the gate forming circuit 44, the ECC circuit 46 synchronizes with the gate signal,
The ECC-processed write data stored in the built-in buffer is sent to the selection circuit 47.

The selection circuit 47 selects the write data and the synchronization data according to the selection signal and supplies the selected signal to the modulation circuit 48. At the timing of recording the write data of the data section, the ECC circuit 4 is selected by the selection signal.
The write data from 6 is selected. Also, VFO
4, the synchronization data is selected at the timing of recording the synchronization data such as SYNC and RESYNC.

The modulation circuit 48 synchronizes with the gate signal,
The data supplied from the selection circuit 47 is subjected to 2-7 modulation processing and sent to the ALPC circuit 49.

The switch circuit 45 is turned on when the address data matching the target address is supplied from the reproduction signal processing circuit 37, and supplies the gate signal to the ALPC circuit 49. While the ALPC circuit 49 is supplied with the gate signal from the switch circuit 45, the operation related to recording is effective.

The ALPC circuit 49 generates an LD drive current corresponding to the data supplied from the modulation circuit 48 and supplies it to the LD 41 of the pickup 33. In addition, ALPC
The circuit 49 is supplied from the interface circuit 36,
Based on the gain control command corresponding to the position in the disk radial direction, the LD drive current is changed so as to optimize the output of the LD 41.

The LD 41 is supplied with an LD drive current from the ALPC circuit 49, irradiates the disk 31 with a laser beam, and records the write data and the synchronization data in the sector of the target address of the disk 31.

The ALPC circuit 49 is composed of a circuit that performs analog processing such as waveform shaping and voltage-current conversion. Therefore, in the ALPC circuit 49, the input signal supplied from the modulation circuit 48 and the output signal L
A certain amount of delay time is generated between the D drive current and the frequency of the recording reference clock.

Therefore, in the recording sector length counter 43, in order to correct the delay time in the ALPC circuit 49, the generation timing of the gate creation timing pulse is set to A.
The delay time in the LPC circuit 49 is advanced. Therefore, the timing of the gate signal supplied to the ECC circuit 46 and the modulation circuit 48 is also advanced by the delay time in the ALPC circuit 49.

As a result, the delay time in the ALPC circuit 49 is corrected and the data is recorded at the correct recording position in the sector.

[0028]

In the conventional magneto-optical disk device of the CAV system, the recording density on the time axis is constant at the inner and outer circumferences of the disk, so the frequency of the reference clock (that is, the recording frequency) is constant. Is. Therefore, ALP
By advancing the generation timing of the gate creation timing pulse by a constant number of the reference clock corresponding to the delay time in the C circuit 49, the data can be recorded at the correct position in the sector.

However, recently, ZCAV (Zonede Const) has been proposed for higher density.
In the magneto-optical disk of the ant Angular Velocity method, the disk is divided into a plurality of areas (zones) in the radial direction, and different recording and reproducing frequencies are used in each zone. Therefore, in the ZCAV system, the frequency of the reference clock is different in each zone.

Therefore, the constant number A of the reference clock is fixed.
A conventional circuit for correcting the delay time in the LPC circuit 49 is
When applied to the ZCAV system, the correction time changes depending on the zone, and the correction time becomes shorter as it goes to the outer circumference of the disc where the recording frequency is higher, which causes a problem that the recording start position deviates from the correct position.

By the way, as is well known, in a magneto-optical disk, recording is performed by heating the recording position of the disk with laser light and applying a magnetic field. When the linear velocity on the disk becomes faster, a slight positional deviation occurs between the position where the laser light is irradiated and the position where the recording is actually performed by heating. The positional deviation due to the characteristics of the disc increases as the linear velocity increases.

With the recording frequency in the conventional CAV system, this positional deviation did not pose a problem, but in the ZCAV method, since the recording frequency is higher than in the CAV method, the deviation of the recording position depending on the linear velocity is considered. There is a need to. The deviation of the recording position differs for each zone. However, the conventional circuit has a problem in that the deviation of the recording position depending on the linear velocity cannot be corrected.

As described above, the conventional CAV circuit is
If it is applied to the ZCAV system as it is, the recording position will deviate from the correct position. Therefore, during reproduction, there is a problem that a correct reproduction position cannot be detected and an error is likely to occur.

The present invention has been made in view of the above points, and even in a system in which the reproduction frequency changes depending on the zone, it is possible to record at an accurate recording position and prevent the occurrence of an error during reproduction. An object is to provide a reproducing device.

[0035]

FIG. 1 is a block diagram showing the principle of the present invention. In the optical disc recording / reproducing apparatus of the present invention, different recording / reproducing frequencies are used in a plurality of areas, and in each sector,
Using the optical disc 11 having a reference mark indicating a reference position of a sector and a data recording data portion located after a predetermined data length from the reference mark, a light beam from a light source 13 is irradiated to write data into the data. Record in section.

The reference mark detecting means 14 detects the reference mark from the read signal from the pickup 12 of the optical disk 11 and generates a reference mark detection signal.

The area discriminating means 15 discriminates which of the above areas the sector for recording the write data is.

Data transmission timing signal generating means 16
Generates a data transmission timing signal at a time point when a predetermined time corresponding to the determined area is delayed from the reference mark detection time point at which the reference mark detection signal is supplied.

The modulated data sending means 17 sends the modulated data obtained by modulating the write data in synchronization with the data sending timing signal supplied from the data sending timing signal creating means 16.

The light source drive means 18 supplies a light source drive signal corresponding to the modulation data supplied from the modulation data transmission means 17 to the light source 13.

[0041]

According to the present invention, the data transmission timing signal is generated at the time point when a predetermined time corresponding to the discriminated region is delayed from the time point when the reference mark is detected, and the data is transmitted to the light source driving means in synchronization with the data transmission timing signal. Is supplied.
Therefore, it is possible to make the recording position of the write data accurate regardless of the area and prevent an error from occurring during reproduction.

[0042]

EXAMPLE FIG. 2 shows ZCAV (Zo of an example of the present invention.
nde Constant Angular Velo
1 is a block diagram of a magneto-optical disk recording / reproducing apparatus of a type). 2, the same components as those in FIG. 7 are designated by the same reference numerals, and the description thereof will be omitted as appropriate.

The sector format of the magneto-optical disk is as shown in FIGS. 8 and 9.

In the apparatus of FIG. 2, a sector mark detection circuit 42 for detecting a sector mark which is a reference mark, a recording sector length counter 54 which generates a gate signal which is a data transmission timing signal, a gate creation circuit 55, and a variable delay. It has a circuit 56, an ECC circuit 46, a selection circuit 47 for selecting synchronization data and write data, a modulation circuit 48, and an ALPC circuit 49 for driving the laser diode 41. Further, it has a switch circuit 45 for switching between valid and invalid of the ALPC circuit 49. Further, a zone discrimination circuit 51 for discriminating zones and generating zone discrimination data,
A system clock generation circuit 52 and a frequency divider 53 that divides the system clock to generate a zone clock for the determined zone are provided.

Next, writing of data will be described. In the magneto-optical disk recording / reproducing apparatus of this embodiment, after recognizing the preformatted area and detecting the sector mark, the gate signal is generated at the time point delayed by the time corresponding to the zone from the time point at which the sector mark is detected. The modulated data synchronized with the gate signal is supplied to the ALPC circuit 49, and the data is recorded in the data portion in the sector.

The interface circuit 36 is externally connected to
The write data to be recorded comes in along with the logical write command. The interface circuit 36 has a data buffer for recording and temporarily stores incoming write data.

The interface circuit 36 transfers the logical address data included in the write command to the disk 3
1 is converted into physical address data (target address data), and a seek command up to the target address is sent to the servo circuit 35 of the pickup control system.

The servo circuit 35 includes the spindle motor 32.
Drive the disc 31 by the pickup motor 34, and according to the seek command, the pickup motor 34 picks up the disc 3
Move 3 to the destination address.

The sector mark detection circuit 42 detects the sector mark at the beginning of the sector and outputs a sector mark detection pulse at the end of the sector mark. The reproduction signal processing circuit 37 uses the supplied sector mark detection pulse to
The physical address data is reproduced from the read signal supplied from the pickup 33 and supplied to the interface circuit 36.

The zone discrimination circuit 51 discriminates which zone the current sector is in by using the sector mark signal supplied from the sector mark detection circuit 42, and generates zone discrimination data. Further, the frequency divider 53 divides the system clock supplied from the system clock generation circuit 52 based on the zone discrimination data to generate a zone clock.

When the address signal of the sector immediately before the target address is supplied from the read signal processing circuit 37, the interface circuit 36 issues a write command in order to enable the recording of the data in the sector of the target address. ,
The data is supplied to the recording sector length counter 54. Further, the write data is supplied to the ECC circuit 46.

Next, generation of a gate signal by the recording sector length counter 54, the gate forming circuit 55, and the variable delay circuit 56 will be described.

As described above, in the ALPC circuit 49, the delay time between the input signal supplied from the modulation circuit 48 and the LD drive current, which is the output signal, does not depend on the frequency of the recording zone clock. Cause Further, in the disc 31, the recording position shifts corresponding to the linear velocity on the disc 31. Here, the delay time, which is the sum of the constant delay time in the ALPC circuit 49 and the delay time due to the deviation of the recording position according to the linear velocity on the disk 31, is designated as τ.

In the present embodiment, the recording sector length counter 5
4, the gate creation circuit 55 and the variable delay circuit 56 set the timing of the gate signal supplied to the ECC circuit 46 and the modulation circuit 48 to a timing before the normal timing by the delay time τ and the sector of the disk 31. The data is recorded in the correct recording position inside.

The recording sector length counter 54 becomes valid when a write command is supplied from the interface circuit 36, is activated by the sector mark detection pulse supplied from the sector mark detection circuit 42, and is recorded as described later. A zone creation clock signal is generated by counting a fixed number of the zone clocks.

The normal recording start time of the data on the disk 31 is a time after a certain number of zone clocks from the sector mark detection time in any zone. The data to be recorded includes write data, VFO4, SYNC, RE
Although there is synchronization data such as SYNC, the number of zone clocks from the sector mark detection time to the normal recording start time is
It is determined corresponding to the position of each data in the sector.

Here, for one type of data, the number of zone clocks from the sector mark detection time to the normal recording start time is L clocks.

The recording sector length counter 54 generates a gate formation timing pulse at a time point sufficiently before the maximum value of the delay time τ with respect to the normal data recording start time point. More specifically, L-K clocks less than a fixed number of zone clocks L are counted by K clocks corresponding to a time sufficiently larger than the maximum value of the delay time τ, and a gate creation timing pulse at the end of counting. To generate.

This gate creation timing pulse is generated corresponding to each of the write data and the synchronization data such as VFO4, SYNC, RESYNC, etc., and is supplied to the gate creation circuit 55.

The gate forming circuit 55 generates a pre-delay gate signal that substantially coincides with the time length of the data to be recorded, in synchronization with each gate forming timing pulse supplied from the recording sector length counter 54.

The variable delay circuit 56 delays the delay time τ from the time (the time of K zone clocks) T from the generation time of the gate creation timing pulse to the normal recording start time.
A gate signal is generated by delaying the gate signal before delay by the time D obtained by subtracting.

The time T and the delay time τ vary depending on the zone. Therefore, the delay time D in the variable delay circuit 56 is set to the delay time corresponding to the zone having the sector for recording the data, based on the zone discrimination data supplied from the zone discrimination circuit 51.

FIG. 3 shows a timing chart for explaining the data recording timing in the zone m ₁ . Further, FIG. 4 shows a timing chart for explaining the data recording timing in the zone m _{2 where} m ₂ > m ₁ .

FIG. 3A shows the zone m.₁The zone clock
4A shows zone m. ₂Zone clock
Indicates. In addition, FIG. 3B and FIG.
The correspondence between each area and time is shown. Follow sector mark
A data recording area follows the header signal area. Figure
3, as shown in FIG. 4, the normal recording start time is set to the sector
At the time of L zone clocks after the mark detection
Suppose.

From the time when the sector mark is detected, the recording sector length counter 54 counts the LK clock and generates a gate creation timing pulse at the end of the count. In the example of FIGS. 3 and 4, K = 3.

As shown in FIG. 3, in the zone m ₁ , the gate forming circuit 55 generates a gate signal before delay at a point three clocks (T1 time) before the normal recording start time (FIG. 3). (C)).

Here, the ALPC circuit 49 in the zone m ₁
And the delay time due to the characteristics of the disk 31 is τ1. The variable delay circuit 56 generates a gate signal by delaying the gate signal before delay by the delay time D1 = T1−τ1 set corresponding to the zone m ₁ (FIG. 3 (D)).

Therefore, the data transmission start time to the ALPC circuit 49 is before the normal recording start time by the delay time τ1 (FIG. 3 (E)). Therefore, from the time when regular recording is actually started on the disc 31,
Data is recorded in the correct position.

In the zone m ₂ , the frequency of the zone clock is higher than that of the zone m ₁ . As in the case of the zone m ₁ , as shown in FIG. 4, in the zone m ₂ , the gate creation circuit 55 is the gate signal before the delay at a point three clocks (T2 hours) before the normal recording start point. Is generated (FIG. 4 (C)).

Here, the ALPC circuit 49 in the zone m ₂
And the delay time due to the characteristics of the disk 31 is τ2. The variable delay circuit 56 generates a gate signal by delaying the gate signal before delay by the delay time D2 = T2-τ2 set corresponding to the zone m ₂ (FIG. 4 (D)).

Therefore, the data transmission start time to the ALPC circuit 49 is before the normal recording start time by the delay time τ2 (FIG. 4 (E)). Therefore, from the time when regular recording is actually started on the disc 31,
Data is recorded in the correct position.

As described above, the variable delay circuit 56
The start time of the gate signal supplied from the ECC circuit 46 to the modulation circuit 48 from the normal recording start time of data in any zone is set to a time before the delay time τ due to the characteristics of the ALPC circuit 49 and the disk 31. To be A
The time when the modulated data starts to be supplied to the LPC circuit 49 is also adjusted to the time before the normal recording start of the data by the delay time τ.

Therefore, the ALPC circuit 49 and the disk 3 are
The delay time τ due to the characteristic of 1 is corrected and the disc 31
Data can be accurately recorded at the regular recording position in the sector.

When the gate signal is supplied from the gate forming circuit 44, the ECC circuit 46 synchronizes with the gate signal,
The ECC-processed write data stored in the internal buffer in advance is sent to the selection circuit 47.

In the selection circuit 47, at the timing of writing the write data in the data section, the EC is sent by the selection signal.
The write data from the C circuit 46 is selected. Also,
The synchronization data is selected at the timing of recording the synchronization data such as VFO4, SYNC, and RESYNC.

The modulation circuit 48 synchronizes with the gate signal,
The data supplied from the selection circuit 47 is subjected to 2-7 modulation processing and sent to the ALPC circuit 49. As described above, this modulated data is sent from the point before the normal recording start point by the delay time τ.

The ALPC circuit 49 generates an LD drive current corresponding to the data supplied from the modulation circuit 48 and supplies it to the LD 41 of the pickup 33. LD41 is A
An LD drive current is supplied from the LPC circuit 49, laser light is applied to the disk 31, and write data and synchronization data are recorded in the sector of the target address of the disk 31.

Although the gate signal before being delayed by the variable delay circuit 56 is supplied from the switch circuit 45 to the ALPC circuit 49 and the ALPC circuit 49 becomes effective, the gate signal before the delay is written. There is no problem because it is set longer than the data length.

As described above, in the present embodiment, the start point of the modulated data supply to the ALPC circuit 49 is characteristic of the ALPC circuit 49 and the disc 31 with respect to the normal recording start point of the data, regardless of the zone. The delay time τ due to is adjusted to a point before. Therefore, the delay time τ is corrected regardless of the zone, and the data can be accurately recorded at the regular recording position in the sector of the disk 31. Therefore, it is possible to prevent the occurrence of an error at the time of reproduction due to the shift of the recording position, and it is possible to realize high reliability.

FIG. 5 shows a concrete example of the variable delay circuit 56.
Show. The variable delay circuit in FIG. 5 has different zone clocks.
Delay line D corresponding to zones 1 to n_L1
~ D _LnAnd a selector 61.

Zones 1 are included in the delay lines D _{L1 to} D _Ln.
The delay time D _Z1 is the time obtained by subtracting the delay time due to the characteristics of the ALPC circuit 49 and the disk 31 from the time from the beginning of the gate signal before delay in each n to the start of normal recording (time of K zone clocks). It is set as D _Zn .

The selector 61 selects the output signal of the delay line corresponding to the zone having the sector for recording the data, based on the zone discrimination data. Therefore, the circuit of FIG.
The gate signal is generated by delaying the gate signal before the delay until the time point before the delay time due to the characteristics of the circuit 49 and the disk 31.

FIG. 6 shows another specific example of the variable delay circuit 56. The variable delay circuit of FIG. 6 includes a shift register 62 that counts a system clock and generates a delay corresponding to zones 1 to n, and a selector 61.

Between the input terminal IN and the output terminals O ₁ -O _n , the time from the beginning of the gate signal before delay in each of the zones _{1- n} to the start of the normal recording (time of K zone clocks) to ALPC. The time obtained by subtracting the delay time due to the characteristics of the circuit 49 and the disk 31 is the delay time D _{Z1 to} D _Zn.
Is set as.

The selector 61 selects the output signal of the delay line corresponding to the zone having the sector for recording the data, based on the zone discrimination data. Therefore, the circuit of FIG.
The gate signal is generated by delaying the gate signal before the delay until the time point before the delay time due to the characteristics of the circuit 49 and the disk 31.

The ECC circuit 46 and the modulation circuit 48 are supplied with the pre-delayed gate signal generated by the gate generation circuit 55, and the variable delay circuit provided between the modulation circuit 48 and the ALPC circuit 49 It is also possible to delay the data from the modulation circuit 48 and send the data to the ALPC circuit 49 at an appropriate timing.

The present invention is not limited to the ZCAV system,
It is also applicable to a method of performing high density recording using a plurality of recording frequencies.

[0088]

As described above, according to the present invention, the data transmission timing signal is generated at the time when a predetermined time corresponding to the discriminated area is delayed from the reference mark detection time, and the data transmission timing signal is synchronized with the data transmission timing signal. Since the data is supplied to the light source driving means, the recording position of the write data can be made accurate regardless of the area, and the error occurrence at the time of reproduction can be prevented.

[Brief description of drawings]

FIG. 1 is a principle configuration diagram of the present invention.

FIG. 2 is a configuration diagram of a ZCAV type magneto-optical disk recording / reproducing apparatus according to an embodiment of the present invention.

FIG. 3 is a timing chart illustrating a data recording timing in zone m ₁ .

FIG. 4 is a timing chart illustrating a recording timing of data in a zone m ₂ .

FIG. 5 is a diagram showing a specific example of a variable delay circuit.

FIG. 6 is a diagram showing another specific example of the variable delay circuit.

FIG. 7 is a block diagram of a conventional CAV type magneto-optical disk recording / reproducing apparatus.

FIG. 8 is a schematic explanatory diagram of a sector format of a magneto-optical disk.

FIG. 9 is an explanatory diagram of a function of each unit in a sector.

[Explanation of symbols]

 11 optical disk 12 pickup 13 light source 14 reference mark detection means 15 area discrimination means 16 data transmission timing signal generation means 17 modulated data transmission means 18 light source drive means 31 magneto-optical disk 32 spindle motor 33 pickup 34 pickup motor 35 servo circuit 36 interface circuit 41 Laser diode 42 Sector mark detection circuit 46 ECC circuit 47 Selection circuit 48 Modulation circuit 49 ALPC circuit 51 Zone discrimination circuit 52 System clock generation circuit 53 Frequency divider 54 Recording sector length counter 55 Gate creation circuit 56 Variable delay circuit 61 Selector 62 Shift register

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location G11B 27/10 C 8224-5D

Claims (1)

[Claims] 1. A recording / reproducing frequency is used in a plurality of areas, and each sector has a reference mark indicating a reference position of the sector and a data portion for recording data located after a predetermined data length from the reference mark. In an optical disc recording / reproducing apparatus that uses an optical disc and irradiates a light beam from a light source to record write data in the data section, a reference mark detection signal is detected by detecting the reference mark from a read signal from a pickup of the optical disc. The reference mark detecting means for generating, the area discriminating means for discriminating in which area of the area the sector for recording the write data is located, and the reference mark detecting point when the reference mark detecting signal is supplied, Data transmission that generates a data transmission timing signal at the time when a predetermined time corresponding to the determined area is delayed The timing signal creating means, the modulated data sending means for sending the modulated data obtained by modulating the write data in synchronization with the data sending timing signal supplied from the data sending timing signal creating means, and the modulated data sending means And a light source driving means for supplying a light source driving signal according to the modulated data to the light source.