JPH07335758A - Forming method of multilayer metallic interconnection - Google Patents

Abstract

PURPOSE:To prevent the corrosion and disconnection of a metallic wiring as a second layer by preventing the moisture absorption of an inter-layer insulating film regardless of the usage of the inter-layer insulating film being formed at a low temperature and being easy to absorb moisture. CONSTITUTION:A metallic wiring 2 as a first layer consisting of aluminum or an aluminum alloy is formed onto a semiconductor substrate 1. A first SiO2 film 3 as a first inter-layer insulating film and an SOG film 4 as a second inter-layer insulating film are shaped successively onto the semiconductor substrate l, on which the metallic wiring 2 as the first layer is formed, at a temperature of 500 deg.C or lower. A molecular layer 10 having hydrophobic properties is shaped onto the SOG film 4, and a second SiO2 film 5 as a third inter-layer insulating film is formed onto the molecular layer 10. The first SiO2 film 3, the SOG film 4 and the second SiO2 film 5 are etched in desired shapes, and a metallic wiring as a second layer is formed onto the second SiO2 film 5.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a multi-layer metal wiring, and more particularly to a method for forming a multi-layer metal wiring for realizing a multi-layer wiring technology in VLSI with a high yield.

[0002]

2. Description of the Related Art In a method of forming a multilayer metal wiring, a method of forming an interlayer insulating film formed between a metal wiring of a first layer and a metal wiring of a second layer has been used in recent years with the high integration of VLSI. Is important as a basic technique in a method for forming a multi-layered metal wiring in which wirings are stacked in two or three layers, and in the above-mentioned interlayer insulating film, flatness and moisture which do not affect the metal wiring formed in the upper layer thereof. Low moisture absorption is required.

An example of a conventional method for forming a multi-layer metal wiring will be described below with reference to the drawings.

15 (a)-(d) and 16 (a)-
(C) shows a schematic process of a conventional method for forming a multilayer metal wiring.

First, as shown in FIG. 15A, on a semiconductor substrate 1, a Ti film having a film thickness of 30 nm, a TiN film having a film thickness of 70 nm, and containing 1% Si and 0.5% Cu. Of aluminum (hereinafter, aluminum containing other components as described above is referred to as an aluminum alloy) having a film thickness of 700 n
After a TiN film having a thickness of 70 nm is sequentially deposited on m, a multi-layer metal layer including the Ti film, the TiN film, the aluminum alloy film, and the TiN film is patterned to form the first-layer metal wiring 2.

Next, as shown in FIG. 15B, SiH is formed on the semiconductor substrate 1 on which the first-layer metal wiring 2 is formed.
A mixed gas of ₄ and N ₂ O is supplied to form a first SiO ₂ film 3 as a first interlayer insulating film by a plasma CVD method.

Next, as shown in FIG. 15 (c), an alcohol solution of silanol (eg, SiOH) is applied on the first SiO ₂ film 3, and then the silanol is applied at 380 ° C.
Then, the SOG film (spin-on glass film) 4 as the second interlayer insulating film is formed by solidifying at the temperature of.

Next, as shown in FIG.
By the method similar to the method described based on (b), SO
A second SiO ₂ film as a third interlayer insulating film is formed on the G film 4.
The film 5 is formed.

Next, as shown in FIG. 16A, after a resist pattern 7 having a desired shape is formed on the second SiO ₂ film 6, the resist pattern 7 is used as a mask to form the first SiO ₂ film. 3, the SOG film 4 and the second SiO ₂ film 5 are etched to form the through holes 8 as shown in FIG. 16B.

Next, as shown in FIG. 16C, a film thickness of 30 is formed on the first-layer metal wiring 2 and the second SiO ₂ film 5.
nm Ti film, 70 nm-thick TiN film, 700 nm-thickness aluminum alloy film containing 1% Si and 0.5% Cu, and 70 nm-thickness TiN film,
These Ti film, TiN film, aluminum alloy film and Ti
The multi-layered metal layer made of N film is patterned to form the second layer metal wiring 9.

[0011] step is formed at an end portion of the metal wire 2 of the first layer described above, the stepped but is emphasized by the first SiO ₂ film 3 is coated on the first SiO ₂ film 3 The SOG film 4 made of liquid glass that is solidified after being heated has a function of alleviating the emphasized step. By using the SOG film 4 as the interlayer insulating film in this way, the interlayer insulating film can alleviate the step formed by the metal wiring 2 of the first layer. It is possible to prevent disconnection in the metal wiring 9 and short circuit between adjacent metal wirings, and a good multilayer metal wiring is realized.

However, the first problem associated with the miniaturization of semiconductor devices
The demand for a technique for uniformly filling the step due to the high aspect ratio of the metal wiring 2 of the layer is becoming more and more severe.
In recent years, as an effective solution to this requirement, since it has an excellent step coverage, atmospheric pressure using a reaction of tetraethoxysilane (hereinafter, referred to as TEOS) and ozone (hereinafter, referred to as O ₃ ) is used. A SiO ₂ film by CVD (hereinafter, this film is referred to as a TEOS-O ₃ film) has been actively researched, and the TEOS-O ₃ film is an SO film described above.
It may be used instead of the G film 4.

[0013]

However, since the melting point of aluminum or aluminum alloy forming the first-layer metal wiring is not high, the above SOG film and TEOS are not formed.
It is impossible to form a -O ₃ film at temperatures above approximately 500 ° C. high temperature ie. The interlayer insulating film formed at a low temperature, that is, at a temperature of 500 ° C. or less has an extremely rough film quality,
It is generally known that it has a high hygroscopic property, and the SOG film and the TEOS-O ₃ film described above also have a property of easily absorbing moisture from the atmosphere or the like.

The moisture absorbed by the SOG film and the TEOS-O ₃ film from the atmosphere or the moisture contained in the film itself is released to the outside of the film, and the released moisture causes the second layer metal wiring made of an aluminum alloy. There is a new problem of corrosion and disconnection. This problem remarkably occurs in a through hole for connecting the first-layer metal wiring and the second-layer metal wiring, particularly in a through hole having a diameter of 1 μm or less.

Therefore, conventionally, the interlayer insulating film is heat-treated to remove the moisture from the interlayer insulating film before forming the second-layer metal wiring. As the diameter of the through hole becomes smaller as it progresses,
Due to the restriction of the heat treatment temperature and the heat treatment time due to the low melting point of aluminum or aluminum alloy forming the first layer metal wiring, the heat treatment for the interlayer insulating film completely prevents corrosion or disconnection of the second layer metal wiring. It turns out that I can't.

In view of the above, the present invention provides a low temperature, that is, 50
Despite the use of an interlayer insulating film which is formed at a temperature of 0 ° C. or less and has a rough film quality, moisture absorption of the interlayer insulating film is prevented, which prevents corrosion and disconnection of the second layer metal wiring. It is an object of the present invention to provide a method for forming a multi-layer metal wiring capable of achieving the above.

[0017]

In order to achieve the above object, the present invention provides an interlayer insulating film by covering the interlayer insulating film formed at a temperature of 500 ° C. or lower with a molecular layer having hydrophobicity. The film is not exposed to the air, thereby preventing the interlayer insulating film from absorbing moisture.

Specifically, the means for solving the problems according to the invention of claim 1 is to provide a method for forming a multi-layer metal wiring, comprising a first step of forming a first-layer metal wiring made of aluminum or aluminum alloy on a semiconductor substrate. A second step of forming an interlayer insulating film at a low temperature on the semiconductor substrate having the first-layer metal wiring formed thereon, and a molecular layer having hydrophobicity on the interlayer insulating film formed at the low temperature And a fourth step of etching the interlayer insulating film having the molecular layer formed into a desired shape, and forming a second-layer metal wiring on the etched interlayer insulating film. And a fifth step.

According to a second aspect of the present invention, there is provided a method for forming a multi-layer metal wiring, comprising a first step of forming a first-layer metal wiring made of aluminum or an aluminum alloy on a semiconductor substrate, and the first step. A second step of forming an interlayer insulating film at a temperature of 500 ° C. or lower on a semiconductor substrate on which one layer of metal wiring is formed, and forming the interlayer insulating film at a temperature of 500 ° C. or lower into a desired shape. A third step of etching, a fourth step of forming a hydrophobic molecular layer on the etched interlayer insulating film, and a fifth step of forming a second-layer metal wiring on the molecular layer. And the process.

In order to improve the hydrophobicity of the molecular layer, the invention of claim 3 adds to the structure of claim 1 or 2 that the molecular layer is formed by a silylation reaction.

According to the invention of claim 4, in order to surely form a molecular layer having hydrophobicity, a structure in which the molecular layer is formed of a surfactant is added to the structure of claim 1 or 2. .

According to a fifth aspect of the present invention, in order to prevent moisture absorption of the interlayer insulating film more reliably, in the structure of the first or second aspect, the interlayer insulating film is provided between the second step and the third step. The configuration further comprises a step of removing moisture inside the interlayer insulating film by heating the semiconductor substrate on which the insulating film is formed to a temperature of 500 ° C. or lower.

According to a sixth aspect of the present invention, in order to prevent moisture absorption of the interlayer insulating film more reliably, in the structure of the second aspect, the interlayer insulating film is provided between the third step and the fourth step. The semiconductor substrate on which is formed is heated to a temperature of 500 [deg.] C. or lower to remove moisture in the interlayer insulating film, which is added.

According to a seventh aspect of the present invention, there is provided a method for forming a multi-layer metal wiring, comprising: a first step of forming a first-layer metal wiring made of aluminum or an aluminum alloy on a semiconductor substrate; A second step of forming an interlayer insulating film at a temperature of 500 ° C. or lower on a semiconductor substrate on which one layer of metal wiring is formed, and a hydrophobic process on the interlayer insulating film formed at a temperature of 500 ° C. or lower. First having sex
And a fourth step of etching the interlayer insulating film having the first molecular layer formed into a desired shape.
And a fifth step of forming a hydrophobic second molecular layer on the etched interlayer insulating film, and forming a second-layer metal wiring on the second molecular layer. And a sixth step.

According to the invention of claim 8, in order to reliably form the molecular layer having hydrophobicity, in the structure of claim 7, the first molecular layer and the second molecular layer are formed by a surfactant. The configuration is added.

In order to more reliably form the molecular layer having hydrophobicity, the invention of claim 9 provides the structure of claim 4 or 8.
The above-mentioned surface-active agent is added to the composition containing silicon or germanium.

In order to more reliably form the hydrophobic molecular layer, the tenth aspect of the present invention is the structure of the fourth or eighth aspect, wherein the surfactant is a silane compound, a siloxane compound, a disilazane compound or a trisilazane compound. , A piperazine compound, an aminogermanium compound, or a halogenated germanium compound.

According to the eleventh aspect of the present invention, the interlayer insulating film is reliably formed at a low temperature. Therefore, in the second step, the metal wiring of the first layer is formed in the second step. A structure is added, which is a step of forming an interlayer insulating film by depositing an organic silane-based material on the formed semiconductor substrate by a CVD method.

According to the twelfth aspect of the present invention, the interlayer insulating film is reliably formed at a low temperature. Therefore, in the second aspect, the second step includes forming the metal wiring of the first layer. It is a step of forming an interlayer insulating film by depositing a silanol-based material on the formed semiconductor substrate by a liquid coating method.

[0030]

According to the structure of claim 1, after forming a hydrophobic molecular layer on the interlayer insulating film formed at a temperature of 500 ° C. or lower, the interlayer insulating film is etched into a desired shape by etching. Since the interlayer insulating film is not exposed to the air in the process, the interlayer insulating film is formed at a low temperature and has a high hygroscopic property, but it is difficult to absorb the moisture from the air.

According to the structure of claim 2, since the hydrophobic molecular layer is formed on the etched interlayer insulating film, the second-layer metal wiring is formed on the molecular layer.
Since the interlayer insulating film is not exposed to the atmosphere in the process of forming the second-layer metal wiring, the interlayer insulating film is formed at a low temperature and has a high hygroscopic property, but it is difficult to absorb moisture from the atmosphere.

According to the third aspect of the present invention, since the silylation reaction is used to form the molecular layer, the silylation reaction is easily carried out between room temperature and a hundred and several tens of degrees Celsius, so that the controllability of the formation of the molecular layer is extremely high. It is easy to use and has excellent adhesion stability between the molecular layer and the substrate, unlike mere physical adsorption.
Since the reaction gas used in the silylation reaction is used as a pretreatment agent for improving the resist wettability, there is no problem in use such as the influence of impurities contained in LSI, and the molecular layer formed by the silylation reaction is Since the molecules are not connected to each other by chemical bonding but are formed in layers, the molecular layer can be easily removed by washing with water or plasma treatment and is easy to use in the manufacturing process.
When a molecular layer is formed on the surface of the substrate, the reaction does not occur with the reaction gas on the surface of the substrate, so that further reaction does not proceed, a uniform molecular layer is formed, and the reaction gas that causes the silylation reaction. Has a large molecular size, so even if the film quality of the interlayer insulating film is rough, since water molecules hardly penetrate into the interlayer insulating film, it has excellent hydrophobicity and there are irregularities such as holes in the interlayer insulating film. Even if there is a difference in the arrival time of the reaction gas between the convex portion and the concave portion, a molecular layer is easily formed at the bottom of the hole, and the molecular layer is reliably and uniformly formed.

According to the structure of claim 4, since the molecular layer is formed of the surfactant, the hydrophobic molecular layer can be surely formed on the interlayer insulating film.

According to the structure of claim 5, the semiconductor substrate is heated to a temperature of 500 ° C. or less between the second step and the third step of claim 1 or 2, whereby the water content inside the interlayer insulating film is increased. Since the moisture of the interlayer insulating film is removed before forming the hydrophobic molecular layer on the interlayer insulating film, the moisture in the interlayer insulating film is extremely small.

According to the structure of claim 6, the semiconductor substrate 500 is provided between the third step and the fourth step in claim 2.
It has a step of removing the moisture inside the interlayer insulating film by heating it to a temperature of ℃ or below, and removes the moisture in the interlayer insulating film before forming the molecular layer having hydrophobicity on the interlayer insulating film. Therefore, the moisture in the interlayer insulating film is extremely small.

According to the structure of claim 7, after forming a hydrophobic molecular layer on the interlayer insulating film formed at a temperature of 500 ° C. or lower, the interlayer insulating film is etched into a desired shape and is etched. After forming a hydrophobic molecular layer on the formed interlayer insulating film, a second layer metal wiring is formed on the molecular layer. Since the interlayer insulating film is not exposed to the air in the forming process, the interlayer insulating film is formed at a low temperature and has a high hygroscopic property, but it is extremely difficult to absorb the moisture.

According to the structure of claim 8, since the first and second molecular layers are formed by the surfactant, the first and second molecular layers having hydrophobicity are surely formed on the interlayer insulating film. be able to.

According to the ninth or tenth aspect, it is possible to surely form the hydrophobic molecular layer on the interlayer insulating film.

According to the eleventh aspect of the present invention, since the interlayer insulating film is formed by depositing the organic silane material on the semiconductor substrate by the CVD method, the interlayer insulating film can be surely formed at a temperature of 500 ° C. or lower. You can

According to the structure of the twelfth aspect, since the interlayer insulating film is formed by depositing the silanol-based material on the semiconductor substrate by the liquid coating method, the interlayer insulating film can be reliably formed at a temperature of 500 ° C. or lower. You can

[0041]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for forming a multi-layer metal wiring according to an embodiment of the present invention will be described below. As a premise therefor, an apparatus used in a molecular layer forming step in the method for forming a multi-layer metal wiring will be described.

FIG. 13 shows a schematic sectional structure of a first molecular layer forming apparatus used in the molecular layer forming step. As shown in FIG. 13, the reaction chamber 50 includes a substrate holding table 52 on which the semiconductor substrate 51 is placed and supported, a heating means 53 including an infrared lamp for heating the semiconductor substrate 51, air, water vapor, and a silylating agent vapor. An inlet port 54 for introducing the gas into the chamber 50 and an exhaust port 55 for discharging the gas in the reaction chamber 50 are provided. The ceiling of the reaction chamber 50 is formed as a curved heat reflection plate so that the semiconductor substrate 51 is uniformly irradiated with heat from the heating means 53.

FIG. 14 shows a schematic sectional structure of a second molecular layer forming apparatus used in the molecular layer forming step. As shown in FIG. 14, the reaction chamber 60 heats the substrate holding table 62 on which the semiconductor substrate 61 is placed and supported, the substrate rotating means 64 that rotatably holds the rotation shaft 63 of the substrate holding table 62, and the semiconductor substrate 61. It is provided with a heating means 65 composed of an infrared lamp, an inlet 66 for introducing a solution of air, water vapor or a silylating agent into the reaction chamber 60, and an exhaust port 67 for exhausting gas in the reaction chamber 60.

The molecular layer forming step will be described below.

First, it will be described with reference to FIG. 1 that the interlayer insulating film used for the multi-metal layer wiring has a rough film quality because it is formed at a low temperature. In FIG. 1, three types of films are compared, and the first insulating film is TEOS and O ₂
Are deposited at a deposition temperature of 720 ° C. by low pressure CVD method (LPCVD method) using as raw material gases, and the second insulating film is formed by low pressure CVD using TEOS and O ₃ as raw material gases.
Is deposited at a deposition temperature of 450 ° C. by a CVD method, and the third insulating film is deposited at a deposition temperature of 450 ° C. by a normal pressure CVD method (APCVD method) using TEOS and O ₃ as source gases. . FIG. 1 shows the results when Fourier transform infrared absorption spectrum measurement (FTIR measurement) was performed on the first to third insulating films, and the vertical axis represents the peak height (arbitrary unit) of the wave number in the FTIR measurement. Shows. The peak height of the wave number represents the bond strength between Si and O. When the peak height is high, it means that the bond between Si and O is strong and the SiO ₂ film is formed. It is shown that the second and third insulating films formed at a low temperature have a weak Si—O bond and are rough.

The insulating film thus formed at a low temperature and having a weak bond between Si and O and having a rough structure is a film deviated from stoichiometry (stoichiometric value) and has dangling bonds and Contains many SiOH bonds and has many fine pores. Therefore, it has a property of easily absorbing moisture from the atmosphere. In FIG. 2, (a) shows the surface of an interlayer film having fine holes and easily absorbing moisture, and (b) shows the surface of an interlayer film having no fine holes and hardly absorbing moisture. The present invention makes the interlayer film hydrophobic by forming a molecular layer on the surface of the interlayer film which easily absorbs moisture, thereby preventing moisture absorption.

The reaction for forming the molecular layer is shown by the following equation.

2Si—OH + (CH ₃ ) ₃ SiNHSi (CH ₃ ) ₃
→ 2Si-O-Si (CH 3) 3 + Si-OH in NH ₃ ↑ This formula shows the state of the substrate surface, in a crude insulating film, a state in which Si-OH is in contact with the atmosphere. The surface is covered with OH, for example, even in an aluminum alloy metal film, a thin oxide layer is formed on the surface, and this oxide layer is in the OH state.

When, for example, trimethyldisilazane comes to the surface of the substrate made of Si-OH, H and Si of Si-OH are added.
A reaction occurs in which (CH ₃ ) ₃ is replaced. NH ₃ produced by this reaction is discharged as a gas (indicated by ↑ in the above chemical formula). When the substrate surface is covered with hydrocarbon, it has a hydrophobic property and water from the atmosphere is not attracted (see FIG. 2B). For the hydrophobicity of hydrocarbons, see "Wa" by JL Moilliet.
terproofing and Water-repellency ”ELSEVIERPUBLISH
Shown in ING COMPANY 1963.

FIG. 3 shows the effect when the substrate surface is hydrophobic. FIG. 3 shows a thermal desorption spectroscopy apparatus after storing an insulating film made of SiO ₂ formed by atmospheric pressure CVD at a deposition temperature of 450 ° C. using TEOS and O ₃ as source gases in the atmosphere, and then performing thermal desorption spectroscopy. Shows the result of mass analysis of water content when heated from 100 ° C. to 200 ° C. and identification of the amount of absorbed water from the amount of released water. In FIG. 3, the broken line shows the amount of moisture absorbed when no molecular layer is formed on the substrate surface.
It can be seen that the moisture absorption amount increases rapidly with time. Figure 3
In, the solid line indicates the amount of absorbed moisture when a molecular layer is formed on the substrate surface, and it can be seen that the amount of absorbed moisture is reduced. In this sample, the above-mentioned molecular layer was formed within several hours after forming the insulating film made of SiO ₂ . According to the solid line in FIG. 3, it seems that the moisture absorption amount increased during 24 hours, which is considered to be the effect of moisture absorption before forming the molecular layer.

As described above, the silylation reaction is used to form the molecular layer. In this silylation reaction, the H ₂ O or OH group and, for example, hexamethyldisilazane are heated between room temperature and a few hundred tens of degrees Celsius. Since it easily reacts in, the controllability of the formation of the molecular layer is very easy, for example, because hexamethyldisilazane and the substrate chemically react with each other to form a chemical bond, unlike mere physical adsorption, Excellent adhesion stability between the molecular layer and the substrate. Further, for example, hexamethyldisilazane is used as a pretreatment agent for improving resist wettability before resist coating in the LSI process, and there is no problem in use in LSI (for example, influence of impurities contained). Has been proven. In addition, since the molecular layer is formed by only chemically connecting the molecules and the molecules are not formed in a layered form, it can be easily removed by washing with water or plasma treatment after the formation of the molecular layer. Easy to use.

When a molecular layer is formed on the substrate surface and the substrate surface is covered with CH ₃ groups, the substrate surface does not react with CH ₃ of the reaction gas, so that further reaction does not proceed. .

Furthermore, since the reaction gas containing, for example, hexamethyldisilazane has a large molecular size, water molecules hardly penetrate into the substrate even if the substrate has a rough film quality.

FIGS. 4 (a) to 4 (c) show a process of forming a molecular layer. In FIG. 4, 2 is a first metal wiring made of aluminum alloy or the like, 3 is an interlayer insulating film, and 10 is an interlayer insulating film. The molecular layer, 10a, shows the molecules of the reaction gas. Figure 4
As shown in (a) to (c), the interlayer insulating film 3 has irregularities such as holes, and even if there is a difference in arrival time of the reaction gas between the convexes and the concaves, the molecular layer can be reliably and uniformly formed. It is formed.
That is, first, as shown in FIG.
Covered with ₃ groups, since the covered portion by CH ₃ groups react any more does not proceed, as shown in FIG. 4 (b), the gas which has reached the portion covered with the CH ₃ group is repelled It moves to the next reaction site and reacts. This phenomenon progresses one after another within a short time, and as shown in FIG.
A molecular layer is easily formed on the bottom of the hole.

(First Embodiment) A first embodiment of the present invention will be described below with reference to the drawings.

5A to 5D and 6A to 6D.
(C) is sectional drawing which shows each process of the formation method of the multilayer metal wiring based on 1st Example of this invention.

First, as shown in FIG. 5A, a 30 nm thick Ti film and a 70 nm thick Ti film are formed on a semiconductor substrate 1.
N film, 700 nm thick aluminum alloy film and film thickness 7
After sequentially forming a TiN film of 0 nm, these Ti film and T
A first metal wiring 2 is formed by patterning a multi-layer metal layer including an iN film, an aluminum alloy film, and a TiN film.

Next, a mixed gas of SiH ₄ and N ₂ O is supplied onto the semiconductor substrate 1 on which the first-layer metal wiring 2 is formed, and the plasma CVD method is performed as shown in FIG. 5B. Then, a first SiO ₂ film 3 as a first interlayer insulating film is formed on the semiconductor substrate 1.

Next, an alcohol solution of silanol is applied on the first SiO ₂ film 3 and then the silanol is dissolved in 380
By solidifying at a temperature of ° C, an SOG film 4 as a second interlayer insulating film is formed on the first SiO ₂ film 3 as shown in Fig. 5C.

Thereafter, the molecular layer 10 having hydrophobicity is formed on the SOG film 4 by the first molecular layer forming apparatus shown in FIG.
However, when several hours or more are spent from the formation of the SOG film 4 to the formation of the molecular layer 10, the semiconductor substrate 1 having the SOG film 4 formed thereon is formed before the formation of the molecular layer 10.
By heating to a temperature of 0 ° C. or lower, for example, a temperature of several hundreds of ° C., the moisture absorbed in the SOG film 4 or contained in the SOG film 4 is removed. This heat treatment is performed by the heating means 53 provided in the reaction chamber 50.

Next, in order to form a hydroxyl group on the surface of the SOG film 4, air or water vapor is supplied into the reaction chamber 50 from the inlet 54 for only a few seconds, and the SOG film 4 is exposed to air or water vapor for a short time. Only expose. Then, the vaporized hexamethyldisilazane heated to 130 ° C. is supplied from the inlet 54 for several minutes to form the hydrophobic molecular layer 10 on the SOG film 4.

Next, as shown in FIG. 5 (d), the SOG film 4 (FIG. 5 (d)) having the molecular layer 10 formed thereon is formed by the same method as the first SiO ₂ film 3 described above. Layer 1
0 is omitted. 2), a second SiO ₂ film 5 is formed as a third interlayer insulating film.

Next, as shown in FIG. 6A, the second S
After forming a resist pattern 7 having a desired shape on the iO ₂ film 5, the first Si film is formed using the resist pattern 7 as a mask.
By etching the O ₂ film 3, the SOG film 4 and the second SiO ₂ film 5, a through hole 8 is formed as shown in FIG. 6B.

Next, as shown in FIG. 6C, a film thickness of 30 n is formed on the first-layer metal wiring 2 and the second SiO ₂ film 5.
m Ti film, 70 nm thick TiN film, 700 nm thick
After sequentially depositing the aluminum alloy film and the TiN film having a film thickness of 70 nm, the second metal wiring 9 is formed by patterning the multilayer metal layer including the Ti film, the TiN film, the aluminum alloy film and the TiN film.

The evaluation test conducted to evaluate the first embodiment will be described below.

FIG. 7 shows a cross-sectional structure of a multi-layer metal wiring for measuring the yield of the multi-layer metal wiring. The multi-layer metal wiring is connected to the first-layer metal wiring 2 through the 100,000 through holes. The two-layer metal wiring 9 is connected in series, and it is possible to easily evaluate the electrical characteristics of the multilayer metal wiring that is disconnected due to moisture absorption.

A multilayer metal wiring having a cross section as shown in FIG. 7 was produced by the above-mentioned steps, and the electrical characteristics of 2500 samples were measured to obtain the yield. The result is
As shown in Table 1, a yield of 99% or more was obtained. The diameter of the through hole at this time was 1.2 μm. The yield of the multilayer metal wiring having a through-hole diameter of 1.0 micron, which was manufactured by the same process as the conventional process except for the process of forming the molecular layer 10, was about 74%.

[0068]

[Table 1]

As described above, according to the first embodiment, the SOG
Since the molecular layer 10 made of hexamethyldisilazane having hydrophobicity is formed on the SOG film 4 after the film 4 is formed, it is possible to prevent the SOG film 4 which absorbs much moisture from absorbing water. Therefore, electrical disconnection in the second-layer metal wiring 9 can be reliably prevented.

(Second Embodiment) A second embodiment of the present invention will be described below with reference to the drawings.

8 (a) to 8 (d) and 9 (a) to
(C) is sectional drawing which shows each process of the formation method of the multilayer metal wiring based on 2nd Example of this invention.

Similar to the first embodiment, after the metal wiring 2 of the first layer is formed on the semiconductor substrate 1 as shown in FIG. 8A, the first metal wiring 2 is formed as shown in FIG. 1 layer metal wiring 2
A first SiO ₂ film 3 as a first interlayer insulating film is formed on the semiconductor substrate 1 on which is formed, and then, as shown in FIG.
As shown in, the SOG film 4 as the second interlayer insulating film is formed on the first SiO ₂ film 3.

Next, unlike the first embodiment, without forming the molecular layer 10, as shown in FIG. 8D, the second SiO 2 serving as the third interlayer insulating film is formed on the SOG film 4. ₂ film 5
To form.

Next, as shown in FIG. 9A, the second S
A resist pattern 7 having a desired shape is formed on the iO ₂ film 5. After that, as shown in FIG. 9B, the first SiO ₂ film 3 and the SOG film 4 are formed using the resist pattern 7 as a mask.
After the through hole 8 is formed by etching the second SiO ₂ film 5 and the second SiO ₂ film 5, the hydrophobic molecular layer 10 is formed on the second SiO ₂ film 5 in the same manner as in the first embodiment. Form.

Next, as shown in FIG. 9C, a film thickness of 30 n is formed on the first-layer metal wiring 2 and the second SiO ₂ film 5.
m Ti film, 70 nm thick TiN film, 700 nm thick
After sequentially depositing the aluminum alloy film and the TiN film having a film thickness of 70 nm, the second metal wiring 9 is formed by patterning the multilayer metal layer including the Ti film, the TiN film, the aluminum alloy film and the TiN film.

The evaluation test conducted to evaluate the second embodiment will be described below.

A multilayer metal wiring having a cross section as shown in FIG. 7 was produced by the above-mentioned steps, and the electrical characteristics of 2500 samples were measured to obtain the yield. The result is
As shown in Table 2, a yield of 97% or more was obtained. The through hole diameter at this time was 1.0 micron. The yield of the multilayer metal wiring having a through-hole diameter of 1.0 micron, which was manufactured by the same process as the conventional process except the process of forming the molecular layer 10, was 57%.

[0078]

[Table 2]

In a multi-layer metal wiring having a through-hole diameter of 1 micron, the SOG in the through-hole is very thin.
Since the film 4 is formed, disconnection is likely to occur in the second-layer metal wiring 9. However, according to the second embodiment, the SOG that absorbs a lot of moisture is used.
Since the molecular layer 10 made of hexamethyldisilazane having hydrophobicity is formed after the film 4 is etched, the SOG film 4 can be prevented from absorbing.
Electrical disconnection in the layer metal wiring 9 can be reliably prevented.

(Third Embodiment) A third embodiment of the present invention will be described below with reference to the drawings.

FIGS. 10A to 10D and FIGS. 11A to 11D.
(C) is sectional drawing which shows each process of the formation method of the multilayer metal wiring based on 3rd Example of this invention.

Similar to the first embodiment, as shown in FIG. 10A, after forming the first-layer metal wiring 2 on the semiconductor substrate 1, as shown in FIG. A first SiO ₂ film 3 as a first interlayer insulating film is formed on the semiconductor substrate 1 on which the one-layer metal wiring 2 is formed, and then, as shown in FIG.
As shown in (c), the SOG film 4 as a second interlayer insulating film is formed on the first SiO ₂ film 3.

Next, after the first molecular layer 10A having hydrophobicity is formed on the SOG film 4 in the same manner as in the first embodiment, as shown in FIG. A second SiO ₂ film 5 as a third interlayer insulating film is formed on the SOG film 4 having the layer 10A formed thereon (the first molecular layer 10A is omitted in FIG. 10D). To do.

Next, as shown in FIG. 11A, after a resist pattern 7 having a desired shape is formed on the second SiO ₂ film 5, the resist pattern 7 is used as a mask for the first S.
By etching the iO ₂ film 3, the SOG film 4 and the second SiO ₂ film 5, a through hole 8 is formed as shown in FIG. 11B.

Next, the metal wiring 2 of the first layer and the second Si
After forming the second molecular layer 10B on the O ₂ film 5, as shown in FIG.
As shown in FIG. 1A, a Ti film having a thickness of 30 nm and a thickness of 70 are formed on the first-layer metal wiring 2 and the second SiO ₂ film 5.
nm TiN film, 700 nm-thickness aluminum alloy film, and 70 nm-thickness TiN film are sequentially deposited, and then a multilayer metal layer including the Ti film, the TiN film, the aluminum alloy film, and the TiN film is patterned to form a second layer. Metal wiring 9
To form.

The evaluation test conducted to evaluate the third embodiment will be described below.

By the steps described above, a multilayer metal wiring having a cross section as shown in FIG.
The yield was obtained by measuring the electrical characteristics of the sample. As a result, as shown in Table 3, a yield of 99% or more was obtained. The through hole diameter at this time was 1.0 micron. The yield of the multilayer metal wiring having a through-hole diameter of 1.0 micron, which was manufactured by the same process as the conventional process except the process of forming the molecular layer 10, was 57%.

[0088]

[Table 3]

According to the third embodiment, the hydrophobic first molecular layer 10A is formed on the SOG film 4, and S
Since the second molecular layer 10B having hydrophobicity is formed after etching the OG film 4, it is possible to almost completely prevent the absorption of the SOG film 4 having a high hygroscopic property.
Second multi-layer metal wiring with a through hole diameter of 1 micron
Electrical disconnection in the layer metal wiring 9 can be almost completely prevented.

In each of the above-mentioned embodiments, the interlayer insulating film is formed of the first SiO ₂ film 3, the SOG film 4 and the second SiO 2.
_{Although the} three-layered structure including the _two films 5 is used, the same effect can be obtained regardless of the number of layers of the interlayer insulating film.

In each of the above embodiments, SiH ₄
The first SiO ₂ film 3 and the second SiO ₂ film 5 were formed by the plasma CVD method by supplying a mixed gas of N2O and N ₂ O. Instead of this, tetraethoxysilane and O ₂ The first and third interlayer insulating films may be formed by plasma CVD or atmospheric pressure CVD by supplying a mixed gas or a mixed gas of tetraethoxysilane and O ₃ .

Although the SOG film 4 is used as the second interlayer insulating film in each of the above-mentioned embodiments, it may be replaced by
Even when using a TEOS-O ₃ film described in the prior art section, the effect of the present invention is obtained.

FIG. 12 is a characteristic diagram for explaining that the TEOS-O ₃ film has a hygroscopic property.
₃ film was heated, shows the result of the moisture released from the TEOS-O ₃ film and mass spectrometry. In FIG. 12,
As a measurement sample, a TEOS-O ₃ film was deposited and left in the air for 24 hours and a sample was left for 144 hours, and tetraethoxysilane and O ₂ were added to show that the TEOS-O ₃ film has a large moisture absorption amount. 2 shows a sample of a P-TEOS film (which was left in the atmosphere for 24 hours after the film was deposited) on which a mixed gas of and was deposited by a plasma CVD method. From FIG. 12, it can be seen that the heating temperature is 10 when the absorbed moisture is released.
It peaks at 0 ° C to 200 ° C, and TEOS-
It is shown that the O ₃ film absorbs about 6 times as much moisture as the peak value as compared with the P-TEOS film. From this, TEOS
It can be seen that the —O ₃ film is a film having a strong hygroscopic property like the SOG film, and has the problem described in the section of the related art.

Table 4 shows the relationship between the material and forming method of the interlayer insulating film and the denseness and hygroscopicity of the interlayer insulating film. The lower the denseness of the interlayer insulating film is, the higher the hygroscopicity is. Is shown.

[0095]

[Table 4]

Since the hygroscopic property is not low except for the interlayer insulating film formed by the plasma CVD method using the SiH ₄ type material, Si
The present invention is preferably applied to the case of using an interlayer insulating film formed by plasma CVD of an H ₄ -based material.

In each of the above embodiments, hexamethyldisilazane, which is a disilazane compound, was used as the material for forming the molecular layer. However, instead of this, another disilazane compound, a silane compound, or a siloxane compound was used. ,
A trisilazane compound, a piperazine compound, an aminogermanium compound or a germanium halide compound may be used.

Further, in each of the above-mentioned Examples, the first molecular layer forming apparatus was used to supply vaporized hexamethyldisilazane for several minutes to form the hydrophobic molecular layers 10, 10A and 10B. However, instead of this,
The second molecular layer forming apparatus may be used to form the molecular layer by dropping the hexamethyldisilazane solution onto the semiconductor substrate 1 while rotating the substrate holding table 62 and thus the semiconductor substrate 1.

[0099]

According to the method for forming a multi-layered metal wiring according to the first aspect of the present invention, the interlayer insulating film is formed at a low temperature and has a high hygroscopic property, but a molecular layer having a hydrophobic property on the interlayer insulating film. Since the interlayer insulating film is etched into a desired shape after forming, the interlayer insulating film is not exposed to the air in the step of etching the interlayer insulating film, the interlayer insulating film is difficult to absorb moisture, and corrosion or disconnection occurs in the multilayer metal wiring. You can prevent the situation.

According to the method for forming a multilayer metal wiring according to the invention of claim 2, after forming a hydrophobic molecular layer on the etched interlayer insulating film, a second molecular layer is formed on the molecular layer.
Since the inter-layer insulating film is not exposed to the air in the step of forming the second-layer metal wiring, the inter-layer insulating film is less likely to absorb moisture, preventing corrosion or disconnection of the multi-layer metal wiring. it can.

According to the method for forming a multi-layered metal wiring according to the third aspect of the invention, since the silylation reaction is used for forming the molecular layer, the silylation reaction is easily carried out between room temperature and hundreds of tens of degrees Celsius. The controllability of the molecular layer formation is very easy, and the adhesion stability between the molecular layer and the substrate is excellent,
Since the gas used for the silylation reaction is already used in the LSI process, there is no problem in use such as the influence of impurities contained in the LSI, and the molecular layer can be easily removed by washing with water or plasma treatment. The reaction between the substrate surface and the reaction gas does not proceed on the substrate surface where the molecular layer is formed, so that a uniform molecular layer is formed and the molecular size of the reaction gas is large. Even if the quality of the insulating film is rough, water molecules do not penetrate into the interlayer insulating film, so the molecular layer is excellent in hydrophobicity, and even if there are irregularities such as holes in the interlayer insulating film, Since the molecular layer is easily formed, the molecular layer is formed surely and uniformly.

According to the method for forming a multi-layered metal wiring according to the invention of claim 4, since the molecular layer is formed by the surfactant, the hydrophobic molecular layer can be surely formed on the interlayer insulating film. .

According to the method for forming a multi-layered metal wiring according to the invention of claim 5, the semiconductor substrate is heated to a temperature of 500 ° C. or lower between the second step and the third step of the invention of claim 1 or 2. A step of removing moisture in the interlayer insulating film by heating is provided, and the moisture of the interlayer insulating film is removed before the molecular layer having hydrophobicity is formed on the interlayer insulating film. Even if it takes a long time from the formation of the layer to the formation of the molecular layer, the moisture in the interlayer insulating film is extremely small, and therefore, it is possible to reliably prevent the situation in which the multilayer metal wiring is corroded or disconnected.

According to the method for forming a multi-layered metal wiring according to the invention of claim 6, the semiconductor substrate is heated to a temperature of 500 ° C. or less between the third step and the fourth step of the invention of claim 2. It comprises a step of removing moisture in the interlayer insulating film by removing the moisture of the interlayer insulating film before forming a hydrophobic molecular layer on the interlayer insulating film.
Even when it takes time from the formation of the interlayer insulating film to the formation of the molecular layer, the moisture in the interlayer insulating film is extremely small, so that it is possible to reliably prevent the occurrence of corrosion or disconnection in the multilayer metal wiring.

According to the method for forming a multilayer metal wiring according to the invention of claim 7, after forming a hydrophobic molecular layer on the interlayer insulating film formed at a temperature of 500 ° C. or lower, the interlayer insulating film is formed. While etching to the desired shape,
After forming a hydrophobic molecular layer on the etched interlayer insulating film, a second layer metal wiring is formed on the molecular layer. Therefore, the etching process of the interlayer insulating film and the second layer metal wiring are performed. Since the interlayer insulating film is not exposed to the atmosphere in the step of forming, it is extremely difficult for the interlayer insulating film to absorb moisture, and it is possible to reliably prevent corrosion and disconnection of the multilayer metal wiring.

According to the method for forming a multi-layered metal wiring according to the eighth aspect of the present invention, since the first and second molecular layers are formed by the surfactant, the first and second hydrophobic layers are formed on the interlayer insulating film.
Also, the second molecular layer can be reliably formed.

According to the method for forming a multi-layered metal wiring according to the ninth or tenth aspect of the present invention, a hydrophobic molecular layer can be reliably formed on the interlayer insulating film.

According to the method for forming a multi-layered metal wiring of the eleventh aspect of the present invention, an organic silane-based material is deposited on the semiconductor substrate as C
Since it is deposited by the VD method to form an interlayer insulating film, 50
The interlayer insulating film can be reliably formed at a temperature of 0 ° C. or lower.

According to the method of forming a multi-layered metal wiring according to the invention of claim 12, the silanol-based material is deposited on the semiconductor substrate by the liquid coating method to form the interlayer insulating film.
The interlayer insulating film can be reliably formed at a temperature of 00 ° C. or lower.

[Brief description of drawings]

FIG. 1 is a diagram showing the results of Fourier transform infrared absorption spectrum measurement of an insulating film formed by a low pressure CVD method and an atmospheric pressure CVD method.

FIG. 2A is a diagram showing a surface state of an interlayer insulating film having fine pores and easily absorbing moisture, and FIG. 2B is a surface state of an interlayer insulating film having fine pores and hardly absorbing moisture. FIG.

FIG. 3 shows moisture absorption in the case where a molecular layer is formed and when the molecular layer is not formed on an interlayer insulating film formed by atmospheric pressure CVD method at a deposition temperature of 450 ° C. using TEOS and O ₃ as source gases. It is a figure which shows a quantity.

4A to 4C are cross-sectional views showing a process of forming a molecular layer in each example of the present invention.

5A to 5D are cross-sectional views of respective steps of the method for forming a multilayer metal wiring according to the first embodiment of the present invention.

6A to 6C are cross-sectional views of respective steps of the method for forming a multilayer metal wiring according to the first embodiment of the present invention.

FIG. 7 is a cross-sectional view of a multi-layer metal wiring for measuring the electrical characteristics of the multi-layer metal wiring obtained by the method for forming the multi-layer metal wiring according to the first embodiment.

8A to 8D are cross-sectional views of respective steps of the method for forming a multilayer metal wiring according to the second embodiment of the present invention.

9A to 9C are cross-sectional views of each step of the method for forming a multilayer metal wiring according to the second embodiment of the present invention.

10A to 10D are cross-sectional views of respective steps of a method for forming a multilayer metal wiring according to a third embodiment of the present invention.

11A to 11C are cross-sectional views of respective steps of the method for forming a multilayer metal wiring according to the third embodiment of the present invention.

FIG. 12 is a diagram showing measurement results of absorption mass of an interlayer insulating film used in each example of the present invention.

FIG. 13 is a schematic cross-sectional view of a first molecular layer forming apparatus used in each example of the present invention.

FIG. 14 is a schematic sectional view of a first molecular layer forming apparatus used in each example of the present invention.

15A to 15D are cross-sectional views of each step of a conventional method for forming a multilayer metal wiring.

16A to 16C are cross-sectional views of each step of a conventional method for forming a multilayer metal wiring.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 1st layer metal wiring 3 1st SiO ₂ film (1st layer interlayer insulation film) 4 SOG film (2nd layer interlayer insulation film) 5 2nd SiO ₂ film (3rd layer insulation film) Interlayer insulating film) 7 Resist pattern 8 Through hole 9 Second layer metal wiring 10 Molecular layer 10a Reaction gas molecule 11A First molecular layer 11B Second molecular layer

Front page continuation (72) Inventor Noboru Nomura 1006 Kadoma, Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (12)

[Claims] 1. A first step of forming a metal wiring of a first layer made of aluminum or an aluminum alloy on a semiconductor substrate, and 50 on the semiconductor substrate on which the metal wiring of the first layer is formed.
A second step of forming an interlayer insulating film at a temperature of 0 ° C. or lower, and a third step of forming a hydrophobic molecular layer on the interlayer insulating film formed at a temperature of 500 ° C. or lower. A fourth step of etching the interlayer insulating film having the molecular layer formed into a desired shape, and a fifth step of forming a second-layer metal wiring on the etched interlayer insulating film. A method for forming a multi-layered metal wiring, which comprises: 2. A first step of forming a first layer metal wiring made of aluminum or an aluminum alloy on a semiconductor substrate, and 50 on the semiconductor substrate on which the first layer metal wiring is formed.
A second step of forming an interlayer insulating film at a temperature of 0 ° C. or lower, a third step of etching the interlayer insulating film formed at a temperature of 500 ° C. or lower to a desired shape, and the etched interlayer A multi-layer including a fourth step of forming a hydrophobic molecular layer on the insulating film and a fifth step of forming a second-layer metal wiring on the molecular layer. Method for forming metal wiring. 3. The method for forming a multi-layered metal wiring according to claim 1, wherein the molecular layer is formed by a silylation reaction. 4. The method for forming a multi-layered metal wiring according to claim 1, wherein the molecular layer is formed of a surfactant. 5. The semiconductor substrate on which the interlayer insulating film is formed is kept at 500 ° C. between the second step and the third step.
3. The method for forming a metal wiring according to claim 1, further comprising the step of removing moisture inside the interlayer insulating film by heating to the following temperature. 6. The semiconductor substrate on which the interlayer insulating film is formed is kept at 500 ° C. between the third step and the fourth step.
The method for forming a multilayer metal wiring according to claim 2, further comprising a step of removing moisture inside the interlayer insulating film by heating to the following temperature. 7. A first step of forming a first-layer metal wiring made of aluminum or an aluminum alloy on a semiconductor substrate, and 50 on the semiconductor substrate on which the first-layer metal wiring is formed.
A second step of forming an interlayer insulating film at a temperature of 0 ° C. or lower, and a third step of forming a hydrophobic first molecular layer on the interlayer insulating film formed at a temperature of 500 ° C. or lower. And a fourth step of etching the interlayer insulating film having the first molecular layer formed into a desired shape, and forming a hydrophobic second molecular layer on the etched interlayer insulating film. And a sixth step of forming a metal wiring of a second layer on the second molecular layer, the method for forming a multilayer metal wiring. 8. The method for forming a multi-layered metal wiring according to claim 7, wherein the first molecular layer and the second molecular layer are formed of a surfactant. 9. The method for forming a multi-layered metal wiring according to claim 4, wherein the surfactant contains silicon or germanium. 10. The multilayer according to claim 4, wherein the surfactant is a silane compound, a siloxane compound, a disilazane compound, a trisilazane compound, a piperazine compound, an aminogermanium compound or a germanium halide compound. Method for forming metal wiring. 11. In the second step, an organic silane-based material is deposited on the semiconductor substrate on which the metal wiring of the first layer is formed.
8. The method for forming a multilayer metal wiring according to claim 1, which is a step of forming an interlayer insulating film by depositing by a VD method. 12. The second step is a step of forming an interlayer insulating film by depositing a silanol-based material by a liquid coating method on a semiconductor substrate on which the metal wiring of the first layer is formed. The method for forming a multi-layered metal wiring according to claim 1, 2, or 7.