JPH07326610A - Forming method of element isolation region of semiconductor device - Google Patents

Forming method of element isolation region of semiconductor device

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Publication number
JPH07326610A
JPH07326610A JP11668794A JP11668794A JPH07326610A JP H07326610 A JPH07326610 A JP H07326610A JP 11668794 A JP11668794 A JP 11668794A JP 11668794 A JP11668794 A JP 11668794A JP H07326610 A JPH07326610 A JP H07326610A
Authority
JP
Japan
Prior art keywords
element isolation
isolation region
semiconductor device
forming
silicon oxynitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11668794A
Other languages
Japanese (ja)
Inventor
Tetsuo Gocho
哲雄 牛膓
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP11668794A priority Critical patent/JPH07326610A/en
Publication of JPH07326610A publication Critical patent/JPH07326610A/en
Pending legal-status Critical Current

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  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To obtain a forming method of an element isolation region of a semiconductor device which makes it possible to form the element isolation region excellently and also to realize shortening of a process. CONSTITUTION:In a forming method of an element isolation region of a semiconductor device wherein the element isolation region 2 is formed on a semiconductor substrate 1, the element isolation region is formed by using a selective oxidation method wherein only a single layer of a silicon oxi-nitride film 3 formed on the semiconductor substrate is made a mask. A bird's beak amount of the element isolation region is regulated by the contents of oxigen and nitrogen in the silicon oxi-nitride film 3, as occasion demands.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置の素子分離
領域の形成方法に関する。本発明は、各種の半導体装置
における素子分離領域の形成方法として利用でき、例え
ば、高度に微細集積化されたメモリー素子等の集積半導
体回路の製造における素子分離領域の形成方法に利用す
ることができる。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an element isolation region of a semiconductor device. INDUSTRIAL APPLICABILITY The present invention can be used as a method for forming an element isolation region in various semiconductor devices, for example, a method for forming an element isolation region in manufacturing an integrated semiconductor circuit such as a highly finely integrated memory device. .

【0002】[0002]

【従来技術及びその問題点】従来から、半導体デバイス
の素子間分離には、選択酸化法が用いられることが多
く、例えば図2(a)に示すように、半導体基板1(図
示ではSi基板)上のパッド酸化膜1a(通常Si
2 )と窒化膜1b(通常Si3 4 )の2層からなる
マスクを用いて酸化を行い、図2(b)に示すように素
子分離領域2をなす酸化膜を形成する選択酸化法(シリ
コン半導体装置についてのLOCOS法等)が用いられ
てきている。
2. Description of the Related Art Conventionally, a selective oxidation method is often used for element isolation of a semiconductor device. For example, as shown in FIG. 2A, a semiconductor substrate 1 (Si substrate in the figure) is used. Upper pad oxide film 1a (usually Si
O 2 ) and a nitride film 1b (usually Si 3 N 4 ) are used to perform oxidation to form an oxide film forming an element isolation region 2 as shown in FIG. 2B. (LOCOS method or the like for a silicon semiconductor device) has been used.

【0003】ところで、近年はコスト低減のため、更な
る工程短縮が望まれている。
By the way, in recent years, in order to reduce the cost, further shortening of the process is desired.

【0004】しかし、工程短縮を狙って、図3に示すよ
うに、パッド酸化膜形成工程を除いて窒化膜1b(図3
(a))のみをマスクとして用いると、バーズビークは
低減されるものの、図3(b)に符号Aで示す酸化膜と
アクティブ領域(活性層)との界面に大きな応力が集中
し結晶欠陥が発生し、ジャンクションリーク電流の増大
を招く傾向になる。
However, in order to shorten the process, as shown in FIG. 3, except for the pad oxide film forming process, the nitride film 1b (see FIG.
If only (a)) is used as a mask, bird's beaks are reduced, but large stress concentrates on the interface between the oxide film and the active region (active layer) indicated by the symbol A in FIG. However, the junction leakage current tends to increase.

【0005】一方、図4に示すように、窒化膜形成工程
を除いて図4(a)のような酸化膜1dのみをマスクと
して用いると、マスクとした膜(酸化膜1d)と酸化し
て得た膜(素子分離領域2′)の両方がSiO2 である
ため、マスクをエッチングしたときには酸化した膜も除
去されてしまい、素子間分離領域を形成できないという
問題がある。
On the other hand, as shown in FIG. 4, when only the oxide film 1d as shown in FIG. 4A is used as a mask except for the step of forming a nitride film, it is oxidized with the masked film (oxide film 1d). since both of the resulting film (element isolation region 2 ') is SiO 2, when etching the mask film oxidized will be removed, it is impossible to form an element isolation region.

【0006】上記の窒化膜のみをマスクとしたときの問
題点である応力集中は、バーズビークの伸びとトレード
オフの関連にあり、酸化膜成長時の膜厚増加を強制的に
押さえつけすぎると大きな応力集中が起こるので、バー
ズビークをある程度成長させることにより応力を緩和し
ている。そのバーズビークの伸びは、主にパッド酸化膜
厚や窒化膜厚及び両者の膜厚比によって最適化されてき
た。それゆえ2層構造のマスクが必要であり、結局、工
程の低減は実現し得なかったのである。
The stress concentration, which is a problem when using only the above-mentioned nitride film as a mask, has a trade-off relationship with the elongation of the bird's beak, and if the film thickness increase during the growth of the oxide film is forcibly suppressed, a large stress occurs. Since concentration occurs, the stress is relieved by growing some bird's beaks. The bird's beak elongation has been optimized mainly by the pad oxide film thickness, the nitride film thickness, and the film thickness ratio of the two. Therefore, a mask having a two-layer structure is necessary, and eventually, the number of steps cannot be reduced.

【0007】[0007]

【発明の目的】本発明は、上記従来技術の問題点を解決
して、良好に素子分離領域を形成できるとともに、工程
の短縮化を実現できる半導体装置の素子分離領域の形成
方法を提供することを目的とする。
SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for forming an element isolation region of a semiconductor device, which can solve the problems of the above-mentioned prior art and can form an element isolation region satisfactorily and also can shorten the process. With the goal.

【0008】[0008]

【問題点を解決するための手段】本出願の請求項1の発
明は、半導体基板に素子分離領域を形成する半導体装置
の素子分離領域の形成方法であって、半導体基板上に形
成したシリコンオキシナイトライド膜単層のみをマスク
とした選択酸化法を用いて素子分離領域を形成すること
を特徴とする半導体装置の素子分離領域の形成方法であ
って、これにより上記問題点を解決するものである。
The invention according to claim 1 of the present application is a method of forming an element isolation region of a semiconductor device, which comprises forming an element isolation region on a semiconductor substrate, the method comprising the step of forming a silicon oxide on a semiconductor substrate. A method for forming an element isolation region of a semiconductor device, characterized by forming the element isolation region using a selective oxidation method using only a single layer of a nitride film as a mask, which solves the above problems. is there.

【0009】本出願の請求項2の発明は、シリコンオキ
シナイトライド膜中の酸素と窒素の含有率により、素子
分離領域のバーズビーク量を調整することを特徴とする
請求項1に記載の半導体装置の素子分離領域の形成方法
であって、これにより上記問題点を解決するものであ
る。
According to a second aspect of the present invention, the bird's beak amount in the element isolation region is adjusted by adjusting the oxygen and nitrogen contents in the silicon oxynitride film. The method for forming the element isolation region is to solve the above problems.

【0010】[0010]

【作用】本発明によれば、シリコンナイトライド膜をマ
スク材料に用いるので、これはパッド酸化膜と窒化膜の
両者の効果を合わせ持たせたものであるので、上記素子
分離領域の良好な形成を実現でき、かつ、シリコンオキ
シナイトライド膜単層をマスク材料に用いることで、工
程短縮をも達成する。このように本発明は、シリコンオ
キシナイトライド膜単層のみをマスクとした選択酸化法
を用いた素子分離領域の形成法であり、これにより大き
な応力集中は無く、かつバーズビークは従来法と同程度
の素子分離を工程数を低減して行える。
According to the present invention, since the silicon nitride film is used as the mask material, it has both the effect of the pad oxide film and the effect of the nitride film. By using a silicon oxynitride film single layer as a mask material, the process can be shortened. As described above, the present invention is a method of forming an element isolation region using a selective oxidation method using only a single layer of a silicon oxynitride film as a mask, whereby no large stress concentration occurs, and bird's beaks have the same degree as the conventional method. The element isolation can be performed by reducing the number of steps.

【0011】また、本発明は、バーズビークの伸びの制
御をシリコンオキシナイトライド膜中の酸素と窒素の含
有比率により調整する構成で実施でき、よってバーズビ
ーク量を調整することが可能である。
Further, according to the present invention, the elongation of the bird's beak can be controlled by adjusting the content ratio of oxygen and nitrogen in the silicon oxynitride film, and the amount of bird's beak can be adjusted accordingly.

【0012】本発明によれば、SRAMやASIC等の
半導体デバイスにおいて、パッド酸化膜の形成工程とそ
のための前処理工程及びパッド酸化膜除去工程を削減で
き、工程の短縮化が実現でき、コスト低減効果をももた
らすことができる。
According to the present invention, in a semiconductor device such as SRAM or ASIC, a pad oxide film forming step, a pretreatment step therefor and a pad oxide film removing step can be omitted, and the steps can be shortened and the cost can be reduced. It can also have an effect.

【0013】[0013]

【実施例】以下図面を参照して、本発明の実施例につい
て説明する。但し当然のことではあるが、本発明は以下
に述べる実施例により限定を受けるものではない。
Embodiments of the present invention will be described below with reference to the drawings. However, as a matter of course, the present invention is not limited to the examples described below.

【0014】実施例1 この実施例は、本発明を、SRAMやASIC等のシリ
コン半導体装置の素子分離領域の形成に適用したもので
ある。
Example 1 In this example, the present invention is applied to the formation of an element isolation region of a silicon semiconductor device such as SRAM or ASIC.

【0015】本実施例を図1に示す。本実施例は、半導
体基板(ここではSi基板)に素子分離領域2(図1
(b))を形成する半導体装置の素子分離領域の形成方
法であって、図1(a)に示す半導体基板1上に形成し
たシリコンオキシナイトライド膜単層のみをマスクとし
た選択酸化法を用いて素子分離領域を形成するものであ
る。
This embodiment is shown in FIG. In this embodiment, a device isolation region 2 (see FIG. 1) is formed on a semiconductor substrate (here, a Si substrate).
(B)) is a method of forming an element isolation region of a semiconductor device, which comprises a selective oxidation method using only a silicon oxynitride film single layer formed on a semiconductor substrate 1 shown in FIG. 1A as a mask. It is used to form the element isolation region.

【0016】本実施例においては、シリコンオキシナイ
トライド(SiOx y )膜中の酸素と窒素の含有率に
より、素子分離領域のバーズビーク量を調整するように
した。
In this embodiment, the bird's beak amount in the element isolation region is adjusted by adjusting the oxygen and nitrogen contents in the silicon oxynitride (SiO x N y ) film.

【0017】以下本実施例の工程について、更に詳しく
説明する。本実施例においては、図1(a)の如く、半
導体基板1であるベアSi基板に、シリコンオキシナイ
トライド膜3を形成する。この時の成膜条件の例(条件
1)を以下に示す。
The process of this embodiment will be described in more detail below. In this embodiment, as shown in FIG. 1A, a silicon oxynitride film 3 is formed on a bare Si substrate which is the semiconductor substrate 1. An example of the film forming conditions (condition 1) at this time is shown below.

【0018】条件1 装置 LPCVD装置 ガス SiH2 Cl2 =50sccm,NH3 =20
0sccm,N2 O=5sccm 圧力 70Pa 温度 760℃
Condition 1 Apparatus LPCVD apparatus Gas SiH 2 Cl 2 = 50 sccm, NH 3 = 20
0 sccm, N 2 O = 5 sccm Pressure 70 Pa Temperature 760 ° C.

【0019】本実施例では、シリコンオキシナイトライ
ド膜中の酸素と窒素の含有率を制御するようにして実施
した。この制御は、例えば、N2 Oの添加量をパラメー
タとして行うことができる。即ち、N2 Oの添加量が多
いほど含有酸素の比率が増すので、これを利用してシリ
コンナイトライド膜中の酸素と窒素の含有率を制御でき
る。
In this example, the contents of oxygen and nitrogen in the silicon oxynitride film were controlled. This control can be performed using, for example, the amount of N 2 O added as a parameter. That is, since the proportion of oxygen contained increases as the amount of N 2 O added increases, the content of oxygen and nitrogen in the silicon nitride film can be controlled by utilizing this.

【0020】シリコンオキシナイトライド膜形成後、フ
ォトレジストパターニングし、RIEにてシリコンオキ
シナイトライドを選択的に除去する。これにより図1
(a)に示すように、パターン状のシリコンオキシナイ
トライド膜3が得られる。なお本発明ではシリコンオキ
シナイトライド膜を酸化防止用のマスクとして用いるの
で、通常の形成条件のシリコンオキシナイトライド膜よ
り一般に窒素の含有比率を高くするのがよい。この実施
例はそのような条件になっている。よって、エッチング
条件(ここではRIE条件)は、シリコンオキシナイト
ライド膜のRIE条件と同じでよい。
After the silicon oxynitride film is formed, the photoresist is patterned and the silicon oxynitride is selectively removed by RIE. As a result,
As shown in (a), a patterned silicon oxynitride film 3 is obtained. In the present invention, since the silicon oxynitride film is used as a mask for preventing oxidation, it is generally preferable that the nitrogen content ratio be higher than that of the silicon oxynitride film under normal forming conditions. This embodiment has such a condition. Therefore, the etching conditions (here, RIE conditions) may be the same as the RIE conditions for the silicon oxynitride film.

【0021】フォトレジスト除去後、シリコンナイトラ
イド膜3単層をマスクとした選択酸化を行い、その後シ
リコンオキシナイトライド膜3をホットリン酸にて除去
する。以上によって、図1(b)に示す素子分離領域2
を形成できる。
After removing the photoresist, selective oxidation is performed using the single layer of silicon nitride film 3 as a mask, and then the silicon oxynitride film 3 is removed by hot phosphoric acid. From the above, the element isolation region 2 shown in FIG.
Can be formed.

【0022】本実施例によれば、SRAMやASIC等
の半導体デバイスにおいて、良好に素子分離領域を形成
できるとともに、従来の如きパッド酸化膜の形成工程や
そのための前処理工程及びパッド酸化膜除去工程を削減
でき、工程の短縮化が実現でき、コスト低減効果をもも
たらすことができる。
According to the present embodiment, in the semiconductor device such as SRAM and ASIC, the element isolation region can be formed well, and the conventional pad oxide film forming step and the pretreatment step and pad oxide film removing step therefor. Can be reduced, the process can be shortened, and the cost can be reduced.

【0023】実施例2 本実施例では、実施例1と同様に素子分離領域を形成し
たが、ここではシリコンオキシナイトライド膜形成に、
次の条件(条件2)を用いた。
Example 2 In this example, the element isolation region was formed in the same manner as in Example 1, but here, in forming the silicon oxynitride film,
The following conditions (condition 2) were used.

【0024】条件2 装置 LPCVD ガス SiH4 =50sccm,NH3 =200sc
cm,N2 =2000sccm,N2 O=5sccm 圧力 70Pa 温度 760℃
Condition 2 Apparatus LPCVD gas SiH 4 = 50 sccm, NH 3 = 200 sc
cm, N 2 = 2000 sccm, N 2 O = 5 sccm Pressure 70 Pa Temperature 760 ° C.

【0025】本実施例での、シリコンオキシナイトライ
ド膜中の酸素と窒素の含有率の制御は、実施例1の条件
1と同じくN2 Oの添加量をパラメータとして行えばよ
い。同様に、N2 Oの添加量が多いほど含有酸素の比率
が増す。
In this embodiment, the oxygen and nitrogen contents in the silicon oxynitride film may be controlled by using the amount of N 2 O added as a parameter, as in the condition 1 of the first embodiment. Similarly, the greater the amount of N 2 O added, the greater the proportion of oxygen contained.

【0026】本実施例も、実施例1と同様の効果が得ら
れる。
In this embodiment, the same effect as that of the first embodiment can be obtained.

【0027】[0027]

【発明の効果】上述した如く、本発明よれば、良好に素
子分離領域を形成できるとともに、工程の短縮化を実現
できる半導体装置の素子分離領域の形成方法を提供する
ことができた。
As described above, according to the present invention, it is possible to provide a method for forming an element isolation region of a semiconductor device, which can form an element isolation region satisfactorily and also can shorten the process.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例1の工程を示すものである。FIG. 1 shows steps of Example 1 of the present invention.

【図2】従来技術を示す図である。FIG. 2 is a diagram showing a conventional technique.

【図3】問題点を示す図である。FIG. 3 is a diagram showing a problem.

【図4】問題点を示す図である。FIG. 4 is a diagram showing a problem.

【符号の説明】[Explanation of symbols]

1 半導体基板 2 シリコンオキシナイトライド 3 素子分離領域(酸化膜) 1 semiconductor substrate 2 silicon oxynitride 3 element isolation region (oxide film)

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】半導体基板に素子分離領域を形成する半導
体装置の素子分離領域の形成方法であって、 半導体基板上に形成したシリコンオキシナイトライド膜
単層のみをマスクとした選択酸化法を用いて素子分離領
域を形成することを特徴とする半導体装置の素子分離領
域の形成方法。
1. A method of forming an element isolation region of a semiconductor device, wherein an element isolation region is formed on a semiconductor substrate, using a selective oxidation method using only a silicon oxynitride film single layer formed on a semiconductor substrate as a mask. A method for forming an element isolation region of a semiconductor device, which comprises forming an element isolation region by means of the above method.
【請求項2】シリコンオキシナイトライド膜中の酸素と
窒素の含有率により、素子分離領域のバーズビーク量を
調整することを特徴とする請求項1に記載の半導体装置
の素子分離領域の形成方法。
2. The method for forming an element isolation region of a semiconductor device according to claim 1, wherein the bird's beak amount of the element isolation region is adjusted by adjusting the contents of oxygen and nitrogen in the silicon oxynitride film.
JP11668794A 1994-05-30 1994-05-30 Forming method of element isolation region of semiconductor device Pending JPH07326610A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11668794A JPH07326610A (en) 1994-05-30 1994-05-30 Forming method of element isolation region of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11668794A JPH07326610A (en) 1994-05-30 1994-05-30 Forming method of element isolation region of semiconductor device

Publications (1)

Publication Number Publication Date
JPH07326610A true JPH07326610A (en) 1995-12-12

Family

ID=14693388

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11668794A Pending JPH07326610A (en) 1994-05-30 1994-05-30 Forming method of element isolation region of semiconductor device

Country Status (1)

Country Link
JP (1) JPH07326610A (en)

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