JPH07325152A - Distance measuring equipment - Google Patents

Abstract

PURPOSE:To reduce the possibility of interference between the equipments by generating a transmission start signal having a random time lag every time when a transmission timing signal is generated at a predetermined period and then delivering a pulse signal to a target based on the transmission start signal. CONSTITUTION:A microcomputor section 10 provides an oscillator 12 with a signal 100 for setting the phase difference between clock pulses 102, 103 from a reference oscillator 11 and a PLL oscillator 12 thus varying the phase difference. When transmission pulse signals 107 are delivered 160 times during a single distance measuring operation, for example, the phase difference is varied sequentially over eight types. A transmission start signal 106, generated depending on the pulse 103, is delayed randomly by the pseudo random data 104 generated from a pseudo random signal generating section 13 for every transmission. A transmitting section 15 outputs a signal 107 and stores a corresponding receiving pulse signal 108 at a memory section 21. The computor section 10 processes the receiving data to determine the distance up to a target which is then displayed at a display section 22.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a distance measuring device, and more particularly to a device for measuring a distance from a transit time of a pulse signal.

[0002]

2. Description of the Related Art FIG. 4 is a block diagram schematically showing the structure of a conventional distance measuring device of this type. In the device of FIG. 4, the microcomputer 2 outputs a transmission start signal to the transmitter 3 to start the distance measurement, and at the same time, A
A sampling signal for starting sampling is output to the / D converter 6, and an address setting signal for starting address setting is output to the reception waveform memory unit 7. In addition,
The transmission start signal, the sampling signal, and the address setting signal are output from the microcomputer 2 in synchronization with the reference clock for measuring the time of the reference clock generator 1.

Upon receiving the transmission start signal, the transmission section 3 immediately outputs a transmission pulse to an object outside the apparatus, and the reception section 4 receives a reflection signal from the object. The received signal is amplified by the amplifier 5, then converted into a digital signal by the A / D converter 6, and stored in a predetermined address of the reception waveform memory unit 7. The contents of the reception waveform memory unit 7 are averaged for each transmission start signal, and after collecting the reception waveform data a certain number of times, the target signal is detected and the distance to the object is obtained.

Next, a method for obtaining the distance from the target signal will be described. As described above, the reception waveform memory unit 7
The address setting of corresponds to the reference clock. That is, it corresponds to the time of "1 / reference clock frequency" per address. For this reason, if the data in the received waveform memory unit 7 that exceeds the set threshold value is set as the target signal, it is between the address (n) at which the target signal is detected and the pulse signal transit time (T) up to the target signal. The relationship expressed by the following expression (a) is established. T = n / reference clock frequency (a) The microcomputer 2 can calculate the distance to the object based on the pulse signal transit time (T) and the pulse signal velocity obtained based on the equation (a). .
The distance data calculated by the microcomputer 2 is output and displayed on the display unit 8.

[0005]

It is expected that the number of devices of the same type will increase when a use environment in which the above-described conventional distance measuring device is applied to an inter-vehicle distance sensor is considered. As a result, in the conventional device configuration, there is a possibility that the pulse signals interfere with each other and the target is erroneously recognized, and an erroneous measurement value is displayed. For example, when the oncoming vehicle is equipped with the same inter-vehicle distance sensor and both inter-vehicle distance sensors output transmission pulses at the same timing, when the preceding vehicle and the oncoming vehicle pass each other, The transmission pulse of the oncoming vehicle is received before the echo from the preceding vehicle for the pulse is received. As described above, the conventional distance measuring device has a disadvantage that it may detect an inter-vehicle distance shorter than the actual inter-vehicle distance with the preceding vehicle.

Further, when outputting an optical signal such as a laser as a pulse signal, a shorter transmission signal pulse width is safer to the eye if the output power is the same. However, if the transmission signal pulse width is shortened, it is necessary to shorten the sampling time of the pulse signal. For example, 10
When sampling a signal with a pulse width of nsec, 5nsec (200MHz) is necessary to detect the target signal without fail.
Sampling clock is required. When using such a high-speed clock, an element having a high-speed response is required. That is, a general-purpose digital IC cannot be used, and special and expensive parts are used.
The cost of the measuring device is very expensive.

The present invention has been made in view of the above-mentioned problems, and provides a distance measuring device which is highly reliable, has high reliability, is highly eye-safe, and is inexpensive, by greatly reducing the probability of interference between the devices. The purpose is to

[0008]

In order to solve the above problems, in the present invention, transmitting means for transmitting a pulse signal to a target object, receiving means for receiving a reflected pulse signal from the target object, and Distance detecting means for measuring the propagation time from the transmission of the pulse signal of the transmitting means to the reception of the reflected pulse signal by the receiving means, and calculating the distance to the target object based on the propagation time. In the distance measuring device, a transmission timing signal generating means for generating a transmission timing signal of a predetermined cycle, a delay time of a random length is generated, and a transmission start signal is delayed by the delay time each time the transmission timing signal is generated. And a transmission start signal generating means for generating a pulse signal toward the target based on the transmission start signal. Provides the distance measuring device.

According to a preferred aspect of the present invention, clock pulse generating means for generating a clock pulse of a predetermined frequency, and a sampling start signal for generating a sampling start signal with a delay of the delay time each time the transmission timing signal is generated. The transmission start signal generating means and the sampling start signal generating means generate the delay time in synchronization with the clock pulse, receive the sampling start signal in synchronization with the clock pulse. To sampling means for sampling the reflected pulse signal from the receiving means over a predetermined period, and storage means for storing the received data from the sampled reflected pulse signal for each sampling start signal. Means for receiving the received data stored in the storage means. Detecting the data of the target based on the level, measuring the propagation time until the reception from the transmission based on the data of the target of the storage means.

[0010]

In the distance measuring apparatus of the present invention, the transmission start signal of the pulse signal is generated in a cycle having both a predetermined cycle and a random cycle. That is, since the transmission start signal is generated by delaying the transmission timing signal having a predetermined cycle by a delay time of a random length, it is possible to make the transmission of the pulse signal random rather than the constant cycle. Therefore, by averaging a plurality of reception waveforms for every pulse signal transmission with random transmission start, a pulse signal that regularly enters from the outside can be reduced in the same manner as random noise. False distance measurement can be reliably prevented.

Further, even if the pulse signals are transmitted from the same distance measuring device, the pulse signals are transmitted at random.
Since the transmission timings of the pulse signals are not substantially the same between two same distance measuring devices, the interference probability is suppressed to be low and the reliability of the device is significantly improved. Furthermore, it is possible to reduce the noise level by averaging the received waveforms described above a plurality of times, and as a result, the S / N ratio is improved and the measurable range can be expanded.

Further, by measuring the distance while sequentially changing the phase difference between the transmission timing and the sampling timing, in other words, sequentially changing the transmission timing of the pulse signal with respect to the sampling timing, the transmission pulse having a narrow pulse width is obtained. The signal can be detected at a relatively slow sampling timing. That is, by narrowing the transmission pulse width, it is possible to provide a distance measuring device that is safe for the eyes, and it is possible to perform high-speed sampling timing even with a general-purpose element.

[0013]

Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a block diagram showing the configuration of a distance measuring device according to a first embodiment of the present invention. In FIG. 1, a microcomputer unit 10 constitutes a control unit of the distance measuring device of this embodiment, and includes, for example, a CPU and RO.
It is composed of an M, a RAM and an input / output port. It should be noted that the microcomputer unit 10 may be configured by a one-chip microcomputer when the overall size of the device is reduced. The reference oscillator 11 uses the first clock pulse 102 as a time reference for measuring the pulse transit time.
Is a first clock pulse generating means, and is composed of, for example, a crystal oscillator having high frequency stability.

The PLL oscillator 12 is a second clock pulse generating means for generating a second clock pulse 103 having the same frequency but different phase based on the first clock pulse 102 from the reference oscillator 11. The PLL oscillator 12 is a VCO (voltage control oscillator) whose output frequency can be controlled by a control voltage.
And a phase difference detector that detects the phase difference between the first clock pulse 102 and the second clock pulse 103, and an active LPF that converts the output of the phase difference detector into a control voltage.
(Low-pass filter). The offset voltage (phase difference setting signal 100) for changing the phase difference between the first clock pulse 102 and the second clock pulse 103 is supplied from the microcomputer unit 10 to PL.
It can be input to the active LPF of the L oscillator 12.

The pseudo random signal generator 13 is, for example, M
Pseudo-random data 104 including a sequence signal generator for changing the transmission timing each time a pulse signal is transmitted.
Is updated and output. The counter unit 14 is composed of, for example, a counter circuit, and the pseudo random data 10 loaded from the pseudo random signal generation unit 13 every time the pulse signal is transmitted.
4 is the second clock pulse 1 from the PLL oscillator 12
It counts with 03, and outputs the sampling start signal and the transmission start signal 106.

The transmitting unit 15 is composed of a pulsed laser diode and a laser diode drive circuit, and transmits a pulse signal 107 toward a predetermined target object based on a transmission start signal 106 from the counter unit 14. The receiving unit 16 includes a photoelectric conversion element (an avalanche photodiode in this embodiment) and a transimpedance amplifier, and the optical pulse signal 10 transmitted from the transmitting unit 15 is included.
Echo from target for 7, ie received pulse 1
08 is received, converted into an electrical signal 109 and output.

The amplifier unit 17 is composed of a high-band amplifier (a video amplifier in this embodiment) that amplifies the received signal 109 converted into an electric signal to a voltage level required for an A / D conversion unit 19 described later. . The sampling control unit 18
Upon receiving the sampling start signal 105 from the counter section 14 and synchronizing with the first clock pulse 102 from the reference oscillator 11, the sampling signal 111 is converted into the A / D conversion section 1.
9, a gate circuit that outputs the address signal 112 to the memory control unit 20 and a counter circuit that sets a memory address for storing the received signal level in the memory for each clock of the sampling signal 111. A /
The D conversion unit 19 is composed of a high-speed sampling type A / D converter that converts the amplified reception signal 110 into a digital value for each clock of the sampling signal 111.

The memory control unit 20 is a circuit for controlling access to the memory unit 21 described later based on the address signal 112 from the sampling control unit 18, and is, for example, 3
It is composed of a state buffer and a gate circuit.
The memory unit 21 can store the level data of the received signal with a memory capacity of “T / δt” or more based on the pulse transit time T corresponding to the distance measurement range and the sampling time δt corresponding to the distance measurement resolution. It is composed of a static RAM that can operate at high speed. Display unit 2
Reference numeral 2 is a display driver including, for example, a 7-segment LED and a gate circuit, and displays a measurement value which is a result calculated by the microcomputer unit 10.

The operation of the distance measuring apparatus of the first embodiment having the above-mentioned structure will be described. One distance measurement operation,
A pulse signal is transmitted a plurality of times (160 times in the present embodiment), a plurality of corresponding distance measurement data are fetched and arithmetic processing is performed, and a measurement value (distance measurement value) as an arithmetic processing result is displayed on the display unit 22.
Output to. By repeating this distance measuring operation, it is possible to continuously display the distance measuring value on the display unit 22. The operation will be described below by focusing on one distance measuring operation.

For example, when the pulse signal 107 is transmitted 160 times in one distance measuring operation, the first clock pulse 10 is transmitted while the transmission timing signal 101 is output 160 times.
The phase difference between the second clock pulse 103 and the second clock pulse 103 is, for example, 8
Change the type. In other words, the pulse signal transmission is performed 20 times with the first phase difference, and the same operation is repeated until the eighth phase difference. In this way, the transmission pulse signal 107 is output based on the transmission start signal 106 generated according to the second clock pulse 103 whose phase difference changes with respect to the first clock pulse 102, and the corresponding reception pulse signal 108 is output. From the sampling start signal 105 to the first clock pulse 1
The data is stored in the memory unit 21 in synchronization with 02.

The output timing of the transmission pulse signal 107 is set to 1 by the pseudo random data 104 as described later.
It changes with each transmission. However, since the sampling start signal 105 and the transmission start signal 106 are synchronized (based on the second clock pulse 103), the reception pulse signal 108 is transmitted to another noise (for example, transmission from another device) inside the device. It is not mistaken for a pulse signal. As mentioned above, the first clock pulse 1 during 160 transmissions
Since the phase difference between 02 and the second clock pulse 103 has been changed by eight types, 1 sampled in chronological order
Of 60 pieces of reception data, 20 (160/8) pieces of reception data have the same transmission and sampling timings (the phase difference between the first clock pulse 102 and the second clock pulse 103 is the same, The resulting stored address is the same).

The microcomputer unit 10 averages the received data whose transmission and sampling timings are the same as the received signal level, and outputs the first clock pulse 10
Received data averaged from the sampling start signal 105 in order of the pulse transit time is arranged according to the phase difference between the second clock pulse 103 and the second clock pulse 103. Microcomputer unit 10
Recognizes the target object from the average memory contents stored as received signal data in time sequence, and calculates the pulse transit time from the recognized memory address by calculation. Next, the distance to the target object is obtained based on the pulse transit time, and the obtained distance data 118 is output to the display unit 22. The display unit 22 displays the distance data 118 as the distance measurement value, thereby ending one distance measurement operation.

FIG. 3 is a timing chart showing the timing of each signal. The operation will be described focusing on the detailed operation of each unit with reference to the timing chart of FIG. The microcomputer unit 10 uses the time control of the internal clock to acquire the time required to capture the distance measurement data once (the product of the maximum value of the pseudo random data and the one cycle time of the second clock pulse + the distance measurement range). The transmission timing signal 101 is continuously output at a constant period equal to or more than the round-trip time of the pulse signal + the time required for averaging. For the transmission timing signal 101, the time determined by the sum of the product of the maximum value of the pseudo random data and the one cycle time of the second clock pulse and the round trip time of the pulse signal corresponding to the distance measurement range is set to High level, and averaged. Time is set to low level.

Before outputting the transmission timing signal 101, the microcomputer section 10 outputs the phase difference setting signal 100 for setting the phase difference between the first clock pulse 102 and the second clock pulse 103 to the PLL oscillator 12.
Output to. The phase difference setting signal 100 changes the set value of the phase difference every time the transmission timing signal 101 is transmitted a predetermined number of times (20 times in this embodiment). Phase difference setting signal 100
Are voltage levels of several types (8 types in this embodiment) determined in advance, and are output signals of the D / A converter. These eight voltage levels differ by δV volts,
The voltage is PL when the phase difference between the first clock pulse 102 and the second clock pulse 103 is 2π / 8.
The phase detector output of the L oscillator 12 is equal to the voltage level difference output through the LPF. In other words, when the phase difference setting signal 100 is changed by δV volts with respect to the first clock pulse 102, the phase of the second clock pulse becomes 1.
/ 8 cycles will change.

As will be described later, the microcomputer 10 outputs the transmission timing signal 101 (High level).
At the same time, the memory control signal is sent to the memory control unit 20 so that the data from the A / D conversion unit 19 can be stored in the RAM of the memory unit 21 at an address based on the address signal 112 from the sampling control unit 18. 11
7 is output. Further, as will be described later, the microcomputer unit 10 has a function of averaging received data whose transmission and sampling timings are the same, a function of arranging averaged memory contents in chronological order from the start time of the sampling start signal 105, and a time. There is a function of recognizing the target object from the memory results arranged in order and calculating the distance to the target object.

On the other hand, in the reference oscillator 11, the crystal oscillator operates after the power is turned on, and the first clock pulse 102 is used as the PLL for the time reference for measuring the pulse transit time.
Output to the oscillator 12 and the sampling control unit 18.
The first clock pulse 102 has a frequency at which an inexpensive general-purpose device can be used. In this embodiment, the frequency of the first clock pulse 102 is 25 MHz.

The PLL oscillator 12 receives the phase difference setting signal 100 from the microcomputer unit 10 and the first clock pulse 102 from the reference oscillator 11, and receives the first clock pulse 102.
The second clock pulse 103 having the same frequency as that of the clock pulse 102 and having a different phase according to the phase difference setting signal 100 is output from the VCO. The VCO can control the output frequency by the control voltage. The phase difference between the second clock pulse 103 output from the VCO and the first clock pulse 102 is detected by the phase comparator,
The phase difference is converted into a control voltage by the LPF and fed back as a control voltage of the VCO. Thus, a signal having the same frequency as the first clock pulse 102 and a stable phase difference is obtained.

The phase difference between the first clock pulse 102 and the second clock pulse 103 is set by the phase difference setting signal 100 having eight kinds of voltage levels. Eight kinds of phase difference setting signals 100 are given to the offset of the active LPF as voltage levels in δV steps from V to V + 7 × δV. When the phase difference setting signal 100 is given to the LPF as an offset, the control voltage of the VCO changes according to the voltage level, but the second clock pulse 103, which is the output from the VCO, is changed to the first clock by the feedback operation. The pulse 102 has the same frequency as the pulse 102 and has a phase difference corresponding to the voltage level of the phase difference setting signal 100. The first clock pulse 102 and the second clock pulse 103 satisfy the following relationship corresponding to the voltage level V to V + 7 × δV of the phase difference setting signal 100.

First clock pulse 102 = g (2πft) Second clock pulse 103 = g (2πft-a-2b
π / 8) Phase difference setting signal 100 = V + b × δV where g (x): periodic function representing a rectangular wave f: frequency (25 MHz) t: time a: 0 ≦ a ≦ 2π / 8 constant b: 0 ≦ b ≦ 7 An integer of 2π / 8 = 5n in the present embodiment, as described above.
It is set to sec.

The pseudo random signal generator 13 has, for example, 8
The shift register comprises an M-sequence signal generator having a configuration in which the shift register is connected in series and the output of the last stage and the output of the last stage are fed back to the first stage of the shift register by the exclusive OR circuit. Then, the pseudo random data 104 is updated by simultaneously operating the eight shift registers at the falling edges where the transmission timing signal 101 from the microcomputer 10 changes from the High level to the Low level. Pseudo random data 1
04 is the output of each of the eight shift registers,
Randomly changes between 1 and 255 (2 ⁸ -1) 8
It is a bit signal.

In this way, the pseudo random signal generator 13
Then, after outputting the previous pseudo random data to the counter unit 14 based on the rising edge of the transmission timing signal 101 from the microcomputer 10, the pseudo random data for delaying the next transmission timing at the falling edge of the transmission timing signal 101. 104 is generated.

On the other hand, in the counter section 14, the pseudo random data 104 loaded from the pseudo random signal generating section 13 at the rising edge of the transmission timing signal 101 input from the microcomputer 10 at a constant cycle changing from the low level to the high level. Is down-counted by the second clock pulse 103 and the count value becomes 0.
At this point, the sampling start signal 105 is sent to the sampling controller 18 and the transmission start signal 106 is sent to the transmitter 15.
Output to.

The pulse signal 107 from the transmitter 15
When the sampling of the reception signal 108 is started at the same time as the transmission of, the sampling start signal 105 is output when the count value of the counter unit 14 is 0, and the transmission start signal 106 is output when the count value of the counter unit 14 is −1. hand,
The transmission time of the pulse signal 107 may be delayed from the sampling start time. By the series of operations described above, the transmission timing signal 101 output from the microcomputer 10 in a constant cycle can be delayed by the time of the product of the pseudo random data 104 and the second clock pulse cycle, and the output cycle of the transmission start signal 106 can be delayed. Can be changed at random.

The transmitter 15 receives the transmission start signal 106 from the counter 14 and simultaneously drives the laser diode drive circuit to output the transmission pulse signal 107 toward the target. In this embodiment, the lighting pulse width of the transmission pulse signal 107 is set to 10 nsec in consideration of eye safety and the life of the pulsed laser diode.

The receiving unit 16 receives the echo from the target object with respect to the transmission pulse signal 107 from the transmitting unit 15,
The received pulse signal 108 is converted into an electric signal that can be easily processed in the subsequent stage. Transmit pulse signal 107 and receive pulse signal 1
Since the pulse width of 08 is as narrow as 10 nsec, the received pulse signal 108 is photoelectrically converted by an APD (avalanche photodiode) capable of supporting a high frequency region.

In the amplifier section 17, the received pulse signal 109 photoelectrically converted by the receiving section 16 is amplified to an appropriate level by the A / D converter 19, and the amplified received pulse signal 110 is supplied to the A / D converter 19. Output. When the signal level of the received pulse signal 108 from a short distance is high, the amplification degree may change with the passage of time from the sampling start signal 105.

The sampling control unit 18 generates a sampling signal 111 by passing the sampling start signal 105 from the counter unit 14 and the first clock pulse 102 from the reference oscillator 11 through an AND gate circuit.
Output to the A / D converter 19. Further, the counter circuit is operated by the first clock pulse 102 from the sampling start signal 105 to generate the address signal 112 for writing in the memory. The memory write signal uses the sampling signal 111, and outputs the address signal 112 including the memory write signal to the memory control unit 20.
The sampling control unit 18 detects the passage of time corresponding to the distance measurement range and stops the output of the sampling signal 111 and the counting of addresses. The passage of time corresponding to the distance measurement range can be obtained by (count value of address) × first clock pulse period (40 nsec).

The A / D converter 19 converts the received signal 110 amplified in synchronization with the sampling signal 111 from the sampling controller 18 into a digital value. Thus, the reception signal 110 is synchronized with the first clock pulse 102 from the sampling start signal 105 for 40 nsec.
The level data signal 113 which is converted into a digital value every time and is converted is output to the memory control unit 20.

The memory control section 20 controls the input / output of the memory section 21 based on the content of the memory control signal 117 from the microcomputer section 10. That is, the memory control unit 20 receives the memory control signal 117 output simultaneously with the transmission timing signal 101 from the microcomputer unit 10, and based on the address signal 112 including the memory write signal from the sampling control unit 18, the A / D
The level data signal 113 from the conversion unit 19 is transferred to the memory unit 2
Store in 1. Address and control signals are written from the memory control unit 20 to the memory unit 21 via the signal lines 114 and 115. Further, between the memory control unit 20 and the memory unit 21, data writing and reading are performed via the signal line 116.

The memory controller 20 recognizes from the address signal 112 that the memory 21 has been stored for a time corresponding to the distance measurement range, and stops writing the level data signal 113 to the memory 21, A memory control signal 117 is transmitted to the microcomputer unit 10 informing that the reception of the received data for one pulse signal transmission is completed. The memory unit 21 temporarily stores a received signal (received signal level including the passage of time) for one pulse signal transmission.

Memory control signal 1 indicating that reception data reception for one pulse signal transmission is completed
Upon receiving 17 from the memory control unit 20, the microcomputer unit 10 reads the contents of the memory unit 21 through the memory control unit 20 to perform the averaging process. Then, the received signal level with the same timing of transmission and sampling is added (that is, averaged) to the internal memory (memory for fetching distance data) of the microcomputer unit 10 and stored. The data to be added is received signal level data with the same transmission and sampling timings (the same phase difference). The number of additions is 20 in this embodiment, and the microcomputer unit 10 is operated before performing one distance measurement operation (operation from distance measurement data acquisition to display).
The internal memory of is cleared beforehand.

After the received signal data for one pulse signal transmission is averaged 20 times and stored in the microcomputer unit 10, the phase difference setting signal 100 is changed to perform the same operation for the next 20 transmission pulse signals. repeat. By changing the phase difference setting signal 100, the second clock pulse 10
The transmission pulse signal 107 output in synchronization with
Sampling signal 1 synchronized with clock pulse 102
The time of 11 is shifted by the phase difference. In this way, even when the sampling frequency is low, the transmission timing is slightly shifted from the sampling timing to increase the number of times of capturing data, so that the same effect as in the case of sampling at a frequency eight times higher can be obtained.

In this case, the transmission timing and the sampling timing are deviated in accordance with the set level of the phase difference setting signal 100, and accordingly, the pulse transit time to be the reference is shifted even for the echo from the same target. Therefore, it is necessary to change the address of the internal memory for fetching the distance data of the microcomputer unit 10 according to the setting level of the phase difference setting signal 100. That is, the microcomputer unit 10 corresponding to the phase difference setting signal 100
For the address of the internal memory, the lower 3 bits of the address are changed from 111 to 000 in binary corresponding to the voltage level V to V + 7 × δV of the phase difference setting signal 100, and the upper address from 4 bits is counted by the sampling controller. Make it the same as the address. By this operation, the received signal data collected by one distance measuring operation is rearranged in the order of pulse transit time according to the difference between the transmission timing and the sampling timing.

By the above operation, the distance measurement data, which is the result of transmitting the transmission pulse signal 107 160 times, can be fetched in the internal memory of the microcomputer section 10. The pulse traveling time to the target is detected from the distance measurement data stored in the internal memory, and the distance to the target is calculated based on the detected pulse traveling time. The calculated distance to the target is displayed on the display unit 22 as distance data.
Will be output and displayed. As described above, it is possible to continuously display the distance measurement value on the display unit 22 by repeating the above distance measurement operation.

FIG. 2 is a block diagram showing the configuration of the distance measuring device according to the second embodiment of the present invention. The device of the second embodiment has the same configuration as the device of the first embodiment, but the first
In the embodiment, the transmission start signal was synchronized with the second clock pulse from the PLL oscillator, and the sampling signal was synchronized with the first clock pulse from the reference oscillator.
In the second embodiment, the transmission start signal is the first signal from the reference oscillator.
The sampling signal is synchronized with the clock pulse of
The difference is basically that it is synchronized with the second clock pulse from the oscillator.

It is clear that the difference between the configuration of the first embodiment and the configuration of the second embodiment only changes the order of shift between the transmission timing and the sampling timing. Therefore, the description of the configuration and the operation of the second embodiment, which are the same as those of the first embodiment, will be omitted.

[0047]

As described above, in the distance measuring device of the present invention, since the transmission start signal of the pulse signal is generated in a random cycle longer than a predetermined cycle, it is possible to reliably prevent erroneous distance measurement due to interference. Further, by measuring the distance while sequentially changing the phase difference between the transmission timing and the sampling timing, it becomes possible to provide a distance measuring device that is narrower in the transmission pulse width and safe for the eyes.
High-speed sampling timing is possible even with general-purpose elements. As a result, an inexpensive and highly accurate distance measuring device can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a distance measuring device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a distance measuring device according to a second embodiment of the present invention.

FIG. 3 is a timing chart showing the timing of each signal.

FIG. 4 is a block diagram showing a configuration of a conventional distance measuring device.

[Explanation of symbols]

 10 Microcomputer Section 11 Reference Oscillator 12 PLL Oscillator 13 Pseudo Random Signal Generation Section 14 Counter Section 18 Sampling Control Section 19 A / D Converter 20 Memory Control Section 21 Memory Section 22 Display Section

Claims (7)

[Claims] 1. A transmitting means for transmitting a pulse signal to a target object, a receiving means for receiving a reflected pulse signal from the target object, and a reflected pulse signal by the receiving means after the pulse signal of the transmitting means is transmitted. In a distance measuring device provided with a distance detecting means for measuring a propagation time until the reception of, and calculating a distance to the target object based on the propagation time, a transmission timing for generating a transmission timing signal of a predetermined cycle. A signal generating means, a transmission start signal generating means for generating a delay time of a random length, and generating a transmission start signal with a delay of the delay time each time the transmission timing signal is generated, the transmitting means: A distance measuring device, which transmits a pulse signal toward the target object based on the transmission start signal. 2. A clock pulse generating means for generating a clock pulse having a predetermined frequency, and a sampling start signal generating means for further generating a sampling start signal with a delay of the delay time each time the transmission timing signal is generated, The transmission start signal generation means and the sampling start signal generation means generate the delay time in synchronization with the clock pulse, synchronize with the clock pulse, and reflect from the reception means after receiving the sampling start signal. Sampling means for sampling a pulse signal for a predetermined period, and further comprising a storage means for storing the received data from the sampled reflected pulse signal for each sampling start signal, the distance detection means, in the storage means The target based on the signal level of the stored received data Data is detected and the distance measuring apparatus according to claim 1, characterized by measuring the propagation time from the transmission based on the data of the target to the reception of said storage means. 3. The clock pulse generating means has a first clock pulse generating means for generating a first clock pulse having a predetermined frequency, the first clock pulse generating means having the same frequency as the first clock pulse, and the first clock pulse. A second clock pulse generating means for generating a second clock pulse having a phase difference corresponding to the phase difference setting signal with respect to the pulse; and a phase difference between the first clock pulse and the second clock pulse. Phase difference setting means for generating the phase difference setting signal to be determined, wherein the transmission start signal generating means synchronizes with either one of the first clock pulse and the second clock pulse. To generate the delay time, and the sampling means synchronizes the reflected pulse signal with the other of the first clock pulse and the second clock pulse. Sampling, the storage means stores the received data from the reflected pulse signal at an address corresponding to the phase difference between the first clock pulse and the second clock pulse for each sampling start signal, and the distance The detection means combines the reception data stored in the storage means based on the phase difference, detects the data of the target object based on a signal level of the combined reception data, and detects the target object of the storage means. The distance measuring device according to claim 2, wherein the propagation time from the transmission to the reception is measured based on the data of (3). 4. The transmission start signal generating means includes a pseudo-random signal generating means for generating pseudo-random data for randomly delaying a transmission timing signal generated at the predetermined cycle, and the pseudo-random data. 4. The distance measuring device according to claim 3, further comprising a counter unit that counts with the one clock pulse and generates a delay time associated with the pseudo random data and the one clock pulse. 5. The counter means counts the pseudo random data with the one clock pulse, and generates a delay time corresponding to a product of the pseudo random data and a cycle of the one clock pulse. The distance measuring device according to claim 4. 6. The sampling means is for amplifying the reflected pulse signal received by the receiving means to a predetermined level, and for converting the reflected pulse signal amplified by the amplifying means into a digital value. A / D conversion means, receiving the sampling start signal, determining the timing of the A / D conversion in synchronization with the other clock pulse, and receiving data converted into a digital value by the A / D conversion means. 6. The distance measuring device according to claim 3, further comprising sampling control means for determining an address of the storage means for storing the. 7. The distance detecting means averages received data having the same memory address according to the phase difference between the first clock pulse and the second clock pulse every time the transmission pulse signal is transmitted. Means for averaging, and data synthesizing means for synthesizing the averaged received data in time series from the transmission start time according to the phase difference between the first clock pulse and the second clock pulse, Calculation for detecting a target object based on the level of the combined reception data, and calculating a distance to the target object based on the address of the data corresponding to the detected target object and the speed of the transmission pulse signal. 7. The distance measuring device according to claim 3, further comprising a means.