JPH07322289A - Picture signal processing unit - Google Patents

Abstract

PURPOSE:To obtain the picture signal processing unit in which miniaturization is implemented and the weight is made light at low power consumption by improving the efficiency of a processing procedure of a picture signal and reducing the storage capacity of a frame memory storing picture data. CONSTITUTION:The transmission and reception of a signal among a memory controller 18 controlling the transmission reception of a picture signal outputted from an image pickup element 10, a YC processing circuit 24 converting a picture signal outputted from the memory controller 18 into picture data comprising a luminance signal and color difference signals and a compression processing circuit 20 applying compression processing to picture data outputted from the YC processing circuit 24 is implemented by hand-shake by a ready/busy signal. The picture signal outputted from the image pickup element 10 is stored once in a frame memory 29 and the stored picture data are not again stored in the frame memory 29 but given to the YC processing circuit 24, in which YC processing is conducted and to the compression expansion circuit in which the data are subject to compression processing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image signal processing device for processing an image signal obtained by an image pickup device or the like. For example, the image signal is compressed and recorded on a recording medium such as a memory card. The present invention relates to an image signal processing apparatus suitable for application to an electronic still camera that expands and reproduces an image signal read from a recording medium.

[0002]

2. Description of the Related Art Conventionally, a still camera has meant an apparatus using a film coated with a silver salt photosensitive material as an image recording medium. However, recently, an electronic still camera is commercially available which uses a memory card composed of a semiconductor memory as an information recording medium and stores image information representing a subject in the form of a digital signal. The electronic still camera has many features such as small size and light weight, image information can be recorded and stored in a memory card, instant reproduction to a visible image and expansion of utilization of digitized image data. Moreover, these days, the image quality of images taken with electronic still cameras has improved, and as an image sensor for capturing a subject,
For example, with an electronic still camera that employs an image sensor having a high pixel density of approximately 1.3 million pixels, it has become possible to obtain the image quality of silver halide photography.

FIG. 9 shows an example of a conventional image signal processing apparatus applied to an electronic still camera. Referring to the figure, an optical image representing a subject incident from the optical lens 10 is captured by the image sensor 12, and a video signal representing this optical image is subjected to white balance adjustment, gradation correction, etc. in the preprocessing circuit 14. Signal processing is performed and further converted into image data represented by a digital value by an analog / digital (A / D) converter 16. The image data output from the A / D converter 16 is stored in the frame memory 28 under the control of the memory controller 18, and the stored image data is stored in the YC processing circuit 24 in the luminance signal Y and the color difference signal RY, B-
Converted to image data represented by Y. YC processing circuit
The image data converted in 24 is again stored in the frame memory 28.
Stored in.

In FIG. 10, the storage area of the frame memory 28 is 2
This is conceptually represented as a form in which the luminance signal Y and the color difference signals RY and BY are respectively written in each of the divided regions. The YC-processed image data stored in the frame memory 28 is divided into a plurality of blocks, read out, sent to the compression / expansion circuit 20, compression-encoded by the compression / expansion circuit 20, and compression-encoded. Data is written in the memory card 22 and stored. When playing back the data stored in the memory card 22, the memory card
The compression-encoded data is read from 22 and expanded / decoded by the compression / expansion circuit 20. The decoded image data is once written in the frame memory 28, the written image data is sent to the reproduction circuit 26, and is reproduced as a visible image by the video monitor 32.

[0005]

However, the image signal processing apparatus according to the prior art having the above-mentioned structure has various contradictions because the number of pixels has been increased with the aim of the image quality in silver halide photography. For example, the main problems in an image signal processing device that processes an image signal obtained by a 1.3 million pixel solid-state image sensor (CCD) as an image sensor for capturing an object are as follows. A large-capacity frame memory for storing the image data to be represented is required, which causes a cost increase. Secondly, as a master clock for the operation of the equipment in order to perform high-speed image processing and data transfer. That is, a clock with a high frequency of 50 to 75MHz is required. These problems further induce the following problems.

1; Since the power consumption increases, the battery for supplying power becomes large and the portability of the camera is impaired.

2; The amount of heat generated increases with the increase in power consumption, and the package becomes large to radiate the heat in the camera.

In view of these drawbacks, it is an object of the present invention to provide an image signal processing apparatus which can reduce the capacity and power consumption of a memory and can be made inexpensive and small and lightweight.

[0009]

In order to solve the above problems, the present invention processes an image signal obtained by an image pickup device for picking up an object and records it on an information recording medium for storing information. In an image signal processing device that generates image information, the device includes a controller that outputs the image signals obtained by the image sensor in a predetermined order in response to a first request signal that requests the output of the image signal, A conversion processing unit that outputs a first request signal to a controller and converts the image signal output from the controller into image data composed of a luminance signal and a color difference signal, the conversion processing unit requesting output of the image data. A conversion processing means for outputting the second request signal to the conversion processing means, and a compression processing means for compressing the image data converted by the conversion processing means. I, characterized in that it comprises a compression process means for outputting the image data after the compression processing in response to the third request signal generated according to the information recording operation of the information recording medium.

In this case, this apparatus is a first accumulation means for accumulating the image signal obtained by the image pickup means, and a first accumulation means for outputting the accumulated image signal to the controller under the control of the controller. The storage means may be provided, and the controller may read the image signal stored in the first storage means by raster scanning and output the read image signal to the conversion means in response to the first request signal.

In this case, the apparatus further comprises a storage means connected to the compression means and having two storage areas for alternately accumulating the image data converted by the conversion means, and the compression means is the storage means. It is preferable to read the image data accumulated in the storage area for each predetermined block unit and sequentially compress the read image data for each block unit.

Further, this apparatus is a second accumulation means for accumulating the image signal obtained by the image pickup means, and the frame of the image formed by the accumulated image signal under the control of the controller. Is provided to the controller for each block unit that is divided into predetermined pixels, and the controller is configured to output the second storage unit in response to the first request signal.
The image signal accumulated in the accumulating unit may be read out for each block, and the read image signal in block units may be output to the converting unit.

In this case, the conversion means converts the predetermined block of the image signal read by the controller into
First delay means for delaying the image data in the previous block in the vertical direction of this block by one horizontal scanning period;
A second delay means for delaying the image signal in the vertical direction corresponding to a block adjacent to this block in the horizontal direction by one block, and the conversion means is delayed by the first delay means and the second delay means. It is preferable to convert the image signal output from the controller into image data composed of a luminance signal and a color difference signal based on the generated image signal.

Further, the controller generates a fourth request signal for requesting the output of the image signal from the image pickup means in response to the first request signal output from the conversion means, and the apparatus further includes the fourth request signal. It is preferable to include a signal generating means for generating a drive signal for driving the image pickup means in accordance with the signal.

Further, this apparatus is an information recording means for recording the image data compressed by the compression processing means on the information recording medium, and the third request signal is generated in accordance with the information recording operation on the information recording medium. Is preferably provided to the compression processing means.

The compression processing means may compress and code the image data converted by the conversion means into a variable length.

[0017]

According to the image signal processing apparatus of the present invention, the image signal output from the controller is transferred to the conversion processing means, the image data output from the conversion processing means is transferred to the compression processing means, and the compression processing means is transferred from the compression processing means. Transfer of the output image data to other means is performed by handshaking by the first, second, and third request signals. Therefore, it is not necessary to store the image data converted into the luminance signal and the color difference signal by the conversion processing means in the frame memory. Therefore, the conventional frame memory for storing the image data converted by the conversion means is reduced,
As a result, the memory cost can be reduced, the power consumption can be reduced, and the circuit can be downsized.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the image signal processing apparatus according to the present invention will be described in detail with reference to the accompanying drawings shown in FIGS. In these attached drawings, the same functional parts are denoted by the same reference numerals unless a distinction is required for the description.

Referring to FIG. 1, there is shown an embodiment of a still camera to which the image signal processing device of the present invention is applied.
In the still camera 1, a video signal representing an optical image of a subject incident from the optical lens 10 is generated by the image sensor 12, the image data representing the video signal is compressed and recorded in the memory card 23. This is a device for reproducing the image represented by the image data on the screen of the display device 32 as a visible image. Further, the still camera 1 has a function of reading out image data recorded in the memory card 23, decompressing the image data, outputting the image data to the display device 32, and reproducing the image data. However, the present invention is not limited to this, and instead of the memory card 23, another file storage device such as a magnetic disk or an optical disk can be effectively applied.

The image pickup device 12 picks up a subject image incident from the optical lens 10 and formed on its image pickup surface, and outputs a video signal converted into an electric signal. The image sensor 12 is, for example,
A single-chip solid-state imaging device (CCD) having a color filter of an RGB segment array and having a pixel number of about 1.3 million pixels is advantageously applied. The output 100 of the image sensor 12 is connected to the A / D converter 16, and the A / D converter 16 inputs the input 1 of the image sensor 12.
The analog video signal appearing at 00 is converted into digital image data. The output 102 of the A / D converter 16 is connected to the memory controller 18.

The memory controller 18 is a frame memory
A storage control circuit that controls writing to and reading from the frame memory 29. Specifically, the memory controller 18 outputs the image data appearing at the input 102 to the output 104.
To the frame memory connected to its output 104
The image data stored in the storage area of the frame memory 29 and the image data stored in the storage area of the frame memory 29 are read and input to the input 106, and the read image data is output to the output 108. The frame memory 29 is a memory circuit that stores and stores image data representing a subject image and the like. The frame memory 29 is input under the control of the memory controller 18.
The image data appearing at 104 is stored in the storage area. The frame memory 29 outputs the image data stored in the storage area under the control of the memory controller 18.
Output to. In the storage area of the frame memory 29, for example, 1280 pixels are arranged in the horizontal direction on the imaged screen, and 1024 pixels are arranged in the vertical direction, and a total of about 1.3 million pixels of RGB pixel data are stored. Has storage capacity.

Further, the memory controller 18 outputs the output 108.
Ready / Busy (Red
y / Busy) signal is input to the input 109, and the reading of the image data stored in the frame memory 29 and the output of the image data to the output 108 are controlled according to the input ready / busy signal. For example, the memory controller 18 has a function of detecting a busy signal (BUSY) from the YC processing circuit 24 connected to the input 109. For example, during detection of this busy signal, the image data stored in the frame memory 29 It has a function of interrupting reading.

The memory controller 18 is a frame memory
The image data read from 29 is output to the output 108, and the image data for display read from the frame memory 29 is output to the output 110. Memory controller 18
Output 108 is connected to the YC processing circuit 24, and output 110 is connected to the regeneration circuit 26.

The YC processing circuit 24 is a processing circuit for converting the RGB image data output from the memory controller 18 in the form of the three primary color signals into a signal composed of a luminance signal and a color difference signal. For details, see Y / C processing circuit 24
The image data stored in the frame memory 29 via the converter 16 and the memory controller 18 is converted into image data composed of a luminance signal Y and color difference signals RY, BY. The YC processing circuit 24 outputs the luminance signal Y generated from the image data read from the frame memory 29 in the raster scan to the output 112, outputs the generated color difference signals RY, BY to the output 114, and outputs these 112. And output 114 is connected to compression and decompression circuit 20.

The YC processing circuit 24 also receives a ready / busy signal (Redy / Buy signal from the compression / expansion circuit 20 connected to the input 116).
sy) is detected, for example, the YC processing circuit 24,
During the detection of the busy signal, the busy signal is output to the output 109 and the processing in the YC processing circuit 24 is temporarily stopped.

The compression / expansion circuit 20 is a circuit section for performing compression processing or expansion processing of image data. Compression / expansion circuit 20
Is a circuit for compressing the luminance signal Y and the color difference signals RY, BY raster input to the inputs 112 and 114, respectively, and for expanding the image data compressed and stored in the memory card 23. The compression processing and decompression processing in this embodiment are executed under the intervention of the raster / block conversion memory 21. The compression / decompression circuit 20 has inputs 112 and 11
The image data raster input to 4 is transferred to the raster / block conversion memory 21 connected to the output 120. The compression / expansion circuit 20 inputs the image data stored in the raster / block conversion memory 21 to the input 122 by block scanning, and compresses the input image data in block units. The compression / expansion circuit 20 outputs the compressed image data to the output 124.

The compression / expansion circuit 20 also receives a signal from the memory card 23 connected to the input 126 to read / busy (Redy / Busy).
Having a function of detecting a signal, for example, a compression / expansion circuit 20
Outputs a busy signal to the output 116 and suspends the processing in the compression / expansion circuit 20 during the detection of the busy signal. Further, the compression / expansion circuit 20 inputs the data communication capacity corresponding to the processing speed of the compression processing to the input 112 and the input 11
If the data transfer rate of the image data input to 4 is not sufficiently high, a busy signal is output to the output 116 to suspend the data transfer.

The raster / block conversion memory 21 is a memory for compressing and expanding image data.
This memory is composed of two banks A and B as shown in FIG. Further, in each of the banks A and B, one bank (storage area) stores image data of 1280 pixels for horizontal pixels and eight lines in the vertical direction for 80 Kbit (1280 × 8 × 8 [bit]). The storage area has two storage areas, one of which stores the luminance signal Y, and the other of which stores the color difference signal RY and the color difference signal BY. Therefore, raster /
The total storage capacity of the block conversion memory 21 is 320 Kbit (12
It has a storage capacity of 80 × 8 × 8 × 2 × 2 [bit]).

The memory card 23 is a storage device that stores and holds the image data compressed by the compression / expansion circuit 20. The memory card 23 is, for example, an EEPROM (electrically erasable and rewritable ROM) that does not require a battery to hold the stored contents, and is static.
A memory card configured with a storage element such as RAM may be used. The memory card 23 stores the compressed data compressed into a variable length code by the compression / expansion circuit 20, for example. The memory card 23 in this embodiment outputs a ready (Redy) signal as a request for sending image data when storing the image data compressed by the compression / expansion circuit 20 in the storage element.
Output to 6. Also, during the input of image data, if the image data cannot be stored in the storage element in time due to the large amount of image data, a busy signal for temporarily interrupting the data transfer is output to the output 126. .

In addition, the memory card 14 is used by a host device such as the still camera 1 of this embodiment or another image recording / reproducing apparatus.
The image data stored in is read, and the read image data is expanded in the compression / expansion circuit 20 and then stored in the frame memory 29. Frame memory 29
The image data stored in is read and output to the display device 32, and a visible image is displayed on the display screen of the display device 32.

Next, the flow of the image signal will be described. The image signal output to the output 100 of the image pickup device 13 is converted into a digital signal by the A / D converter 16 and temporarily stored in the frame memory 29 under the control of the memory controller 18.
The image data read by the raster scan from the frame memory 29 is converted by the YC processing circuit 24 into image data composed of the luminance signal Y and the color difference signals RY and BY.
The converted image data is input to the raster / block conversion memory 21 via the compression / expansion circuit 20, and the input image data is alternately stored in the banks A and B of the raster / block conversion memory 21. Written. The image data stored in the raster / block conversion memory 21 is read by a block scan. In this case, for example, the data stored in the other block B while the raster data is stored in one block A is read by a block scan. Be done. The read image data is compressed by the compression / expansion circuit 20, and the compressed data is written in the memory card 23.

In the above operation, the memory controller
The data transfer from 18 to the YC processing circuit 24, the data transfer from the YC processing circuit 24 to the compression / expansion circuit 20, and the data transfer from the compression / expansion circuit 20 to the memory card 23 are performed by handshaking with a ready / busy signal between the circuits. Is taken and executed. That is, the transfer of the image data from the frame memory 29 to the YC processing circuit 24 is performed by the memory controller 18 from the frame memory 29 in response to a request to send the image signal by the ready signal output from the YC processing circuit 24 to the memory controller 18. The image data is read and the read image data is output to the YC processing circuit 24. Thereafter, signal handshaking is similarly performed among the YC processing circuit 24, the compression / expansion circuit 20, and the memory card 23 in response to the request by the ready / busy signal.

According to this handshake, the entire processing is executed in accordance with the operation of the circuit section having the slowest processing speed. That is, the image data read from the frame memory 29 is YC processed by the YC processing circuit 24,
The image data is compressed by the compression / expansion circuit 20, and the compressed image data is recorded in the memory card 23. At this time YC
The processing circuit 24 is a compression / decompression circuit for YC-processed image data.
After sending to 20, the next image data is sent to the memory controller
The data is received from 18, and new YC processing is executed, but the processed data is held until there is a transmission request from the compression / expansion circuit 20 by a ready signal.

The same applies when the data is transmitted from the compression / expansion circuit 20 to record the data on a recording medium other than the memory card 23. The reason why this handshake is necessary is that the output signal from the compression / expansion circuit 20 is a variable length code. Since the frame memory 29 cannot store all the image data of one screen of the luminance signal Y and the color difference signals RY, BY during decompression reproduction, the frame memory 29 can be decimated in the horizontal direction, for example. Image reproduction can be performed using the 29.

FIG. 3 shows a still camera 2 of a second embodiment to which the image signal processing device of the present invention is applied. The difference between this still camera 2 and the embodiment of the still camera 1 shown in FIG. 1 is that, when the image data stored in the frame memory 29 is read out and YC processing is performed, the memory controller 38 causes the frame memory The difference is that the YC processing procedure in the YC processing circuit 25 is different from the point that the reading from 29 is performed by the block cancel that is read for each block of 8 pixels × 8 pixels. As a result, in this embodiment, since the image data is read from the frame memory 29 by block scanning, the raster / block conversion memory 21 of the embodiment shown in FIG. 1 is unnecessary, and in this embodiment, the frame memory 28 is used. Controller that controls reading of data
The configuration may be the same as that of the embodiment shown in FIG. 1 except for a partial functional configuration of 38. The differences between the memory controllers 38
The details will be described with a focus on the functions of and the procedure of YC processing.

A conceptual representation of the structure of image data in the frame memory 29 is shown in FIG. The frame memory 29 is composed of storage areas of two banks A and B for storing 1280 pixels in the horizontal direction of input image data for eight lines in the vertical direction. Frame memory 29
Under the control of writing and reading by the memory controller 38, writing and reading of image data are performed. The memory controller 38 performs control to divide the image data stored in the frame memory 29 into 8 pixels in the horizontal direction and read each block of 8 pixels × 8 pixels.
The read image data for each block is output to the output 108 and transferred to the YC processing circuit 24 connected to the output 108.
According to the configuration of the memory controller 38, one storage area of the bank is divided into 160 (1280/8 = 160) blocks. For example, referring to FIG.
The n-th block 500 is composed of 8 pixels × 8 pixels, and the horizontal 1H indicated by the diagonal line above the n-th block 5
The line 502 is the data of the eighth row of the nth block of bank A. Further, the column 504 of the block adjacent to the left of the nth block is the 8th column in the vertical direction of the n-1th block of bank B.
This is the data in the column. The details of the n-th block 500 will be described with reference to FIG. 6. In FIG. 6, the n-th block 500 composed of 8 pixels × 8 pixels and the eighth row of the block vertically adjacent to this block 1H line 502 (1H
Delay) and the data in the eighth column 504 of the horizontally adjacent blocks. This nth block 500
Block data is divided in pixel units, and the symbol i is
If there are 8 rows and the symbol j is 1 to 8 columns, the address of the unspecified pixel in the block can be expressed as n (i, j). The combination pixel of the four pixels shown in the figure represents an unspecified combination pixel 600 in the block. Referring to FIG. 7, details of the unspecified pixel group 600 are shown in FIG. 7, and the relationship between each pixel and the pixel position n (i, j) is shown in FIG.
However, this position is the case where the symbols i and j are 2 or more. When i = 1 or j = 1, the upper two pixels or the left two pixels are pixels in the adjacent block. Luminance signal Y
H is obtained, for example, from the average value of the values of these four pixels (R, B, G and G).

[0037]

## EQU1 ## Y = YH / 4 = (R + B + G + G) / 4 FIG. 4 shows a block diagram of a part of the configuration for obtaining the luminance signal YH of the YC processing circuit 25. Referring to the figure, YC processing in the YC processing circuit 25, that is, the image sensor 13
A circuit for obtaining the luminance signal Y in the process of converting the image data in the RGB signal format captured in the frame memory 29 into the format image data of the luminance signal Y and the color difference signals RY, BY is shown as a functional block diagram. ing. The YC processing circuit 25 in this embodiment is 8x from the frame memory 29.
This is a YC processing circuit that performs YC processing based on image data read by a block scan for every 8 pixels.

The write controller 42 of the YC processing circuit 25
Only when the symbol i of the address n (i, j) of the unspecified pixel is 8, the input image data is output to the 1H line memory 43 and stored therein. Further, the selector 44 selects the output of the 1H line memory 43 only when the symbol i of the address n (i, j) of the unspecified pixel is 1, and the selectors 47 and 50 select the address n ( Only when the symbol j of i, j) is 1, select the output of the one block delays 45 and 48.

The YC processing circuit 25 will be described in connection with the above description of FIGS. First, when adding the pixels at the positions when the symbols i and j in the nth block shown in FIG. 6 are 2 or more, the pixel n (i, j) of the image data read from the frame memory 29 is the data. The pixel n (i-1, j) delayed by 8 clocks by the 8CLK delay 41 is input to the adder 51 via the line 54, and is also input to the adder 51 via the selector 44. These pixels input to the adder 51 are added and added to the data line 55 by adding pixels, n (i, j) +
n (i-1, j) is output.

The output pixel n (i, j-1) delayed by 1 clock by the 1CLK delay 46 and passed through the selector 47 and 1CLK
The output pixel n (i-1, j-1) delayed by one clock in the delay 49 and passed through the selector 50 is added in the adder 52, and the added pixel n (i, j-1) + is added. n (i-1, j-1) is output to the data line 56.

The adder 53 further adds the addition pixels output from the adders 51 and 52, and adds four pixels,

[0042]

## EQU2 ## YH = n (i, j) + n (i-1, j) + n (i, j-1) + n (i-1, j-1) is obtained. This output YH is represented by the symbols R, B and G representing the contents of each pixel.

[0043]

## EQU3 ## It is replaced by YH = R + B + G + G.

When the symbol i or j is 1, the addition with the pixel of the adjacent block is performed by the control of the write control unit 42 by the 1H line adjacent to the pixel 600 shown in FIG.
The 502 pixel data is stored in the 1H line memory 43, and the 1H line memory 43 is selected by switching the selector 44.
Is selected, and one pixel of the 1H line pixel data is output. The pixel data of the column 504 is stored in the 1-block delays 46 and 48 in the same manner as the pixel data of the 1H line 502 described above, and the stored data is switched and selected by the selector 47 and the selector 50 to adder 52. Is output to. The luminance signal Y is obtained by the above procedure and the YC processing is executed. In this process, a memory with a capacity of 1280 x 8 [bit] for holding the pixel data of the 1H line 502 and 8 x 8 [bit] for holding the pixel data of the column 504 is required. However, in this embodiment, the raster / block conversion memory 21 of the first embodiment shown in FIG. 1 is unnecessary.

Next, referring to FIG. 8, there is shown a still camera 3 of a third embodiment to which the present invention is applied. The still camera 3 does not include a frame memory for accumulating image data for one screen constituting an image pickup screen, and the still camera 3 includes an image pickup device 13, an A / D converter 16, and a controller 4.
0, YC processing circuit 25, compression / expansion circuit 20 and memory card 2
It is a camera that performs the operation of each function unit of 3 based on a handshake by a ready / busy (BUSY) signal. The still camera 3 may have the same configuration as the still camera 2 of the embodiment shown in FIG. 3 except for the controller 40. Further, the still camera 3 drives the image pickup device 13 according to the control of the controller 40. Sampling signal oscillator (SS
G) 15. Controller 4 in this embodiment
0 is a ready / busy signal for controlling the drive of the image sensor 13 according to the ready / busy signal output from the YC processing circuit 25.
It has a function of outputting a busy signal to the sampling signal oscillator 15, and the sampling signal oscillator 15 responds to a ready / busy signal supplied from the controller 40.
A drive signal for driving the image sensor 13 is generated. At this time, the sampling signal oscillator 15 suspends the driving of the image sensor 13 when the busy signal is supplied from the controller 40, and starts the driving of the image sensor 13 when the ready signal is supplied. The image pickup device 13 is driven according to the drive signal supplied from the sampling signal oscillator 15. in this way,
In the still camera 3 in this embodiment, the output of the image signal from the image pickup device 13 is controlled by the control of the sampling signal oscillator (SSG) 15 according to the busy signal. Particularly, in this embodiment, the frame memory can be reduced by the handshake process from the output of the pixel signal of the image pickup device 13 to the storage of the image data in the memory card 23, whereby the still camera 3 performs the YC treatment. And it is only necessary to provide a buffer for the compression process.

As described above, the first, second and third
Each of the embodiments solves the problem of reducing the memory having a relatively high hardware cost ratio. Therefore, the reduction of the memory capacity is not limited to the reduction of the number of memory elements, but the reduction of the peripheral circuits accompanying this, the reduction of the number of signal processing times, the reduction of the processing time, and the reduction of the frequency of the machine clock for processing. In addition, ripple effects between circuits and devices such as reduction of power consumption, reduction of heat generation and miniaturization of devices occur.

The above-described embodiment is an example of a preferred embodiment of the present invention, but the present invention is not limited to this, and various modifications can be made without departing from the gist of the present invention. For example, the image signal processing device may be a recording-only device having no reproduction circuit, a magnetic recording medium may be used as a recording medium for storing image signals instead of a memory card, or an optical recording system may be used. A device may be used.

[0048]

As described above, according to the image signal processing apparatus of the present invention, the image signal output from the controller is transferred to the conversion processing means, and the compression processing means of the image data output from the conversion processing means. To the other means and the image data output from the compression processing means is performed by the handshake by the first, second and third request signals, and therefore, after being converted by the conversion processing means. The image data can be output to the compression processing means in the next stage without storing it in the frame memory.
As a result, it is possible to reduce the conventional frame memory that stores the image data that has been converted by the conversion unit, and reduce the storage capacity of the frame memory. Therefore, it is possible to realize a reduction in memory cost and a reduction in power consumption, and it is possible to provide a compact and lightweight image signal processing device.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a still camera to which an image signal processing device of the present invention is applied.

FIG. 2 is a conceptual diagram for explaining a form of an image signal stored in a frame memory of the embodiment shown in FIG.

FIG. 3 is a block diagram showing an embodiment of a still camera to which the image signal processing device of the present invention is applied.

FIG. 4 is a functional configuration block diagram for explaining a YC processing procedure in the YC processing circuit of the embodiment shown in FIG.

FIG. 5 is a conceptual diagram of the configuration of an image signal stored in a frame memory for explaining the YC processing procedure of the embodiment shown in FIG.

FIG. 6 is a detailed diagram of an n-th block in the conceptual diagram of the configuration of the image signal shown in FIG.

FIG. 7 is a detailed diagram of four set pixels of the n-th block of the image signal shown in FIG.

FIG. 8 is a block diagram showing an embodiment of a still camera to which the image signal processing device of the present invention is applied.

FIG. 9 is a block diagram showing an example of an image signal processing device based on a conventional technique.

FIG. 10 is a conceptual diagram for explaining a form of an image signal stored in a frame memory of the image signal processing device based on the conventional technique shown in FIG.

[Explanation of symbols]

 10 Optical lens 13 Solid-state image sensor (CCD) 16 A / D converter 18 Memory controller 20 Compression / expansion circuit 21 Raster / block conversion memory 23 Memory card 24 YC processing circuit 26 Playback circuit 32 Display device

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication H04N 5/781 5/91 H04N 5/91 J

Claims (8)

[Claims] 1. An image signal processing apparatus for processing an image signal obtained by an image pickup device for picking up an object to generate image information for recording on an information recording medium for storing information, said apparatus comprising: A controller that outputs the image signals obtained by the image sensor in a predetermined order in response to a first request signal that requests the output of an image signal; and a first request signal that is output to the controller. Conversion processing means for converting the image signal output from the controller into image data composed of a luminance signal and a color difference signal, the conversion processing outputting according to a second request signal for requesting output of the image data. Means for outputting the second request signal to the conversion processing means and compressing the image data converted by the conversion processing means, the information recording of the information recording medium. An image signal processing apparatus, comprising: a compression processing unit that outputs image data after compression processing according to a third request signal generated according to an operation. 2. The image signal processing device according to claim 1, wherein the device is a first storage unit that stores the image signal obtained by the image pickup unit, and is controlled by the controller. And a first storage unit that outputs the stored image signal to the controller, wherein the controller performs raster scan of the image signal stored in the first storage unit in response to a first request signal. An image signal processing device, which reads out and outputs the read image signal to the conversion means. 3. The image signal processing device according to claim 2, wherein the device is a memory having two storage areas connected to the compression means and alternately accumulating the image data converted by the conversion means. A compression unit that reads out the image data accumulated in the storage area of the storage unit for each predetermined block unit, and sequentially compresses the read image data in block units. Image signal processing device. 4. The image signal processing apparatus according to claim 1, wherein the apparatus is a second storage unit that stores the image signal obtained by the image pickup unit, and is controlled by the controller. A second storage unit that outputs the frame of the image formed by the stored image signal to the controller in units of blocks obtained by dividing the image frame into predetermined pixels, and the controller responds to the first request signal. An image signal processing apparatus, wherein the image signal accumulated in the second accumulating means is read out for each block, and the read image signal in block units is output to the converting means. 5. The image signal processing apparatus according to claim 4, wherein the conversion unit is a block preceding a predetermined block of the image signal read by the controller in a vertical direction of the block. And a second delay unit for delaying the image signal in the vertical direction corresponding to a block adjacent in the horizontal direction of the block by one block. The conversion means converts the image signal output from the controller into image data composed of a luminance signal and a color difference signal based on the image signal delayed by the first delay means and the second delay means. An image signal processing device characterized by the above. 6. The image signal processing apparatus according to claim 1, wherein the controller requests output of an image signal from the image pickup means in response to a first request signal output from the conversion means. 4. The image signal processing device according to claim 4, further comprising signal generating means for generating a drive signal for driving the image pickup means in response to the fourth signal. 7. The image signal processing apparatus according to claim 1, wherein the apparatus is information recording means for recording the image data compressed by the compression processing means on the information recording medium, An image signal processing apparatus comprising: an information recording means for outputting a third request signal to the compression processing means in accordance with an information recording operation on an information recording medium. 8. The image signal processing apparatus according to claim 1, wherein the compression processing means compression-codes the image data converted by the conversion means into a variable length. .