JPH07322066A - Picture processor - Google Patents

Abstract

PURPOSE:To provide a picture processor which can express hierarchy with satisfactory economy and high resolution by inputting multi-value picture infor mation in synchronizing with a signal by generating the necessary signal at the time of varying an area in accordance with input multi-value picture informa tion and reproducing the hierarchy. CONSTITUTION:The multi-value picture signal from a host computer and the like is converted into a signal having pulse width corresponding to the level of a picture signal in a PWM processing circuit through a hierarchy correction (TRC) processing circuit 2, is area-varied and it becomes a signal in which the hierarchy is reproduced. At the time of reproduction, the multi-value picture signal to the circuit 4 is inputted in synchronizing with the analog scaling signal of a period being 1/n of the period (n: integer) of a minimum part, which reproduces the hierarchy that a control circuit 3 generates, and the resolution of the output picture becomes an integer-multiple. Thus, a PWM circuit where high resolution can be obtained and a dither processing circuit as against a half tone picture become unnecessary and the picture processor with satisfactory economy and with high resolution is provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus used in a multivalued image forming apparatus such as a laser printer.

[0002]

2. Description of the Related Art For example, in an electrophotographic laser printer, a laser beam is modulated on the basis of an input image signal, and this laser beam is made uniform by an image-forming scanning optical system including a lens and a rotary polygonal polygonal mirror. It is irradiated onto the photoconductor which is charged to form an electrostatic latent image on the photoconductor. This electrostatic latent image is developed with toner to form a toner image, and this toner is transferred onto a sheet to form an image. An image signal from an external device, such as a host computer, is supplied to the laser printer to form a desired image on a sheet.

In a color printer, for example, charging, exposure, development and transfer are repeated for each color of yellow, magenta, cyan and black, and four color toner images are transferred in an overlapping manner on the same paper. , A color image output is obtained. In some cases, an independent image forming apparatus is provided for each color, the sheet is conveyed along each image forming apparatus, and the toner images of the respective colors on the sheet are overlapped and printed in each image forming apparatus.

In a color printer, a digital signal of a multi-valued image is input from an external device, the digital signal is converted into an analog signal in the printer, and the converted analog signal is compared with a reference signal generated internally to generate an analog signal. A pulse signal having a width corresponding to the value of the signal is generated, and the laser beam is modulated by this pulse signal. As a result, the laser beam is applied to the photoconductor for a time corresponding to the level of the image signal, and the gradation is reproduced in the scanning direction.

Some of such color printers are capable of switching the resolution of an output image. For example, when outputting characters and line drawings, increase the resolution so that characters and line drawings are clearly reproduced, and when outputting halftone images such as photographic images, lower the resolution. Improves gradation reproducibility.

For example, Japanese Patent Laid-Open No. 63-113775 and Japanese Patent Laid-Open No. 2-155711 disclose both a pulse width modulation circuit which can obtain high resolution and a dither processing circuit which can obtain good gradation reproducibility. It is described that the processing circuit is provided and the processing circuit is switched depending on the type of image. For example, a pulse width modulation circuit that obtains high resolution is applied to a character image, and a dither processing circuit that obtains good gradation reproducibility is applied to a halftone image.

[0007]

However, when both the pulse width modulation circuit and the dither processing circuit are provided inside the device, the whole circuit becomes complicated. Further, it is technically difficult to operate the analog circuit at high speed while maintaining accuracy. Furthermore, in order to operate the circuit at high speed, inexpensive general-purpose elements cannot be used, and special high-speed operable elements must be used, which causes a problem that the device becomes very expensive. .

Therefore, an object of the present invention is to provide an image forming apparatus which is inexpensive and is capable of high resolution and high gradation expression.

[0009]

In order to solve the above-mentioned problems, the present invention reproduces gradation in an image output device which reproduces gradation by varying the area according to input multi-valued image information. An image processing apparatus, characterized in that a signal having a cycle of an integral fraction of a cycle of a minimum unit is generated and the multi-valued image information is input in synchronization with the signal.

[0010]

According to the present invention, since multi-valued image information is input in synchronization with a signal having a period which is an integer fraction of the period of the minimum unit for reproducing gradation, the resolution of the output image becomes an integral multiple. .

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The features of the present invention will be specifically described below based on embodiments with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the image processing apparatus of the present invention.

A multivalued image signal from an external device (not shown) such as a host computer is subjected to gradation correction (TRC: Tone Product) via the video input circuit 1.
Ion Control) processing circuit 2. The gradation correction processing circuit 2 is prepared with some gradation correction characteristics in advance, and the gradation correction characteristics can be switched by a mode switching signal and a screen selection signal described later.

The image signal after gradation correction is pulse width modulated (PWM: Pulse Width Modulation).
n) The signal is supplied to the processing circuit 4, converted into a signal having a pulse width corresponding to the level of the image signal, and supplied to a laser driver (not shown) via the video output circuit 5. This laser driver is for modulating a laser beam from a laser provided inside the laser printer.

An image clock control circuit 3 for outputting a reference signal for performing pulse width modulation is connected to the pulse width modulation processing circuit 4.

FIG. 2 is a block diagram showing the internal structure of the image clock control circuit 3. Image clock control circuit 3
Is a timing changing circuit 6 and a screen control circuit 7
And a voltage controlled oscillator (VCO: Voltage Co
and a controlled oscillator circuit 8.

A mode switching signal and a screen selection signal are supplied to the gradation correction processing circuit 2 and the image clock control circuit 3 shown in FIG. The mode switching signal is a signal for switching the cycle of the pixel clock. Further, the screen selection signal indicates the type of screen, for example, 400
This is a signal for switching to a line / 25.4 mm or 200 lines / 25.4 mm screen. Further, the image clock control circuit 3 is supplied with a horizontal synchronizing signal, and the image clock control circuit 3 outputs an image clock.

The operation of the circuits shown in FIGS. 1 and 2 will be described below.

A multi-valued image signal from an external device (not shown) such as a host computer is supplied to the video input circuit 1. At this time, the types of images sent are classified in advance for each pixel by an external device (not shown).

When a multi-valued image signal is sent from an external device (not shown) and the video input circuit 1 receives it,
At the same time, a mode switching signal corresponding to the type of image to be output is sent from an external device (not shown). When the mode selects a predetermined cycle, a screen selection signal is sent at the same time.

In the image clock control circuit shown in FIG. 2, the oscillator circuit 8 is synchronized with the horizontal synchronizing signal (see FIG. 3A) indicating the start of the write timing of one line.
Works. Here, as the oscillator circuit 8, a voltage-controlled oscillator circuit in which a plurality of types of periods are easily obtained and whose oscillation frequency changes according to a control voltage is used. The screen selection signal (see FIG. 3B) is sent to the screen control circuit 7
And the pulse width modulation processing circuit 4 generates a triangular wave analog screen signal (see FIG. 3C).

Further, the mode switching signal is supplied to the timing changing circuit 6, and by this timing changing circuit 6,
The image clock is set to a predetermined cycle T1, or a cycle T1 / n (n: integer) that is a predetermined integer fraction, that is,
A signal as to whether the frequency is an integral multiple is input to the oscillator circuit 8 in synchronization with the operation of the oscillator circuit 8. The output of the oscillator circuit 8 is supplied to the pulse width modulation processing circuit 4.

In FIG. 1, a multi-valued image signal from an external device (not shown) is input to a gradation correction processing circuit 2 via a video input circuit 1 and a multi-valued image signal corresponding to a mode switching signal and a screen switching signal. The gradation correction of the value image is performed.
For example, in a photographic image, correction is performed so as to raise a low density portion including a non-linear gradation portion and suppress a high density portion. Further, in the line drawing, correction is performed so that the low density portion is suppressed and the high density portion is raised so that the contrast is clearly reproduced.

Thereafter, the multi-valued image signal is compared with the analog screen signal from the image clock control circuit 3 in the pulse width modulation processing circuit 4 and converted into a signal having a timing length proportional to the analog value. A laser driver (not shown) is driven via the video output circuit 5, and the laser driver controls ON / OFF of the laser beam.

The cycle of the image clock from the oscillator circuit 8 is the same as the analog screen signal. The cycle of this image clock depends on the type of laser printer, but it is 400 dots / sec at a paper feed speed of 160 mm / sec.
Color laser printers with a resolution of 25.4 mm have 200 lines / 25.4 mm and 400 lines / 25.4 mm.
It incorporates two analog screen cycles of mm.
The predetermined cycle is, for example, 100 ns in the case of a screen of 200 lines / 25.4 mm, and 50 ns in the case of a screen of 400 lines / 25.4 mm. It should be noted that dots / 25.4 mm indicate resolution, and lines / 25.4 mm indicate the number of halftone lines for gradation reproduction.

FIG. 3 is a timing chart showing changes in the analog screen due to switching of the analog screen signal.

Depending on the screen selection signal (see FIG. 3B), 400 lines / 25.4 mm or 200 lines / 25.
A screen of 4 mm is selected, an image clock of a predetermined cycle (see FIGS. 3D and 3F) corresponding to each screen is sent to an external device (not shown), and the external device sends image data. . That is, the image data is sent from the external device in synchronization with the image clock from the printer.
In this case, 400 lines / 25.4 mm is the minimum cycle of the predetermined cycle.

FIG. 4 is a timing chart showing the change of the image clock due to the switching of the mode switching signal.
In the example shown in FIG. 4, the analog screen signal B (see FIGS. 3E and 4D) is selected,
Mode switching signal (Fig. 4 (b)) in synchronization with the image clock
(See FIG. 4) is output, the cycle of the image clock is changed from the image clock B (see FIG. 4D) to the image clock C having a half cycle thereof (see FIG. 4E). However, the cycle of the analog screen signal B (see FIG. 4C) remains unchanged. Image clock is 800 dots / 25.4
The analog screen is 400 lines /
The period is 25.4 mm.

FIG. 5 is a timing chart showing the timing at which the data input in synchronization with the image clock C is output. As shown in FIG. 5 (f), by using half of the triangular wave, double resolution data is output to the printer. As a result, the above-mentioned 400 dots / 25.4 m
Using the same laser printer that writes at m, 800 dots / 25.4 mm can be written.

As a result, particularly when the image data is output at a high resolution like a character or a figure, it is possible to output a high quality.

In the above embodiment, the mode switching signal is used and the image data is processed by inputting the maximum density value and the minimum density value. However, the density is not limited to this value, and an intermediate density value does not matter. In the embodiment, the frequency is doubled, but it is also possible to use 3 or 4 times as long as the external device can send information of higher resolution.

[0032]

As described above, there is an effect that a color image processing apparatus having high resolution and high gradation can be provided without adding a special circuit.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an image processing apparatus of the present invention.

FIG. 2 is a block diagram showing an internal configuration of an image clock control circuit.

FIG. 3 is a timing chart showing changes in the analog screen due to switching of the analog screen signal.

FIG. 4 is a timing chart showing a change of an image clock due to switching of a mode switching signal.

FIG. 5 is a timing chart showing a timing at which data input in synchronization with an image clock is output.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Video input circuit, 2 ... Gradation correction processing circuit, 3 ... Image clock circuit, 4 ... Pulse width modulation processing circuit, 5 ... Video output circuit, 6 ... Timing changing circuit, 7 ... Scoon control circuit, 8 ... Oscillator circuit

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location H04N 1/40 103 A

Claims (5)

[Claims] 1. An image output device for reproducing a gradation by varying an area according to input multi-valued image information, and generating a signal with a cycle of an integer fraction of a cycle of a minimum unit for reproducing a gradation. The multivalued image information is input in synchronization with this signal. 2. The image processing apparatus according to claim 1, wherein the input multi-valued image information is a maximum density value and a minimum density value. 3. The image processing apparatus according to claim 1, wherein the processing circuit is switched according to an image type of the input multivalued image information. 4. The image processing apparatus according to claim 1, wherein the cycle, the gradation correction, and the pulse width modulation circuit are simultaneously switched according to the image type of the input multi-valued image information. 5. A means for converting an image signal from digital to analog, a gradation correcting means having a plurality of kinds of gradation characteristics, and a means for generating a plurality of kinds of predetermined cycles of a minimum unit for reproducing gradation. A unit for selecting the gradation characteristic and the predetermined period, a unit for generating a period that is an integral fraction of the predetermined period, and selecting either the predetermined period or a period that is an integral fraction of the predetermined period. An image processing apparatus comprising: means and means for inputting the image signal in synchronization with a selected cycle.