JPH07321624A - Gate circuit for self-arc-extinction type semiconductor element - Google Patents

Gate circuit for self-arc-extinction type semiconductor element

Info

Publication number
JPH07321624A
JPH07321624A JP6112339A JP11233994A JPH07321624A JP H07321624 A JPH07321624 A JP H07321624A JP 6112339 A JP6112339 A JP 6112339A JP 11233994 A JP11233994 A JP 11233994A JP H07321624 A JPH07321624 A JP H07321624A
Authority
JP
Japan
Prior art keywords
current
gate
capacitor
self
gate circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6112339A
Other languages
Japanese (ja)
Inventor
Kosaku Ichikawa
耕作 市川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP6112339A priority Critical patent/JPH07321624A/en
Publication of JPH07321624A publication Critical patent/JPH07321624A/en
Pending legal-status Critical Current

Links

Landscapes

  • Thyristor Switches And Gates (AREA)

Abstract

PURPOSE:To improve the reliability of the circuit by providing plural electrolytic capacitors in parallel with the gate circuit to monitor the discharge current of each capacitor thereby detecting a capacitor whose capacitance is lost indirectly and avoiding a sudden failure in turn-off. CONSTITUTION:In the gate circuit comprising a self-arc-extinction semiconductor element 1, when the gate circuit is in turn-off operation at a current less than a maximum interrupting current and any capacitor 3 whose capacitance is lost or opened is in existence in the capacitor group, a current of the capacitor 3 detected by current transformers 6a-6n is smaller than the current of the other normal capacitors 3. Since no signal is outputted from a comparator 7 receiving the current of the capacitor 3 whose capacitance is lost, a discrimination device 8 discriminates the defective capacitor. The discrimination device 8 makes discrimination while ranking faulty states depending on output states of plural comparators 7. Thus, the processing for issuing alarm and for conducting protection is ensured for the gate circuit in this way.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、自己消弧型半導体素子
のゲート回路に係り、特に急峻な大きいゲート電流を供
給するための自己消弧型半導体素子のゲート回路に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gate circuit of a self-arc-extinguishing semiconductor element, and more particularly to a gate circuit of a self-arc-extinguishing semiconductor element for supplying a large steep gate current.

【0002】[0002]

【従来の技術】ゲートターンオフサイリスタ(以下、G
TOと略す)や静電誘導型サイリスタ(以下、SITと
略す)などの自己消弧型半導体素子は、高速でターンオ
ン、あるいはターンオフさせるために、その制御極(ゲ
ート)と陰極間(カソード)に立ち上がりが急峻で比較
的大きなゲート電流を流す必要がある。立ち上がりが急
峻で大きい電流を得る方法としては、一般にコンデンサ
の蓄積電荷を放電させる方法がよく使用されている。G
TOやSITをターンオフさせるためのオフゲート電流
は、非常に重要であり、不十分なオフゲート電流は素子
破損に至らせる原因となる。
2. Description of the Related Art Gate turn-off thyristors (hereinafter referred to as G
Self-extinguishing type semiconductor devices such as TO (abbreviated as TO) and electrostatic induction thyristors (hereinafter abbreviated as SIT) are connected between their control poles (gates) and cathodes (cathodes) in order to turn them on or off at high speed. It is necessary to flow a relatively large gate current with a sharp rise. As a method of obtaining a large current with a sharp rise, a method of discharging the stored charge of the capacitor is generally used. G
The off-gate current for turning off the TO and SIT is very important, and the insufficient off-gate current causes damage to the device.

【0003】図4は、GTOのオフゲート電流を供給す
るための回路例を示したものであり、電源2によって充
電されたコンデンサ3の電荷を、スイッチング素子4を
オンすることによってGTO1にオフゲート電流を供給
するように構成されている。また、GTO1のゲート電
流IG とゲート・カソード間の電圧VGKとの間にはター
ンオフが完了したとき図5の特性図に示すような関係が
あり、オフゲート電流によってGTO内部の蓄積電荷が
排出されると、負側のゲート・カソード間電圧はツェナ
ー電圧特性が回復しターンオフが完了する。
FIG. 4 shows an example of a circuit for supplying an off-gate current of the GTO. Charge of the capacitor 3 charged by the power supply 2 is turned on to the GTO 1 by turning on the switching element 4. Is configured to supply. Further, there is a relationship between the gate current I G of the GTO 1 and the voltage V GK between the gate and the cathode as shown in the characteristic diagram of FIG. 5 when the turn-off is completed, and the accumulated charge inside the GTO is discharged by the off-gate current. Then, the Zener voltage characteristic of the gate-cathode voltage on the negative side is restored, and the turn-off is completed.

【0004】通常、図4のゲート回路において、電源2
の電圧は、GTOのゲート・カソード間ツェナー電圧に
合わした値にすることが合理的である。このように選ぶ
ことにより電流遮断後のオフゲート電流を速やかに零に
することができ、ゲート電源容量を最適にすることがで
きる。しかし、大容量GTOの蓄積電荷を排出するため
のゲート回路内のコンデンサには数千〜数万μFの容量
が必要であり、一般に電解コンデンサを使用する場合が
多く、しかも1個のコンデンサでは賄いきれない場合に
複数の電解コンデンサを並列にして使用することが多
い。しかしながら、電解コンデンサは、経年変化により
容量抜けを起こしたり、オープン故障を起こすことが知
られている。
Normally, in the gate circuit of FIG.
It is rational to set the voltage of 1 to a value that matches the gate-cathode Zener voltage of the GTO. By selecting in this way, the off-gate current after current interruption can be quickly reduced to zero, and the gate power supply capacity can be optimized. However, the capacitor in the gate circuit for discharging the accumulated charge of the large-capacity GTO needs to have a capacity of several thousand to several tens of thousands μF, and in general, an electrolytic capacitor is often used, and one capacitor is sufficient. If it is not possible, multiple electrolytic capacitors are often used in parallel. However, it is known that the electrolytic capacitor causes capacity loss or open failure due to aging.

【0005】[0005]

【発明が解決しようとする課題】ところで、GTOのタ
ーンオフ失敗破損を防止するためにGTOのオフゲート
電流やオフゲート電圧を監視し、保護する方法が提案さ
れている(特願昭59第119862号参照)。図6
は、オフゲート電圧をゲート・カソード間のツェナー電
圧と等しくした場合のアノード電流とオフゲート電流の
関係を示したもので、オフゲート電流は、点線IRG(実
線IRGM はGTOの定格電流を遮断する場合)に示すよ
うに、定格以下の電流IT を遮断しているときにはター
ンオフゲインで決まる電流までしか流れず、定格電流I
TMを遮断する時よりも小さくなる。なお、オフゲート電
流の増加率di/dtは、オフゲート電圧Eとゲート回
路の浮遊インダクタンスLで決定され、最大オフゲート
電流IRGmax は下記式のように決定される。
By the way, there has been proposed a method of monitoring and protecting the off-gate current and off-gate voltage of the GTO in order to prevent the failure of turn-off failure of the GTO (see Japanese Patent Application No. 11198662). . Figure 6
Shows the relationship between the anode current and the off-gate current when the off-gate voltage is equal to the Zener voltage between the gate and the cathode. The off-gate current is the dotted line I RG (solid line I RGM is the case where the GTO rated current is cut off). ), When the current I T below the rated current is cut off, only the current determined by the turn-off gain flows, and the rated current I T
It is smaller than when TM is shut off. The increase rate di / dt of the off-gate current is determined by the off-gate voltage E and the stray inductance L of the gate circuit, and the maximum off-gate current I RGmax is determined by the following formula.

【0006】アノード電流を遮断後はオフゲート電流
は、ゲート・カソード間ツェナー特性によりほとんど流
れなくなるので、オフゲート回路内のコンデンサに不具
合があり,遮断能力が低下していてもオフゲート電流や
電圧の監視では判断できない。
After the anode current is cut off, the off-gate current hardly flows due to the Zener characteristics between the gate and the cathode. Therefore, there is a problem with the capacitor in the off-gate circuit, and even if the cut-off capability is deteriorated, the off-gate current and voltage cannot be monitored. I can't judge.

【0007】また、コンデンサの容量抜けやオープンに
よりターンオフ能力が低下している状態で大きな電流を
遮断しようとした場合には、ターンオフ失敗によりGT
Oを破損することになるので問題である。GTO応用装
置では、万一ターンオフ能力が低下している場合にも、
これを検出して警報を出し、当該装置の突然の停止を回
避しなければならないことが要求される場合がある。
If an attempt is made to cut off a large current in a state where the turn-off capability is deteriorated due to the loss or opening of the capacitance of the capacitor, the GT will fail due to the turn-off failure.
This is a problem because it will damage O. In the case of GTO application device, even if the turn-off capability is lowered,
It may be required to detect this and give an alarm to avoid sudden shutdown of the device.

【0008】本発明は、上記事情に鑑みてなされたもの
であり、その目的は自己消弧型半導体素子に必要十分な
ゲート電流を供給していることを監視することができる
自己消弧型半導体素子のゲート回路を提供することにあ
る。
The present invention has been made in view of the above circumstances, and an object thereof is to provide a self-arc-extinguishing semiconductor capable of monitoring supply of a necessary and sufficient gate current to a self-arc-extinguishing semiconductor element. It is to provide a gate circuit for the device.

【0009】[0009]

【課題を解決するための手段】本発明は、前記目的を達
成するために、本発明の請求項1は、自己消弧型半導体
素子にパルス状のオフゲート電流を流すために複数のコ
ンデンサを備えた自己消弧型半導体素子のゲート回路に
おいて、前記各コンデンサの放電電流を検出するための
変流器と、前記変流器の出力信号によりオフゲート能力
の低下を検出する機能を有する判定手段を備えたことを
特徴とする。
In order to achieve the above-mentioned object, the present invention provides a self-extinguishing semiconductor device having a plurality of capacitors for supplying a pulsed off-gate current. In a gate circuit of a self-arc-extinguishing type semiconductor device, a current transformer for detecting a discharge current of each of the capacitors, and a determination means having a function of detecting a decrease in off-gate capability by an output signal of the current transformer are provided. It is characterized by that.

【0010】請求項2は、自己消弧型半導体素子にパル
ス状のオフゲート電流を流すために複数のコンデンサを
備えた自己消弧型半導体素子のゲート回路において、前
記複数のコンデンサの放電電流を検出するための変流器
と、前記各変流器を2n個毎に互いに抵抗器に逆極性に
接続し、前記抵抗器の両端電圧を検出することによりオ
フゲート能力の低下を検出する機能を有する判定手段を
備えたことを特徴とする。
According to a second aspect of the present invention, in a gate circuit of a self-extinguishing semiconductor device, which is provided with a plurality of capacitors for supplying a pulsed off-gate current to the self-extinguishing semiconductor device, a discharge current of the plurality of capacitors is detected. And a determination having a function of detecting a decrease in off-gate capability by detecting the voltage across the resistors by connecting the current transformers for each 2n to the resistors in reverse polarity to each other. It is characterized by having means.

【0011】請求項3は、自己消弧型半導体素子にパル
ス状のオフゲート電流を流すために複数のコンデンサを
備えた自己消弧型半導体素子のゲート回路において、前
記各コンデンサの放電電流を検出するための変流器と、
前記各コンデンサの電流とオフゲート電流をコンデンサ
数で除算した平均値とを比較してオフゲート能力の低下
を検出する機能を有する判定手段を備えたことを特徴と
する。
According to a third aspect of the present invention, in a gate circuit of a self-extinguishing semiconductor device having a plurality of capacitors for supplying a pulsed off-gate current to the self-extinguishing semiconductor device, the discharge current of each capacitor is detected. A current transformer for
It is characterized by further comprising a determination means having a function of comparing the current of each of the capacitors and an average value obtained by dividing the off-gate current by the number of capacitors to detect a decrease in off-gate capability.

【0012】[0012]

【作用】本発明のゲート回路は上記のように構成するこ
とにより、ゲート回路内のコンデンサに容量抜けやオー
プン故障が発生した場合に、ターンオフ能力の低下をい
ち早く検出しGTOのターンオフ失敗破損を防止する保
護機能を設けることができる。
When the gate circuit of the present invention is configured as described above, when the capacitor in the gate circuit has a capacity loss or an open failure, a decrease in turn-off capability is promptly detected to prevent failure of GTO turn-off failure. It is possible to provide a protection function.

【0013】[0013]

【実施例】以下、本発明の実施例を図を用いて説明す
る。図1は、本発明(請求項1対応)の一実施例の回路
構成図であり、同図に示すように、本実施例のゲート回
路は、自己消弧型半導体素子1と、電源2と、複数のコ
ンデンサ3からなるコンデンサ群と、スイッチング素子
4と、オンゲート抵抗5と、各コンデンサ毎に設けられ
た変流器6a〜6nと、各変流器6a〜6nからの信号
が所定レベルを越えたとき信号を出力する比較器7と、
比較器7の出力状態によって異常を判定する判定器8と
から構成されている。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit configuration diagram of one embodiment of the present invention (corresponding to claim 1). As shown in FIG. 1, the gate circuit of this embodiment includes a self-arc-extinguishing semiconductor element 1, a power supply 2 , A capacitor group including a plurality of capacitors 3, a switching element 4, an on-gate resistor 5, current transformers 6a to 6n provided for each capacitor, and signals from the current transformers 6a to 6n have a predetermined level. A comparator 7 that outputs a signal when it exceeds
It is composed of a judging device 8 for judging an abnormality according to the output state of the comparator 7.

【0014】このように構成された自己消弧型半導体素
子のゲート回路において、例えばGTOの可制御オン電
流(最大遮断電流)以下の電流をターンオフ動作中にコ
ンデンサ群の中に容量抜けやオープンが生じたコンデン
サ3が存在する場合には、変流器6a〜6nにより検出
された該コンデンサの電流値は、他の正常なコンデンサ
の電流値よりも小さい。したがって、該コンデンサの電
流値が入力される比較器7から信号が出力されず、判定
器8はこれによりコンデンサに不良があるか否かを判定
することができる。判定器8は複数の比較器7の出力状
態に応じて異常状態をランク分けして判定することがで
きる。
In the gate circuit of the self-arc-extinguishing type semiconductor device configured as described above, for example, when a current less than the controllable on-current (maximum cut-off current) of the GTO is turned off, a capacitance drop or open may occur in the capacitor group. When the generated capacitor 3 exists, the current values of the capacitors detected by the current transformers 6a to 6n are smaller than the current values of other normal capacitors. Therefore, no signal is output from the comparator 7 to which the current value of the capacitor is input, and the determiner 8 can determine whether or not the capacitor is defective. The determiner 8 can rank and determine the abnormal state according to the output states of the plurality of comparators 7.

【0015】図2は、本発明(請求項2対応)の他の実
施例の回路構成図であり、構成要素で図1と同一符号は
同一の要素を表すので説明を省略する。本実施例は、複
数のコンデンサの電流を検出した変流器の出力を少なく
とも2n個単位で互いに逆極性にして1つの抵抗9に接
続し、その抵抗9に生じる電圧が所定レベルを越えると
き比較器7から信号を出力して判定器8に入力する。上
記構成により2個単位のコンデンサの一方のコンデンサ
に容量変化が生じるとその組の抵抗9に生じる電圧が上
昇し、予め設定した値を超え比較器7から信号が出力さ
れる判定器8は、この信号により異常を判定し保護動作
を行うことができる。本実施例によれば、比較器7の数
が少なくて済み、簡潔な構成となる。
FIG. 2 is a circuit configuration diagram of another embodiment of the present invention (corresponding to claim 2), and the same reference numerals as those in FIG. 1 represent the same elements, and the description thereof will be omitted. In this embodiment, the outputs of the current transformers, which detect the currents of a plurality of capacitors, are connected to one resistor 9 with at least 2n units having opposite polarities, and are compared when the voltage generated at the resistor 9 exceeds a predetermined level. The signal is output from the device 7 and input to the determiner 8. With the above configuration, when a capacitance change occurs in one of the capacitors in units of two, the voltage generated in the resistor 9 of the set rises, and the determiner 8 that outputs a signal from the comparator 7 exceeding a preset value is It is possible to judge the abnormality by this signal and perform the protection operation. According to the present embodiment, the number of comparators 7 is small and the structure is simple.

【0016】図3は、本発明(請求項3対応)のさらに
他の実施例の回路構成図であり、構成要素で図1と同一
符号は同一の要素を表すので説明を省略する。本実施例
は、図1で示される構成要素にオフゲート電流を検出す
るための変流器61と平均算出器10を追加設定したも
のである。平均算出器10により検出されたオフゲート
電流から各コンデンサの電流が均等に流れたときの平均
値を算出し、各コンデンサの実際の電流を比較器7にて
比較して所定値以上の差が生じたとき信号を出力して判
定器8に入力する。本実施例によれば、遮断するアノー
ド電流の大小にかかわらず全範囲のアノード電流におい
てオフゲト電流の監視を行うことができる。
FIG. 3 is a circuit configuration diagram of still another embodiment of the present invention (corresponding to claim 3). Since the same reference numerals as those in FIG. 1 represent the same elements, the description thereof will be omitted. In this embodiment, a current transformer 61 for detecting an off-gate current and an average calculator 10 are additionally set in the constituent elements shown in FIG. From the off-gate current detected by the average calculator 10, an average value when the currents of the capacitors uniformly flow is calculated, and the actual currents of the capacitors are compared by the comparator 7 to cause a difference of a predetermined value or more. Then, a signal is output and input to the determiner 8. According to the present embodiment, it is possible to monitor the off-gate current in the entire range of anode currents regardless of the magnitude of the cut-off anode current.

【0017】なお、変流器61としては、パルス電流用
として非常に小型に構成できるので、回路的にそれほど
大きくなることもなく、また安価である。上述した各実
施例では、コンデンサの容量低下を放電電流にて間接的
に検出しているが、変流器以外の手段にてコンデンサの
容量低下を検出する方法でも同様な効果が得られる。
Since the current transformer 61 can be constructed in a very small size for pulse current, it does not become so large in terms of circuit and is inexpensive. In each of the above-described embodiments, the capacitance decrease of the capacitor is indirectly detected by the discharge current, but the same effect can be obtained by the method of detecting the capacitance decrease of the capacitor by means other than the current transformer.

【0018】[0018]

【発明の効果】以上説明したように、本発明によれば、
自己消弧型半導体素子のゲート回路に複数の電解コンデ
ンサを並列に設けた場合に、各コンデンサの放電電流を
監視して間接的に容量抜けを検出することによりターン
オフ能力の低下を検出して、警報または保護動作するこ
とが可能となるので、突然のターンオフ失敗を防止でき
る信頼性の高い自己消弧型半導体素子のゲート回路を提
供することができる。
As described above, according to the present invention,
When a plurality of electrolytic capacitors are provided in parallel in the gate circuit of the self-extinguishing type semiconductor device, the discharge current of each capacitor is monitored and the drop in the capacity is indirectly detected by detecting the decrease in the turn-off capability, Since the alarm or protection operation can be performed, it is possible to provide a highly reliable gate circuit of a self-arc-extinguishing semiconductor device capable of preventing sudden turn-off failure.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の回路構成図。FIG. 1 is a circuit configuration diagram of an embodiment of the present invention.

【図2】本発明の他の実施例の回路構成図。FIG. 2 is a circuit configuration diagram of another embodiment of the present invention.

【図3】本発明のさらに他の実施例の回路構成図。FIG. 3 is a circuit configuration diagram of still another embodiment of the present invention.

【図4】本発明が適用される従来のゲート回路構成図。FIG. 4 is a conventional gate circuit configuration diagram to which the present invention is applied.

【図5】GTOのゲート・カソード間特性を示した特性
図。
FIG. 5 is a characteristic diagram showing gate-cathode characteristics of GTO.

【図6】GTOの電流を遮断した時のオフゲート電流を
示した図。
FIG. 6 is a diagram showing an off-gate current when the GTO current is cut off.

【符号の説明】[Explanation of symbols]

1…自己消弧型半導体素子、2…電源、3…コンデンサ
群、4…スイッチング素子、5…オンゲート抵抗、6a
〜6n,61…変流器、7…比較器、8…判定器、9…
抵抗、10…平均算出器。
DESCRIPTION OF SYMBOLS 1 ... Self-arc-extinguishing type semiconductor element, 2 ... Power supply, 3 ... Capacitor group, 4 ... Switching element, 5 ... On-gate resistance, 6a
6n, 61 ... Current transformer, 7 ... Comparator, 8 ... Judgment device, 9 ...
Resistance, 10 ... Average calculator.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 自己消弧型半導体素子にパルス状のオフ
ゲート電流を流すために複数のコンデンサを備えた自己
消弧型半導体素子のゲート回路において、前記各コンデ
ンサの放電電流を検出するための変流器と、前記変流器
の出力信号によりオフゲート能力の低下を検出する機能
を有する判定手段を備えたことを特徴とする自己消弧型
半導体素子のゲート回路。
1. A gate circuit for a self-arc-extinguishing semiconductor device, comprising a plurality of capacitors for supplying a pulsed off-gate current to the self-extinguishing semiconductor device, and a change circuit for detecting a discharge current of each capacitor. A gate circuit for a self-arc-extinguishing semiconductor device, comprising: a current transformer; and a determination unit having a function of detecting a decrease in off-gate capability based on an output signal of the current transformer.
【請求項2】 自己消弧型半導体素子にパルス状のオフ
ゲート電流を流すために複数のコンデンサを備えた自己
消弧型半導体素子のゲート回路において、前記複数のコ
ンデンサの放電電流を検出するための変流器と、前記各
変流器を2n個毎に互いに抵抗器に逆極性に接続し、前
記抵抗器の両端電圧を検出することによりオフゲート能
力の低下を検出する機能を有する判定手段を備えたこと
を特徴とする自己消弧型半導体素子のゲート回路。
2. A gate circuit for a self-arc-extinguishing semiconductor device, comprising a plurality of capacitors for supplying a pulsed off-gate current to the self-extinguishing semiconductor device, for detecting a discharge current of the capacitors. A current transformer and a determination unit having a function of detecting a decrease in off-gate capability by detecting a voltage across the resistor by connecting the current transformers every 2n to a resistor with opposite polarities. A gate circuit of a self-extinguishing type semiconductor device characterized by the above.
【請求項3】 自己消弧型半導体素子にパルス状のオフ
ゲート電流を流すために複数のコンデンサを備えた自己
消弧型半導体素子のゲート回路において、前記各コンデ
ンサの放電電流を検出するための変流器と、前記各コン
デンサの電流とオフゲート電流をコンデンサ数で除算し
た平均値とを比較してオフゲート能力の低下を検出する
機能を有する判定手段を備えたことを特徴とする自己消
弧型半導体素子のゲート回路。
3. A gate circuit for a self-arc-extinguishing semiconductor device, comprising a plurality of capacitors for supplying a pulsed off-gate current to the self-extinguishing semiconductor device, and a change circuit for detecting a discharge current of each capacitor. Self-extinguishing type semiconductor having a function of detecting a reduction in off-gate capability by comparing a current of each capacitor and an average value obtained by dividing the off-gate current by the number of capacitors. Device gate circuit.
JP6112339A 1994-05-26 1994-05-26 Gate circuit for self-arc-extinction type semiconductor element Pending JPH07321624A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6112339A JPH07321624A (en) 1994-05-26 1994-05-26 Gate circuit for self-arc-extinction type semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6112339A JPH07321624A (en) 1994-05-26 1994-05-26 Gate circuit for self-arc-extinction type semiconductor element

Publications (1)

Publication Number Publication Date
JPH07321624A true JPH07321624A (en) 1995-12-08

Family

ID=14584215

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6112339A Pending JPH07321624A (en) 1994-05-26 1994-05-26 Gate circuit for self-arc-extinction type semiconductor element

Country Status (1)

Country Link
JP (1) JPH07321624A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014103598A1 (en) * 2012-12-27 2014-07-03 シャープ株式会社 Electronic device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014103598A1 (en) * 2012-12-27 2014-07-03 シャープ株式会社 Electronic device
CN104823526A (en) * 2012-12-27 2015-08-05 夏普株式会社 Electronic device
JP5961284B2 (en) * 2012-12-27 2016-08-02 シャープ株式会社 Electronics
US9970994B2 (en) 2012-12-27 2018-05-15 Sharp Kabushiki Kaisha Electronic device

Similar Documents

Publication Publication Date Title
RU2346369C2 (en) Method of detecting and removing faults in converter circuit for three level voltage commutation
CN105099145B (en) Gate-drive unit and method for the short-circuit protection of power switch
US8680701B2 (en) Circuit and method for regulating a DC voltage applied between a first and second DC voltage terminal
US4805063A (en) Fault detector for detecting faults in a DC capacitor circuit
EP3363086B1 (en) Semiconductor circuit interruption devices using current filtering to improve device coordination
CN109842097B (en) Electronic protection circuit
EP2510598B1 (en) Electronic protection circuit and protection device
US6618235B1 (en) Snubber circuit
US6297661B1 (en) Semiconductor switch fault detection
JPH0254025B2 (en)
CN108370149B (en) Vehicle control device
JPH07321624A (en) Gate circuit for self-arc-extinction type semiconductor element
JP2006025547A (en) Switching power supply device
US20020012215A1 (en) Protection of a dynamic voltage restorer
JP3560752B2 (en) Power supply for vehicles
JP2012170226A (en) Protector for electric double-layer capacitor
JPH08140257A (en) Protective device for dc capacitor
JP2007181357A (en) Capacitor input type rectifier circuit with overcurrent detecting function, and inverter device using same
US20240170950A1 (en) Drive system with protection capability
US11888335B1 (en) Battery inrush and outrush current limiting
US10928450B2 (en) Circuit protection system and method
JP2004023834A (en) Gate drive circuit of semiconductor switching element
JP2002093291A (en) Semiconductor switch and its control method
JPH05252648A (en) Rectifier device equipped with protective circuit
JPH09298885A (en) Protection of series inverter circuit