JPH07321058A - Manufacture of iii-v mixed crystal compound semiconductor film - Google Patents
Manufacture of iii-v mixed crystal compound semiconductor filmInfo
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- JPH07321058A JPH07321058A JP6940595A JP6940595A JPH07321058A JP H07321058 A JPH07321058 A JP H07321058A JP 6940595 A JP6940595 A JP 6940595A JP 6940595 A JP6940595 A JP 6940595A JP H07321058 A JPH07321058 A JP H07321058A
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- raw material
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Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、III −V族混晶化合物
半導体膜の製造方法、特にInGaAs膜の製造方法に
関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a III-V mixed crystal compound semiconductor film, and more particularly to a method for manufacturing an InGaAs film.
【0002】[0002]
【従来の技術】従来、HEMTやHBTとしては、Ga
As基板上にGaAsとAlGaAsを成長させたもの
がよく用いられている。このHEMTやHBTの性能を
向上させるため、GaAs基板上のGaAsとAlGa
Asの成長に代えてInGaAsをコンタクト層として
用いることが検討され、早期の製品化が期待されてい
る。2. Description of the Related Art Conventionally, as HEMTs and HBTs, Ga
A growth of GaAs and AlGaAs on an As substrate is often used. In order to improve the performance of this HEMT or HBT, GaAs and AlGa on the GaAs substrate are used.
The use of InGaAs as the contact layer instead of As growth has been studied, and early commercialization is expected.
【0003】ところで、基板上にn型InGaAsを成
長させる方法としては、III 族原料にTMInとTMG
aを、V族原料にAsH3 を、n型ドーパントにジシラ
ン(Si2 H6 )を用い、V族原料とIII 族原料の供給
量の比V/III は30〜60で、原料は550〜750
℃に加熱された基板に供給されて、基板上にn型のIn
GaAs膜を成長させる方法が提案されている。By the way, as a method for growing n-type InGaAs on a substrate, TMIn and TMG are used as group III raw materials.
a, AsH 3 is used as a V group raw material, and disilane (Si 2 H 6 ) is used as an n-type dopant. The ratio V / III of the supply amount of the V group raw material and the III group raw material is 30 to 60, and the raw material is 550 750
The n-type In is supplied to the substrate heated to ℃.
A method of growing a GaAs film has been proposed.
【0004】[0004]
【発明が解決しようとする課題】しかし、InGaAs
の格子定数は、GaAsやAlGaAsの格子定数とは
異なるため、通常のGaAsやAlGaAsの成長温度
550〜750℃でGaAsやAlGaAs上にInG
aAsを成長すると、その表面には凹凸ができ白く曇っ
てしまう欠点があった。このInGaAs表面の凹凸は
デバイス作製プロセスでの微細加工で問題となり、素子
の特性を劣化させる。[Problems to be Solved by the Invention] However, InGaAs
Has a lattice constant different from that of GaAs or AlGaAs, so InG is grown on GaAs or AlGaAs at a normal GaAs or AlGaAs growth temperature of 550 to 750 ° C.
When aAs is grown, there is a defect that the surface becomes uneven and becomes cloudy in white. The unevenness of the surface of InGaAs becomes a problem in fine processing in the device manufacturing process and deteriorates the characteristics of the element.
【0005】したがってHEMTやHBTにあっては、
それらのコンタクト層にInGaAsではなくGaAs
を用いている。そのため熱処理により金属電極とオーミ
ックコンタクト層を形成する必要があり、製造工程が複
雑、高コストになっていた。本発明の目的は、前記した
従来技術の欠点を解消し、InGaAs膜表面の凹凸を
小さくし、凹凸による表面の曇りを低減することができ
る新規なIII −V族混晶化合物半導体膜の製造方法を提
供することにある。また、本発明の目的は、デバイス作
製プロセスでの微細加工性を大幅に向上できる新規なII
I −V族混晶化合物半導体膜の製造方法を提供すること
にある。また、本発明の目的は、熱処理工程を省略で
き、製造工程の簡素化、低コスト化を図ることができる
新規なIII −V族混晶化合物半導体膜の製造方法を提供
することにある。Therefore, in HEMT and HBT,
GaAs instead of InGaAs for those contact layers
Is used. Therefore, it is necessary to form the metal electrode and the ohmic contact layer by heat treatment, resulting in a complicated manufacturing process and high cost. The object of the present invention is to solve the above-mentioned drawbacks of the prior art, to reduce the unevenness of the surface of the InGaAs film, and to reduce the cloudiness of the surface due to the unevenness. To provide. In addition, the purpose of the present invention is to provide a novel II that can significantly improve the microfabrication in the device manufacturing process
An object of the present invention is to provide a method for manufacturing a group IV mixed crystal compound semiconductor film. Another object of the present invention is to provide a novel method for producing a group III-V mixed crystal compound semiconductor film, which can omit the heat treatment step, simplify the production step, and reduce the cost.
【0006】[0006]
【課題を解決するための手段】本発明のIII −V族混晶
化合物半導体膜の製造方法は、加熱された基板上に、II
I 族とV族元素を含む原料を供給してIII −V族混晶化
合物半導体膜を成長する気相成長法において、III 族の
原料としてTMInとTMGaを用い、V族原料とIII
族原料の供給量の比V/III を20以下として、400
〜500℃に加熱された基板に供給してInGaAs膜
を成長するものである。n型InGaAs膜を成長する
には、さらにn型ドーパントをドープする。The method for producing a III-V mixed crystal compound semiconductor film according to the present invention comprises:
In a vapor phase growth method of supplying a raw material containing a group I and a group V element to grow a III-V mixed crystal compound semiconductor film, TMIn and TMGa are used as a group III raw material and
When the ratio V / III of the supply amount of the group raw material is 20 or less, 400
The InGaAs film is grown by supplying it to a substrate heated to ˜500 ° C. To grow an n-type InGaAs film, an n-type dopant is further doped.
【0007】この場合、成長速度の低下を防止するため
には、TMGaに代えてTEGaを用いることが好まし
い。電子移動度の低下を防止するためには、n型ドーパ
ントにSiに代えてSeを用いることが好ましい。安価
かつ安定に製造するためには、V族原料をAsH3 とす
ることが好ましい。In this case, in order to prevent the growth rate from decreasing, it is preferable to use TEGa in place of TMGa. In order to prevent a decrease in electron mobility, it is preferable to use Se as the n-type dopant instead of Si. For inexpensive and stable production, the group V raw material is preferably AsH 3 .
【0008】さらに、InGaAs膜の表面に凹凸が形
成されないようにするためには、基板としてSi、Ga
As、InPまたはそれらの基板の上に化合物半導体膜
を結晶した基板を用いることが好ましい。Further, in order to prevent unevenness from being formed on the surface of the InGaAs film, Si or Ga is used as the substrate.
It is preferable to use a substrate in which a compound semiconductor film is crystallized on As, InP or their substrate.
【0009】また、前述したInGaAs膜を、デバイ
ス作製プロセスを考慮して、できるだけ平坦であること
が要求されるHBT用エピタキシャルウェハまたはHE
MT用エピタキシャルウェハのコンタクト層に適用する
ことが好ましい。Further, the above-mentioned InGaAs film is required to be as flat as possible in consideration of the device manufacturing process, and is an epitaxial wafer for HBT or HE.
It is preferably applied to the contact layer of the MT epitaxial wafer.
【0010】[0010]
【作用】InGaAs成長膜表面が凹凸になるのは、分
解したInが基板上を動きやすいため、Inが集まり3
次元成長しやすいためである。成長温度を下げるとIn
の動きが抑制され3次元成長しにくくなるため、結晶表
面が平坦になる。成長温度は500℃以下がよい。40
0℃より低くなると結晶成長しなくなるため、400〜
500℃が最適成長温度であり、それによってInGa
As表面が凹凸になりにくくなり、平坦性が大幅に向上
する。Function: The surface of the InGaAs growth film becomes uneven because the decomposed In easily moves on the substrate, and thus In gathers.
This is because it is easy for the dimension to grow. If the growth temperature is lowered, In
Is suppressed and it becomes difficult to grow three-dimensionally, so that the crystal surface becomes flat. The growth temperature is preferably 500 ° C. or lower. 40
If the temperature is lower than 0 ° C, the crystal will not grow, so
500 ° C. is the optimum growth temperature, which leads to InGa
The As surface is less likely to be uneven, and the flatness is greatly improved.
【0011】ところで、III 族のGa原料として用いる
TMGaは、400〜500℃の成長温度で成長速度が
低下し、分解効率が低くなる。一方、TEGaは、分解
温度が低いため400〜500℃でも成長速度が一定で
あり、分解効率の点でTMGaよりも優れている。By the way, the growth rate of TMGa used as a Group III Ga raw material is lowered at a growth temperature of 400 to 500 ° C., and the decomposition efficiency is lowered. On the other hand, TEGa has a constant decomposition rate even at 400 to 500 ° C. because of its low decomposition temperature, and is superior to TMGa in terms of decomposition efficiency.
【0012】結晶成長においてV/III が20以下でヘ
イズレベルは大幅に向上する。しかし、表面ヘイズレベ
ルを低減するためにV/III を小さくすると、n型In
GaAs膜を成長する場合に、n型ドーパントがSiの
ときはV/III が小さい程、電子移動度が低下してしま
う。この点、Seを用いると電子移動度は低下しない。When V / III is 20 or less in crystal growth, the haze level is significantly improved. However, if V / III is reduced to reduce the surface haze level, n-type In
In the case of growing a GaAs film, when the n-type dopant is Si, the smaller V / III is, the lower the electron mobility becomes. In this respect, the electron mobility does not decrease when Se is used.
【0013】In原料としてTMInとトリエチルイン
ジウム(TEIn)が考えられるが、TEIはAs原料
のAsH3 と室温で反応してしまうため、InGaAs
の成長には用いることはできない。TMIn and triethylindium (TEIn) can be considered as the In raw material, but since TEI reacts with AsH 3 of the As raw material at room temperature, InGaAs is used.
Can not be used to grow.
【0014】また、As原料としてAsH3 やトリメチ
ルひ素(TMAs)があるが、最も低コストで、最も多
く用いられているAsH3 を使うことが好ましい。Although AsH 3 and trimethyl arsenic (TMAs) are used as As raw materials, it is preferable to use AsH 3 which is the lowest in cost and most used.
【0015】[0015]
【実施例】以下に本発明のIII −V族混晶化合物半導体
膜の製造方法の実施例を説明する。図1に基板上にIn
GaAs膜を成長したウェハを示す。GaAs基板1上
に、InAs混晶比xが0から0.5まで変化するグレ
ーデッドInX Ga1-X As膜2と、In0.5 Ga0.5
As膜3とが順次形成されたものである。EXAMPLES Examples of the method for producing a III-V mixed crystal compound semiconductor film of the present invention will be described below. As shown in FIG.
A wafer on which a GaAs film is grown is shown. On the GaAs substrate 1, a graded In X Ga 1-X As film 2 in which the InAs mixed crystal ratio x changes from 0 to 0.5, and In 0.5 Ga 0.5.
The As film 3 is sequentially formed.
【0016】図1に示す構造の結晶を成長して、結晶表
面のヘイズレベルと成長温度の関係を調べた。その結果
を図2に示す。V/III は15である。図2より明らか
な通り、従来の成長温度550〜750℃ではヘイズレ
ベルが高く、結晶表面に凹凸が多く発生してしまう。成
長温度400〜500℃でヘイズレベルが低く、InG
aAs膜表面の凹凸が小さくなることがわかった。The crystal having the structure shown in FIG. 1 was grown, and the relationship between the haze level on the crystal surface and the growth temperature was investigated. The result is shown in FIG. V / III is 15. As is clear from FIG. 2, at the conventional growth temperature of 550 to 750 ° C., the haze level is high and many irregularities occur on the crystal surface. At a growth temperature of 400 to 500 ° C, the haze level is low, and InG
It was found that the irregularities on the surface of the aAs film became smaller.
【0017】ところで、Ga原料には一般にTMGaを
用いているが、TMGaを用いると、図3のように50
0℃以下の低温成長では、成長速度が低下し、原料の分
解効率が低下してしまう。このためTMGaを用いて成
長温度を500℃以下にすると、原料の分解効率を低下
させずに表面ヘイズレベルを低減することはできない。
しかし、同図に示すように、TEGaは、低温成長でも
原料の分解効率の低下がない。そこで、原料の分解効率
を低下させずに、成長温度を500℃以下にしてヘイズ
レベルを低減させるには、TEGaを用いることが好ま
しい。By the way, although TMGa is generally used as a Ga raw material, when TMGa is used, as shown in FIG.
In the low temperature growth of 0 ° C. or lower, the growth rate is reduced and the decomposition efficiency of the raw material is reduced. Therefore, if the growth temperature is set to 500 ° C. or lower using TMGa, the surface haze level cannot be reduced without lowering the decomposition efficiency of the raw material.
However, as shown in the figure, TEGa does not deteriorate the decomposition efficiency of the raw material even at low temperature growth. Therefore, in order to reduce the haze level by keeping the growth temperature at 500 ° C. or lower without lowering the decomposition efficiency of the raw material, it is preferable to use TEGa.
【0018】また、結晶成長においてV族原料とIII 族
原料の供給量の比V/III は重要な成長条件である。そ
こで、図1に示す構造の結晶を成長し、表面ヘイズレベ
ルのV/III 依存性を調べた。その結果を図4に示す。
成長温度は450℃である。図4より明らかな通り、従
来のV/III が30〜60ではヘイズレベルが高く、結
晶表面に凹凸が多く発生してしまう。V/III が20以
下でヘイズレベルが低減され、InGaAs膜表面の凹
凸が小さくなることがわかった。Further, in crystal growth, the ratio V / III of the supply amounts of the group V raw material and the group III raw material is an important growth condition. Therefore, a crystal having the structure shown in FIG. 1 was grown, and the V / III dependence of the surface haze level was investigated. The result is shown in FIG.
The growth temperature is 450 ° C. As is clear from FIG. 4, when the conventional V / III is 30 to 60, the haze level is high and many irregularities occur on the crystal surface. It was found that when V / III was 20 or less, the haze level was reduced and the unevenness on the surface of the InGaAs film was reduced.
【0019】ところで、GaAs基板1上に成長させる
Inx Ga1-x As膜2、及びIn0.5 Ga0.5 As膜
3は導電型をn型とする場合が多い。n型ドーパント原
料には一般にSi2 H6 (ジシラン)を用いているが、
Si2 H6 ドープでは、図5のように、V/III が大き
い方が電子移動度が高く、V/III が小さくなると電子
移動度が低下する。このため、表面ヘイズレベルを低減
するためにV/III を小さくすると、電子移動度が低下
してしまう。しかし、H2 Seをドーパント原料に用い
ると図6のように低V/III でも、電子移動度は低下し
ない。そこで、電子移動度を低下させずに、V/III を
20以下にしてヘイズレベルを低減させるには、ドーパ
ント原料にH2 Seを用いることが好ましい。The In x Ga 1-x As film 2 and the In 0.5 Ga 0.5 As film 3 grown on the GaAs substrate 1 often have n-type conductivity. Si 2 H 6 (disilane) is generally used as the n-type dopant material,
In Si 2 H 6 doping, as shown in FIG. 5, the electron mobility is higher when V / III is larger, and the electron mobility is lowered when V / III is smaller. Therefore, if V / III is reduced in order to reduce the surface haze level, the electron mobility will decrease. However, when H 2 Se is used as the dopant material, the electron mobility does not decrease even at low V / III as shown in FIG. Therefore, in order to reduce the haze level by setting V / III to 20 or less without lowering the electron mobility, it is preferable to use H 2 Se as the dopant raw material.
【0020】本実施例と従来例とを比較するために、本
実施例では、III 族原料はTEGaとTMIn、V族原
料はAsH3 、V族とIII 族原料の供給量の供給量の比
V/III は15、成長する基板温度は450℃とし、従
来例では、III 族原料はTEGaとTMIn、V族原料
はAsH3 、V族とIII 族原料の供給量の比V/IIIは
50、成長する基板の温度は570℃として、図1に示
す構造の結晶をそれぞれ成長した。表面の曇り具合を示
すヘイズレベルを調べたところ、本実施例の方がヘイズ
レベルの値が小さく、表面の曇りが少なかった。次によ
り具体的に説明する。In order to compare the present example with the conventional example, in this example, the group III raw material is TEGa and TMIn, the group V raw material is AsH 3 , and the group V and group III raw material feed rates are the same. V / III is 15, the growth substrate temperature is 450 ° C., and in the conventional example, the group III raw material is TEGa and TMIn, the group V raw material is AsH 3 , and the ratio V / III of the supply amount of the group V and group III raw materials is 50. The temperature of the substrate to be grown was 570 ° C., and the crystals having the structure shown in FIG. 1 were grown. When the haze level showing the degree of haze on the surface was examined, the value of the haze level was smaller and the haze on the surface was less in this example. The details will be described below.
【0021】(実施例1)図7はHBTの断面構造例を
示し、半絶縁性GaAs基板11上に、n型GaAsコ
レクタコンタクト層12、GaAsコレクタ層13、p
型GaAsベース層14、n型Al0.3 Ga0.7 As層
とグレーデッドn型AlX Ga1-x As層(x=0.3
→0)とからなるエミッタ層15、およびn型GaAs
層、グレーデッドInX Ga1-x As層(x=0→0.
5)、n型In0.5 Ga0.5 As層、n型InAs層か
らなるエミッタコンタクト層16が順次形成されたもの
である。(Embodiment 1) FIG. 7 shows an example of a cross-sectional structure of an HBT, in which an n-type GaAs collector contact layer 12, a GaAs collector layer 13 and a p-type are formed on a semi-insulating GaAs substrate 11.
-Type GaAs base layer 14, n-type Al 0.3 Ga 0.7 As layer and graded n-type Al x Ga 1-x As layer (x = 0.3
→ 0) and the emitter layer 15 and n-type GaAs
Layer, graded In X Ga 1-x As layer (x = 0 → 0.
5), an emitter contact layer 16 composed of an n-type In 0.5 Ga 0.5 As layer and an n-type InAs layer is sequentially formed.
【0022】本実施例1は、このエミッタコンタクト層
16中のn型In0.5 Ga0.5 As層と、グレーデッド
n型InX Ga1-X As層の製造に本発明を適用し、こ
れらの層を次の条件で成長させた。成長温度450℃、
V/III =15、TEGa=2.1cc/min、TMIn=
0.61cc/min、AsH3 =40.7cc/min、H2 Se
=9.3×10-3cc/minである。その結果、最大度数を
示すHBTの表面ヘイズレベルは、図9(a)に示すよ
うに150ppm であった。なお、ヘイズレベルは、その
値が小さい程、表面の曇りが少ない。In Example 1, the present invention is applied to the production of the n-type In 0.5 Ga 0.5 As layer and the graded n-type In x Ga 1 -x As layer in the emitter contact layer 16, and these layers are formed. Were grown under the following conditions. Growth temperature 450 ℃,
V / III = 15, TEGa = 2.1 cc / min, TMIn =
0.61cc / min, AsH 3 = 40.7cc / min, H 2 Se
= 9.3 × 10 -3 cc / min. As a result, the surface haze level of HBT showing the maximum frequency was 150 ppm as shown in FIG. 9 (a). As the haze level decreases, the haze on the surface decreases.
【0023】(比較例1)実施例1と同じ構造のn型I
n0.5 Ga0.5 As層と、グレーデッドn型InX Ga
1-x As層とを、次の条件で成長させた。成長温度57
0℃、V/III =50、TMGa=2.4cc/min、TM
In=0.61cc/min、AsH3 =151cc/min、Si
2 H6 =2.0×10-2cc/minである。、その結果、最
大度数を示すHBTの表面ヘイズレベルは、図9(b)
に示すように10000ppm であった。Comparative Example 1 n-type I having the same structure as in Example 1
n 0.5 Ga 0.5 As layer and graded n-type In X Ga
The 1-x As layer was grown under the following conditions. Growth temperature 57
0 ° C, V / III = 50, TMGa = 2.4cc / min, TM
In = 0.61 cc / min, AsH 3 = 151 cc / min, Si
2 H 6 = 2.0 × 10 -2 cc / min. As a result, the surface haze level of HBT showing the maximum frequency is shown in FIG. 9 (b).
As shown in FIG.
【0024】(実施例2)図8はHEMTの断面構造例
を示し、半絶縁性GaAs基板21上に、GaAsバッ
ファ層22、In0.2 Ga0.7 Asチャネル層23、n
型Al0.3 Ga0.7 Asキャリア供給層24、およびn
型GaAs層、グレーデッドInX Ga1-X As層(x
=0→0.5)、n型In0.5 Ga0.5 As層、n型I
nAs層からなるコンタクト層25が順次形成されたも
のである。(Embodiment 2) FIG. 8 shows an example of a cross-sectional structure of a HEMT, in which a GaAs buffer layer 22, an In 0.2 Ga 0.7 As channel layer 23, n are formed on a semi-insulating GaAs substrate 21.
Type Al 0.3 Ga 0.7 As carrier supply layer 24, and n
Type GaAs layer, graded In X Ga 1-X As layer (x
= 0 → 0.5), n-type In 0.5 Ga 0.5 As layer, n-type I
The contact layer 25 made of an nAs layer is sequentially formed.
【0025】本実施例2はこのコンタクト層25中のn
型In0.5 Ga0.5 As膜と、グレーデッドn型InX
Ga1-X As膜の製造に適用し、これらの層を実施例1
と同じ条件で成長した。その結果、実施例1と同じ良好
な表面ヘイズレベルが得られた。In the second embodiment, n in the contact layer 25 is
Type In 0.5 Ga 0.5 As film and graded n-type In X
Applied to the manufacture of Ga 1-X As films, these layers were used in Example 1
Grew under the same conditions. As a result, the same good surface haze level as in Example 1 was obtained.
【0026】(比較例2)図8に示すHEMT構造のコ
ンタクト層のInGaAs膜について、比較例2と同じ
条件で成長した。その結果、比較例1と同じ悪い結果が
得られた。Comparative Example 2 The InGaAs film of the contact layer having the HEMT structure shown in FIG. 8 was grown under the same conditions as in Comparative Example 2. As a result, the same bad result as in Comparative Example 1 was obtained.
【0027】[0027]
(1) 請求項1または2に記載の発明によれば、III 族原
料としてTMInとTMGaを用い、V族原料とIII 族
原料の供給量の比V/III を20以下とし、成長する基
板温度を400〜500℃としたので、InGaAs膜
またはn型InGaAs膜表面の平坦性を大幅に向上で
き、その結果デバイス作製プロセスにおける微細加工性
が大幅に向上する。(1) According to the invention as set forth in claim 1 or 2, TMIn and TMGa are used as the group III raw material, the ratio V / III of the supply amount of the group V raw material and the group III raw material is set to 20 or less, and the growth substrate temperature is set. Since the temperature is set to 400 to 500 ° C., the flatness of the surface of the InGaAs film or the n-type InGaAs film can be greatly improved, and as a result, the fine workability in the device manufacturing process can be greatly improved.
【0028】(2) 請求項3に記載の発明によれば、III
族の原料としてTEGaを用いたので、成長する基板温
度を500℃以下にしても、TMGaを用いた場合のよ
うに成長速度が低下しない。(2) According to the invention described in claim 3, III
Since TEGa is used as the group material, the growth rate does not decrease even when the temperature of the substrate to be grown is 500 ° C. or lower, unlike the case of using TMGa.
【0029】(3) 請求項4に記載の発明によれば、n型
ドーパントとしてSeを用いたので、V族原料とIII 族
原料の供給量の比V/III を20以下にしても、Siを
用いた場合のように電子移動度が低下しない。(3) According to the invention described in claim 4, since Se is used as the n-type dopant, even if the ratio V / III of the supply amount of the group V raw material and the group III raw material is 20 or less, Si The electron mobility does not decrease as in the case of using.
【0030】(4) 請求項5に記載の発明によれば、V族
原料をAsH3 としたので、ひ素の有機化合物を用いた
場合よりも安価、かつ安定してInGaAs膜を製造で
きる。(4) According to the invention described in claim 5, since the group V raw material is AsH 3 , the InGaAs film can be manufactured more inexpensively and more stably than when an organic compound of arsenic is used.
【0031】(5) 請求項6に記載の発明によれば、基板
としてSi、GaAs、InPまたはそれらの基板の上
に化合物半導体膜を結晶した基板を用いるようにして
も、InGaAsの表面に凹凸は形成されず曇るような
ことがない。(5) According to the invention described in claim 6, even when Si, GaAs, InP or a substrate obtained by crystallizing a compound semiconductor film on these substrates is used as the substrate, the surface of InGaAs is uneven. Is not formed and does not fog.
【0032】(6) 請求項7に記載の発明によれば、上述
したInGaAs膜をHBT用エピタキシャルウェハま
たはHEMT用エピタキシャルウェハのコンタクト層に
用いたので、熱処理なしで金属電極とオーミックコンタ
クトを形成できるため、製造工程の簡素化、低コスト化
が図れる。(6) According to the invention described in claim 7, since the above-mentioned InGaAs film is used for the contact layer of the HBT epitaxial wafer or the HEMT epitaxial wafer, the metal electrode and the ohmic contact can be formed without heat treatment. Therefore, the manufacturing process can be simplified and the cost can be reduced.
【図1】本発明方法により製造されたウェハの実施例を
示す縦断面図である。FIG. 1 is a vertical cross-sectional view showing an example of a wafer manufactured by the method of the present invention.
【図2】V族原料とIII 族原料の供給量の比V/III が
15のときのヘイズレベルの成長温度依存性を調べた特
性図である。FIG. 2 is a characteristic diagram for examining the growth temperature dependence of the haze level when the ratio V / III of the supply amount of the group V raw material and the supply amount of the group III raw material is 15.
【図3】TMGaとTEGaを用いたGaAsの成長速
度の成長温度依存性を調べた特性図である。FIG. 3 is a characteristic diagram for examining the growth temperature dependence of the growth rate of GaAs using TMGa and TEGa.
【図4】成長温度450℃におけるヘイズレベルのV/
III 依存性を調べた特性図である。[Fig. 4] V / of haze level at a growth temperature of 450 ° C
It is a characteristic diagram which investigated III dependence.
【図5】SiドープGaAsのキャリア濃度と電子移動
度の関係を調べた特性図である。FIG. 5 is a characteristic diagram for examining the relationship between carrier concentration and electron mobility of Si-doped GaAs.
【図6】SeドープGaAsのキャリア濃度と電子移動
度の関係を調べた特性図である。FIG. 6 is a characteristic diagram for examining the relationship between carrier concentration and electron mobility of Se-doped GaAs.
【図7】本発明を適用したHBTの実施例を示す縦断面
図である。FIG. 7 is a vertical sectional view showing an embodiment of an HBT to which the present invention is applied.
【図8】本発明を適用したHEMTの実施例を示す縦断
面図である。FIG. 8 is a vertical sectional view showing an embodiment of a HEMT to which the present invention is applied.
【図9】図7の構造の結晶表面のヘイズレベルの度数を
調べたもので、(a)は本実施例の度数、(b)は従来
例の度数を示す。9 is a graph showing the frequency of haze level on the crystal surface of the structure of FIG. 7, where (a) shows the frequency of the present example and (b) shows the frequency of the conventional example.
1 GaAs基板 2 InX Ga1-X As膜(x:0→0.5) 3 In0.5 Ga0.5 As膜1 GaAs substrate 2 In X Ga 1-X As film (x: 0 → 0.5) 3 In 0.5 Ga 0.5 As film
Claims (7)
含む原料を供給してIII −V族混晶化合物半導体膜を成
長する気相成長法において、III 族の原料としてトリメ
チルインジウム(TMIn)とトリメチルガリウム(T
MGa)を用い、V族原料とIII 族原料の供給量の比V
/III を20以下として、400〜500℃に加熱され
た基板に供給してInGaAs膜を成長することを特徴
とするIII −V族混晶化合物半導体膜の製造方法。1. A vapor phase growth method for growing a III-V mixed crystal compound semiconductor film by supplying a raw material containing a group III and group V element onto a heated substrate, and using trimethylindium as a group III raw material. (TMIn) and trimethylgallium (T
MGa) and the ratio V of the supply amount of the group V raw material and the group III raw material
/ III is 20 or less and is supplied to a substrate heated to 400 to 500 ° C. to grow an InGaAs film, and a method for producing a III-V mixed crystal compound semiconductor film.
含む原料を供給してIII −V族混晶化合物半導体膜を成
長する気相成長法において、III 族の原料としてTMI
nとTMGaを用い、V族原料とIII 族原料の供給量の
比V/III を20以下とし、n型ドーパントとしてSi
を用いて、400〜500℃に加熱された基板に供給し
てn型InGaAs膜を成長することを特徴とするIII
−V族混晶化合物半導体膜の製造方法。2. A vapor phase growth method for growing a III-V mixed crystal compound semiconductor film by supplying a raw material containing a group III and group V element onto a heated substrate, and using TMI as a group III raw material.
n and TMGa are used, the ratio V / III of the supply amount of the group V raw material and the group III raw material is set to 20 or less, and Si is used as the n-type dopant.
Is used to grow an n-type InGaAs film by supplying it to a substrate heated to 400 to 500 ° C. III
-Method for producing Group V mixed crystal compound semiconductor film.
(TEGa)を用いたことを特徴とする請求項1または
2に記載のIII −V族混晶化合物半導体膜の製造方法。3. The method for producing a III-V group mixed crystal compound semiconductor film according to claim 1, wherein triethylgallium (TEGa) is used instead of TMGa.
とする請求項2ないし3のいずれかに記載のIII −V族
混晶化合物半導体膜の製造方法。4. The method for producing a III-V mixed crystal compound semiconductor film according to claim 2, wherein Se is used instead of Si.
たことを特徴とする請求項1ないし4のいずれかに記載
のIII −V族混晶化合物半導体膜の製造方法。5. The method for producing a group III-V mixed crystal compound semiconductor film according to claim 1, wherein the group V source material is arsine (AsH 3 ).
またはそれらの基板の上に化合物半導体膜を結晶した基
板を用いることを特徴とする請求項1ないし5のいずれ
かに記載のIII −V族混晶化合物半導体膜の製造方法。6. The substrate comprises Si, GaAs, InP
6. A method for producing a III-V mixed crystal compound semiconductor film according to claim 1, wherein a substrate obtained by crystallizing a compound semiconductor film on these substrates is used.
ラトランジスタ(HBT)用エピタキシャルウェハまた
は高電子移動度トランジスタ(HEMT)用エピタキシ
ャルウェハのコンタクト層である請求項1ないし6のい
ずれかに記載のIII −V族混晶化合物半導体膜の製造方
法。7. The III-V according to claim 1, wherein the InGaAs film is a contact layer of an epitaxial wafer for a heterojunction bipolar transistor (HBT) or an epitaxial wafer for a high electron mobility transistor (HEMT). Method for producing mixed-group compound semiconductor film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6940595A JPH07321058A (en) | 1994-03-28 | 1995-03-28 | Manufacture of iii-v mixed crystal compound semiconductor film |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5725394 | 1994-03-28 | ||
JP6-57253 | 1994-03-28 | ||
JP6940595A JPH07321058A (en) | 1994-03-28 | 1995-03-28 | Manufacture of iii-v mixed crystal compound semiconductor film |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH07321058A true JPH07321058A (en) | 1995-12-08 |
Family
ID=26398270
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6940595A Pending JPH07321058A (en) | 1994-03-28 | 1995-03-28 | Manufacture of iii-v mixed crystal compound semiconductor film |
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JP (1) | JPH07321058A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012064643A (en) * | 2010-09-14 | 2012-03-29 | Hitachi Cable Ltd | Method for manufacturing compound semiconductor epitaxial wafer, and epitaxial wafer for transistor |
US9761686B2 (en) | 2015-06-22 | 2017-09-12 | Sumitomo Chemical Company, Limited | Semiconductor wafer, method of producing semiconductor wafer, and heterojunction bipolar transistor |
-
1995
- 1995-03-28 JP JP6940595A patent/JPH07321058A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012064643A (en) * | 2010-09-14 | 2012-03-29 | Hitachi Cable Ltd | Method for manufacturing compound semiconductor epitaxial wafer, and epitaxial wafer for transistor |
US9761686B2 (en) | 2015-06-22 | 2017-09-12 | Sumitomo Chemical Company, Limited | Semiconductor wafer, method of producing semiconductor wafer, and heterojunction bipolar transistor |
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