JPH0732056Y2 - Print timing generation circuit of printer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a print timing generation circuit of a printer, and more specifically to a printer that obtains a print timing signal from a feedback pulse signal corresponding to rotation of a servomotor that conveys a print medium. Of the print timing generation circuit of the above.

[Prior Art] FIG. 2 is a block diagram showing a configuration example of a print timing generation circuit of a conventional printer. In FIG. 2, 21 is a control CPU (central processing unit) for controlling the printer, 22 is a print controller for controlling printing under the control of the CPU 21, and 23 is a print timing signal B and print data output from the print controller 22. D is a driver that drives the print head 24, 25 is a servo controller that conveys a print medium (not shown) under the control of the CPU 21, 26 is a driver that drives the servo motor 27 by the output of the servo controller 25, and 28 is a servo in conjunction with the rotation of the motor 27, an encoder that outputs a feedback pulse signal a _X representing the rotational speed and the amount of operation of the servo motor 27 corresponding to the moving amount of the print medium.

Next, the operation of the print timing generation circuit of the conventional printer will be described.

First, the CPU 21 outputs the print data D to the print controller 22 and the servo motor to the servo controller 25.
The pulse signal A _r corresponding to the target rotation speed of 27 is output. Servo controller 25 is a servo motor via driver 26
Rotate 27. By the rotation of the servo motor 27, the print medium is conveyed at a predetermined conveyance speed corresponding to the target rotation speed of the servo motor 27.

Further, the encoder 28 rotates with the rotation of the servo motor 27, and outputs a feedback pulse signal A _X corresponding to the rotational speed of the servo motor 27 to the servo controller 25.

Servo controller 25 outputs pulse signal A _r output by CPU 21
And feedback pulse signal A _X output by encoder 28
Are compared, and the driver 26 is current-controlled so that the deviation becomes zero.

On the other hand, the print controller 22 outputs the print data D output by the CPU 21 to the driver 23 in synchronization with the print timing signal B. The print head 24 prints characters or the like corresponding to the print data D according to the print timing signal B.

[Problems to be Solved by the Invention] By the way, the conveyance speed of the print medium fluctuates due to factors such as an electrical error of the servomotor 27 itself and a mechanical error of conveying the print medium.

Therefore, the print controller 22 in synchronization with the feedback pulse signal A _X, by outputting a print timing signal B, and so is not disturbed printing pitch by variations in the transport speed of the print medium.

However, the printing pitch is, for example, 1/4 inch, 1/3 inch,
It is specified as 3/8 inch, 1/2 inch, and so on. Therefore, the number of pulses (hereinafter, referred to as resolution) output during one rotation of the encoder 28 needs to be output corresponding to the specified printing pitch.

For example, in a printer that can change the print pitch every 1/24 inch, the print pitch may not be accurately controlled unless the resolution of the encoder 28 is a multiple of 24.

When printing with different print pitches in the same transport system, an encoder 28 having a resolution corresponding to each print pitch is required. However, providing a plurality of encoders increases the cost and size of the printer. There was a problem of inviting.

The present invention was made to solve the above problems,
It is an object of the present invention to provide a print timing generation circuit for a printer that can change the print pitch with a single encoder.

[Means for Solving the Problems] A print timing generation circuit of a printer according to the present invention generates a first clock signal generation circuit that generates a clock signal of a first cycle and a clock signal of a second cycle. Second
Clock signal generating circuit, print timing setting means for setting the ratio of the first period and the second period to a predetermined ratio, and the pulse interval of the feedback pulse signal is up-counted by the clock signal of the first period. An up counter, a latch circuit for holding the count value of the up counter, a down counter for counting down the count value latched by the latch circuit by a clock signal of the second cycle, and outputting a borrow signal as a print timing signal. Is equipped with.

[Operation] In the print timing generation circuit of the printer having the above configuration, the up counter counts up the pulse interval of the feedback pulse signal by the clock signal of the first cycle output from the first clock signal generation circuit, and the latch circuit Holds the counter value of the up counter.

Further, the count value latched by the latch circuit by the down counter is down-counted by the clock signal of the second cycle output from the second clock signal generation circuit, and the borrow signal of the cycle obtained by multiplying the feedback pulse signal by a predetermined coefficient is generated. Output as a print timing signal.

The print timing setting means changes the print timing by setting the ratio of the first cycle and the second cycle to a predetermined value.

[Embodiment] Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of a print timing generation circuit of a printer according to an embodiment of the present invention. It should be noted that in FIG. 1, parts having the same functions as those in FIG. 2 are designated by the same reference numerals, and the description thereof will be omitted. Also, in FIG.
1 is a feedback pulse signal output from the encoder 28
From the time when A _X is output to the time when the next feedback pulse A _X is output, the up counter that up-counts by the clock signal C _MT of the cycle MT (SEC), 2 keeps the count value of the up-counter 1 constant. Latch circuit that holds time, 3 cycles the count value that the latch circuit 2 holds
The down counter 4 that counts down according to the NT (SEC) clock signal C _NT and outputs the borrow signal as the print timing signal B is the period MT (the cycle MT (counting by the up counter 1 from the basic clock signal C of the period T (SEC)). SE
C) a timer for generating the clock signal C _MT , 5 is a cycle in which the down counter 3 counts from the basic clock signal C
A timer 6 for generating an NT (SEC) clock signal C _NT is a timing generation circuit 6 for holding the count value of the up counter 1 in the latch circuit 2 and controlling the timing for resetting the up counter 1.

Next, the operation of the print timing generation circuit of the printer shown in FIG. 1 will be described with reference to the timing chart of FIG. The cycle MT (SEC) of the clock signal C _MT
And the ratio of clock signal C _NT cycle NT (SEC) is CPU21
It is assumed to be set to 1: 1 by.

First, when the encoder 28 outputs the feedback pulse signal A _X at time t ₁₀ (see FIG. 3A), the timing generation circuit 6 outputs the latch signal to the latch circuit 2 and then the reset signal to the up counter 1. Is output.

The latch circuit 2 latches the count value of the up counter 1 by the output of the latch signal. The count value of the up counter 1 is the pulse number T ₁ / MT of the clock signal C _MT of the cycle MT (SEC) counted by the up counter 1 at the time T ₁ from time t ₀₀ to time t ₁₀ (Fig. 3 (See (b)).

Further, the up counter 1 is reset by the output of the reset signal. The reset up counter 1 starts counting the number of pulses of the clock signal C _MT again. Therefore, the feedback pulse signal _AX is sequentially output at the times t ₂₀ , t ₃₀ , t ₄₀ , t ₅₀ , ..., and the time from the time t ₁₀ to t ₂₀
T _2, the time T ₃ from the time t ₂₀ to t _30, the time T ₄ from the time t ₃₀ to t _40, the time T ₅ from time t ₄₀ to t _50, ... to the up-counter 1 of the count value T ₂ / MT, T ₃ / MT, T ₄ / MT, T ₅ / MT, ...
Will be output. Therefore, the latch circuit 2 always holds the latest conveyance speed of the print medium.

On the other hand, the down counter 3 finishes down counting at time t ₁₁ and outputs a borrow signal (see FIG. 3 (c)).
By the output of the borrow signal, the down counter 3 loads the count value held by the latch circuit 2. The down counter 3 uses the loaded count value as an initial value
Counts down by the NT (SEC) clock signal C _NT . The time to count down is the loaded count value.
With respect to T ₁ / MT, become.

Down counter 3 is the time when the down count ends
The borrow signal is sequentially output to t ₂₁ , t ₃₁ , t ₄₁ , ... And the operation of loading the count value held by the latch circuit 2 is repeated. At this time, the down counter 3 counts down the count values T ₂ / MT, T ₃ / MT, T ₄
For / MT, T ₅ / MT, ... become.

As described above, the down-counting time is proportional to the cycle in which the feedback pulse signal A _X is output. Therefore, the print timing signal B is the feedback pulse signal.
It is synchronized with the output of A _X , that is, the transport speed of the print medium.

When changing the print pitch, that is, the print timing, CPU2
1 is the period MT of the clock signal C _MT output by the timers 4 and 5
And the period NT of the clock signal C _NT are rewritten respectively.
For example, if the printing pitch is 9/24 inches when the period MT and NT are 1: 1, when changing the printing pitch to 6/24 inches,
The periods MT and NT may be set to 3: 2 (see FIG. 3 (d)).

Incidentally, it is varied conveying speed is some printing media, since the speed variation always appears in the feedback signal A _X of the encoder 28 is output, obtained print timing signal B following the speed variation, the printing pitch of the printing medium Unaffected by fluctuations in transport speed.

Although the print timing generation circuit of the printer has been described in the present embodiment, the magnetic encoding or the like can be operated with the print timing signal B as timing.
It may also be applied to the timing generation circuit of the composite terminal.

[Advantages of the Invention] As described above, according to the present invention, the pulse interval of the feedback pulse signal corresponding to the transport speed of the print medium is up-counted by the clock signal of the first cycle, and the count value is increased by the second value. The count signal is down-counted by the clock signal, and the borrow signal obtained by multiplying the feedback pulse signal by a predetermined coefficient is output as the print timing signal. Therefore, the print pitch can be changed simply by changing the clock signal cycle by the timing setting circuit. It is possible to obtain a print timing generation circuit for a printer that can be easily performed and is not restricted by the resolution of the encoder.

[Brief description of drawings]

FIG. 1 is a block diagram of a print timing generation circuit of a printer according to an embodiment of the present invention, FIG. 2 is a block diagram of a print timing generation circuit of a conventional printer, and FIG. 3 is a block diagram of the printer shown in FIG. 6 is a timing chart showing the operation of the print timing generation circuit. 1 ... Up counter, 2 ... Latch circuit, 3 ... Down counter, 4, 5 ... Timer, 6 ... Timing circuit, 21 ... CP
U, 22 ... print controller, 23 ... driver, 24 ... print head, 25 ... servo controller, 26 ... driver, 27 ... servo motor, 28 ... encoder.

Claims (1)

[Scope of utility model registration request] 1. A printer timing controller for obtaining a print timing signal for printing on a print medium from a feedback pulse signal corresponding to the rotation of a servomotor for transporting the print medium, wherein a clock signal of a first cycle is generated. A first clock signal generating circuit, a second clock signal generating circuit that generates a clock signal of a second cycle, and a ratio between the first cycle and the second cycle is set to a predetermined ratio. Print timing setting means, an up counter for up counting the pulse interval of the feedback pulse signal by the clock signal of the first cycle, a latch circuit for holding the count value of the up counter, and the latch circuit for latching The count value is down-counted by the clock signal of the second cycle, and the borrow signal is Printing timing generation circuit of the printer, characterized by comprising a down counter to output as the print timing signal.