JPH0729799A - Resist pattern forming method - Google Patents

Abstract

PURPOSE:To provide a resist pattern forming method with which the thinning of top film by the effect of defocus and the roundness of bottom part can be eliminated simultaneously by a method wherein the resists having a different solubility are formed in a multilayer structure such as a two-layer structure, for example, when a developing operation is conducted after exposing treatment. CONSTITUTION:The resist pattern forming method used in the photolithography process for manufacture of a semiconductor device, includes the steps of forming a photoresist film in a multilayer structure consisting of a lower layer resist thin film 11 and an upper layer resist thin film 12 having different solubilities when developing after exposing treatment, and effecting exposure for formation of a circuit pattern on the multistructure photoresist film. The photoresist film of multilayer structure is developed in such a manner that the photoresist thin film 12, to be formed as the upper layer, has a solutibility at developing lower than that of the photoresist film 11 of the lower layer for the same exposure.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a semiconductor device (hereinafter referred to as L
The present invention relates to a method for forming a resist pattern used in a photolithography process, which is a manufacturing process of (SI).

[0002]

2. Description of the Related Art As a conventional method for forming a circuit pattern in a photolithography process, a photoresist containing an organic material as a main component is formed in a thin film on the surface of a wafer-shaped semiconductor substrate and shielded from light corresponding to a circuit pattern to be formed. Board (hereinafter,
Masking), the photoresist film is exposed to light, and then developed.

After exposure and development, the photoresist becomes a resist pattern corresponding to the circuit pattern, and the underlying film is subjected to etching treatment and impurity implantation treatment (ion implantation) into the underlying film using the resist pattern as a masking material. FIG. 4 is a diagram for explaining the formation of the photoresist pattern. FIG. 4A is a cross-sectional view of a mask in which a pattern corresponding to a circuit pattern to be used at the time of exposure is formed in advance. Reference numeral 31 denotes a glass substrate, and light is shielded on the glass substrate 31 during the exposure process. For this purpose, a pattern 32 formed of, for example, a thin film containing chromium as a main component is formed.

FIG. 4B is a light intensity profile of the exposure light on the surface of the wafer substrate when an exposure process is performed using the mask shown in FIG. Corresponding to 32, a portion 33a where the strength is high and portions 33b and 33c where the strength is low are formed.
FIG. 4C is a cross-sectional view of the resist pattern after the development process in which the exposure process is performed with the light intensity profile shown in FIG. 4B, and the resist pattern 35 on the semiconductor substrate 34 is a mask. Is required to be formed more faithfully to the pattern 32, and has sufficient resistance as a masking material even in the subsequent processing steps of etching the base film and ion implantation. Is required. In addition, 36 has shown the etched part of the resist.

Further, the resist pattern 35 is required to be formed with high precision and uniformity in size and shape over the entire surface of the wafer substrate.

[0006]

However, in the conventional resist pattern forming method described above, for example,
The minimum dimension of the circuit pattern to be formed is 0.6 to 0.8
When the thickness is about μm, this is not a big problem, but the minimum dimension of the circuit pattern to be formed is, for example, about 0.5 μm or even 0.5 μm or less due to the demand for miniaturization of the circuit pattern. In such a case, a very slight focus shift (hereinafter, referred to as
There is a problem in that the dimensional accuracy and the processed shape of the formed resist pattern deteriorate due to the influence of (defocus) and cannot be ignored.

Such defocusing is, for example, a very small detection error of the focus sensor used for detecting the focus position of the exposure apparatus normally used in the exposure processing, or a value of 800 to 800 added to the wafer. 1100
Warp of the wafer caused by the high temperature heat treatment such as ℃, and further, the step difference on the wafer substrate surface, which inevitably occurs due to the circuit structure of the LSI, may be the cause. Therefore, many technical improvements have been made in the past, and when the minimum dimension of the circuit pattern of the LSI is about 0.6 to 0.8 μm, this is not a big problem.

However, when the minimum dimension of the circuit pattern is, for example, about 0.5 μm, or even 0.5 μm or less, the conventional improvements are becoming insufficient and cannot be ignored. . FIG. 5 is a diagram showing a light intensity profile on the surface of the wafer substrate in comparison between the case of defocusing and the case of not defocusing.

As shown in FIG. 5, the light intensity profile on the surface of the wafer substrate when defocusing occurs is shown by solid line profiles 33a 'and 33b', and the profile when not defocusing. [Fig. 4
(See (B)] is the profile 33a, 33b, 3 of the broken line.
It becomes like 3c. As described above, when the focus is generated, the light intensity 33a ′ is lower than the light intensity 33a in the case where defocusing is not performed in the place where the light intensity is maximum, and the light intensity 33a ′ is reduced in the place where the light intensity is minimum. , The light intensity 3b is the same as the light intensity 33b without defocusing.
3b 'increases.

Further, the rising state of the light intensity from the portion 33c where the light intensity is zero to the portion 33a 'where the light intensity is maximum is deteriorated by defocusing. That is, the defocusing causes the contrast of the light intensity to decrease. The state in which the contrast of the light intensity decreases is not always constant, but varies depending on the defocus direction and level.

That is, FIGS. 6 and 7 show typical examples in which the shape of the resist pattern is deteriorated when the exposure process is performed in the defocused state. Figure 6
Is a case where the dimensional accuracy of the resist pattern 37 is deteriorated due to defocus, and the shape 37a of the top portion of the resist pattern 37 on the semiconductor substrate 34 is not particularly deteriorated partially, but the shape of the bottom portion is This is a case where a partial roundness occurs at 37b, and as a result, the dimensional accuracy deteriorates.

As described above, when the shape of the resist pattern 37 is deteriorated, the fidelity to the mask pattern [pattern 32 in FIG. 4A] is remarkably lowered, and the circuit pattern to be formed is naturally formed. There is a big problem that the dimensional accuracy is also significantly reduced. FIG. 7 shows a case where the processed shape of the resist pattern 38 is deteriorated due to defocus, and the shape 38b of the bottom portion of the resist pattern 38 on the semiconductor substrate 34 is not particularly deteriorated partially, This is a case where the shape 38a of the portion partially causes roundness, and as a result, the resist film thickness of the fine resist pattern is significantly reduced.

Thus, the resist patterns 37, 38
If the processed shape of the wafer deteriorates, the resistance as a masking material to the etching process of the underlying film or the ion implantation process, which is a subsequent processing step, may be insufficient, and the circuit pattern formed on the wafer surface may be insufficient. There is a big problem that it causes a defect. Due to the problems caused by the defocus described above, the defocus shown in FIG. 6 is apt to occur when the distance between the optical system of the exposure apparatus and the surface of the wafer substrate is increased in general, and the defocus shown in FIG. On the contrary, it is known that the defocus shown in 1) easily occurs when the distance between the optical system of the exposure apparatus and the surface of the wafer substrate is decreased.

They occur remarkably due to a very small detection error of the focus sensor of the exposure apparatus, and
Even if a detection error does not occur, the wafer is warped or a structural step on the surface of the wafer cannot be ignored, so that defocus is partially generated, and the state shown in FIGS. There was a problem that they occurred at the same time.

According to the present invention, in the exposure process of the photolithography process which is the manufacturing process of the LSI described above, the dimensional accuracy and the processed shape of the resist pattern are deteriorated due to the influence of a slight defocus. In order to solve this problem, resists with different solubilities are formed in a multi-layer structure such as a two-layer structure at the time of development after the exposure processing, and the film loss at the top and the roundness at the bottom due to the influence of defocus are eliminated at the same time. It is an object of the present invention to provide a method for forming a resist pattern capable of achieving the above.

[0016]

In order to achieve the above object, the present invention provides a method for forming a resist pattern used in a photolithography process for manufacturing a semiconductor device, wherein a photoresist film having different solubility during development after exposure processing is used. A step of forming a multi-layered structure, a step of subjecting the multi-layered photoresist film to an exposure treatment used for forming a circuit pattern, and a development process of the multi-layered photoresist film,
The photoresist film formed in the upper layer is formed so that the solubility at the time of development is lower than that of the photoresist film formed in the lower layer with respect to the exposure processing of the same exposure amount.

[0017]

According to the present invention, in the method of forming a resist pattern, the dimensional accuracy and the processed shape of the resist pattern corresponding to the circuit pattern are significantly deteriorated due to the influence of a slight defocus in the exposure process. Corresponding to the location, that is, a resist material that reduces shape deterioration due to defocusing of the top portion and bottom portion of the resist pattern is formed in advance in a thin film with a multilayer structure such as a two-layer structure. As the resist material for the upper layer, even if a slight amount of defocus occurs, it is difficult to cause roundness at the top, and a film with a small amount of film reduction is used. Even if the occurrence of the phenomenon occurs, roundness is less likely to occur, and a dimensional change in the space portion is reduced.

Therefore, the exposure process and the development process do not require any change from the conventional method,
The influence of a very slight defocus, which has been a problem in the past, can be significantly reduced, and as a result, the dimensional accuracy and processed shape of the resist pattern can be easily improved.

[0019]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of a resist pattern forming process showing an embodiment of the present invention, and FIG. 2 is a sectional view of a resist pattern formed when defocused for comparison with a resist pattern formed according to the present invention.

FIG. 2 shows resist patterns 37 and 38 on the semiconductor substrate 34 when defocused. A typical example in which the resist pattern 37 has a dimensional accuracy and the resist pattern 38 has a processed shape is a problem. Is. Here, the area indicated by A is mainly caused by the fact that the solubility at the top of the resist pattern 38 at the time of development becomes a little excessive mainly due to defocus, and the area indicated by B is shown. The main cause for this is that the solubility at the bottom portion of the resist pattern 37 is somewhat insufficient during development, mainly due to defocus.

A method of forming a resist pattern showing an embodiment of the present invention will be described with reference to FIG. First, as shown in FIG. 1A, a resist thin film having a two-layer structure according to the present invention is formed on a semiconductor substrate 10. That is, the upper resist thin film 12 (1A) has a low solubility at the time of development even with the same exposure amount such that the top portion is less likely to be rounded even if a slight defocus is generated. Resist material,
For example, THMR-iP1700 and THMR-iP18
00 and THMR-iP3100 (both are trade names; manufactured by Tokyo Ohka Kogyo Co., Ltd.).

On the other hand, the lower resist thin film 11 (1B)
Is so that even if a slight defocus is generated, it is difficult for the bottom part to be rounded,
Resist material with high solubility during development, eg TSMR
-8800 and TSMR-8900 and TSMR-i500
(Both products are manufactured by Tokyo Ohka Kogyo Co., Ltd.).

Therefore, the resists of the lower resist thin film 11 and the upper resist thin film 12 are formed to a film thickness of about 1 μm, and far ultraviolet light in the i-line region (wavelength of about 365 nm) is used as the exposure wavelength to change the exposure energy. FIG. 3 shows the measurement results (film reduction characteristics) of the resist film thickness after the exposure process was carried out by changing the resist surface without using a mask and the usual development process was carried out.

In FIG. 3, the horizontal axis represents the exposure energy (mJ / cm ² ) and the vertical axis represents the resist film thickness (μm). In FIG. 3, the upper resist thin film 12 (1
In A), as compared with the lower resist thin film 11 (1B), the film thickness at the same exposure energy becomes thicker and the film reduction amount shows a smaller value as a whole.

Then, as shown in FIG.
The resist film having the two-layer structure shown in (a) is subjected to an exposure process and a development process to form resist patterns 1A 'and 1B'. Here, the developing treatment liquid is, for example, a developing treatment generally called a dip method, and NMD-W or NMD-3 (both are trade names; manufactured by Tokyo Ohka Kogyo Co., Ltd.) is used as the developing liquid. .

With this structure, the roundness at the top portion and the roundness at the bottom portion of the resist pattern due to the influence of defocus is much smaller than those of the conventional resist patterns 37 and 38 shown in FIG. However, we were able to improve to a level where there was no particular problem. In addition, although the example of the resist thin film having a two-layer structure is shown in the above embodiment, the present invention is not limited to the two-layer structure in particular, and corresponds to a portion where the shape of the resist pattern deteriorates, which is a problem due to defocus. The number of layers of the above-mentioned resist thin film and each film thickness can be set arbitrarily.

Further, for a mixed layer (hereinafter referred to as an interlayer) at a resist film interface, which is considered to be a technical problem in forming a resist thin film in multiple layers, each resist film in the present invention is Since the same type of resist material is used, which has slightly different solubilities during development after the exposure process, it is natural that the interlayer film can also be used for each resist thin film by setting the set film thickness of each resist thin film to the optimum value. Similar to the portion, it can be formed as a resist pattern, so there is no particular problem.

The present invention is not limited to the above embodiments, and various modifications can be made based on the spirit of the present invention, and these modifications are not excluded from the scope of the present invention.

[0029]

As described above in detail, according to the present invention, resist materials having different solubilities at the time of development for the same exposure amount are formed into a multi-layer structure such as a two-layer structure and exposed. Since the resist pattern is formed by performing processing and development processing, for example, a resist material having a low solubility at the time of development for the same exposure amount is used as the upper layer resist material, and the lower layer resist material is used. For the same, the use of a resist material that is highly soluble during development for the same exposure dose causes a slight amount of defocus, which causes the deterioration of the processed shape and the decrease in dimensional accuracy, which have been problems in the past. The roundness of the top part of the resist pattern that caused it,
The roundness of the bottom portion of the resist pattern can be eliminated.

Further, according to the present invention, since it is possible to prevent the dimensional accuracy of the resist pattern from being deteriorated only by improving the formation of the resist thin film, the exposure process and the development process may bring about any changes from the conventional methods. Absent.

[Brief description of drawings]

FIG. 1 is a sectional view of a resist pattern forming process showing an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a resist pattern formed when defocused for comparison with a resist pattern formed according to the present invention.

FIG. 3 is a film thickness reduction characteristic diagram of a resist film thickness after a development process of a resist used in the present invention.

FIG. 4 is a diagram illustrating formation of a conventional photoresist pattern.

FIG. 5 is a diagram showing a light intensity profile on the surface of a wafer substrate, comparing the case of defocusing and the case of not defocusing.

FIG. 6 is a diagram showing a first example in which the dimensional accuracy of a resist pattern deteriorates due to defocus.

FIG. 7 is a diagram showing a second example in which the dimensional accuracy of a resist pattern deteriorates due to defocus.

[Explanation of symbols]

 1A ', 1B' Resist pattern 10 Semiconductor substrate 11 Lower resist thin film 12 Upper resist thin film

Claims (2)

[Claims] 1. A method for forming a resist pattern used in a photolithography process for manufacturing a semiconductor device, comprising:
(A) a step of forming a photoresist film having different solubilities in a multi-layer structure at the time of development after the exposure treatment, (b) a step of subjecting the photoresist film of the multi-layer structure to an exposure treatment used for forming a circuit pattern, and (c) ) The photoresist film having the above-mentioned multilayer structure is subjected to a development treatment, and the photoresist film formed on the upper layer has a lower solubility at the time of the exposure treatment of the same exposure amount as compared with the photoresist film formed on the lower layer. A method for forming a resist pattern, wherein the resist pattern is formed as follows. 2. The method of forming a resist pattern according to claim 1, wherein the photoresist film formed in the multilayer structure is a positive photoresist.