JPH0728218B2 - Parallel A / D converter - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a parallel A / D converter, and more particularly to a parallel A / D converter that prevents code mistakes in output data.

2. Description of the Related Art In recent years, with the progress of digital signal processing, analog signals have been A / D converted and processed with digital data, and therefore many A / D converters have come to be used. In particular, the progress of the restrained parallel A / D converter for A / D converting a television signal or the like is remarkable.

The conventional parallel A / D converter will be described below.

FIG. 2 is a circuit diagram of a conventional 3-bit parallel A / D converter, and in FIG. 2, a latch is used as a bistable element. Reference numeral 1 is a reference voltage generation circuit having seven outputs, 2 is an analog signal input terminal, and 3 to 9 are comparison between the output of the reference voltage generation circuit 1 and the voltage of the analog signal input from the analog signal input terminal 2. The comparator, 10 to 16,
A transfer gate for latch which receives the outputs of the comparators 3 to 9, 17 is a control signal input terminal, 18 is a control signal input from the control signal input terminal 17 by inverting the control signal input from the control signal input terminal 17. A control inverter that creates a signal for controlling the latch transfer gates 10 to 16 together with a signal, 19 to 25 are latch inverters that form a latch with the latch transfer gates 10 to 16, and 26 to 32 are inputs of the latch inverter. Is a position detection logic circuit, 33 is a code conversion circuit that receives the outputs of the position detection logic circuits 26 to 32, and 34 to 36 are output terminals that output the output from the code conversion circuit 33.

The operation of the 3-bit parallel A / D converter configured as described above will be described below.

First, the analog signal input from the analog signal input terminal 2 and the different outputs of the reference voltage generation circuit 1 are applied to the comparators 3 to 9, and the analog signal voltage and the comparison reference voltage are compared by the comparators 3 to 9. Then, the size relationship is determined. The output of the comparator whose analog signal voltage is lower than the comparison reference voltage is low level or “L”, and the output of the comparator whose analog signal voltage is higher than the comparison reference voltage is high level or “H”. The comparators 3 to 9 are divided into a comparator whose output is "H" and a comparator whose output is "L" depending on the voltage of the analog signal. Next, the outputs of the comparators 3 to 9 are supplied to a latch composed of transfer gates 10 to 16 for latch and inverters 19 to 25 for latch, and a control signal input terminal 17
It is taken in by setting the control signal to "H". Since the output of the latch is the inversion of the output of the comparators 3 to 9, like the output of the comparators 3 to 9, it is divided into a latch whose output is "L" and a latch whose output is "H". Therefore, the position detection logic circuits 26 to 32 detect the boundary between the latch whose output is “L” and the latch whose output is “H”, and correspond to the boundary position of the position detection circuits 26 to 32. The outputs of the position detection logic circuits 26 to 32 whose outputs are "H" are coded by the code conversion circuit 33 and 3-bit digital signals are output from the output terminals 34 to 36.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention However, in the above-described conventional configuration, one of the comparators compares the voltage of the analog signal with the reference comparison voltage, and as a result, the difference is small and the output of the comparator is not completely determined. , The output of the comparator becomes an intermediate level between “H” and “L”,
When the latch that is a bistable element inputs the intermediate level that is the output of the comparator and the output of the latch that is a bistable element becomes the intermediate level, all the outputs of the position detection logic circuit are “L”. Or, there is a problem that two or more outputs become "H", and a code error occurs in a code conversion circuit in which a direct binary code is set, which is generally common in the related art.

Further, the above problems can be solved by setting a gray code or a special code in the code conversion circuit, but in this case, a second code conversion circuit for converting the output of the code conversion circuit into a binary code is necessary, Has a problem in that it becomes large and the conversion time of the A / D converter becomes long.

The present invention solves the above-mentioned conventional problems and provides a parallel A / D converter capable of preventing the occurrence of code mistakes without significantly increasing the circuit scale or reducing the conversion speed. is there.

Means for Solving the Problems In order to achieve this object, the parallel type A / D converter of the present invention is an analog signal input means and a reference voltage generating circuit having a plurality of outputs having different levels from each other. A plurality of comparators for comparing the analog signal from the input means with the output as a reference value, a plurality of bistable elements for inputting the outputs of the plurality of comparators, and an output of the bistable elements A plurality of position detection logic circuits, a code conversion circuit that outputs the output data of the plurality of position detection logic circuits and outputs an output data code, and a plurality of bistable elements that receive the outputs of the plurality of bistable elements. A plurality of feedback circuits which respectively feed back to the elements, and the input threshold voltage of the logic element used for the input of the plurality of feedback circuits is different from the input threshold voltage of the logic element used for the inputs of the plurality of position detection logic circuits. Have a configuration.

Operation With this configuration, it is possible to prevent code mistakes without significantly increasing the circuit scale of the parallel A / D converter and reducing the conversion speed.

Example An example of the present invention will be described below with reference to the drawings.

FIG. 1 shows a 3-bit parallel type A / D in one embodiment of the present invention.
It shows a converter. In FIG. 1, a latch is used as the bistable element. In FIG. 1, 1 is a reference voltage generation circuit, 2 is an analog signal input terminal, 3 to 9 are comparators, 10 to 16 are transfer gates for latches, 19 to 25 are inverters for latches, and 26 to 32 are position detection logic circuits. , 33 is a code conversion circuit, and 34 to 36 are output terminals, which have the same configuration as the conventional example. And 37 to 43
Is a feedback inverter that inputs the output of the latch composed of transfer gates 10 to 16 for latch and inverters 19 to 25 for latch, and 44 to 50 are feedback inverters.
Inverter 19 for latch forming feedback circuit with 37 to 43
It is a transfer gate for feedback that feeds back the data to the inputs from 25 to 25. Reference numeral 51 is a control signal input terminal, 52 is a control signal input from the control signal input terminal 51 is inverted, and together with the control signal input from the control signal input terminal 51, latch transfer gates 19 to 25 and feedback transfer gate 44
It is a control inverter for controlling from 55 to 55.

The operation of the 3-bit parallel A / D converter of the present embodiment configured as above will be described. First, the analog signal input from the analog signal input terminal 2 and the different outputs of the reference voltage generation circuit 1 are applied to the comparators 3 to 9, and the voltage of the analog signal and the comparison reference voltage are compared with each other, as in the conventional example. Determine the size relationship.

Here, when the difference between the analog signal voltage and the comparison reference voltage is large, the latch transfer gate 10
To 16 and the latch inverters 19 to 25, the control signal input from the control signal input terminal 51 is set to “H” to take in the position detection logic circuits 26 to 32 and the code conversion circuit 33. And outputs digital signals from the output terminals 34 to 36. However, when the difference between the voltage of the analog signal input to any of the comparators 3 to 9 and the comparison reference voltage is small, the intermediate level is output from any of the comparators 3 to 9. At this time, "H" from the control signal input terminal 51
Is input, the intermediate level is taken into the latch and the intermediate level is output from the latch. Then, when "L" is next input from the control signal input terminal 51, the transfer gates for latch 10 to 16 are turned off and the transfer gates for feedback 44 to 55 are turned on, so that the intermediate level is set to the position detection logic circuit 26. If any of the input logic elements from 32 to 32 is regarded as an intermediate level, the feedback inverter 37
To 43 are different from the input threshold voltages of the input logic elements of the position detection logic circuits 26 to 32, the outputs of the feedback inverters 37 to 43 are not at the intermediate level. Therefore, the input of the latch inverters 19 to 25 is not at the intermediate level, and the output of the latch is not at the intermediate level. On the contrary, when the feedback inverters 37 to 43 consider the intermediate level, the input logic elements of the position detection logic circuits 26 to 32 do not consider the intermediate level. As a result, the intermediate level is not input to the input logic elements of the position detection logic circuits 26 to 32, and the position detection logic circuits 26 to 32 always correspond to the boundary between “H” and “L” of the comparator output. It is possible to prevent the occurrence of a code error in the code conversion circuit 33 by outputting "H" only to the logic circuit that has been executed.

As described above, according to the present embodiment, a feedback circuit is provided by the feedback transfer gates 44 to 50 and the feedback inverters 37 to 43, and the output of the latch is output from the latch inverter 19 to
The position detection logic circuits 26 to 32 are fed back to the input of 25 and a difference is provided between the input threshold voltage of the feedback inverters 37 to 43 which are the input logic elements of the feedback circuit and the input threshold voltage of the position detection logic circuits 26 to 32. In this case, only the logic circuit corresponding to the boundary between "H" and "L" of the outputs of the comparators 3 to 9 is always output "H", and it is possible to prevent the code conversion circuit 33 from generating a code error.

EFFECTS OF THE INVENTION The present invention is provided with a feedback circuit which receives an output of a bistable element as an input and feeds back to the bistable element, and inputs a threshold voltage of a logic element used as an input of the feedback circuit and a logic used as an input of a position detection logic circuit. By making the input threshold voltage of the element different, the position detection circuit always outputs "H" only in the logic circuit corresponding to the boundary between "H" and "L" of the output of the comparator. It is possible to realize a parallel A / D converter that can prevent the occurrence of a code error in the code conversion circuit without significantly increasing the circuit scale or decreasing the conversion speed.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a parallel type A / D converter in one embodiment of the present invention, and FIG. 2 is a circuit diagram of a parallel type A / D converter in a conventional example. 1 ... Reference voltage generating circuit, 2 ... Analog signal input terminal, 3-9 ... Comparator, 10-16 ... Transfer gate for latch, 17 ... Control signal input terminal, 18 ... Control inverter, 19 〜25 …… Latch inverter, 26〜32 …… Position detection logic circuit, 33 …… Sign conversion circuit, 34〜36 …… Output terminal, 37〜43 …… Feedback inverter, 44〜50 …… Feedback transfer Gate, 51 …… Control signal input terminal, 52 ……
Control inverter.

Claims (1)

[Claims] 1. A plurality of comparators for comparing an analog signal input means and an analog signal from the input means with each output of a reference voltage generating circuit having a plurality of outputs having different levels as a reference value. A plurality of bistable elements that receive the outputs of the plurality of comparators, a plurality of position detection logic circuits that receive the outputs of the plurality of bistable elements, and the outputs of the plurality of position detection logic circuits. And a code conversion circuit that outputs an output data code, and a plurality of feedback circuits that receive the outputs of the plurality of bistable elements as inputs and that respectively feed back to the plurality of bistable elements, and input to the plurality of feedback circuits. A parallel A / D converter characterized in that an input threshold voltage of a logic element used and an input threshold voltage of a logic element used for inputting the plurality of position detection logic circuits are different.