JPH07273653A - Gain adjustment circuit for d/a converter - Google Patents

Abstract

PURPOSE:To adjust an output voltage even by the D/A converter with a structure whose output voltage is not revised only with the adjustment of a reference voltage by adding a gain adjustment D/A converter to an output of the former D/A converter and adjusting the gain of plural D/A converters without interfering with each other. CONSTITUTION:A resistor R1 is connected to a terminal Ts 4 receiving an output of a D/A converter 10 and an output of a gain adjustment circuit 20 of the D/A converter 10. Furthermore, a resistor 2 is connected between an output of the D/A converter 10 and a ref-input terminal 2A of a D/A converter 22. A resistor 3 is connected between the ref-input terminal 2A of the D/A converter 22 and a point of a reference potential, and a resistor 4 is connected between an output of the D/A converter 22 and the terminal Ts 4. The gain is adjusted by providing an output of an output voltage V3 depending on the voltage V2 and an input signal 12 by the D/A converter 22.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gain adjusting circuit, and more specifically, to a gain of a D / A converter even when the output voltage of the D / A converter is affected by a gain error of the D / A converter. The present invention relates to a gain adjustment circuit of a D / A converter capable of adjusting a value to obtain a stable output voltage.

[0002]

2. Description of the Related Art FIG. 2 is a general D / A in the prior art.
3 shows a gain adjustment circuit of the converter 10, and FIG.
Shows a detailed circuit diagram thereof. In FIG.
10A is a switch control circuit, 10B, 10C, and 10D are switches, and R10, R11, R12, and R13 are resistors, 1
0I is an amplifier.

In FIG. 3, when the switch control circuit 10A is supplied with the digital input signal 11 for setting the output voltage V0 of the D / A converter 10, the switch 10B.
Switching of 10C and 10D is controlled according to the input signal 11. Then, one of the resistors R10, R11, and R12 to be validated is selected, and the digital input signal 11
The analog voltage V0 set by is output from the amplifier 10I to the Ts terminal 4 according to the ratio with the resistor R13.

Specifically, the analog output voltage V0 output from the Ts terminal 4 of the D / A converter 10 is Vref as a reference voltage, and D1 and D2. D3 (D1 ・ D2 ・ D3 is "1" when the switch is connected, D1 ・ D2 ・ D3 is released.
Is "0". ), V0 = −Vref × R13 (D1 / R10 + D2 / R11 + D3 / R13) (1) As described above, conventionally, the D / A converter 10 adjusts the output voltage V0 so as to obtain a desired output voltage by adjusting the reference voltage Vref.

[0005]

In recent years, due to advances in integrated circuit technology, there are some in which 2 to 8 D / A converters are mounted on one integrated circuit. Many of such integrated circuits have a circuit configuration in which a reference power source is mounted inside or only one input terminal of the reference power source is provided, and the output voltage of each D / A converter can be arbitrarily set. There are many things that cannot be adjusted. As described above, in the conventional configuration, for example, it is difficult to adjust the gain variation of the plurality of D / A converters with one reference voltage Vref.

According to the present invention, even with one reference voltage Vref,
An object of the present invention is to provide a gain adjustment circuit for a D / A converter that individually adjusts variations in gain of a plurality of D / A converters without affecting each other.

[0007]

In order to achieve this object, the present invention provides a D / A converter 10 which adjusts an output voltage by adjusting a reference voltage (Vref). The gain adjusting circuit 20 is provided which outputs the desired output voltage V0 from the output terminal 4 by adjusting the output voltage V1 output from the output signal 10 according to the input signal 12.

[0008]

According to the present invention, the output voltage V1 from the D / A converter 10 is supplied to the input signal 12 by the gain adjusting circuit 20.
The gain is adjusted in accordance with the above, and the analog voltage V0 corresponding to the digital signal 11 is output from the Ts terminal 4.

[0009]

1 is a block diagram of a gain adjusting circuit 20 of a D / A converter 10 according to the present invention. Figure 1
3, the D / A converter 10 is a D / A converter having a circuit configuration similar to that shown in FIG. 3, and in the embodiment of the present invention, the gain adjusting circuit 20 is connected to the output side thereof. .

The gain adjusting circuit 20 includes a D / A converter 10
The stable output voltage is adjusted by adjusting the gain output from
This is a circuit that outputs from the s terminal 4, and is composed of resistors R1 to R4 and a D / A converter 22. The D / A converter 22 is a circuit that inputs a voltage V2 obtained by dividing the output voltage V1 of the D / A converter 10 and a digital signal for gain adjustment, and outputs a voltage V3 for gain adjustment.

The resistor R1 is connected to the output of the D / A converter 10 and Ts.
The resistor R2 is connected between the terminals 4 and is connected between the output of the D / A converter 10 and the ref input terminal 2A of the D / A converter 22. The resistor R3 is connected between the ref input terminal 2A of the D / A converter 22 and the reference potential (GND), and the resistor R4
Is connected between the output side of the D / A converter 22 and the Ts terminal 4.

The output voltage V1 of the D / A converter 10 is divided by the resistors R2 and R3 with respect to the reference potential.
2 ref input terminal 2A. As a result, D /
When the voltage of the ref input terminal 2A of the A converter 22 is V2, the voltage V2 is V2 = V1 × R3 / (R2 + R3) (2)

Next, the D / A converter 22 is connected to the D / A converter 1.
A digital input signal 12 corresponding to an output voltage for correcting the gain variation of 0 is supplied. When the output voltage of the D / A converter 22 is V3 and the set value of the digital input signal 12 supplied to the D / A converter 22 is A, V3 = A · V2 (3) The set value A of the digital input signal 12 is
The gain adjustment amount of the D / A converter 22 is included.

Here, the output voltage V1 of the D / A converter 10
And the resistance R1 with respect to the output voltage V3 of the D / A converter 22.
The voltage V0, which is divided by R4 and R4 to adjust the variation of the gain of the D / A converter 10, becomes V0 = (V1-V3) * R4 / (R4 + R1) + V3 (4).

Substituting the expressions (2) and (3) into the expression (4), V0 = {V1-A.V1.R3 / (R2 + R3)} * R4 / (R4 + R1) + A.V1.R3 / ( R2 + R3) (5)

Transforming equation (5), V0 = {R4 / (R4 + R1)} × [1 + A {R3 / (R2 + R3)} × R1 / R4] × V1 (6) From equation (6), D / A The output voltage V1 of the converter 10 is divided by the voltage division ratio of the resistors R2 and R3, the voltage division ratio of the resistors R1 and R4, and D
The gain can be adjusted by the set value A of the digital input signal 12 of the / A converter 22.

FIG. 4 shows an embodiment of the gain adjusting circuit of the D / A converter in the integrated circuit 30 in which the plurality of D / A converters 10 are mounted.

The integrated circuit 30 includes D / A converters 10A and 10A.
It is an integrated circuit in which B is mounted, and these D / A converters 10
Has a circuit configuration similar to that shown in FIG. Further, the gain adjusting circuits 20A and 20B are respectively provided in the D / A converter 1
This is a circuit for adjusting the gain of 0A and 10B. Although the integrated circuit 30 is shown here as having two D / A converters 10 mounted therein, the present invention is not limited to two. For example, currently 2 to 8 D / A
There is an integrated circuit in which a converter is mounted, and the present invention can of course be applied to such an integrated circuit.

FIG. 5 shows the circuit configuration of the gain adjusting circuits 20A and 20B. As shown in FIG. 5, the basic circuit configuration of the gain adjusting circuit 20 is the same as that shown in FIG. The operation is also substantially the same.

The integrated circuit 5 includes D / A converters 10A and 10B.
When the common digital input signal 11 corresponding to the output of is supplied, the gain is adjusted by the common reference voltage Vref. Next, regarding the variation in the gain of each of the D / A converters 10A and 10B that cannot be adjusted by the common reference voltage Vref, first, the variation in the gain of the D / A converter 10A is shown in FIG. 20A.

Specifically, D / of the gain adjusting circuit 20A
The digital input signal 12 corresponding to the output of the D / A converter 22 capable of correcting the gain variation of the D / A converter 10A is supplied to the A converter 22 to adjust the gain of the D / A converter 10A. . Similarly, the gain variation of the D / A converter 10B is the output of the D / A converter 22 capable of correcting the gain variation of the D / A converter 10B in the D / A converter 22 in the gain adjusting circuit 20B. Is supplied to adjust the gain of the D / A converter 10B.

As described above, according to this embodiment, the gain variations of the D / A converters 10A and 10B are individually adjusted by the corresponding gain adjusting circuits 20A and 20B, so that a stable output voltage can be obtained. You can Therefore, the present invention is particularly effective for adjusting the gain of an integrated circuit having a plurality of D / A converters as shown in FIG. 4, which could not obtain a stable output voltage in the prior art.

[0023]

According to the present invention, since the gain adjusting voltage by the correcting D / A converter is added to the output voltage of the D / A converter, a plurality of D / A converters can be operated with the same reference voltage Vref. Even in the integrated circuit to be controlled, it is possible to adjust the gain variations of the individual D / A converters without affecting the mutual gains of the D / A converters.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of a gain adjusting circuit of a D / A converter according to the present invention.

FIG. 2 is a configuration diagram of a gain adjustment circuit of a D / A converter according to a conventional technique.

FIG. 3 is a configuration diagram of a general internal circuit of a D / A converter.

FIG. 4 is a configuration diagram showing an embodiment when the gain adjusting circuit of the D / A converter according to the present invention is applied to an integrated circuit in which a plurality of D / A converters are mounted.

5 is a detailed configuration diagram of the gain adjustment circuit in FIG.

[Explanation of symbols]

 10.22 D / A converter 20 Gain adjustment circuit 30 Integrated circuit R1 to R4 resistor

Claims (3)

[Claims] 1. A D / A converter (10) for adjusting an output voltage by adjusting a reference voltage (Vref), wherein an output voltage (V1) output from the D / A converter (10) is Adjust the output signal to the desired output voltage (V
A gain adjusting circuit for a D / A converter comprising a gain adjusting circuit (20) for outputting 0) from an output terminal (4). 2. The gain adjusting circuit (20) according to claim 1.
Input the resistance (R2) and resistance (R3) that divide the output voltage (V1) of the D / A converter (10), and the voltage (V2) that is divided by the resistance (R2) and resistance (R3). Terminal (2
D / which outputs the output voltage (V3) from this voltage (V2) and the input signal (12) that performs the gain adjustment
A converter (22), a resistor (R1) connected between the output side of the D / A converter (10) and the output terminal (4), and the output side and output terminal of the D / A converter (22) (4) A resistor (R4) is connected between the output voltage (V1) and the resistor (R2) and resistor (R3), and the voltage division ratio and D /
D / characterized in that a desired output voltage (V0) is obtained by adjusting the gain by the input signal (12) of the A converter (22).
Gain adjustment circuit of A converter. 3. The gain adjusting circuit according to claim 1, wherein the gain adjusting circuit (20) is provided for each D / A converter (10) when there are a plurality of D / A converters (10). A gain adjusting circuit for a D / A converter, characterized in that