JPH07273605A - Frequency adjustment method and frequency adjustment device using it - Google Patents

Abstract

PURPOSE:To obtain an output signal with high frequency precision to a temperature change and a secular change and in which the adjustment of an output frequency is automated and subjected to mechanical automation and the tolerance of the precision of a reference frequency is high. CONSTITUTION:Setting frequency data fO received by a CPU 1 to obtain a desired frequency are operated based on setting reference frequency data fC equal to a reference frequency FC and setting address width data (m) equal to an address width M of a ROM 4. A frequency measurement device 6 measures an output frequency FO and a controller 7 compares the frequency data with the setting frequency data fO. When the reference frequency FC is deviated resulting in deviating the output frequency FO, correction data for the setting reference frequency data fC and the setting address width data (m) are operated based on the frequency deviation and the result is stored in a memory 8. Then every time a frequency is set, the correction data are called to correct two data fC, m and then an oscillator is oscillated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and apparatus for automatically adjusting the oscillation frequency of a synthesizer using a DDS circuit used in equipment such as a wireless communication device and stabilizing the frequency. Is. In this specification, DDS (Direct Digital Synthesis)
er) circuit is simply referred to as a DDS circuit.

[0002]

2. Description of the Related Art Conventionally, in a product using a synthesizer using a DDS circuit, after assembling the product, the output frequency thereof is accurately adjusted before shipment. The method is usually to measure the frequency of the output signal of the synthesizer that uses the DDS circuit with a measuring instrument in order to match the set frequency, and adjust the reference clock frequency one by one while the human being visually checks the display. It was something to do. The principle will be described below with reference to FIG.

Here, FIG. 3 is a block diagram of one conventional example of a frequency adjusting device for a synthesizer using a DDS circuit. First, the set frequency data f _O corresponding to a desired set frequency is input to the CPU 11. The CPU 11 compares the input set frequency data f _O with the internal control data f
Address step data D calculated based on _C and m
Output _S. Here, f _C is set reference frequency data corresponding to a frequency equal to the design value of the reference frequency F _C ,
It is set and stored in the CPU 11 in advance. Also, m
Is set address width data corresponding to a value equal to the value of the address width M of the ROM 14 which will be described later.
It is set and stored in U11.

On the other hand, the reference frequency F _C is stabilized, but its oscillation frequency may slightly deviate from the design value of the reference frequency due to temperature and other conditions. Therefore, the trimmer capacitor C _V finely adjusts the frequency. You can do it. The address adder 12 outputs a signal to the latch 13 based on the input address step data D _S. The latch 13 returns the output signal of the address adder 12 to the address adder 12 and outputs the address data D _A at the timing of the signal of the reference frequency F _C. The address adder 12 adds the next signal to the returned signal and outputs it. By repeating this, the address data D _A is sequentially output from the latch 13. The ROM 14 outputs the stored waveform data to the D / A converter 15 based on the address data D _A. The D / A converter 15 uses it as an analog signal, spurious of this analog signal is removed by the LPF 15a, and only the target signal passes through it and is output as the DDS output signal of the output frequency F _O.

Here, the relationship between the above numerical values is expressed by the following mathematical formula. First, the output frequency F _O of the DDS output signal is
It is given by the following formula. F _O = D _S × F _C / M ... Here, the address step data D _S is given by the following equation in the CPU 11.

D _S = f _O × m / f _C ... Substituting this into the formula, F _O = (f _O × m / f _C ) × F _C / M = f _O × (m / f _C ) × (F _C / M) By transforming this, it becomes F _O × (f _C / m) = f _O × (F _C / M). As can be seen from the formula, in order to make the output frequency F _O of the DDS output signal always equal to the desired set frequency, it is sufficient that f _C / m = F _C / M ... Therefore, in the DDS circuit, the two control data f _C , m are set as f _C = frequency data corresponding to the set frequency F _C and m = address width data corresponding to the address width M as described above. , And is stored in the internal memory of the CPU 11, and the address step data D _S is calculated based on it.

The DDS output signal thus output is input to the frequency measuring device 16 and its output frequency F _O
Is measured. At that time, if the reference frequency F _C is shifted due to temperature or other influences and the display of the frequency measuring device 16 is different from the desired frequency corresponding to the set frequency data f _O , the address step data D _S
Since the address width M is a constant, the capacitance of the trimmer capacitor C is adjusted to change the reference frequency F _C. This changes the output frequency F _O of the DDS output signal,
It can be adjusted to a desired set frequency f _O.

Conventionally, a person adjusts the reference frequency F _C with the trimmer capacitor C _V one by one while observing the number of the frequency measuring instrument 16 displaying the frequency of the DDS output signal in this way. Was being adjusted.

[0009]

However, in the above-mentioned conventional method, since the human adjusts the reference frequency F _C for each assembled product by the trimmer capacitor, mechanization and automation are difficult. was there.

Further, the capacitance of the trimmer capacitor is easily affected by the ambient temperature, and even if the frequency is accurately adjusted at the time of inspection, if the ambient temperature of the trimmer capacitor changes, the output frequency will shift. There was also a problem.
This is a serious problem especially when the temperature rise is high because the high-power wireless communication device is configured with a small housing. Further, in a wireless communication device that has been used for a long time under severe conditions, there has been a large problem of aging change in which the output frequency shifts due to changes in the material of the trimmer capacitor and mechanical deviation.

Further, when the quality of the crystal oscillator which is the source of oscillation of the reference frequency is not constant and the oscillation frequency varies, a small error can be corrected by the trimmer capacitor, but a large error can be corrected by the trimmer capacitor. Sometimes it wasn't. Therefore, some crystal oscillators having large frequency shifts must be discarded as defective products that cannot be used in the DDS circuit.

The present invention has been proposed in view of the above problems, has a high tolerance of the accuracy of the reference frequency, can automatically and mechanize the adjustment of the output frequency, and is strong against temperature change and secular change. An object of the present invention is to provide a frequency adjusting method for a synthesizer using a DDS circuit capable of obtaining an output signal with high frequency accuracy, and a frequency adjusting device using the same.

[0013]

In order to solve the above-mentioned problems, in the frequency adjusting method according to claim 1 of the present invention, the frequency setting means stores the set frequency data of a desired frequency given from the outside and the inside thereof. The step of outputting the address step data based on the generated control data, the step of outputting the DDS output signal by the DDS circuit based on the address step data, and the detecting means by D
A configuration including a step of detecting a frequency difference between the frequency of the DS output signal and a frequency corresponding to the set frequency data, and a step of correcting the control data with the correction data calculated by the data correction means based on the frequency difference. And

In the frequency adjusting method according to the second aspect of the present invention, the frequency setting means outputs the address step data based on the set frequency data of the desired frequency given from the outside and the control data stored inside. And a step in which the DDS circuit outputs a DDS output signal based on the address step data.
The detecting means detects a frequency difference between the frequency of the DDS output signal and the frequency corresponding to the set frequency data;
The writing means calculates the correction data based on the frequency difference and writes the correction data in a storage means described later, the storage means stores the correction data, and the data correction means reads the correction data and corrects the control data. The configuration includes and.

Further, in the frequency adjusting apparatus according to the third aspect of the present invention, the frequency setting for outputting the address step data based on the setting frequency data of the desired frequency given from the outside and the control data stored inside. Means, a DDS circuit for outputting a DDS output signal based on the address step data, a detecting means for detecting a frequency difference between the frequency of the DDS output signal and a frequency corresponding to the set frequency data, and an operation based on the frequency difference. And a data correction means for correcting the control data with the corrected data.

Further, in the frequency adjusting device according to the fourth aspect of the present invention, the frequency setting for outputting the address step data based on the setting frequency data of the desired frequency given from the outside and the control data stored inside. Means, a DDS circuit for outputting a DDS output signal based on the address step data, a detection means for detecting a frequency difference between the frequency of the DDS output signal and a frequency corresponding to the set frequency data, and the frequency difference Based on the configuration, a writing unit that calculates correction data based on the correction data and writes the correction data in a storage unit described later, a storage unit that stores the correction data, and a data correction unit that reads the correction data and corrects the control data are configured.

In the above arrangement, the detecting means may directly measure the frequency difference in the form of interference (beat) or may compare the frequency data.

[0018]

According to the frequency adjusting method of the first aspect of the present invention, in the frequency setting means, the set frequency data given from the outside for setting the desired frequency is based on the control data stored inside. Is calculated and output as address step data. In the DDS circuit, based on this address step data, the DDS
The output signal is output. The detection means measures the frequency of the DDS output signal and detects the frequency difference from the frequency corresponding to the set frequency data. In the data correction means, the control data stored inside the frequency setting means is corrected based on the detected frequency difference and stored as correction data. After that, when the set frequency data is input, it is calculated based on the correction data and output from the frequency setting means as address step data to set the frequency.

According to the frequency adjusting method of the second aspect of the present invention, in the frequency setting means, the set frequency data given from the outside for setting the desired frequency is:
After being calculated based on the control data stored inside,
It is output as address step data. In the DDS circuit, D based on this address step data
The DS output signal is output. In the detection means, this DDS
The frequency of the output signal is measured, and the frequency difference from the frequency corresponding to the set frequency data is detected. In the writing means, the correction data is calculated based on the detected frequency difference, and this correction data is written in the next storage means. The storage means stores the correction data. After that, each time the set frequency data is input, the data correction means calls the correction data, the control data is corrected by this, the set frequency data is calculated based on the corrected control data, and the frequency setting means is calculated. Is output as address step data and the frequency is set.

Further, according to the frequency adjusting device of the third aspect of the present invention, in the frequency setting means, the set frequency data given from the outside to set a desired frequency is stored in the control. After being calculated based on the data, it is output as address step data. DD
In the S circuit, a DDS output signal is output based on this address step data. The detection means measures the frequency of the DDS output signal and detects the frequency difference from the frequency corresponding to the set frequency data. In the data correction means, the control data stored inside the frequency setting means is corrected based on the detected frequency difference and stored as correction data. After that, when the set frequency data is input, it is calculated based on the correction data and output from the frequency setting means as address step data to set the frequency.

Further, according to the frequency adjusting device of the fourth aspect of the present invention, in the frequency setting means, the set frequency data given from the outside for setting the desired frequency is stored in the control. After being calculated based on the data, it is output as address step data. DD
In the S circuit, a DDS output signal is output based on this address step data. The detection means measures the frequency of the DDS output signal and detects the frequency difference from the frequency corresponding to the set frequency data. In the writing means, the correction data is calculated based on the detected frequency difference, and this correction data is written in the next storage means. The storage means stores the correction data.
After that, each time the set frequency data is input, the data correction unit calls the correction data, the control data is corrected by the correction data, and the set frequency data is calculated based on the corrected control data. Is output as address step data and the frequency is set.

[0022]

The present invention will be described below in detail with reference to the drawings showing the embodiments.

(First Embodiment) FIG. 1 is a block diagram of a first embodiment of a frequency adjusting apparatus according to the present invention. In FIG. 1, reference numeral 1 denotes a CPU to which set frequency data f _O for obtaining a signal of a set frequency is input, which is calculated based on the following control data and output as address step data D _S.
Is. The CPU 1 stores the setting reference frequency data f _C and the setting address width data m described in the related art. Here, the set reference frequency data f _C and the set address width data m correspond to the control data. Further, the CPU 1 sets the set frequency data f _O after the frequency adjustment.
Each time is input, correction data stored in a memory described later is called, the internal control data is corrected by the correction data, calculation is performed based on the corrected control data, and address step data D _S is output.

2 is the input address step data D
An address adder 3 outputs a signal based on _S , and 3 is a latch for returning the output of the address adder 2 to the address adder 2 at the timing of the reference frequency F _{C and} outputting it as address data D _A. Reference numeral 4 is a ROM for outputting the waveform data stored based on the address data D _A as a digital signal, and its address width is M. 5 is a digital signal of the waveform data of ROM4 D /
A D / A converter that A-converts and outputs as an analog signal of an output frequency F _O is an LPF 5a that filters this high-frequency signal. 8 is an electrically rewritable P-ROM
Is a memory that uses an E ² P-ROM. Further, 9 is an address adder 2, a latch 3, a RO
DDS consisting of M4, D / A converter 5, and LPF5a
Circuit.

Further, 6 is D output from the DDS circuit 9.
The frequency of the DS output signal is measured, and the measured output frequency F
_O to a frequency measurement unit for converting into the same data format as the previous set frequency data f _O output. A control unit 7 receives the frequency data of the output frequency F _O and the set frequency data f _O , calculates and detects the difference between the two, and writes it as correction data directly in the memory 8. The control unit 7 and the memory 8 are connected by a plurality of electric wires to write data.

Here, the CPU 1 corresponds to the frequency setting means and the data correcting means, the frequency measuring instrument 6 and the control section 7 correspond to the detecting means, and the control section 7 corresponds to the writing means. Taking a wireless communication device as an example, the CPU 1 and the DDS circuit 9 are part of the configuration of the wireless communication device, and the frequency measuring device 6 and the control unit 7 correct the output frequency of the DDS circuit before shipment of the wireless communication device. Is.

Next, the operating principle of the frequency adjusting apparatus according to the first embodiment will be described. As described in the prior art, the output frequency F _O of the DDS output signal is given by F _O = D _S × F _C / M. Here, D _S is the address step data output by the CPU 1, and M is the width of the address of the ROM 4. The reference frequency F _C shifts due to temperature changes and other influences,
Therefore, when the output frequency F _O of the DDS output signal deviates from the desired set frequency, conventionally, the deviation was adjusted by adjusting the trimmer capacitor and adjusting the reference frequency F _C.

However, in the first embodiment, the address step data D _S is changed to output the output frequency F of the DDS output signal.
_{The O} is adjusted to the desired set frequency corresponding to the set frequency data f _O. That is, as described above, the address step data D _S can be expressed as D _S = f _O × m / f _C ..., So that f _C and m in the formula are changed.

Briefly, in order to make the output frequency F _O of the DDS output signal always equal to the desired set frequency,
With the address width M always constant, the reference frequency F _C
Even if fluctuates, f _C / m = F _c / M ... Is satisfied so that the set reference frequency data f _c corresponding to the set reference frequency in the CPU 1 or the set address width corresponding to the set address width Either or both of the data m may be changed.

Next, the operation of the first embodiment will be concretely described. First, the set frequency data f _O to obtain the desired frequency is input to the CPU 1. Here, the reference frequency F
_C is fixed and cannot be finely adjusted. Set frequency data f _O input to CPU1 is calculated on the basis of the set reference frequency data f _C of the two control data stored in the internal set address width data m, is output as the address step data D _S. The address adder 2 is
A signal is output to the latch 3 based on the input address step data D _S. The latch 3 is the address adder 2
Is returned to the address adder 2 at the timing of the reference frequency F _C , and the signal is output to the ROM 4 as the address data D _A.

The ROM 4 outputs the stored waveform data to the D / A converter 5 according to the address data D _A , and the D / A converter 5 outputs it as an analog high-frequency signal having an output frequency F _O. The output high-frequency signal is filtered to remove spurious, and then output terminal a
Is output to the outside as a DDS output signal. The frequency of the DDS output signal input from the output terminal a to the data input terminal b is measured by the frequency measuring device 6 as F _O, and the data is converted into the same data format as the previously set frequency data f _O and controlled. It is input to the section 7. The control unit 7, sets the previous frequency data f _O also input, a difference Δf of the data of the two frequencies is calculated, the correction data Δ
It is output from the data output terminal c as f _C and Δm. This correction data is input to the write terminal d and directly written in the correction memory 8. When all the writing steps are completed, the frequency measuring device 6 and the control unit 7 are removed.

Needless to say, in the initial stage of the frequency adjusting method of the present invention, the correction data Δf _C , Δm
The initial value of is 0.

Thereafter, the CPU 1 sets the set frequency data f_OBut
Whenever given, the correction data Δf _C, Call Δm
The internal control data f_CAfter correcting m,
Wave number data f_OIs calculated.

In the conventional frequency adjustment, since only one trimmer capacitor is adjusted, strictly speaking, only the average frequency deviation can be adjusted regardless of the temperature and other changes. A temperature sensor is provided on the DDS circuit side of the frequency adjusting device of the present embodiment to change the temperature variously, and the difference between the set frequency data f _O and the frequency data of the output frequency F _O of the DDS output signal actually output. May be measured, the difference may be stored in the correction memory 8 as correction data as a function of temperature, and the correction data may be used in the calculation of frequency data. This makes it possible to compensate for frequency changes due to the influence of temperature.

In the first embodiment, the correction data is directly written in the memory 8 from the control unit 7, but it may be input to the CPU 1 and written in the memory 8 under the control thereof.

(Second Embodiment) FIG. 2 is a block diagram of a second embodiment of the frequency adjusting apparatus according to the present invention. In the second embodiment, only the differences from the first embodiment will be described. 1a is a CPU having a built-in electrically rewritable P-ROM
Thus, two control data f _C , m are stored in the P-ROM. The control section 7a calculates the correction data f _C ′, m ′ based on the frequency difference and writes it in the storage means. Here, the CPU 1a corresponds to the frequency setting means, the frequency measuring device 6 and the control section 7a correspond to the detecting means, and the control section 7a corresponds to the data correcting means.

In the operation of the frequency adjusting device of the second embodiment, the frequency difference is detected by the same method as in the first embodiment, and the control section 7a calculates and outputs the correction data based on the detected difference. CPU1a
One or both of the two control data f _C and m stored in the P-ROM in the control unit 7
The corrected data f _C ′, m ′ calculated in a is rewritten and stored.

Thereafter, every time the set frequency data f _O is given, it is calculated based on the corrected data f _C ', m', and the result is DDS as step-up data.
It is output to the circuit 9 and the output frequency is set.

[0039]

According to the frequency adjusting method and the frequency adjusting apparatus using the same according to the first and third aspects of the present invention, as described above, the data is detected based on the frequency difference detected by the detecting means. Since the correction means calculates and outputs as correction data and stores it in place of the control data,
After that, the output frequency adjustment can be automated and mechanized. In addition, since it is possible to minimize the number of components that are susceptible to temperature changes and aging changes that cause an error in the DDS output frequency, the frequency becomes stable and the frequency accuracy increases. Further, even if the reference frequency, which is the reference for oscillation of the output signal of the DDS circuit, is largely deviated, the frequency of the output signal can be easily corrected by correcting the control data.

Further, according to the frequency adjusting method and the frequency adjusting device using the same according to the second and fourth aspects of the present invention, as described above, the writing is performed based on the frequency difference detected by the detecting means. Since the means calculates and stores it as correction data, the adjustment of the output frequency can be automated and mechanized. Also, by providing the storage means separately,
There is no need to rewrite the control data in the frequency setting means. In addition, it causes an error in the DDS output frequency,
Since the number of parts that are susceptible to temperature changes and aging changes can be reduced as much as possible, the frequency becomes stable and the frequency accuracy increases. Further, even if the reference frequency, which is the reference for oscillation of the output signal of the DDS circuit, is largely deviated, the frequency of the output signal can be easily corrected by the correction data.

[Brief description of drawings]

FIG. 1 is a block diagram of a frequency adjusting device according to a fourth aspect of the present invention.

FIG. 2 is a block diagram of a frequency adjusting device according to claim 3 of the present invention.

FIG. 3 is a block diagram of a conventional example of a frequency adjusting device.

[Explanation of symbols]

1 CPU (frequency setting means) (data correction means) 1a CPU (frequency setting means) 2 Address adder 3 Latch 4 ROM 5 D / A converter 5a LPF 6 Frequency measuring device (detecting means) 7 Control section (detecting means) ( writing means) 7a controller (detecting means) (data correcting means) 8 memory (storage means) 9 DDS circuit D _S address step data f _O set frequency data f _C set reference frequency data (control data) m setting address width data ( Control data) f _C ', m' Correction data Δf _C , Δm Correction data F _C Reference frequency F _O Output frequency M Address width

Claims (4)

[Claims] 1. A step of outputting address step data based on set frequency data of a desired frequency given externally and control data stored internally, and a DDS circuit based on the address step data. According to the step of outputting the DDS output signal, the step of detecting the frequency difference between the frequency of the DDS output signal and the frequency corresponding to the set frequency data, and the correction data calculated by the data correction means based on the frequency difference. And a step of correcting the control data. 2. A step of outputting address step data based on set frequency data of a desired frequency given from the outside and control data stored inside, and a DDS circuit based on the address step data. The step of outputting the DDS output signal, the step of detecting the frequency difference between the frequency of the DDS output signal and the frequency corresponding to the set frequency data, the step of writing the correction data based on the frequency difference, and the writing means calculating the correction data will be described later. And a step of storing the correction data in the storage means, and a step of reading the correction data and correcting the control data by the data correction means. 3. A frequency adjusting device used in the frequency adjusting method according to claim 1, wherein address step data is output based on set frequency data of a desired frequency given from the outside and control data stored inside. Frequency setting means and DDS based on the address step data
A DDS circuit that outputs an output signal, a detection unit that detects a frequency difference between the frequency of the DDS output signal and a frequency corresponding to the set frequency data, and the control data is corrected by the correction data calculated based on the frequency difference. A frequency adjusting device comprising: a data correcting means. 4. A frequency adjusting device used in the frequency adjusting method according to claim 2, wherein address step data is output based on set frequency data of a desired frequency given from the outside and control data stored inside. Frequency setting means and D based on the address step data
A DDS circuit that outputs a DS output signal, a detection unit that detects a frequency difference between the frequency of the DDS output signal and a frequency corresponding to the set frequency data, and correction data that is calculated based on the frequency difference and stored later. A frequency adjusting device comprising: writing means for writing in the means; storage means for storing correction data; and data correction means for reading the correction data and correcting the control data.