JPH07263655A - Optical integrated circuit and its production - Google Patents

Abstract

PURPOSE:To obtain an optical integrated circuit which is provided with an optical joint part having a butt joint structure with high optical joint efficiency by applying a dry etching to a part of already piled-up first semiconductor layer to expose an end face and by growing a second semiconductor layer on a substrate in a manner that the second layer will be successively connected to the exposed end face. CONSTITUTION:An optical enclosed layer 12 made of InGaAsP is piled up on an InP substrate 11 through a first growth, and further an active layer 13 having a quantum well structure is piled up on the layer 12. Then, an optical confinement layer 14 having the same composition as that of the layer 12 is piled up on the layer 13 and an InP clad layer 15 is piled up on the layer 14 thereafter. Such a formed layer structure body is subject to dry etching by an RIE method using an SiO2 mask and its right half is removed. Furthermore, following the dry etching, semiconductor layers 13'-15' corresponding to the layers 13-15 are successively piled up in the right half area where the semiconductor layer is removed, by a MOVPE method.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generally relates to a semiconductor optical integrated circuit, and more particularly to a method for manufacturing an optical semiconductor integrated circuit in which different optical semiconductor elements formed on a common substrate are optically coupled. A semiconductor optical integrated circuit in which a light emitting region and a light modulation region are formed on a single semiconductor substrate is promising as a small and high performance light source in a large capacity optical fiber communication system. In particular, an absorption type optical modulator integrated distributed feedback type laser diode in which an absorption type optical modulator is integrated with a distributed feedback type laser diode has a low frequency chirp characteristic of 10
It is considered to play a central role as a light source for a large capacity optical fiber communication system such as Gb / s.

[0002]

2. Description of the Related Art A distributed feedback laser diode integrated with an absorption type optical modulator comprises a distributed feedback type laser region including an active layer and an absorption type optical modulation region including an absorption layer formed on a single semiconductor substrate. In this structure, electrodes electrically isolated from each other are arranged in each region. The active layer and the absorption layer are formed so that the energy gap of the absorption layer is larger than that of the active layer by changing the material, composition, layer thickness and the like. In the optical integrated circuit having such a configuration, the absorption-type optical modulation region has an absorption end on the higher energy side than the wavelength of the light beam emitted from the distributed feedback laser region in the state where no drive voltage is applied, The light beam formed in the laser region passes through the modulation region with almost no absorption and is emitted from the emission end. on the other hand,
When a drive voltage is applied to the absorption modulation region, the absorption edge of the absorption layer shifts to the low energy side, and as a result, the light beam emitted from the laser region is absorbed. in this way,
By applying a modulation signal to the light modulation area, intensity modulation of the laser light can be executed.

The following four methods are generally known as methods for forming an active layer and an absorption layer having different energy gaps on a single semiconductor substrate. 1) Etching regrowth method (how to form butt joint structure)
Method) according to the etching regrowth method, the first growth forms the first structure including the active layer (or the absorption layer) on the substrate,
After removing a part of it by etching, a second structure including an absorption layer (or an active layer) is grown in the second growth,
The active layer and the absorption layer are formed so as to be optically coupled.

2) Selective growth method 1 In vapor phase epitaxy, the substrate surface is covered with a mask,
The width or area of the mask pattern that exposes the substrate surface is changed between the laser region and the active region. When a semiconductor layer is deposited on a substrate provided with such a mask, the semiconductor layer is thickly deposited on a portion of the exposed substrate surface that is defined by the mask having a large area or width, and the semiconductor layer is thickened. A thin semiconductor layer is deposited in the area defined by the small mask. Therefore, MQW is used as an active layer and an absorption layer.
When a layer having a (multi-quantum well) structure is deposited, the quantum level spacing becomes small in the region where the layer thickness is large and interacts with long-wavelength light. The spacing increases and interaction with short wavelength light occurs.

3) Selective Growth Method 2 In vapor phase growth, light is selectively irradiated corresponding to the first region on the substrate. As a result, the thickness and composition of the quantum well layer change between the first region irradiated with light and the second region not irradiated, and the energy gap of the active layer or the absorption layer is changed to the first region and the second region. It is possible to change in the area.

4) Single growth etching method (LOC structure
Method) A light absorption layer corresponding to the light modulation region and an active layer corresponding to the laser region are sequentially deposited on the same substrate in a continuous process. Further, the active layer is selectively removed by etching in the region where the light modulation region is desired to be formed. In the structure thus obtained, the active layer and the absorption layer therebelow are optically coupled via the cladding layer, and the light beam formed by the active layer is transferred to the absorption layer. The light beam transferred to the absorption layer enters the light modulation region along the absorption layer and is modulated.

[0007]

Among the above-mentioned conventional methods, the selective growth methods 1 and 2 are the simplest manufacturing methods, and although high optical coupling efficiency can be expected, the materials for the active layer and the absorption layer, The composition and the number of layers inevitably become the same in the laser region and the modulation region, and there is no room for optimizing these. Further, in the single-growth etching method, since the absorption layer is included in the laser region, there is a problem that the characteristics of the laser are deteriorated. Further, it is considered difficult to increase the number of layers when using the strained quantum well structure.

On the other hand, in the etching regrowth method, the active layer and the absorption layer can be formed in separate steps, so by optimizing the material, composition, layer thickness, number of layers, etc., the oscillation threshold and laser efficiency It is possible to configure an optical integrated circuit in which characteristics such as modulation efficiency and low frequency chirp are optimized at the same time. However, in the optical integrated circuit having such a structure, the active layer and the absorption layer are separately formed, for example, the growth of the absorption layer after the formation of the active layer or the growth of the absorption layer after the absorption layer is formed. Abnormal growth is likely to occur at the boundary with the absorption layer, resulting in a problem that the light coupling efficiency between the active layer and the absorption layer is reduced.

Therefore, it is a general object of the present invention to provide a novel and useful method for manufacturing an optical semiconductor integrated circuit which solves the above problems. A more specific object of the present invention is to
An object of the present invention is to provide an optical semiconductor integrated circuit provided with an optical coupling part having a high optical coupling efficiency of a butt joint structure and a manufacturing method thereof.

[0010]

SUMMARY OF THE INVENTION The present invention solves the above problems by forming an optical integrated circuit in which a first optical semiconductor element and a second optical semiconductor element optically coupled to each other on a common substrate are formed. And a step of depositing a first compound semiconductor layer forming a first optical semiconductor element on the substrate, wherein the first optical semiconductor element is formed on the first compound semiconductor layer. Forming a mask pattern corresponding to the first region; and using the mask pattern as a mask, removing the first compound semiconductor layer from the second region on the substrate on which the second optical semiconductor element is formed. A step of removing by etching; a second compound semiconductor layer forming the second optical semiconductor element in the second region, and the second compound semiconductor layer and the first compound semiconductor layer forming an optical layer. Of depositing so as to physically bond And the second semiconductor layer is deposited by a MOVPE (Metal Organic Vapor Phase Epitaxy) method, or mutually on a common substrate. An optical integrated circuit comprising first and second optical semiconductor elements optically coupled to each other, and a substrate having a first region and a second region defined therein;
A first region formed on the first region for confining light
A first compound semiconductor layer that includes an active layer of the first optical semiconductor device and that is formed on the second region;
A second compound semiconductor layer comprising a second active layer in which light is confined and comprising said second optical semiconductor element; said first and second compound semiconductor layers contacting each other at an interface. The optical integrated circuit is characterized in that the end surface of the first active layer and the end surface of the second active layer are in surface contact with each other at the boundary surface.

[0011]

According to the present invention, the removal of the first compound semiconductor layer from the second region on the substrate, which was conventionally performed by the wet etching method, is performed by the dry etching method, whereby the first compound semiconductor layer is removed. A specific crystal plane does not appear on the end face of the compound semiconductor layer, and a smooth and substantially vertical end face can be easily obtained. A second compound semiconductor layer is deposited on the substrate by MOVPE so as to be adjacent to the first compound semiconductor layer having such a smooth end surface, whereby a second compound semiconductor layer is formed on the end surface of the first compound semiconductor layer. Abnormal growth of the compound semiconductor layer is suppressed, and a structure in which the first compound semiconductor layer and the second compound semiconductor layer are continuous at the end face can be obtained. With such a structure, since a butt joint structure in which the active layer in the first semiconductor layer and the active layer in the second semiconductor layer are in surface contact with each other at the end face, a very high optical coupling efficiency can be obtained. You can

[0012]

EXAMPLE FIG. 1 shows a structure in which an active layer having an MQW structure is formed on a substrate on which a diffraction grating is formed, with an optical confinement layer interposed therebetween, and an optical confinement layer and a clad layer are further formed on the active layer. 2 shows a structure obtained by partially removing the active layer and the optical confinement layer and the cladding layer on the active layer in the optical semiconductor device of FIG.
(A), (B) is a figure which shows the structure of FIG. 1 in detail. However, FIG. 2A shows the semiconductor structure before wet etching is performed, and FIG. 2B corresponds to the structure of FIG. 1 after etching.

Referring to FIGS. 1 and 2A and 2B, a diffraction grating 1a having a period of 241 nm and a depth of 30 nm.
On the InP substrate 1 on which the film was formed, a 100 nm thick I
The nGaAsP layer 2 is formed as an optical confinement layer, and the layer 2
An etching stopper layer 3 made of InP is formed on the top. On the other hand, on the etching stopper layer 3, an InGaAsP quantum well layer 4a having a thickness of 5.1 nm and a thickness of 1 are formed.
An MQW layer 4 is formed by alternately stacking 0 nm InGaAsP barrier layers 4b. The optical confinement layer 2 has a composition such that the bandgap value λ _g converted into wavelength is 1.15 μm, while the quantum well layer is made of an InGaAsP layer having a strain of 0.8%. The barrier layer is made of an InGaAsP layer having a λ _g of 1.3 μm. Quantum well layer 4
10 layers of a and the barrier layer 4b are deposited respectively. Another optical confinement layer 5 having the same composition as the layer 2 is formed on the quantum well layer 4, and a cladding layer 6 made of InP is further formed on the layer 5. Further, a SiO ₂ mask pattern 7 is formed on the clad layer 6.

In the state shown in FIGS. 1 and 2B, the layers 4 to 6 are formed.
Is wet-etched with a hydrochloric acid-based or phosphoric acid-based etchant using the SiO ₂ pattern 7 as a mask, and as a result, the semiconductor layers 4 to 6 above the etching stopper layer 3 are removed from the left half region. . As is apparent from FIGS. 1 and 2, as a result of such wet etching, a crystal plane appears on the end face of the semiconductor layer, and the crystal face defines the end face in a wedge shape. In order to suppress the development of such a crystal plane and obtain a substantially vertical and smooth end face, it is necessary to select an optimum etchant for each of the semiconductor layers 4 to 6, but such optimization has hitherto been difficult. It was

FIG. 3 shows an example in which a second semiconductor layer having the same structure is deposited adjacent to a structure having a semiconductor layer whose end face is exposed by wet etching, similar to FIG. However, the structure of FIG. 3 is shown in a state in which the right and left are inverted with respect to the structure of FIG. As is clear from FIG. 3, the second semiconductor layer is abnormally grown, and in the structure in which the abnormal growth occurs, the active layer indicated by a bright stripe is not formed between the left structure and the right structure. You can see that it is continuous. In such a structure, it is apparent that the optical coupling of the active layer between the left and right structures cannot be obtained, or even if it is obtained, the optical coupling efficiency is low.

By the way, the present applicant etches a semiconductor layer having the same structure as shown in FIG. 2A by a dry etching method instead of a wet etching method to form a semiconductor layer having a smooth end face exposed on a substrate. I found that it can be formed. FIG. 4 is a diagram showing an end face of a semiconductor layer obtained by such dry etching.

Referring to FIG. 4, the semiconductor layer on the substrate corresponds to the InGaAsP layers 4 to 6 of FIG. 2A, and the etching is performed by reactive ion etching (RIE) method with ethane (C ₂ H ₆ ). A high frequency electric field was applied in a mixed etching gas of hydrogen, hydrogen (H ₂ ) and oxygen (0 ₂ ). More specifically, the etching is carried out by adding C ₂ H ₆ to 3
It was performed at room temperature while applying 0 SCCM, H ₂ at 30 SCCM, and O ₂ at 3 SCCM, respectively, while applying a high-frequency electric field of 300 W. As is clear from FIG.
The end face of the semiconductor layer is flat, and no specific crystal plane appears.

Further, adjacent to the structure of FIG. 4, another semiconductor layer having a similar structure was deposited by MOVPE, and the results are shown in FIGS. 5 and 6. However, FIG. 6 is a diagram for explaining FIG. 5 in more detail. Referring to FIGS. 5 and 6, λ _g is 1.1 on the InP substrate 11 in the first growth.
The optical confinement layer 12 made of InGaAsP having a thickness of 5 μm is 1
The layer is deposited to a thickness of 00 nm and further on the layer 12.
An active layer 13 having a quantum well structure corresponding to the active layer 4 of (A) is deposited. Further, the layer 12 is formed on the active layer 13.
Optical confinement layer 14 having the same composition as
Of InP cladding layer 15 deposited on the layer 14 to a thickness of
Are deposited to a thickness of about 100 nm. The layered structure thus formed is dry-etched by the RIE method using a SiO ₂ mask to remove the right half. Dry etching was performed under the conditions described above. Further, following the dry etching, corresponding semiconductor layers 13 'to 15' of the semiconductor layers 13 to 15 are sequentially deposited by the MOVPE method in the right half region where the semiconductor layers are removed. As can be seen from FIGS. 5 and 6, in the structure formed by such a method, the abnormal growth of the semiconductor layer is substantially suppressed, and the active layer 13 and the active layer 13 ′ are in surface contact with each other at their boundary faces. is doing. Here, the semiconductor layers 13 to
Reference numeral 15 forms a laser, and the semiconductor layers 13 'to 15' form an optical modulator or a light receiving element.

FIG. 7 is a view showing the far field pattern obtained in the structure of FIGS. However, in the pattern of FIG. 7, the angular distribution of the light beam formed from the active layer 13 and emitted from the end face of the active layer 13 ′ is measured by a detector in the range of + 45 ° to −45 ° with respect to the optical axis. I asked. Figure 7
As is clearer, in the configuration of FIGS.
The light emitted from the end face of 3'is almost symmetrical with respect to the optical axis set so as to coincide with the active layers 13 and 13 ', and it can be seen that the light is concentrated on the optical axis.

FIG. 8 shows the results of measuring the far field pattern for the structure of FIG. As can be seen from FIG. 8, the far field pattern in the case of individual pieces is asymmetric with respect to the optical axis and has a very disordered shape. This clearly shows the result of abnormal growth at the boundary surface between the left and right semiconductor layers, and also shows that the optical coupling efficiency is substantially lower than that in FIG. 7.

Next, a method of manufacturing an optical integrated circuit according to an embodiment of the present invention will be described with reference to FIGS. First, in the step of FIG. 9A, on the InP substrate 31,
A diffraction grating 31A is formed in a region 31a where a laser is desired to be formed. The diffraction grating is formed by repeatedly forming grooves having a depth of 30 nm at a pitch of 241 nm corresponding to the oscillation wavelength of the laser.

Next, in the step of FIG. 9B, the substrate 3
A first optical confinement layer 32 made of an InGaAsP layer having a λ _g of 1.15 μm is formed on the layer 1, and a quantum well layer made of InGaAsP having a thickness of 5.1 nm and a strain of 0.8% is formed on the layer 32. And I having a λ _g of 1.3 μm and a thickness of 10 nm
The MQW active layer 33 is formed by alternately depositing 10 layers of nGaAsP barrier layers. Further, a second light confinement layer 34A having the same composition as that of the layer 32 is formed on the active layer 33 to have a thickness of 100 nm.
An InP clad layer 34B is deposited thereon to a thickness of 100 nm.

Next, in the step of FIG. 9C, the layer 34
SiO to cover only the region 31a.₂ Mask 35
Formed, and exposed in the process of FIG.
First, the layers 33 to 34A and 34B from the region 31b in which
C explained₂ H₆ , H₂ , O ₂ Etching gas consisting of
Is removed by etching by the RIE method using. That
A semiconductor structure forming a laser diode in the result region 31a
In the region 31b where the features are formed, while the optical modulator is formed
At this point, the upper surface of the light confinement layer 32 is exposed. that time,
As described with reference to FIGS. 5 and 6, as a result of dry etching,
The edge of the semiconductor structure is defined by a flat edge surface.

Next, in the step of FIG.
_{2 With the} mask 35 left, the thickness of InG is 5.1 nm.
MQW is formed by alternately stacking five quantum well layers made of aAs layers and barrier layers having a λ _g of 1.15 μm and a thickness of 5.1 nm.
A layer 33 'is formed. Further, a second optical confinement layer 34A ′ having the same composition as the optical confinement layer 32 and a cladding layer 34B having the same composition as the cladding layer 34B are formed on the MQW layer 33 ′. As a result, the semiconductor structure that constitutes the light modulator is formed by layers 33 'and 34'. As described above with reference to FIGS. 5 and 6, in the structure thus formed, the layer 33 and the layer 33 ′ are formed.
Between layers 34A and 34A 'and between layers 34B
The abnormal growth of the semiconductor layer does not occur at the boundary surface between the MQW layer 33 and the MQW layer 33 ′.
A good optical coupling is formed between and. However, in the above steps, the layers 32 to 34 and the layers 32 'to 34' are deposited by the MOCVD method. At that time, TMI (trimethylindium) was used as a raw material of In, TEG (triethylgallium) was used as a raw material of Ga, arsine was used as a raw material of As, and phosphine was used as a raw material of P. It is performed by setting the temperature to 610 ° C.

Further, in the process of FIG.
The mask 35 is removed, and InP is formed on the layers 34B and 34B '.
The clad layer 35 having a thickness of 1 μm is formed by liquid phase epitaxy.
Formed by the sea, on which λ_gIs 1.3 μm In
The contact layer 37 made of GaAsP has a thickness of 400 nm.
Deposited to thickness. The structure of FIG. 10 (F) was formed.
Then, as shown in the end view of FIG.
Strides with a width of 1.5 μm along the optical axis of the optical integrated circuit
SiO-shaped ₂ Forming a mask pattern 41, and
Reach the light confinement layer 32 using the light mask pattern 41
11H by performing the etching to
As shown in the plan view, it extends over the regions 31a to 31b.
The existing ridge type waveguide 42 is formed, and as shown in FIG.
As shown, the ridge waveguide is InP doped with Fe.
Embed with. Further, the mask 41 is removed to remove the electrode 4
2a to the laser region 31a, and the electrode 42b to the modulation region.
31b, and a backside electrode 42c on the backside of the substrate 31.
The optical integrated circuit shown in FIG.
To be Such an optical integrated circuit has the far-field pattern shown in FIG.
And has a high optical coupling effect between the laser region and the modulation region.
Characterized by rate.

In the step of FIG. 10D, the semiconductor layers 33 and 34 are formed.
Although the RIE method was used to remove the impurities by etching, the present invention is not limited to the RIE method. For example, the step of FIG. 10D is performed by the reactive ion beam etching (RIBE) method. Is also possible. In this case, chlorine (Cl ₂ ) gas is used as an etching gas for 2
The etching may be performed at a flow rate of 0 SCCM, the substrate temperature of 150 ° C. and the acceleration voltage set to about 1000V.

In the above embodiment, the area 31b is used.
However, the present invention is not limited to such a specific example, and a light receiving element can be formed in the region 31b, for example.

[0028]

According to the present invention, a part of the already deposited first semiconductor layer is etched by a dry etching method such as RIE or RIBE to expose the end face so that the exposed end face is continuous. Further, by growing the second semiconductor layer on the substrate, it becomes possible to suppress the abnormal growth of the second semiconductor layer on the end face, and the second semiconductor layer is formed on a common substrate to form an optical integrated circuit. High optical coupling efficiency can be realized between the first and second semiconductor layers.

[Brief description of drawings]

FIG. 1 is a view showing an end face of a semiconductor layer which has been subjected to a wet etching process.

FIG. 2 is a diagram for explaining the structure of FIG.

FIG. 3 is a diagram showing abnormal growth of a semiconductor layer grown adjacent to the structure of FIG.

FIG. 4 is a diagram showing an end face of a semiconductor layer that has been dry-etched.

5 is a diagram showing a structure obtained when a semiconductor layer is grown adjacent to the structure of FIG.

FIG. 6 is a diagram for explaining the structure of FIG. 5 in detail.

7 is a diagram showing a far-field pattern obtained with the structure of FIG.

8 is a diagram showing a far-field pattern obtained by the structure of FIG.

9A to 9C are views (No. 1) showing a manufacturing process of an optical integrated circuit according to an embodiment of the present invention.

10 (D) to 10 (F) are views (No. 2) showing the manufacturing process of the optical integrated circuit according to the embodiment of the present invention.

11 (G) to (I) are views showing the manufacturing process of the optical integrated circuit according to the embodiment of the present invention (No. 3).

FIG. 12J is a view (No. 4) showing the manufacturing process of the optical integrated circuit according to the embodiment of the present invention.

[Explanation of symbols]

 1, 11, 31 Substrate 2, 12, 32 First light confinement layer 3 Etching stopper 4, 13, 13 ', 33, 33' Active layer 5, 14, 14 ', 34, 34' Second light confinement layer 6,15,15 ', 36 Clad layer 7,35,41 Etching mask 37 Contact layer

Claims (7)

[Claims] 1. A method of manufacturing an optical integrated circuit in which a first optical semiconductor element and a second optical semiconductor element optically coupled to each other are formed on a common substrate, the first optical semiconductor being provided on the substrate. Depositing a first compound semiconductor layer constituting an element; forming a mask pattern on the first compound semiconductor layer corresponding to a first region in which the first optical semiconductor element is formed A step of removing the first compound semiconductor layer from a second region on a substrate on which a second optical semiconductor element is to be formed by etching, using the mask pattern as a mask; and the second region. And a step of depositing a second compound semiconductor layer forming the second optical semiconductor element so that the second compound semiconductor layer is optically coupled to the first compound semiconductor layer, The etching process is dry Is performed by etching, the second semiconductor layer wherein the deposited by metal organic chemical vapor deposition method. 2. The first and second compound semiconductor layers each include first and second active layers in which optical signals are confined, and the step of depositing the second compound semiconductor layer comprises:
An end surface of the first active layer and an end surface of the second active layer are in physical surface contact with each other at an interface between the first compound semiconductor layer and the second compound semiconductor layer. The method of claim 1, wherein the method is performed. 3. The method according to claim 1, wherein the etching step is performed by a reactive ion etching method. 4. The first and second active layers are InGaA
made of sP, the etching process method according to claim 3, characterized in that it is executed by the C ₂ H _6, H ₂ and O ₂ reactive ion etching method using. 5. The method according to claim 1, wherein the etching step is performed by a reactive ion beam etching method. 6. An optical integrated circuit comprising first and second optical semiconductor elements optically coupled to each other on a common substrate to define a first region and a second region. A formed substrate; a first compound semiconductor layer which is formed on the first region and includes a first active layer for confining light, and which constitutes the first optical semiconductor device; and the second compound semiconductor layer. A second compound semiconductor layer formed on the region and containing a second active layer for confining light; and a second compound semiconductor layer forming the second optical semiconductor element; and the first and second compound semiconductor layers are boundaries. The optical integrated circuit is characterized in that the end faces of the first active layer and the end faces of the second active layer are in surface contact with each other at the boundary face. 7. The first and second active layers each have a quantum well structure, and the thickness or composition of the quantum well layers forming the quantum well structure is the same as that of the first active layer and the second active layer. 7. The optical integrated circuit according to claim 6, wherein the layers are different from each other.