JPH07254560A - Method for semiconductor crystal growth - Google Patents

Method for semiconductor crystal growth

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Publication number
JPH07254560A
JPH07254560A JP6043493A JP4349394A JPH07254560A JP H07254560 A JPH07254560 A JP H07254560A JP 6043493 A JP6043493 A JP 6043493A JP 4349394 A JP4349394 A JP 4349394A JP H07254560 A JPH07254560 A JP H07254560A
Authority
JP
Japan
Prior art keywords
crystal
semiconductor
compound semiconductor
iii
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP6043493A
Other languages
Japanese (ja)
Inventor
Takeshi Maeda
毅 前田
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Fujitsu Ltd
Original Assignee
Fujitsu Ltd
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Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6043493A priority Critical patent/JPH07254560A/en
Publication of JPH07254560A publication Critical patent/JPH07254560A/en
Withdrawn legal-status Critical Current

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Abstract

PURPOSE:To provide means of forming high-quality hetero junction by preventing the segregation of an element constituting a III-V compound semiconductor into a growing semiconductor when growing a group IV semiconductor or a II-VI compound semiconductor on III-V compound semiconductor crystal. CONSTITUTION:When growing a semiconductor of group IV such as Ge, Si, SiGe and the like or a semiconductor of II-VI compound semiconductor such as ZnSe on III-V compound semiconductor crystal such as GaAs, a composition ratio between the surface crystal structure of compound semiconductor crystal and the elements constituting a compound semiconductor is so adjusted that no electric charge will occur on the growth interface and then a single element semiconductor such as Ge or a II-VI compound semiconductor such as ZnSe is grown. When growing Ge on GaAs, the surface structure is made to (2X4) structure, (6X4) structure, (5X4) structure, (5X2) structure and (3X1) structure, and V/III ratio is set to 0.5 to 3.0.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、分子線結晶成長法(M
BE)、有機金属気相成長法(MOVPE)等のエピタ
キシャル結晶成長法によって化合物半導体の上にI V族
半導体または化合物半導体を成長してヘテロ接合を形成
するための半導体結晶の成長方法に関する。
The present invention relates to a molecular beam crystal growth method (M
BE), metalorganic vapor phase epitaxy (MOVPE) or the like, and a semiconductor crystal growth method for growing a group IV semiconductor or a compound semiconductor on a compound semiconductor by an epitaxial crystal growth method to form a heterojunction.

【0002】近年の半導体装置の高性能化に対する要求
にともない、ヘテロ接合の品質に対する要求も高度化し
ている。ヘテロ接合を形成する複数の半導体層を任意に
選択することができ、かつ、その界面における組成分布
が急峻であることが要求されている。
With the recent demand for higher performance of semiconductor devices, the demand for the quality of heterojunctions has also become higher. It is required that a plurality of semiconductor layers forming a heterojunction can be arbitrarily selected and that the composition distribution at the interface is steep.

【0003】Ge/III −V族化合物半導体ヘテロ接合
は、ヘテロ接合電界効果トランジスタ、ヘテロ接合バイ
ポーラトランジスタ等の超高速トランジスタに応用でき
るものとして期待されている。特に、高速で低消費電力
の半導体装置として、化合物半導体ヘテロ接合を用いた
相補型電界効果トランジスタの集積回路装置(相補型H
EMT集積回路装置)が注目されている。
Ge / III-V group compound semiconductor heterojunctions are expected to be applicable to ultra-high speed transistors such as heterojunction field effect transistors and heterojunction bipolar transistors. In particular, as a semiconductor device of high speed and low power consumption, an integrated circuit device of a complementary field effect transistor using a compound semiconductor heterojunction (complementary H
The EMT integrated circuit device) is drawing attention.

【0004】そして、nチャネルHEMTとしてはIII
−V族化合物半導体を用い、pチャネルHEMTとして
はチャネル層にGe、正孔供給層としてはIII −V族化
合物半導体を用いることが有望視されている。また、こ
れらの半導体ヘテロ接合を急峻な組成プロファイルで、
かつ高純度に形成することが望まれている。
As an n-channel HEMT, III
It is considered promising to use a group-V compound semiconductor, Ge for the channel layer in the p-channel HEMT, and III-V group compound semiconductor for the hole supply layer. In addition, these semiconductor heterojunctions have a steep composition profile,
In addition, it is desired to form with high purity.

【0005】[0005]

【従来の技術】分子線結晶成長法(MBE)、有機金属
気相成長法(MOVPE)によって化合物半導体を成長
すると、原子層単位で制御して化合物半導体を成長する
ことが可能であり、かつ高純度の結晶を成長することが
できることから、ヘテロ接合を利用した半導体装置の製
造等に広く利用されている。さて、これらの結晶成長法
を用いてIII −V族化合物半導体上にGeを成長する
と、下地のIII −V族化合物半導体の構成原子がGe中
に偏析し、ヘテロ接合の品質が損なわれるという問題あ
った。
2. Description of the Related Art When a compound semiconductor is grown by a molecular beam crystal growth method (MBE) or a metalorganic vapor phase epitaxy method (MOVPE), it is possible to grow the compound semiconductor by controlling in atomic layer units. Since it is possible to grow a crystal of high purity, it is widely used for manufacturing semiconductor devices utilizing a heterojunction. Now, when Ge is grown on a III-V group compound semiconductor using these crystal growth methods, the constituent atoms of the underlying III-V group compound semiconductor are segregated in Ge, and the quality of the heterojunction is impaired. there were.

【0006】[0006]

【発明が解決しようとする課題】成長するGe中に偏析
したIII 族原子は、Ge中でp型不純物となり、V族原
子はn型不純物となる。そのため、III −V族化合物半
導体を構成する元素の偏析がない高純度のGeをIII −
V族化合物半導体上に成長することができなかった。本
発明は、III −V族化合物半導体の上にGe等のI V族
半導体またはZnSe等のII−VI 族化合物半導体を成
長する際、成長する半導体中へのIII −V族化合物半導
体の構成原子の偏析を低減し、高品質のヘテロ接合を形
成することができる半導体結晶の成長方法を提供するこ
とを目的とする。
The group III atoms segregated in the growing Ge become p-type impurities in the Ge, and the group V atoms become n-type impurities. Therefore, high-purity Ge that does not segregate the elements constituting the III-V group compound semiconductor is
It could not be grown on the group V compound semiconductor. According to the present invention, when a Group IV semiconductor such as Ge or a Group II-VI compound semiconductor such as ZnSe is grown on a Group III-V compound semiconductor, the constituent atoms of the Group III-V compound semiconductor are added to the growing semiconductor. It is an object of the present invention to provide a method for growing a semiconductor crystal capable of forming a high-quality heterojunction by reducing the segregation of Al.

【0007】[0007]

【課題を解決するための手段】本発明にかかる半導体結
晶の成長方法においては、III −V族化合物半導体の上
にI V族半導体またはII−VI 族化合物半導体をエピタ
キシャル成長する際、該化合物半導体の表面の結晶構造
および該化合物半導体を構成する元素の表面組成比を、
該化合物半導体と成長する該I V族半導体または化合物
半導体の界面に電荷が発生しない状態に調節した後、該
I V族半導体または化合物半導体を成長する工程を採用
した。
In a method for growing a semiconductor crystal according to the present invention, when a group IV semiconductor or a group II-VI compound semiconductor is epitaxially grown on a group III-V compound semiconductor, the compound semiconductor The crystal structure of the surface and the surface composition ratio of the elements constituting the compound semiconductor are
After adjusting to a state where no charge is generated at the interface between the compound semiconductor and the IV semiconductor or compound semiconductor that grows,
A process of growing a group IV semiconductor or a compound semiconductor was adopted.

【0008】この場合、化合物半導体をGaAs,Al
As,AlGaAs,InGaP等のIII −V族化合物
半導体とし、その表面上に成長するI V族半導体層をG
e,Si,SiGeとし、成長する化合物半導体をZn
Se等のII−VI 化合物半導体とすることができる。
In this case, the compound semiconductor is GaAs or Al.
A group III-V compound semiconductor such as As, AlGaAs, or InGaP is used, and a group IV semiconductor layer grown on the surface of the group III-V compound semiconductor is G
e, Si and SiGe, and the growing compound semiconductor is Zn
It can be a II-VI compound semiconductor such as Se.

【0009】これらの場合、GaAs結晶またはAlA
s結晶を、その表面のV/III 比が所望の表面構造のV
/III 比より高い状態に成長した後、該GaAs結晶ま
たはAlAs結晶を所望の表面構造が得られるまで昇温
した後、Geの成長温度にしてGeを成長することがで
きる。
In these cases, GaAs crystal or AlA
The s crystal has a V / III ratio of the surface of Vs of a desired surface structure.
After growing to a ratio higher than the / III ratio, the GaAs crystal or AlAs crystal is heated until the desired surface structure is obtained, and then Ge can be grown at the growth temperature of Ge.

【0010】また、これらの場合、GaAs結晶または
AlAs結晶を、その表面のV/III 比が所望の表面構
造のV/III 比より高い状態に成長した後、Gaまたは
Alを所望の表面構造が得られる量照射した後、Geを
成長することができる。
Further, in these cases, after growing a GaAs crystal or an AlAs crystal so that the V / III ratio of the surface thereof is higher than the V / III ratio of the desired surface structure, Ga or Al is changed to a desired surface structure. After irradiating the obtained amount, Ge can be grown.

【0011】また、これらの場合、GaAs結晶または
AlAs結晶を、その表面のV/III 比が所望の表面構
造のV/III 比より低い状態に成長した後、Asを所望
の表面構造が得られる量照射した後、Geを成長するこ
とができる。
Further, in these cases, after growing a GaAs crystal or an AlAs crystal in a state where the V / III ratio of the surface is lower than the V / III ratio of the desired surface structure, As is obtained in the desired surface structure. After irradiating with a large amount, Ge can be grown.

【0012】また、これらの場合、GaAs結晶または
AlAs結晶の表面構造をRHEED法あるいはRDS
法を用いて観測し、所望の表面構造が得られたことを確
認した後Geを成長することができる。
In these cases, the surface structure of the GaAs crystal or AlAs crystal is determined by the RHEED method or the RDS method.
Ge can be grown after confirming that the desired surface structure is obtained by using the method.

【0013】[0013]

【作用】本発明のように、III −V族化合物半導体の例
えば(001)面上にGe等のI V族半導体またはZn
Se等のII−VI 族化合物半導体を成長する際、下地の
III −V族化合物半導体の表面上のV/III 比を0.5
〜3とすると、下地のIII −V族化合物半導体の表面を
安定化し、界面電荷の発生を抑えることができるため、
III −V族化合物半導体を構成するIII 族原子またはV
族原子の成長する半導体への偏析を有効に低減し、良好
なヘテロ接合を形成することができる。
As in the present invention, a III-V compound semiconductor, for example, an IV group semiconductor such as Ge or Zn on the (001) plane is used.
When growing II-VI group compound semiconductors such as Se,
The V / III ratio on the surface of the III-V compound semiconductor is set to 0.5.
When it is set to 3, the surface of the underlying III-V compound semiconductor can be stabilized and the generation of interface charge can be suppressed,
Group III atoms or V constituting III-V group compound semiconductor
It is possible to effectively reduce the segregation of group atoms into the growing semiconductor and form a good heterojunction.

【0014】MBE法でGe/III −V族化合物半導体
ヘテロ接合を形成する場合、III −V族化合物半導体
は、V族原子の蒸発を抑えるためにV族過剰雰囲気中で
成長するため、同一成長室でGeを成長するとGe中に
V族原子がドーピングされてるため、Geは超真空弁で
接続された別の成長室で成長する。
When a Ge / III-V compound semiconductor heterojunction is formed by the MBE method, the III-V compound semiconductor grows in a V-group excess atmosphere in order to suppress evaporation of V-group atoms. When Ge is grown in the chamber, the group V atoms are doped in Ge, so that Ge grows in another growth chamber connected by an ultra-vacuum valve.

【0015】III −V族化合物半導体成長室でIII −V
族化合物半導体を成長した後、Ge成長室に試料を搬送
した時、III −V族化合物半導体の表面にはこのIII −
V族化合物半導体を降温する間にV族原子が付着するた
め、(2×2)構造あるいはc(4×4)構造となる。
この表面は、最表面にV族原子が1.75層以上付着し
た面であり、その上にGeを成長すると、多量のV族原
子がGe中に偏析するだけでなく、多量の電子が発生
し、III −V族化合物半導体を構成する原子のGe中へ
の偏析の原動力となる。
III-V compound semiconductor growth chamber III-V
After the group compound semiconductor was grown, when the sample was transported to the Ge growth chamber, the III-V compound semiconductor surface was exposed to the III-
Since the group V atom is attached while the temperature of the group V compound semiconductor is lowered, the structure becomes a (2 × 2) structure or a c (4 × 4) structure.
This surface is a surface on which 1.75 layers or more of group V atoms are attached to the outermost surface. When Ge is grown on the surface, not only a large amount of group V atoms are segregated in Ge but also a large amount of electrons are generated. However, it becomes a driving force for segregation of atoms constituting the III-V compound semiconductor into Ge.

【0016】図3は、(2×2)構造のIII −V族化合
物半導体の上にGeを成長した場合の模式的断面図であ
る。この場合、この図に示されているように、III −V
族化合物半導体の最表面上全体にV族原子が付着してV
/III 比が無限大になっている。この場合は、V族原子
の過剰電子によって負電荷が発生するため、その上にG
eを成長すると、多量のV族原子がGe中に偏析する。
FIG. 3 is a schematic cross-sectional view when Ge is grown on a III-V group compound semiconductor having a (2 × 2) structure. In this case, as shown in this figure, III-V
Group V atoms are attached to the entire outermost surface of the group compound semiconductor to form V
The / III ratio is infinite. In this case, since a negative charge is generated by the excess electrons of the group V atom, G
When e is grown, a large amount of group V atoms are segregated in Ge.

【0017】他方、III 族安定化面として知られる(4
×2)あるいはc(8×2)構造を有する面は、III 族
原子が0.75層付着した面であり、その上にGeを成
長すると、多量の正孔が発生し、同様にIII −V族化合
物半導体を構成する原子のGe中への偏析の原動力とな
る。
On the other hand, known as a group III stabilizing surface (4
The surface having a x2) or c (8x2) structure is a surface on which 0.75 layers of group III atoms are attached, and when Ge is grown on the surface, a large amount of holes are generated and similarly III- It becomes a driving force for segregation of atoms constituting the group V compound semiconductor into Ge.

【0018】図4は、(4×2)構造のIII −V族化合
物半導体の上にGeを成長した場合の模式的断面図であ
る。この場合、この図に示されているように、III −V
族化合物半導体の最表面上にIII 族原子が付着してV/
III 比が0.33になっている。この場合は、III 族原
子の不足電子によってIII −V族化合物半導体の表面に
正電荷を発生するため、その上にGeを成長すると、多
量のIII 族原子がGe中に偏析し易くなる。
FIG. 4 is a schematic sectional view of a case where Ge is grown on a III-V group compound semiconductor having a (4 × 2) structure. In this case, as shown in this figure, III-V
Group III atoms are attached to the outermost surface of the group compound semiconductor, and V /
The III ratio is 0.33. In this case, a deficient electron in the group III atom generates a positive charge on the surface of the group III-V compound semiconductor, so that if Ge is grown on it, a large amount of group III atom is likely to segregate in Ge.

【0019】図1は、本発明の半導体結晶の成長方法の
説明図であり、(A)はGe成長前の経過最高基板温度
と正孔移動度の関係説明図、(B)はGe成長前の経過
最高基板温度、表面構造と表面のV/III 比の関係説明
図である。
1A and 1B are explanatory views of a method for growing a semiconductor crystal according to the present invention. FIG. 1A is an explanatory view of the relationship between the maximum substrate temperature and the hole mobility before the Ge growth, and FIG. FIG. 4 is a diagram illustrating the relationship between the maximum substrate temperature, the surface structure, and the V / III ratio of the surface of FIG.

【0020】なお、図1(A)の横軸と図1(B)の横
軸はともにGe成長前の経過最高基板温度であり、その
スケールを一致させている。まず、図1(A)をみる
と、Geの正孔移動度が400cm2 /Vsを超えるの
はGe成長前の経過最高基板温度が495℃から595
℃の範囲であり、この温度範囲を図1(B)の表面構造
でみると、GaAsについては(2×4)構造、(6×
4)構造、(5×4)構造、(5×2)構造、(3×
1)構造を含み、V/III 比でみると、3から0.5の
範囲に相当する。
The horizontal axis in FIG. 1 (A) and the horizontal axis in FIG. 1 (B) are the maximum elapsed substrate temperatures before Ge growth, and their scales are the same. First, as shown in FIG. 1 (A), the hole mobility of Ge exceeds 400 cm 2 / Vs because the maximum substrate temperature before growth of Ge is 495 ° C. to 595 ° C.
The temperature range is shown in FIG. 1B, and the surface structure of FIG. 1B shows that the GaAs has a (2 × 4) structure and a (6 ×)
4) structure, (5x4) structure, (5x2) structure, (3x
1) Including the structure, the V / III ratio corresponds to a range of 3 to 0.5.

【0021】また、AlAsについては、(2×4)構
造、(6×4)構造、(5×4)構造、(5×2)構造
または(3×2)構造を含み、V/III 比でみると、G
aAsと同様に3から0.5の範囲に相当する。
AlAs includes (2 × 4) structure, (6 × 4) structure, (5 × 4) structure, (5 × 2) structure or (3 × 2) structure, and has a V / III ratio of Looking at it, G
Like aAs, it corresponds to a range of 3 to 0.5.

【0022】そして、図1(A)をさらに検討すると、
Geの正孔移動度が430cm2 /Vsを超えて急増す
るのはGe成長前の経過最高基板温度が500℃から5
75℃の範囲であり、この温度範囲を図1(B)の表面
構造でみると、GaAsについては(2×4)構造、
(6×4)構造、(5×4)構造、(5×2)構造また
は(3×1)構造を含み、これをV/III 比でみると、
2から0.55の範囲に相当する。
Further examining FIG. 1 (A),
The hole mobility of Ge rapidly increases to exceed 430 cm 2 / Vs when the maximum substrate temperature before the growth of Ge is from 500 ° C to 5 ° C.
The temperature is in the range of 75 ° C. When this temperature range is viewed in the surface structure of FIG. 1B, the GaAs has a (2 × 4) structure,
A (6 × 4) structure, a (5 × 4) structure, a (5 × 2) structure or a (3 × 1) structure is included, and the V / III ratio is
This corresponds to a range of 2 to 0.55.

【0023】また、AlAsについては、(2×4)構
造、(6×4)構造、(5×4)構造、(5×2)構造
または(3×2)構造を含み、V/III 比でみると、G
aAsと同様に2から0.55の範囲に相当する。
AlAs includes (2 × 4) structure, (6 × 4) structure, (5 × 4) structure, (5 × 2) structure or (3 × 2) structure, and has a V / III ratio of Looking at it, G
Like aAs, it corresponds to the range of 2 to 0.55.

【0024】上記の結晶構造のV/III 比の範囲におい
て、偏析が抑えられ、成長したGeの特性が改善され
る。これは、図1(A),(B)のように、III −V族
化合物半導体の表面のV/III 比を1から大きく離れな
いようにすることにより、界面電荷の発生を抑えること
ができたためと考えられる。
Within the V / III ratio range of the above crystal structure, segregation is suppressed and the characteristics of grown Ge are improved. As shown in FIGS. 1 (A) and 1 (B), it is possible to suppress the generation of interfacial charges by keeping the V / III ratio of the surface of the III-V compound semiconductor at a value not greatly deviating from 1. It is thought to be a tame.

【0025】なお、先に正孔の移動度が高くなる範囲の
III −V族化合物半導体の表面の結晶構造を挙げたが、
実際には得られる条件範囲が狭い構造が他にも存在し、
それらの表面構造についても表面のV/III 比が0.5
〜3であれば前記と同様の効果を奏する。
Incidentally, in the range where the hole mobility becomes high first
The crystal structure of the surface of the III-V group compound semiconductor is mentioned.
In fact, there are other structures with narrow range of conditions,
The surface V / III ratio of these surface structures is 0.5.
If it is ~ 3, the same effect as the above is produced.

【0026】図2は、本発明の構造のIII −V族化合物
半導体の上にGeを成長した場合の模式的断面図であ
る。この場合、この図に示されているように、III −V
族化合物半導体の最表面上にV族原子が0.5原子層付
着し、V/III 比が1になっている。この場合は、V族
原子の過剰電子とIII 族原子の不足電子が平均化され
て、電荷が現れず、その上にGeを成長するとき、III
族原子またはV族原子がGe中に偏析せず、高品質のヘ
テロ接合が形成される。なお、前記の基板の温度は、測
定方法によってやや異なる値を示すことがわかっている
が、本発明を説明する上では支障はない。
FIG. 2 is a schematic sectional view of the case where Ge is grown on the III-V group compound semiconductor having the structure of the present invention. In this case, as shown in this figure, III-V
A group V atom of 0.5 atomic layer is attached to the outermost surface of the group compound semiconductor, and the V / III ratio is 1. In this case, the excess electrons of the group V atoms and the deficient electrons of the group III atoms are averaged so that no charge appears, and when Ge is grown on top of it, III
Group atoms or group V atoms do not segregate in Ge and high quality heterojunctions are formed. It is known that the temperature of the substrate shows a slightly different value depending on the measuring method, but there is no problem in explaining the present invention.

【0027】[0027]

【実施例】以下、本発明の実施例を説明する。MBE法
によりAlAs上にGeを成長した。すなわち、半絶縁
性のGaAs基板をIII −V族化合物半導体専用成長室
に搬送し、自然酸化膜を除去した後、基板温度600℃
でノンドープGaAsを350Å、ノンドープAlAs
を50Å成長した。成長速度は、それぞれ0.7μm/
h,0.3μm/hであった。
EXAMPLES Examples of the present invention will be described below. Ge was grown on AlAs by the MBE method. That is, the semi-insulating GaAs substrate is transferred to the III-V group compound semiconductor-dedicated growth chamber, the native oxide film is removed, and then the substrate temperature is set to 600 ° C.
Undoped GaAs 350 Å, undoped AlAs
Has grown to 50Å. Growth rate is 0.7 μm /
h, 0.3 μm / h.

【0028】この際、As/Gaビーム比を10とした
が、Asシャッターを閉じてもAs/Ga比が1に相当
するAs雰囲気であった。基板温度を300℃まで下げ
た後、Ga専用成長室に搬送した。この場合、RHEE
D法(Reflection High Energy
Electron Diffraction)によって
表面構造を調べたところ、(2×2)構造であった。
At this time, the As / Ga beam ratio was set to 10, but the As atmosphere was equivalent to an As / Ga ratio of 1 even when the As shutter was closed. After lowering the substrate temperature to 300 ° C., it was transferred to a Ga-dedicated growth chamber. In this case, RHEE
D method (Reflection High Energy
When the surface structure was examined by Electron Diffraction, it was (2 × 2) structure.

【0029】基板温度を上げてから、Ge成長温度であ
る250℃に固定して、ノンドープGeを厚さ4000
Å成長した。GeをKセルで1150℃に加熱して供給
したが、この場合、成長速度は0.14μm/hであっ
た。成長した試料は大気中に取り出し、室温においてホ
ール測定を行った。
After raising the substrate temperature, the temperature is fixed at 250 ° C. which is the Ge growth temperature, and the thickness of undoped Ge is set to 4000.
Å I grew up. Ge was heated to 1150 ° C. in a K cell and supplied, and in this case, the growth rate was 0.14 μm / h. The grown sample was taken out into the atmosphere and subjected to Hall measurement at room temperature.

【0030】(比較例)まず、本発明の実施例と比較す
るため従来技術によってGeを成長する方法について説
明する。Ge成長前に基板温度を上げず、そのままGe
成長温度である250℃にして成長した。この場合、正
孔移動度は190cm2 /Vs、正孔濃度は3.9×1
17cm -3であった。また、Ge成長前に基板温度を8
60℃に上げた場合は、表面構造は(4×6)構造であ
り、正孔移動度は180cm2 /Vs、正孔濃度は6.
2×1018cm-3であった。
(Comparative Example) First, a comparison will be made with the example of the present invention.
Therefore, the method of growing Ge by the conventional technique is explained.
Reveal Do not raise the substrate temperature before growing the Ge
It was grown at a growth temperature of 250 ° C. In this case, positive
Hole mobility is 190 cm2/ Vs, hole concentration 3.9 × 1
017cm -3Met. In addition, the substrate temperature is set to 8 before the Ge growth.
When the temperature is raised to 60 ° C, the surface structure is a (4x6) structure.
And the hole mobility is 180 cm2/ Vs, hole concentration is 6.
2 x 1018cm-3Met.

【0031】(第1実施例)前記Geの成長方法におい
て、Ge成長前に基板温度を525℃に上げた。その結
果得られた試料の表面構造は(5×4)構造で、V/II
I 比は1であった。また、この試料の正孔移動度は56
0cm2 /Vs、正孔濃度は2.8×10 17cm-3であ
り、移動度が従来の2倍以上となり、正孔濃度も低下し
た。
(First Embodiment) In the method of growing Ge,
Then, the substrate temperature was raised to 525 ° C. before the Ge growth. That conclusion
The surface structure of the obtained sample is (5 × 4) structure, V / II
The I ratio was 1. The hole mobility of this sample is 56.
0 cm2/ Vs, hole concentration is 2.8 × 10 17cm-3And
The mobility is more than double that of the conventional one, and the hole concentration is also reduced.
It was

【0032】(第2実施例)AlAsを成長した後、基
板温度を500℃に下げ、(2×4)構造、V/III 比
を3とした。この試料の最表面にAsが0.75層付着
しているため、Alを0.25層、すなわち3.4秒間
照射すると(5×4)構造になった。この際、雰囲気か
らAsが付着しないように、短時間で搬送するか、As
セルの温度を下げてからAl照射を行う必要がある。
(Second Example) After growing AlAs, the substrate temperature was lowered to 500 ° C., and the (2 × 4) structure and V / III ratio were set to 3. Since 0.75 layer of As was attached to the outermost surface of this sample, a 0.25 layer of Al, that is, a (5 × 4) structure was obtained when irradiated for 3.4 seconds. At this time, in order to prevent As from adhering to the atmosphere, the As should be transported in a short time, or
It is necessary to lower the cell temperature and then perform Al irradiation.

【0033】(第3実施例)AlAsを意図的にAs不
足条件で成長すると(4×2)構造、V/III 比を0.
33の試料が得られる。この試料の最表面にAsを0.
25層、すなわちAs/Alビーム比を1として3.4
秒間照射すると(5×4)構造になった。
(Third Embodiment) When AlAs is intentionally grown under the As-deficient condition (4 × 2) structure, the V / III ratio is set to 0.
33 samples are obtained. As was 0.
25 layers, that is, 3.4 with an As / Al beam ratio of 1.
After irradiation for a second, it became a (5 × 4) structure.

【0034】(第4実施例)成長装置内が真空でないM
OVPE法では電子線を使うRHEED法によって表面
を観察することはできないが、この場合は、光を使うR
DS法(Reflectance−Differenc
e Spectoscopy)によって表面を観察す
る。その観察結果によると、MBE法によって観測した
場合と同様の表面構造を有することが明らかになってお
り、RDSスペクトルと各表面構造の対応を決定するこ
とができ、また、表面のV/III 比を決定することもで
きる。したがって、MOVPE法によってGeを成長す
る際には、RDS法により観察しながら、表面構造を制
御すればよい。
(Fourth Embodiment) The inside of the growth apparatus is not a vacuum M
In the OVPE method, the surface cannot be observed by the RHEED method using an electron beam, but in this case, R using light is used.
DS method (Reflectance-Difference)
Observe the surface by e-Specocopy). According to the observation result, it is clear that the surface structure is similar to that observed by the MBE method, the correspondence between the RDS spectrum and each surface structure can be determined, and the V / III ratio of the surface can be determined. Can also be determined. Therefore, when growing Ge by the MOVPE method, the surface structure may be controlled while observing by the RDS method.

【0035】前記の実施例においては、GaAs,Al
Asの上にGeを成長する場合について説明したが、そ
の原理上、これらをAlGaAsやInGaP等のIII
−V族化合物半導体の中から選ぶことができる。またそ
の上に成長する半導体も格子定数が大きな歪みを生じる
程度に異ならない組合せである以上、Si,SiGe,
SiC等の IV族半導体の中から選ぶことができる。
In the above embodiment, GaAs, Al
The case of growing Ge on As has been described, but in principle, these are used as AlGaAs, InGaP, etc. III.
It can be selected from the group V compound semiconductors. In addition, the semiconductors grown on the Si, SiGe,
It can be selected from Group IV semiconductors such as SiC.

【0036】また、本発明は、界面に発生する電荷と化
合物半導体を構成する原子の偏析の関係から、III −V
族化合物半導体の上に、ZnSe等のII−VI 族化合物
半導体を成長する場合にも、その逆に、II−VI 族化合
物半導体の上にIII −V族化合物半導体を成長する場合
にも適用することができるものと推測される。
Further, in the present invention, from the relationship between the charge generated at the interface and the segregation of the atoms constituting the compound semiconductor, III-V
The present invention is applicable to the case of growing a II-VI group compound semiconductor such as ZnSe on a group III compound semiconductor, and vice versa, when the group III-V compound semiconductor is grown on a group II-VI compound semiconductor. It is supposed to be possible.

【0037】[0037]

【発明の効果】以上説明したように、本発明によると、
偏析を防止したエピタキシャル結晶成長を行うことがで
きるため、高品質のヘテロ接合を形成することができ、
このヘテロ接合を用いた半導体装置の性能向上に寄与す
るところが大きい。
As described above, according to the present invention,
Since epitaxial crystal growth that prevents segregation can be performed, a high quality heterojunction can be formed,
It greatly contributes to the performance improvement of the semiconductor device using this heterojunction.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の半導体結晶の成長方法の説明図であ
り、(A)はGe成長前の経過最高基板温度と正孔移動
度の関係説明図、(B)はGe成長前の経過最高基板温
度、表面構造と表面のV/III 比の関係説明図である。
FIG. 1 is an explanatory diagram of a semiconductor crystal growth method of the present invention, (A) is an explanatory diagram of the relationship between the maximum substrate temperature and hole mobility before Ge growth, and (B) is the maximum transition before Ge growth. It is a board | substrate temperature, surface structure, and V / III ratio of a surface, explanatory drawing of a relationship.

【図2】本発明の構造のIII −V族化合物半導体の上に
Geを成長した場合の模式的断面図である。
FIG. 2 is a schematic cross-sectional view when Ge is grown on a III-V group compound semiconductor having a structure of the present invention.

【図3】(2×2)構造のIII −V族化合物半導体の上
にGeを成長した場合の模式的断面図である。
FIG. 3 is a schematic cross-sectional view when Ge is grown on a III-V group compound semiconductor having a (2 × 2) structure.

【図4】(4×2)構造のIII −V族化合物半導体の上
にGeを成長した場合の模式的断面図である。
FIG. 4 is a schematic sectional view when Ge is grown on a III-V group compound semiconductor having a (4 × 2) structure.

Claims (8)

【特許請求の範囲】[Claims] 【請求項1】 III −V族化合物半導体の上にI V族半
導体またはII−VI族化合物半導体をエピタキシャル成
長する際、該化合物半導体の表面の結晶構造および該化
合物半導体を構成する元素の表面組成比を、該化合物半
導体と成長する該I V族半導体または化合物半導体の界
面に電荷が発生しない状態に調節した後、該I V族半導
体または化合物半導体を成長することを特徴とする半導
体結晶の成長方法。
1. When a group IV semiconductor or a group II-VI compound semiconductor is epitaxially grown on a group III-V compound semiconductor, the crystal structure of the surface of the compound semiconductor and the surface composition ratio of the elements constituting the compound semiconductor. Is adjusted so that no charge is generated at the interface between the compound semiconductor and the group IV semiconductor or compound semiconductor that grows, and then the group IV semiconductor or compound semiconductor is grown. .
【請求項2】 化合物半導体がGaAs,AlAs,A
lGaAs,InGaP等のIII −V族化合物半導体で
あり、その表面上に成長するI V族半導体層がGe,S
i,SiGeであり、成長する化合物半導体がZnSe
等のII−VI化合物半導体であることを特徴とする請求
項1に記載された半導体結晶の成長方法。
2. The compound semiconductor is GaAs, AlAs, A
It is a III-V group compound semiconductor such as 1GaAs or InGaP, and the IV group semiconductor layer grown on the surface of the III-V group semiconductor is Ge or S.
i, SiGe, and the growing compound semiconductor is ZnSe
2. The method for growing a semiconductor crystal according to claim 1, which is a II-VI compound semiconductor such as
【請求項3】 GaAs結晶上にGeをエピタキシャル
成長する際、Geを成長する前のGaAs結晶の表面の
V/III 比が、(2×4)構造、(6×4)構造、(5
×4)構造、(5×2)構造または(3×1)構造のV
/III 比、すなわち0.5〜3であるように調整した後
にGeを成長することを特徴とする半導体結晶の成長方
法。
3. When epitaxially growing Ge on a GaAs crystal, the V / III ratio of the surface of the GaAs crystal before growing Ge is (2 × 4) structure, (6 × 4) structure, (5 × 5)
X4) structure, (5x2) structure or (3x1) structure V
/ III ratio, that is, Ge is grown after adjusting to a value of 0.5 to 3. A method for growing a semiconductor crystal.
【請求項4】 AlAs結晶上にGeをエピタキシャル
成長する際、Geを成長する前のAlAs結晶の表面の
V/III 比が、(2×4)構造、(6×4)構造、(5
×4)構造、(5×2)構造または(3×2)構造のV
/III 比、すなわち0.5〜3であるように調整した後
にGeを成長することを特徴とする半導体結晶の成長方
法。
4. When epitaxially growing Ge on an AlAs crystal, the V / III ratio of the surface of the AlAs crystal before growing Ge is (2 × 4) structure, (6 × 4) structure, (5
X4) structure, (5x2) structure or (3x2) structure V
/ III ratio, that is, Ge is grown after adjusting to a value of 0.5 to 3. A method for growing a semiconductor crystal.
【請求項5】 GaAs結晶またはAlAs結晶を、そ
の表面のV/III 比が所望の表面構造のV/III 比より
高い状態に成長した後、該GaAs結晶またはAlAs
結晶を所望の表面構造が得られるまで昇温した後、Ge
の成長温度にしてGeを成長することを特徴とする請求
項3または請求項4に記載された半導体結晶の成長方
法。
5. A GaAs crystal or AlAs crystal is grown so that the V / III ratio of the surface thereof is higher than the V / III ratio of a desired surface structure, and then the GaAs crystal or AlAs crystal is grown.
The temperature of the crystal is raised until the desired surface structure is obtained and then Ge
The method for growing a semiconductor crystal according to claim 3 or 4, wherein Ge is grown at the growth temperature of.
【請求項6】 GaAs結晶またはAlAs結晶を、そ
の表面のV/III 比が所望の表面構造のV/III 比より
高い状態に成長した後、GaまたはAlを所望の表面構
造が得られる量照射した後、Geを成長することを特徴
とする請求項3または請求項4に記載された半導体結晶
の成長方法。
6. A GaAs crystal or AlAs crystal is grown so that the V / III ratio of its surface is higher than the V / III ratio of the desired surface structure, and then Ga or Al is irradiated in an amount sufficient to obtain the desired surface structure. The method for growing a semiconductor crystal according to claim 3 or 4, wherein Ge is grown after the step.
【請求項7】 GaAs結晶またはAlAs結晶を、そ
の表面のV/III 比が所望の表面構造のV/III 比より
低い状態に成長した後、Asを所望の表面構造が得られ
る量照射した後、Geを成長することを特徴とする請求
項3または請求項4に記載された半導体結晶の成長方
法。
7. After growing a GaAs crystal or an AlAs crystal in a state where the V / III ratio of the surface thereof is lower than the V / III ratio of a desired surface structure, and then irradiating As with an amount sufficient to obtain the desired surface structure. , Ge is grown, The method for growing a semiconductor crystal according to claim 3 or 4, wherein
【請求項8】 GaAs結晶またはAlAs結晶の表面
構造をRHEED法あるいはRDS法を用いて観測し、
所望の表面構造が得られたことを確認した後Geを成長
することを特徴とする請求項3から請求項7までのいず
れか1項に記載された半導体結晶の成長方法。
8. A surface structure of a GaAs crystal or an AlAs crystal is observed by an RHEED method or an RDS method,
8. The method for growing a semiconductor crystal according to claim 3, wherein Ge is grown after confirming that a desired surface structure has been obtained.
JP6043493A 1994-03-15 1994-03-15 Method for semiconductor crystal growth Withdrawn JPH07254560A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6043493A JPH07254560A (en) 1994-03-15 1994-03-15 Method for semiconductor crystal growth

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6043493A JPH07254560A (en) 1994-03-15 1994-03-15 Method for semiconductor crystal growth

Publications (1)

Publication Number Publication Date
JPH07254560A true JPH07254560A (en) 1995-10-03

Family

ID=12665248

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JPH07254560A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010157721A (en) * 2008-12-23 2010-07-15 Imec Method for manufacturing monocrystalline semiconductor layer on substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010157721A (en) * 2008-12-23 2010-07-15 Imec Method for manufacturing monocrystalline semiconductor layer on substrate

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