JPH07239349A - Power factor-measuring apparatus for three-phase imbalanced circuit - Google Patents

Abstract

PURPOSE:To detect the reverse phase order and measure correct power factor by providing a negative-phase order detecting circuit which outputs a detection signal when an input from a three-phase electric circuit is in the negative-phase order. CONSTITUTION:A selection switch circuit 60a selects and outputs to an adder circuit 56 an output signal of either a 90 deg. phase shift circuit or a polarity inversion circuit 59a according to a negative-phase order detection signal 10 output from a negative- phase order detecting circuit 9. Similarly, a selection switch circuit 60b selects an AC voltage signal VRT of a level conversion circuit 58 according to the negative-phase order detection signal 10 when the signal indicates a positive-phase order, and an AC voltage signal -VTR=VRT of a polarity inversion circuit 59b when the signal 10 shows the negative-phase order. As a result, the AC voltage signal VRT of the same value is eventually output to a power factor-detecting circuit 57 in any of the positive-phase order and the negative-phase order. The circuit 57 can measure a power factor of a three-phase imbalanced circuit from an input corresponding to a current IS1 of a positive-phase component and the line voltage VRT regardless whether it is the positive-phase order or the negative-phase order.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transducer type unbalanced circuit power factor measuring device used in a three-phase three-wire unbalanced circuit.

[0002]

2. Description of the Related Art A conventional transducer type power factor measuring device for a three-phase unbalanced circuit is disclosed in, for example, Japanese Patent Laid-Open No. 53-21969.
There is one disclosed in the publication. In this case, under the condition that the three-phase voltage is balanced, the positive phase component of the current is taken out, the voltage corresponding to the positive phase component is taken out, and the phase difference becomes the phase angle φ corresponding to the equivalent power factor. It is shown.

That is, regarding the means, a method of extracting the positive phase component will be described with reference to the vector diagram shown in FIG. Figure 15
In (a), vector V _R , vector V _S , and vector V _T represent phase voltages, and vector V _RT represents line voltage. Also, vector I _R , vector I _S , vector I _T
Represents the line current. The positive-phase component vector I ₁ of the line current is expressed by equation (1). (Hereinafter, in each equation, the vector I ₁ , the vector I _R , the vector I _S , the vector I _T , the vector V _R , the vector V _T , and the vector V _RT are I ₁ , I _R , I _S , and I, respectively. _T, V _R,
Vectors are abbreviated as V _T and V _RT . )

[0004]

[Equation 1]

In the case of a three-phase three-wire circuit, I _R + I _S
Since + I _T = 0, I _S =-(I _R + I
(2) can be obtained by substituting _T ).

[0006]

[Equation 2]

From the equation (2), the following equation (3) is also an equation showing the positive phase component of the line current. That is, -1 / √ on both sides of equation (2)
Multiplying by 3 gives (3). −I ₁ / √3 = √3 / 2 (I _R + I _T ) + j1 / 2 (I _R −I _T ) ... (3) The vector I _{S1 in} FIG. 15 (a) represents the above formula (3). This is shown in equation (4). I _S1 = √3 / 2 (I _R + I _T ) + j1 / 2 (I _R −I _T ) ... (4) Further, the vector V _RT indicates the line voltage, which is shown below (5).
It becomes a relation of expression. _{V RT = (V R -V T} ) ............... (5)

FIG. 16 shows a conventional transducer type power factor measuring device for an unbalanced circuit, which uses the positive phase component vector I _{S1 of the} current and the line voltage vector V _RT for the power factor for a three phase unbalanced current. The measurement device is configured. In this device, the R-phase line current is proportional to the line current through the auxiliary current transformer CT1 and the first level conversion circuit 51 connected to the secondary side of the auxiliary current transformer CT1.
Converted to _R. The line current of the T phase is the auxiliary current transformer CT2,
And, it is converted into the secondary current I _T proportional to the line current through the second level conversion circuit 52 connected to the secondary side of the auxiliary current transformer CT2. The secondary currents I _R and I _T are input to the first adding circuit 53 and the subtracting circuit 54 in the next stage, and the first adding circuit 53 causes √3 / 2 in the equation (4).
The vector sum corresponding to (I _R + I _T ) is obtained, and the subtraction circuit 5
At 4, the vector difference corresponding to 1/2 (I _R −I _T ) in the above formula (4) is obtained. The output of the subtraction circuit 54 1/2 (I _R
-I _T) is converted by the next stage of the 90 ° phase shift circuit 55 to the 90 ° phase was _{j1 / 2 (I R -I T} ).

The vector sum current √3 / 2 (I _R +
I _T) and the vector difference current _{j1 / 2 (I R -I T} ) and the second
Is input to the adder circuit 56, and the vector sum current and the vector difference current are added to obtain the positive phase current I _S1 shown in the equation (4). Further, the three-phase voltage (vector V _R , vector V _S , vector V _T ) is input to the third level conversion circuit 58, level-converted to an appropriate value, and the line voltage of the above formula (5) required for measurement. Get V _RT . Next, the positive phase current I
_S1 and the line voltage V _RT are input to the power factor measuring circuit 57, and the power factor measuring circuit 57 calculates the phase angle φ corresponding to the equivalent power factor from the positive phase current I _S1 and the line voltage V _RT. Obtainable.

[0010]

Although the conventional device is constructed as described above, the instruction may become unstable when used in the reverse phase order. That is, in the reverse phase order, the negative phase component current I _S2 corresponding to the positive phase component current I _S1 shown in the formula (4) is as shown in the formula (6). I _S2 = √3 / 2 (I _T + I _R ) + j1 / 2 (I _T −I _R ) ... (6) Further, the line voltage V _TR corresponding to the line voltage V _RT shown in the equation (4) is It becomes like the formula (7). V _TR = (V _T −V _R ) = − V _RT (7) The relationship between the above equations (6) and (7) can be expressed in a vector diagram as shown in FIG. 15 (c). .

As can be understood from the vector diagram shown in FIG. 15C, the phase angle between the line voltage V _TR and the negative phase current I _{S2 is} the phase angle between the line voltage V _RT and the positive phase current I _S1 . Different from
This means that in the reverse phase order, the indication becomes unstable and correct power factor measurement cannot be performed.

The present invention has been made in order to solve the above-mentioned problem of the reverse phase sequence. By solving the problem of the so-called conventional transducer type device, and by providing a reverse phase sequence detection circuit, the reverse phase sequence is provided. It is an object of the present invention to provide a power factor measuring device for a three-phase unbalanced circuit, which is capable of detecting the sequence and performing a correct power factor measurement.

[0013]

The power factor measuring device for a three-phase unbalanced circuit according to the present invention outputs a detection signal indicating that the input from the three-phase electric circuit is in the reverse phase when the input is in the reverse phase. A sequence detection circuit is provided, and a phase sequence conversion means for converting a phase sequence by operating with a reverse phase sequence detection signal is provided.

Further, each current of vector sum and vector difference of arbitrary two-phase currents of the three-phase line current is taken out, and either one of the vector sum or the vector difference is obtained,
A three-phase unbalance configured to derive a current obtained by combining a current obtained by shifting the phase of the other current by 90 degrees and discriminate the phase of the combined current and the voltage of the two phases to measure the power factor. In a power factor measuring device for a balanced circuit, a current polarity reversing means for reversing the polarity of a current of a vector difference, a voltage polarity reversing means for reversing the polarity of a voltage, and this is detected when an input from a three-phase electric circuit is in reverse phase order. A reverse phase detecting means is provided, and the current polarity reversing means and the voltage polarity reversing means are operated according to the output of the reverse phase detecting means.

Further, each current of vector sum and vector difference of arbitrary two-phase currents of the three-phase line current is taken out, and either one of the vector sum or vector difference current is obtained,
A current obtained by synthesizing a current obtained by shifting the phase of the other current by 90 degrees is derived, and a power factor measurement circuit discriminates the phase of the synthesized current and the two-phase voltage to measure the power factor. In a power factor measuring device for a three-phase unbalanced circuit, current polarity reversing means for reversing the polarity of the vector difference current, DC voltage polarity reversing means for reversing the polarity of the DC voltage output from the power factor measuring circuit, and the three-phase circuit When the input is in the reverse phase order, the reverse phase detecting means for detecting this and the current polarity reversing means and the voltage polarity reversing means are operated according to the output of the reverse phase detecting means.

Further, a power factor measuring circuit for taking in the voltage of the three-phase circuit and the currents of the two phases therein and outputting the equivalent power factor of the three-phase circuit as a DC voltage, and the input from the three-phase circuit are in reverse phase order. In this case, a reverse-phase sequence detection circuit that outputs a detection signal that the phase is reversed is provided, and a control circuit that operates according to the reverse-phase sequence detection signal and superimposes a predetermined DC voltage on the output of the power factor measurement circuit is provided. Is.

Further, a control circuit is provided which operates by the reverse phase sequence detection signal and superimposes a predetermined DC voltage on the output of the power factor measuring circuit, and a means for manually switching the phase sequence of the circuit of the voltage and current to be taken in. Be prepared.

Further, a negative phase order detection signal self-holding means which operates by the negative phase order detection signal is provided, and when the negative phase order detection signal self-holding means is in the self-holding state, the phase order of the circuit of the voltage and current to be fetched. Is provided with a means for switching.

Further, there is provided a self-holding relay set by the detection signal of the reverse phase sequence detection circuit, and means for switching the phase sequence of the voltage and current circuit taken in by the relay contact when the self-holding relay is in the set state. Be prepared.

Further, a flip-flop circuit that inverts every time a detection signal of the reverse phase sequence detection circuit is input, and a self-holding relay in which the set coil and the reset coil are excited by the output of this flip-flop circuit are provided. It is provided with means for switching the phase sequence of the voltage and current circuits taken in by the contacts.

[0021]

In the power factor measuring device for a three-phase unbalanced circuit configured as described above, in the case of the reverse phase order, it is possible to display that the reverse phase order is set or to automatically switch the phase order. it can.

In the case where a predetermined DC voltage is superposed on the output of the power factor measuring circuit, the observer is informed of the reverse phase order when the indication of the indicating instrument is cut off in the case of the reverse phase order.

In addition, a control circuit for superposing and applying a predetermined DC voltage to the output of the power factor measuring circuit is provided, and the phase order of the circuit of the above-mentioned voltage and current taken in manually is the reverse phase order. When the indicator of the indicating instrument is shaken out, the observer knows that the sequence is in reverse phase, and the correct sequence can be switched by simply operating the switch.

Further, an anti-phase sequence detection signal self-holding means which operates by the anti-phase sequence detection signal is provided, and when the anti-phase sequence detection signal self-holding means is in the self-holding state, the phase of the circuit of the voltage and current fetched. A device having means for switching the order can automatically switch the phase order in the reverse phase order.

Further, a self-holding relay set by a detection signal of the reverse phase sequence detecting circuit is provided, and when the self-holding relay is in a set state, the relay contact switches the phase sequence of the circuit of the voltage and current taken in. With the means, the self-holding relay is automatically reset.

Furthermore, a self-holding relay in which the set coil and the reset coil are excited by the output of the flip-flop circuit is provided, and means for switching the phase sequence of the circuit of the voltage and current taken in by the relay contact is provided. A device with low power consumption during self-holding can be obtained.

[0027]

【Example】

Example 1. FIG. 1 shows a power factor measuring device for a three-phase unbalanced circuit which is an embodiment of the present invention. In the figure, C
T1 and CT2 are auxiliary current transformers, and are adapted to receive a current signal of AC 5A (ampere) from a current transformer provided in the main circuit. That is, the terminal + C of the auxiliary current transformer CT1
₁ , C ₁ are connected to the R-phase current transformer, and the auxiliary current transformer CT2
The terminals + C ₃ and C _{3 of} are connected to a T-phase current transformer.
The terminals P ₁ , P ₂ and P ₃ are adapted to receive a voltage signal of AC 110V (volt) from a transformer provided in the main circuit. That is, the R phase is at the terminal P ₁ and the S phase is at the terminal P 1.
₂ , the T phase is connected to the terminal P ₃ .

Reference numerals 51 and 52 denote a first level conversion circuit and a second level conversion circuit connected to the secondary sides of the auxiliary current transformers CT1 and CT2, and 53 denotes the first level conversion circuit 51 and the second level conversion circuit. A first addition circuit that adds the alternating current signals of the level conversion circuit 52, 54 is a subtraction circuit that subtracts the alternating current signals of the first level conversion circuit 51 and the second level conversion circuit 52, and 55 is a subtraction circuit 54 Advance signal 90 ° 90
° It is a phase shift circuit. Reference numeral 9 is an anti-phase sequence detection circuit connected to the terminals P ₁ , P ₂ and P ₃ , and outputs a sequence of anti-phase sequence detection signal 10 when the sequence of anti-phase sequence is detected. Reference numeral 58 is a third level conversion circuit for converting the level of the voltage input. 59a is the above 90
° Change the polarity of the output signal of the phase shift circuit 55 from positive to negative, or
A first polarity reversing circuit for inverting from negative to positive, 59b changes the polarity of the output signal of the third level converting circuit 58 from positive to negative,
Alternatively, it is a second polarity inversion circuit that inverts from negative to positive.

Reference numeral 60a is a first phase signal which selects either the output signal of the 90 ° phase shift circuit 55 or the output signal of the first polarity reversing circuit 59a according to the reverse phase sequence detection signal 10 of the reverse phase sequence detection circuit 9. The selection switch circuit 60b selects either the output signal of the third level conversion circuit 58 or the output signal of the second polarity inversion circuit 59b according to the reverse phase detection signal 10 of the reverse phase detection circuit 9. This is a selection switch circuit. 56 is a second addition circuit that adds the output signal of the first addition circuit 53 and the output signal of the first selection switch circuit 60a, and 57 is the output signal of the second addition circuit 56 and the second addition circuit 56.
Is a power factor measurement circuit that inputs the output signal of the selection switch circuit 60b and measures the power factor. In addition, 8 is a moving coil type indicator. Further, reference numeral 100 represents the entire apparatus of the present invention.

Next, the operation of the apparatus having the above structure will be described. The R-phase line current is converted into an AC current signal I _R proportional to the line current via the auxiliary current transformer CT1 and the first level conversion circuit 51, and similarly, the T-phase line current is converted into the auxiliary current transformer CT2. , Through the second level conversion circuit 52 into an alternating current signal I _T proportional to the line current. Further, the line voltage V _RT is converted into an AC voltage signal V _RT proportional to the line voltage V _RT via the third level conversion circuit 58. The alternating current signals I _R and I _T are transferred to the first adding circuit 53 in the next stage.
And the subtraction circuit 54 are simultaneously input, and the first addition circuit 53 calculates and outputs the vector sum of the alternating current signals I _R and I _T. (Hereinafter, in each equation, vector I _R , vector I _T , vector V _RT , vector V
_TR is abbreviated as I _R , I _T , V _RT , and V _TR , respectively, and represents a vector. ) In the case of the normal phase sequence ... √3 / 2 (I _R + I _T ) In the case of the reverse phase sequence …… √3 / 2 (I _T + I _R ) = √3 / 2
(I _R + I _T)

The subtraction circuit 54 includes alternating current signals I _R and I _T.
The vector difference of is calculated and output. Positive phase sequence when _{......... 1/2 (I R -I} T) when the reverse phase order of _{......... 1/2 (I T -I} R) Then, the output signal of the subtraction circuit 54, the next stage Is input to the 90 ° phase shift circuit 55 and outputs a signal whose phase is advanced by 90 °. Positive phase sequence when _{......... j1 / 2 (I R -I} T) when the reverse phase order _{......... j1 / 2 (I T -I} R)

The first polarity reversing circuit 59a is 9
The output signal of the 0 ° phase shift circuit 55 is input, and the output signal whose polarity is inverted is output. Positive phase sequence when _{......... -j1 / 2 (I R -I} T) = j1 /
2 (I _T -I _R) when the reverse phase order _{......... -j1 / 2 (I T -I} R) = j1 /
2 The (I _R -I _T), the line voltage V _RT outputs the next alternating voltage signal proportional to the line voltage through the third level conversion circuit 58. In the normal phase order ... V _{RT In the} reverse phase order ... V _TR Next, the AC voltage signal is input to the second polarity reversing circuit 59b, and the polarity-inverted signal is output. In the case of normal phase sequence ………… −V _RT = V _{TR In the case of} reverse phase sequence ……… −V _TR = V _RT

The first selection switch circuit 60a receives either the 90 ° phase shift circuit 55 or the first polarity reversing circuit 59a according to the reverse phase detection signal 10 output from the reverse phase detection circuit 9. Select the output signal and select the second
To the adder circuit 56. Specifically, in the positive phase order, the output signal of the 90 ° phase shift circuit 55 is selected and j1 / 2 (I
_R -I _T) outputs, when the reverse phase order and selects the output signal of the first polarity inverting circuit _{59a -j1 / 2 (I T -I} R)
= Outputs the _{j1 / 2 (I R -I T} ). The second addition circuit 56 has the same value in both the positive phase order and the negative phase order of the output signal of the first addition circuit 53, {square root} 3/2 (I _R +
I _T ) and j 1/2 (I _R −I _T ) that have the same value in either the positive phase order or the negative phase order as a result of being selected by the first selection switch circuit 60a are added, and I _S1 = √3 / 2
And outputs the _{(I R + I T) +} j1 / 2 (I R -I T) to the next stage of the power factor measuring circuit 57.

Similarly, the selection switch circuit 60b receives the anti-phase sequence detection signal 10 output from the anti-phase sequence detection circuit 9,
The AC voltage signal V _RT of the third level conversion circuit 58 is selected in the positive phase order, and the second polarity inverting circuit 59b is selected in the negative phase order.
AC voltage signal -V _TR = V _RT is selected, and as a result, the AC voltage signal V _RT having the same value is output to the power factor measuring circuit 57 at the next stage in either the positive phase order or the negative phase order. The power factor measuring circuit 57 measures the power factor of the three-phase unbalanced circuit by the inputs corresponding to the positive phase current I _S1 and the line voltage V _RT , regardless of the state of the positive phase order or the negative phase order. You can The first polarity inverting circuit 59a and the second polarity inverting circuit 59b can be easily configured by inverting amplifiers having an amplification degree of −1, and the first selection switch circuit 60a and the second selection switch circuit 60b are Since the secondary side of the auxiliary current transformers CT1 and CT2 is not directly switched but an analog switch composed of an electronic circuit can be used, a compact, inexpensive and long-life device can be obtained. Further, even if the switch fails, the problem that the auxiliary current transformers CT1 and CT2 are opened does not occur.

Example 2. In the first embodiment, the line voltage V
_A circuit provided with a second polarity reversing circuit 59b and a second selection switch circuit 60b for reversing the polarity of _RT in the phase order is shown, but a circuit equivalent to this is arranged on the output side of the power factor measuring circuit 57. You may. That is, in FIG. 2, 59c
Is a second polarity inversion circuit, and 60c is a second selection switch circuit, both of which are arranged on the output side of the power factor measuring circuit 57. The other structure is the same as that of the first embodiment (FIG. 1). In the above configuration, as described in the first embodiment, the output signal of the third level conversion circuit 58 that level-converts the line voltage V _RT outputs the following AC voltage signal. In case of normal phase order ………… V _{RT In case of} reverse phase order ……… V _TR = -V _RT

The power factor measuring circuit 57 inputs the AC voltage signal corresponding to the positive phase component I _S1 having the same value and the phase sequence regardless of the positive phase order or the reverse phase order, performs the power factor measurement, and is proportional to the power factor measured value. The analog DC signal 7 is output. At this time, an AC voltage signal V _RT when positive phase sequence, will be measured by -V _RT when the reverse phase order, since the phase difference of the V _RT and -V _RT is 180 °, the analog DC signal The polarity of 7 is the one with positive / negative inversion. Therefore, as shown in FIG.
Second polarity reversing circuit 59c and second
By the selection switch circuit 60c of
When 0 is in the positive phase order, the analog DC signal 7 of the power factor measuring circuit 57 is output to the next stage, and in the reverse phase order, the polarity of the analog DC signal 7 is inverted from positive to negative or from negative to positive. By outputting to the stage, the power factor can be measured in both the positive phase order and the negative phase order.

Example 3. In the first embodiment described above, the first polarity reversing circuit 59a for reversing the polarity of the output signal of the 90 ° phase shift circuit 55 from positive to negative or from negative to positive is shown, but it corresponds to this. Can be configured by an addition circuit and a subtraction circuit. That is, in FIG. 3, 56a
Is the output signal of the first addition circuit 53 for vector-summing the alternating current signals I _R and I _T proportional to the line current, the first subtraction circuit 54 for vector difference, and the 90 ° phase shift circuit 55 for 90 ° phase shift. Second, which adds the output signals output via the
Is an adder circuit. 56b is a second subtraction circuit for subtracting the above two types of output signals. The second adder circuit 56
a outputs the following signal. Positive phase sequence when _{......... √3 / 2 (I R +} I T) + j1 / 2
(I _R -I _T) when the reverse phase order _{......... √3 / 2 (I T +} I R) + j1 / 2
(I _T -I _R) Further, the second subtraction circuit 56b outputs a signal shown below. Positive phase sequence when _{......... √3 / 2 (I R +} I T) -j1 / 2
(I _R -I _T) when the reverse phase order _{......... √3 / 2 (I T +} I R) -j1 / 2
_{(I T -I R) = √3} / 2 (I R + I T) + j1 / 2 (I R -I T)

The selection switch circuit 60a at the next stage selects the output signal of the second adder circuit 56a in the positive phase order by the negative phase order detection signal 10, and the second subtraction circuit in the negative phase order. The output signal of 56b is selected. As a result of the selection, in both the positive phase order and the negative phase order, the power factor measuring circuit 57 has a positive phase component current I _S1 equal to √3 / 2 (I _R + I).
_T ) + j1 / 2 (I _R −I _T ) is input, and the voltage input is the AC voltage signal V by the operation shown in the first embodiment (FIG. 1).
_Since it becomes _RT , the power factor can be measured in both the normal phase order and the reverse phase order.

Example 4. FIG. 4 shows a configuration in which the second embodiment and the third embodiment are combined, and when viewed from the configuration of FIG.
The second polarity reversing circuit 59b and the second selection switch circuit 60b for reversing the polarity of the line voltage V _{RT according} to the phase order are eliminated, and its alternative function is arranged on the output side of the power factor measuring circuit 57, and the first polarity is arranged. The inverting circuit 59a corresponds to an adding circuit and a subtracting circuit. That is, 59c is a second polarity inverting circuit, and 60c is a second selection switch circuit, both of which are arranged on the output side of the power factor measuring circuit 57. Reference numeral 56a denotes a second adder circuit, which outputs the output signal of the first adder circuit 53 for vector-summing the AC current signals I _R and I _T proportional to the line current, and the 90 ° phase shift circuit 5
The output signals output via 5 are added.
56b is a second subtraction circuit for subtracting the above two types of output signals. The other structure is the same as that of the first embodiment (FIG. 1). According to the above configuration, the operation in which the second embodiment and the third embodiment are combined is performed, and the power factor can be measured in any of the normal phase order and the negative phase order.

The above-mentioned first to fourth embodiments are constructed such that the power factor measuring means and the indicating instrument for displaying the measured power factor are separately used. On the other hand, Example 5 shown below
The thirteenth embodiment has a configuration suitable for integrating a power factor measuring means and an indicating instrument for displaying the measured power factor.

Example 5. In FIG. 5, CT1, CT2
Is an auxiliary current transformer, and is adapted to receive a current signal of AC 5A (ampere) from the current transformer provided in the main circuit. That is, the terminals + C ₁ and C ₁ of the auxiliary current transformer CT1 are R
Connected to the phase current transformer, the terminal of auxiliary current transformer CT2 +
C ₃ and C ₃ are connected to a T-phase current transformer. The terminals P ₁ , P ₂ and P ₃ are adapted to receive a voltage signal of AC 110V (volt) from a transformer provided in the main circuit. That is, the R phase of the main circuit is at the terminal P ₁ and the S phase is at the terminal P 1.
₂ , the T phase is connected to the terminal P ₃ .

Numerals 3 and 4 are current limiting resistors, numeral 5 is a capacitor, and auxiliary current transformers CT1 and CT2 are connected by a connecting line. With these, level conversion, addition / subtraction, 90 ° in the above-mentioned first to fourth embodiments are carried out. An action equivalent to a phase shift is performed. A power factor measuring circuit 6 measures the power factor of the main circuit and outputs an analog signal 7 proportional to the measured value. The value of the signal 7 can be read by the moving coil type indicator 8 to know the power factor value. However, in a three-phase electric circuit, there is no problem if the phase sequence is correctly distributed in the order of R phase → S phase → T phase, but this phase sequence is, for example, T phase →
Indicator S 8 in the order of S phase → R phase, so-called reverse phase order
Is indefinite. It is known that when an indefinite state occurs, the connection may be changed in a regular phase order.
This embodiment is a means for notifying that an indefinite state has occurred.

That is, 9 is a reverse phase sequence detection circuit, which outputs a reverse sequence sequence detection signal 10 when the reverse sequence sequence is detected. Reference numeral 11 is a switch driven by the reverse phase forward detection signal 10, 12 is a resistance, and 13 is a diode. When the switch 11 is turned on, a current flows through the resistance 12 and the diode 13 to the movable coil type indicator 8. In this case, the value of the resistor 12 is set to a value at which the moving coil type indicator 8 can be shaken off. Therefore, if the reverse phase sequence detection signal 10 is output, the switch 1
When 1 is turned on and the instruction of the moving coil type indicator 8 is shaken out, the observer is informed of the reverse phase order. Although this structure has only the function of notifying the outside that the phase is reversed, it can be constructed at the lowest cost.

Example 6. In the fifth embodiment, the configuration is such that the observer can be notified of the reverse phase order in the case of the reverse phase order, but in this case, the connection must be changed in the normal phase order. If the configuration shown in FIG. 6 is used as a means for changing the connection, it can be done manually. That is, in this embodiment, the indication of the moving coil type indicator 8 is shaken off by the reverse phase sequence detection signal 10 and the observer is made to perform the reverse sequence sequence. After that, the circuits of the secondary side of the auxiliary current transformers CT1 and CT2 and the circuits of the terminals P ₁ and P ₃ that receive the input from the transformer are manually switched.
6a to 16d are provided. This switching is connected to the circuit to which the secondary side of the auxiliary current transformer CT1 was connected to the secondary side of the auxiliary current transformer CT2 until then, as shown in FIG. Similarly, the secondary side of the auxiliary current transformer CT2 is connected to the circuit to which the secondary side of the auxiliary current transformer CT1 was connected.

Simultaneously with the switching of the secondary side of the auxiliary current transformers CT1 and CT2, the circuits of the terminals P ₁ and P ₃ which receive the input from the transformer are also switched. Contact points 16c, 16
The operation of d, it to the terminal P ₁ is the terminal P ₃ is connected to a circuit which has been connected, also, the terminal P ₁ is connected to a circuit in which the terminal P ₃ has been connected. In this way, the reverse phase order is converted into the positive phase order by the switching operation of the contacts 16a to 16d. This switch shall be installed at a position where it can be manually operated from the front when the power factor measuring device for a three-phase unbalanced circuit is installed. This embodiment has an inexpensive structure and can notify the outside of the reverse phase order and can convert the reverse phase order to the normal phase order.

Example 7. Although the sixth embodiment has a configuration in which the reverse phase order is converted to the positive phase order by a manual operation, as shown in FIG. 7, a configuration in which the reverse phase order is automatically switched to the normal phase order can be used. That is, the anti-phase sequence detection circuit 9 outputs the anti-phase sequence detection signal 10 to notify the observer that the sequence of the anti-phase sequence is off by shaking off the indication of the moving coil type indicator 8 and drive the self-holding circuit 14. To do. Self-holding circuit 14
When the self-holding is applied by the reverse phase sequence detection signal 10 and the self-holding state is established, the secondary side circuits of the auxiliary current transformers CT1 and CT2 are switched by the relay contacts 16a and 16b. By this switching, as shown in FIG. 7, the secondary side of the auxiliary current transformer CT1 is connected to the circuit to which the secondary side of the auxiliary current transformer CT2 was connected. Similarly, the auxiliary current transformer CT
The secondary side of 2 is connected to the circuit to which the secondary side of the auxiliary current transformer CT1 was previously connected. That is, the auxiliary current transformer CT
1 and CT2 secondary side connection is relay contact 16a, 16b
It is switched by the operation of.

Simultaneously with the switching of the secondary side of the auxiliary current transformers CT1 and CT2, the circuits of the terminals P ₁ and P ₃ which receive the input from the transformer are also switched. That is, when the self-holding circuit 14 is in the self-holding state, the relay contact 16
c, the operation of the 16d, it to the terminal P ₁ is the terminal P ₃ is connected to a circuit which has been connected, also, the terminal P ₁ is connected to a circuit in which the terminal P ₃ has been connected. In this manner, the switching operation of the relay contacts 16a to 16d converts the reverse phase order to the normal phase order. Since the operation returns to the normal phase order by this conversion, the negative phase order detection signal 10 of the negative phase order detection circuit 9 disappears and the switch 11 turns off. In addition, the swing-out (burnout) of the moving coil type indicator 8 is also stopped, and the power factor measured by the power factor measuring circuit 6 is displayed. On the other hand, the self-holding circuit 14 continues the self-holding state, but this self-holding state is released by turning off the power supply of the circuit.

Example 8. In the seventh embodiment, the self-holding circuit 1
4 shows the configuration in which the reverse phase order is automatically switched to the positive phase order, but the self-holding circuit 14 can be configured by the set-reset self-holding relay 20. That is, in FIG. 8, reference numeral 23 is a rectifier circuit composed of a diode bridge, 24 is a smoothing capacitor, 19 is a capacitor for capacitor voltage division, and for example, AC100V is used as the capacitor 19
The impedance is divided by the impedance of the diode bridge 23 and the impedance of the diode bridge 23 and its load. A power supply circuit for the self-holding relay 20 is composed of the diode bridge 23 and the capacitors 19 and 24. Reference numeral 22 is a push button switch, and the reset coil 20b is excited by first pushing the push button switch 22, and the self-holding relay 20 is reset in advance.

In this state, when the reverse phase order detection circuit 9 outputs the reverse phase order detection signal 10, the reverse phase order detection signal 10 turns on the switch 11 to excite the set coil 20a, and the self-holding relay 20 is activated. Set. Relay contact 1
6a to 16d perform an on / off operation by the self-holding relay 20, and when the set state is set as described above, the relay contacts 16a to 16d perform a switching operation, and as in the seventh embodiment, Auxiliary current transformer CT1 and CT
Terminals P ₁ and P for receiving inputs from the secondary side of 2 and the transformer
Circuit ₃ is switched. In this manner, the switching operation of the relay contacts 16a to 16d converts the reverse phase order to the normal phase order. The self-holding state in this embodiment is
Even if the circuit power is turned off, it will not be released.

Example 9. Although the eighth embodiment has a configuration in which the self-holding relay 20 is reset manually, it can be configured to have an automatic reset. That is, in FIG. 9, 24 is a capacitor, 25 is a photo coupler,
Reference numerals 26 and 27 are resistors, and 28 is a capacitor. Other configurations are similar to those in FIG. To explain the operation, first,
The voltage from the main circuit is applied to the terminals P ₂ and P ₃ . Since the voltage applied in this case is alternating current, it has the waveform 30 shown in FIG. Since this waveform 30 is full-wave rectified by the rectifier circuit 23 and smoothed by the capacitor 24, the voltage waveform of the capacitor 24 becomes the waveform 31 shown in FIG.
It is almost DC. On the other hand, the capacitor 28 has the resistance 2
Since the electric charge is discharged via 7, the voltage is zero when the voltage from the main circuit is not applied. When the voltage of the waveform 31 is applied to that state, the current flowing into the capacitor 28, that is, the charging current, has a peak upon application of the voltage as shown in the waveform 32, and then disappears.

The voltage of the capacitor 28 at this time is a waveform 32.
It is charged by the current of and rises like a waveform 33. The charging current (waveform 32) of the capacitor 28 is the photo coupler 2
5 through diode 25a, so transistor 25b
Turns on and the current shown in waveform 34 flows. This current excites the reset coil 20b of the self-holding relay 20 and resets the self-holding relay 20. That is,
When the voltage from the main circuit is applied to the terminals P ₂ and P ₃ , the self-holding relay 20 is automatically reset. Hereinafter, the phase order switching operation after the antiphase order detection circuit 9 outputs the antiphase order detection signal 10 is the same as that of the eighth embodiment.

Example 10. Although the configuration using the self-holding relay 20 is shown in the eighth and ninth embodiments, the self-holding circuit can be formed by using an inexpensive general relay. That is, in FIG. 11, 38 is a relay and 38 a is a relay contact, which are inserted in parallel with the switch 11. 22 is a push button switch. In the above configuration, the switch 11 is turned on by the reverse phase detection signal 10 from the reverse phase detection circuit 9 to excite the coil of the relay 38. As a result, the relay contact 38a is turned on, and a current circuit is formed from the relay contact 38a via the relay 38. Since the relay contact 38a is turned on as long as the coil of the relay 38 is energized, the exciting current relay 38 continues to flow as long as the voltage from the main circuit to the terminal P _2, P ₃ is applied to the self-hold It becomes a state. When the voltage from the main circuit disappears, the exciting current disappears and the self-holding state is released.

By the operation of the relay 38, the relay contacts 16a to 16d perform a switching operation, and the inputs from the secondary side of the auxiliary current transformers CT1 and CT2 and the transformer are input in the same manner as described in the sixth embodiment. The circuits of the receiving terminals P ₁ and P ₃ are switched. In this way, the relay contacts 16a-1
The switching operation of 6d converts the reverse phase order to the normal phase order.
When converted to the normal phase order, the reverse phase order detection signal 10 of the reverse phase order detection circuit 9 disappears and the switch 11 turns off, but the relay contact 38a is on, so the relay 38 continues the self-holding state. According to this embodiment, since a relay having general versatility can be used, a relatively inexpensive and compact device can be obtained.

Example 11. In this embodiment, a flip-flop 40 is used to form a self-holding circuit.
That is, in FIG. 12, 20 is a self-holding relay and 40 is a J. K flip-flops 41 to 45 are resistors, 46 and 4
Reference numeral 7 is a transistor, and other configurations are similar to those of the seventh embodiment. In the above-mentioned configuration, first, for convenience of description, J. It is assumed that the K flip-flop 40 is in the reset state. In that state, when there is a reverse phase sequence detection signal 10 from the reverse phase sequence detection circuit 9, the switch 11 is turned on and J. Trigger the T terminal of K flip-flop 40. With this trigger, J. The K flip-flop 40 is inverted and set. By this, J. The output of the Q terminal of the K flip-flop 40 becomes H level, current flows into the base of the transistor 46 through the resistor 42, and the transistor 46 is turned on. When this is turned on, the set coil 20a of the self-holding relay 20 is excited, and the self-holding relay 20 is set. When the self-holding relay 20 is set, the relay contacts 16a to 16d perform a switching operation, and the above-described sixth embodiment is performed.
In the same manner as described above, the circuits of the secondary sides of the auxiliary current transformers CT1 and CT2 and the terminals P ₁ and P ₃ which receive the input from the transformer are switched. In this way, the relay contacts 16a-
By the switching operation of 16d, the reverse phase order is converted into the positive phase order.

In the above configuration, if an erroneous operation occurs in switching the self-holding relay 20 back to the normal phase order, for example, if the set coil 20a is excited incorrectly, the normal phase order is not converted and the reverse phase is reversed. It remains in order.
In such a case, since the reverse phase sequence detection signal 10 is output, the switch 11 is turned on and the J. K flip-flop 4
Trigger the 0 T terminal. With this trigger, J. The K flip-flop 40 is inverted and set. By this, J. The output of the Q terminal of the K flip-flop 40 becomes L level and the output of the Q terminal of the bar becomes H level, and a current flows into the base of the transistor 47 through the resistor 43 to turn on the transistor 47. When the transistor 47 is turned on, the reset coil 20b of the self-holding relay 20 is excited and the self-holding relay 20 is reset. At this time,
The relay contacts 16a to 16d perform the switching operation.

Since this embodiment is constructed as described above, even if a malfunction occurs, the reverse phase sequence detection signal 10
By J. The K flip-flop 40 is inverted so that the operation is stopped when it is in the positive phase order. Therefore, in this embodiment, for convenience of description, J. Although the initial state of the K flip-flop 40 is described as being in the reset state, it can be understood from the above description that the initial state is either set or reset. From the above, J. The set terminal SD and the reset terminal RD of the K flip-flop 40 are preferably inactive, for example, connected to the circuit ground. As described above, J. The one configured using the K flip-flop 40 has lower power consumption for self-holding and higher practicability than those of the other embodiments. In this embodiment, J.
Although the one using the K flip-flop 40 has been described, a set / reset flip-flop or a D flip-flop may be used based on the gist of this embodiment.

Example 12 In the eleventh embodiment, the switch 11 is the J. It has been constructed so as to act only on the T terminal of the K flip-flop 40. In this configuration, there is a problem that a large amount of power is consumed because a current constantly flows to any one of the set coil 20a and the reset coil 20b of the self-holding relay 20, and that either coil heats up. Therefore, as shown in FIG. 13, when the switch 11 is turned on by the reverse phase sequence detection signal 10,
This ON signal is set to J. Input to the T terminal of the K flip-flop 40 and set coil 2 of the self-holding relay 20
0a and the reset coil 20b are configured to supply voltage. With this configuration, when the reverse phase sequence detection signal 10 is released, the set coil 20a and the reset coil 20 are released.
Since the voltage supply to both b is stopped, power is saved and the coil does not generate heat.

Example 13 In Example 12 above,
J. Although the circuit voltages of the K flip-flop 40 and the set coil 20a and the reset coil 20b of the self-holding relay 20 have been described as being the same, in practice, they are often used at different voltages. This embodiment shows a structure that can cope with the different voltages. That is, in FIG. The circuit voltage of the K flip-flop 40 is the resistance 5
1 and a zener diode 53 supply a constant voltage circuit. Further, the self-holding relay 20 is supplied by a constant voltage circuit formed by a smoothing capacitor 50, a resistor 52 and a zener diode 54. In the above configuration, the reverse phase sequence detection signal 10 is the switch 11a.
And switch 11b to drive J. A predetermined voltage is input to the T terminal of the K flip-flop 40, and the set coil 20a and the reset coil 2 of the self-holding relay 20 are input.
A predetermined voltage different from the predetermined voltage for the T terminal is supplied to 0b.

[0059]

Since the power factor measuring device for a three-phase unbalanced circuit of the present invention is constructed as described above, it has the following effects.

In the case of the reversed phase order, the fact that the reversed phase order is displayed can be displayed or the phase order can be automatically switched, so that the problem that the instruction is indefinite is solved.

The one in which the current polarity reversing means and the DC voltage polarity reversing means are operated in response to the detection signal output of the anti-phase detection circuit does not directly switch the secondary side of CT2 but is composed of an electronic circuit. Since an analog switch can be used, a compact, inexpensive, long-life device can be obtained.

A device for superposing and applying a predetermined DC voltage to the output of the power factor measuring circuit has a simple structure, but in the case of the reverse phase order, the indicator of the indicating instrument is shaken out in the reverse phase order, so that the observer can perform the reverse phase order. You can take necessary action.

A device that can automatically switch to the phase sequence when in the reverse phase sequence can provide the necessary measures even if there is no supervisor.

In some cases, a relay having general versatility can be used, so that a relatively inexpensive and small device can be obtained.

The provision of the self-holding relay in which the set coil and the reset coil are excited by the output of the flip-flop circuit makes it possible to obtain a device with low power consumption during self-holding.

[Brief description of drawings]

FIG. 1 is a block diagram showing an apparatus according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing an apparatus according to Embodiment 2 of the present invention.

FIG. 3 is a block diagram showing an apparatus according to Embodiment 3 of the present invention.

FIG. 4 is a block diagram showing an apparatus according to Embodiment 4 of the present invention.

FIG. 5 is a block diagram showing an apparatus according to Embodiment 5 of the present invention.

FIG. 6 is a block diagram showing an apparatus according to Embodiment 6 of the present invention.

FIG. 7 is a block diagram showing an apparatus according to Embodiment 7 of the present invention.

FIG. 8 is a block diagram showing an apparatus according to Embodiment 8 of the present invention.

FIG. 9 is a block diagram showing an apparatus according to Embodiment 9 of the present invention.

FIG. 10 is a voltage-current waveform diagram of each part of the device according to Example 9 of the present invention.

FIG. 11 is a block diagram showing an apparatus according to Embodiment 10 of the present invention.

FIG. 12 is a block diagram showing an apparatus according to Embodiment 11 of the present invention.

FIG. 13 is a block diagram showing an apparatus according to Embodiment 12 of the present invention.

FIG. 14 is a block diagram showing an apparatus according to Embodiment 13 of the present invention.

FIG. 15 is a vector diagram for explaining the present invention.

FIG. 16 is a block diagram showing a conventional device.

[Explanation of symbols]

 6,57 Power factor measuring circuit 8 Moving coil type indicator 9 Anti-phase sequence detection circuit 16a-16d Switching contact 55 90 ° Phase shift circuit 59a, 59b Polarity reversing circuit 60a, 60b Selection switch circuit

Claims (9)

[Claims] 1. A power factor measuring circuit for taking in a voltage of a three-phase circuit and two-phase currents therein and outputting an equivalent power factor of the three-phase circuit as a DC voltage, and an input from the three-phase circuit is in reverse phase order. In the case of the above, a three-phase error detection circuit that outputs a detection signal indicating that there is a reverse phase, and a phase order conversion unit that operates according to the above-mentioned reverse phase order detection signal to convert the phase order are provided. Power factor measuring device for balanced circuit. 2. A vector sum and a vector difference of arbitrary two-phase currents of a three-phase line current are taken out and the phase of either one of the vector sum or the vector difference and the other current is 90 degrees. In the power factor measuring device for a three-phase unbalanced circuit, which is configured to measure the power factor by deriving a current obtained by combining the phase-shifted current and the combined current and the two-phase voltage, A current polarity reversing means for reversing the polarity of the current of the vector difference, a voltage polarity reversing means for reversing the polarity of the voltage, and a reverse phase detecting means for detecting this when the input from the three-phase circuit is in the reverse phase order. A power factor measuring device for a three-phase unbalanced circuit, wherein the current polarity reversing means and the voltage polarity reversing means are operated according to the output of the reverse phase detecting means. 3. A vector sum and a vector difference of arbitrary two-phase currents of a three-phase line current are taken out, and the phase of either one of the vector sum or the vector difference and the other current is 90 degrees. A power for a three-phase unbalanced circuit configured to measure a power factor by deriving a current obtained by combining a phase-shifted current and discriminating a phase between the combined current and the two-phase voltage by a power factor measuring circuit. In the rate measuring device,
Current polarity reversing means for reversing the polarity of the current of the vector difference, DC voltage polarity reversing means for reversing the polarity of the DC voltage output from the power factor measuring circuit, and this when the input from the three-phase electric circuit is in reverse phase order. A reverse-phase detecting means for detecting the above, and a power factor measuring device for a three-phase unbalanced circuit, characterized in that the current polarity reversing means and the voltage polarity reversing means are operated according to the output of the reverse phase detecting means. 4. The power factor measuring device for a three-phase unbalanced circuit according to claim 2, wherein the current polarity reversing means is a subtracting means for obtaining a difference between the vector sum current and the vector difference current. 5. A power factor measuring circuit for taking in a voltage of a three-phase electric circuit and currents of two phases therein and outputting an equivalent power factor of the three-phase electric circuit as a DC voltage, and an input from the three-phase electric circuit in a reverse phase order. In the case of, a reverse phase sequence detection circuit that outputs a detection signal indicating that the phase is reversed, and a control circuit that operates according to the reverse phase sequence detection signal and superimposes a predetermined DC voltage on the output of the power factor measurement circuit are provided. A power factor measuring device for a three-phase unbalanced circuit, characterized in that 6. A power factor measuring circuit for taking in a voltage of a three-phase circuit and a current of two phases therein and outputting an equivalent power factor of the three-phase circuit as a DC voltage, and an input from the three-phase circuit is in reverse phase order. In the case of, a reverse phase sequence detection circuit that outputs a detection signal indicating that the phase is reversed, a control circuit that operates according to the reverse phase sequence detection signal and superimposes a predetermined DC voltage on the output of the power factor measurement circuit,
A power factor measuring device for a three-phase unbalanced circuit, comprising means for switching the phase sequence of the voltage and current circuits taken in from the three-phase electric circuit. 7. A power factor measuring circuit for taking in a voltage of a three-phase circuit and currents of two phases therein and outputting an equivalent power factor of the three-phase circuit as a DC voltage, and an input from the three-phase circuit is in reverse phase order. In the case of, the anti-phase sequence detection circuit that outputs a detection signal indicating that the sequence is in anti-phase, the anti-phase sequence detection signal self-holding unit that operates by the above-mentioned anti-phase sequence detection signal, the anti-phase sequence detection signal self-holding unit self-holds A power factor measuring device for a three-phase unbalanced circuit, comprising means for switching the phase sequence of the voltage and current circuits taken in from the three-phase electric circuit in the state. 8. A power factor measuring circuit that takes in the voltage of a three-phase circuit and the currents of two phases therein and outputs the equivalent power factor of the three-phase circuit as a DC voltage, and the input from the three-phase circuit is in reverse phase order. In the case of, a reverse phase sequence detection circuit that outputs a detection signal that the phase is reversed, a self-holding relay that has a reset means and is set by the detection signal of the reverse phase sequence detection circuit, and the self-holding relay is in the set state. A power factor measuring device for a three-phase unbalanced circuit, comprising means for switching the phase sequence of the voltage and current circuits taken in from the three-phase electric circuit by the relay contact. 9. A power factor measuring circuit that takes in the voltage of a three-phase circuit and the currents of two phases therein and outputs the equivalent power factor of the three-phase circuit as a DC voltage, and the input from the three-phase circuit is in reverse phase order. In the case of, a reverse phase sequence detection circuit that outputs a detection signal indicating that the phase is reversed, a flip-flop circuit that inverts each time the detection signal of this reverse phase sequence detection circuit is input, and a set coil at the output of this flip-flop circuit And a self-holding relay for exciting the reset coil, and means for switching the phase sequence of the voltage and current circuits taken in from the three-phase electric circuit by means of the relay contacts. .