JPH07236126A - Control signal detecting circuit - Google Patents

Abstract

PURPOSE:To prevent an image from being deteriorated due to error detection by detecting a control signal based a MUSE transmission system and determining an interpolation value based upon the value of a past fixed period. CONSTITUTION:In a control signal interpolating circuit 14, a selector 21 inputs a control signal to an integrator 22 at the time of judging that the control signal is a control signal for an item of a receiving mode signal or the like set up to a fixed value over several-hundred fields. The integrator 22 finds out a mean detection value for past prescribed fields and outputs the value to a video signal processing part. Even when error detection due to the change of the same value in three blocks in a certain field to error values is generated in a majority circuit due to noise in transmission, the error detection is compensated and interpolated by the past mean value, so that the deterioration of an image due to error detection can be prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control signal detection circuit for a MUSE decoder which is a device for decoding an MUSE signal of a high-definition transmission system into an original high-definition signal.

[0002]

2. Description of the Related Art MUSE (M
ultiple Sub-nyquist Sampling Encoding) method, M
To reduce the processing amount on the USE decoder side, MUSE
Values of various control signals necessary for decoding processing are calculated on the encoder side, and are multiplexed and transmitted in the MUSE signal.

This control signal is called a control signal.
The contents of the control signals are shown in Table 1 for the purpose of explaining the present invention. As shown in FIG. 4 which is an explanatory diagram of the present invention, these control signals of all 32 bits and 15 items are multiplexed in each field, and each control signal controls the next field of the multiplexed field. To do.

Further, in transmission, in order to prevent an error in transmission, the MUSE encoder performs the following operation on the control signal.

First, the control signal of all 32 bits is divided into 8 blocks of 4 bits each, and
Each block is coded by the (8,4) extended Hamming coding method. As a result, 1 error (1 bit error) can be corrected and 2 errors (2 bit error) can be detected. However, bit errors of 3 errors (3 bit errors) or more are detected as error or 2 errors.

Next, the MU of FIG. 5 which is an explanatory view of the present invention
Each block is transmitted three times in one field, as shown by multiple time slots in the SE signal. Figure 5
As can be seen from the above, the same block is arranged so that it does not come on the same line. This is for consideration of burst noise, and it is assumed that one line (horizontal line in the figure).
Even if all are lost, the other two blocks are transmitted safely.

Next, the control signal detection processing in the MUSE decoder will be described.

First, in the control signal detection circuit 61, as shown in FIG.
After A / D conversion by the D converter 62, this output is input to the video signal processing unit 63, the sync separation unit 66, and the control signal detection unit 50.

In the control signal detector 50, as shown in FIG.
As shown in, the control signal separating unit 51 extracts all 24 blocks (1 block 8 bits) of the multiplexed control signal. The timing signal to be taken out is created by inputting the frame pulse signal and the horizontal synchronization signal obtained from the synchronization separation unit 66 of the block diagram shown in FIG. 10 to the timing generation unit 67.

Next, the Hamming decoding unit 52 performs Hamming decoding, error detection, and error correction for one error for each block. As a result, all 24 blocks (1 block 4 bits) of the decoded and corrected control signal are obtained. 2 Blocks judged to be erroneous are discarded here and are not used in the subsequent processing.

Next, the three blocks having the same contents transmitted three times are input to the majority decision circuit section 53 to determine one value. This process is repeated 8 times to obtain 8 blocks (4 bits per block) of the final control signal and a majority OK / NG flag 1 bit for each block. Here, for example, when the majority decision is made from the values of the three blocks, the values of the three blocks are different, or the values of the three blocks are discarded as two errors in the Hamming decoding unit 52, etc. When one value cannot be determined, the majority OK / NG flag is set.

The control signal of 32 bits thus obtained is input to the video signal processing section 63. here,
The block in which the majority decision OK / NG flag is raised means that an accurate value could not be detected due to the influence of noise or the like on the transmission, that is, the value of the detection result of the block was indefinite.

In this case, if an appropriate value is not interpolated in an undefined and missing portion, vertical lines may be jagged or the brightness level of the contour of the image becomes high in the high-definition output image output from the MUSE decoder. Then, there is a possibility that various visual characteristic deteriorations that can be visually confirmed occur. Therefore, it is necessary to interpolate an appropriate value by the interpolation circuit 54 (see FIG. 11).

As the interpolation method, there are various interpolation methods. For example, the sub-sampled phase signal having periodicity is used by inverting the signal two fields before or one field before, and the horizontal motion vector signal and the vertical motion vector signal are forced to have a value of 0. Other signals are 1
The signal before the field is used as it is (see Table 2).

The signals 1 field before and 2 fields before are, as shown in FIG.
Obtained from 6.57. 1 field before and 2 obtained
The signal before the field is sent to the selector 58. The selector 58 switches the interpolation signal of the item to be selected together with the timing signal and outputs it to the selector 55 shown in FIG. The selector 55 inputs the signal from the majority circuit section 53 to the video signal processing section 63 when the control signal is in a block in which the majority OK / NG flag is not set. On the other hand, in the case of the item in the block in which the majority OK / NG flag is set, the signal generated by the interpolation circuit 54 is input to the video signal processing unit 63. By performing the interpolation by this method, the deterioration of the high-definition output video signal, which can be visually confirmed, is eliminated.

As described above, the control signal in the MUSE signal is extremely strongly protected against transmission distortion. Further, even when the value of the detection result of the control signal detection processing in the MUSE decoder becomes indefinite, the deterioration of the output image due to the indefiniteness is suppressed to the minimum by performing the interpolation considering the characteristics of the control signal.

[0017]

However, in the conventional interpolation method in the control signal detection circuit described above,
A big problem occurs when the error detection of the value of the detection result of the control signal detection processing is not indefinite. That is, there may be a case where the values of the three blocks are all the same but changed to incorrect values due to noise during transmission. In this case, since it does not become indefinite, the majority OK / NG flag is not set, and therefore,
Interpolation is not done. As a result, there is a problem that the output image is significantly deteriorated.

This problem is particularly remarkable in the AM / FM modulation information signal in the control signal. That is, in the FM modulation system, during transmission, the SN ratio is improved by applying emphasis to deal with the triangular noise peculiar to the FM modulation.

Therefore, when the FM modulation information signal is received, M
De-emphasis with inverse characteristics of emphasis is applied by the USE decoder. On the other hand, in the case of receiving the AM modulation information signal, de-emphasis is not applied. Therefore, at the time of demodulation, the modulation method of the received MUSE signal is determined using the AM / FM modulation information signal of the control signal, and ON / OFF of the de-emphasis filter is appropriately switched.

If the switching decision is erroneous, the high-definition output image will be degraded. This deterioration naturally causes discomfort when it occurs in several consecutive fields, but even if only one field (1/60 second) occurs instantaneously, it can be confirmed as a level change. There is a problem that it gives an uncomfortable person.

The present invention has been made in view of the above-mentioned conventional problems, and an object thereof is to provide a constant value in a control signal for a long period of several hundred fields such as an AM / FM modulated information signal. In particular, it is an object of the present invention to provide a control signal detection circuit capable of correcting error detection that is not a target of conventional interpolation and preventing deterioration of an output image due to error detection.

[0022]

In order to solve the above-mentioned problems, a control signal detection circuit according to the present invention is provided in an MUSE decoder, and an interpolation circuit for interpolating a control signal in which an error has been detected is provided. In the provided control signal detection circuit, the above-mentioned interpolation circuit is provided with a judging means for judging that it is a control signal of an item having a constant value for a certain long period of time, and the above-mentioned control signal by this judging means. If it is determined that the interpolating value is determined, an interpolating unit that determines the interpolating value based on the value of the control signal in the past fixed period is provided.

In order to solve the above-mentioned problems, the control signal detection circuit according to the invention of claim 2 is the control signal detection circuit according to claim 1, wherein the judgment means is:
While it is determined that the control signal is an item having a constant value over a period of several hundred fields, the interpolation means is characterized by performing interpolation based on the values of several tens of fields in the past.

In order to solve the above-mentioned problems, a control signal detection circuit according to a third aspect of the present invention is the control signal detection circuit according to the first aspect, wherein the interpolation means includes:
It is characterized by having an integrator or a CPU.

[0025]

According to the structure of the first aspect, when the control signal in which the error is detected is interpolated, the judging means has a control signal of the reception mode consisting of a period of, for example, several hundred fields or an AM / FM modulation. It is determined that the control signal is an item such as an information signal that has a constant value for a certain long period. When it is determined that the control signal is used, the interpolating means determines an interpolation value based on the value of the control signal in the past fixed period and interpolates.

By the way, in the transmission of the MUSE signal, one value in the control signal is transmitted three times. In the conventional interpolation method, if these three values are disjoint or if one value cannot be determined even after performing a predetermined process, it is regarded as indefinite and the interpolation process is performed. Therefore, if all three values are the same due to noise during transmission, but the values have changed to erroneous values, it is not indeterminate and interpolation processing was not performed.

However, according to the present invention, when it is determined that the control signal is an item having a constant value for a certain long period of time, the interpolating means, regardless of whether or not the control signal is indefinite, uses the past control signal in the control signal. An interpolation value is determined and interpolated based on the value of a fixed period.

Therefore, even if an error is detected that all three values in a certain field are the same due to noise during transmission, but an error is detected, the error is corrected so that the values are almost correct. Can be absorbed and interpolated. That is, it is possible to correct error detection that is not the target of conventional interpolation, and prevent image deterioration due to error detection.

According to the second aspect of the invention, when the control signal in which the error is detected is interpolated, the judging means is
It is determined that the control signal is an item having a constant value over a period of several hundred fields. Then, the interpolating means interpolates the control signal determined by the judging means to be an item which is a control signal of an item having a constant value over a period of several hundred fields, based on the values of the past several tens of fields.

That is, in the case of an item having a constant value over a period of several hundred fields, the detection result is conventionally obtained by using the control signal of only that field. However, in the present invention, the value of several tens of fields in the past is used. Interpolate based on Therefore, it is possible to correct the error detection that is not the target of the conventional interpolation and prevent the deterioration of the image due to the error detection.

Further, according to the third aspect of the invention, when the error-detected control signal is interpolated, the integrator or C
Interpolation is performed by PU.

That is, the integrator or the CPU can integrate and calculate the values of the past fixed period in the control signal, whereby the average value of the past fixed period can be calculated, and the error Can be absorbed.

Therefore, it is possible to correct the error detection which is not the object of the conventional interpolation and prevent the deterioration of the image due to the error detection.

[0034]

【Example】

[Embodiment 1] One embodiment of the present invention will be described with reference to FIGS.
The explanation is based on the following.

High definition transmission method MUSE (Mul
In the tiple Sub-nyquist Sampling Encoding) method, MU
In order to reduce the processing amount on the SE decoder side, the values of various control signals required for decoding processing on the MUSE encoder side are calculated and multiplexed and transmitted in the MUSE signal.

This control signal is called a control signal.
Table 1 shows the contents of the control signal. As shown in FIG. 4, the control signals of all 32 bits and 15 items are multiplexed in each field, and each control signal controls the next field of the multiplexed field.

[0037]

[Table 1]

In transmission, in order to prevent an error in transmission, the MUSE encoder performs the following operation on the control signal.

First, the control signal of all 32 bits is divided into 8 blocks of 4 bits each, and
Each block is coded by the (8,4) extended Hamming coding method. That is, by the (8,4) expanded Hamming code, 4 bits are added to each block of 4 bits as check bits for error detection and correction, whereby the control signal becomes 8 blocks of 8 bits each. With this (8,4) extended Hamming coding method, one error (one bit error) can be corrected and two errors (2
Even if there is a bit error), it can be detected. However, bit errors of 3 errors (3 bit errors) or more are detected as error or 2 errors.

To transmit one bit of each of the above bits, M
Two transmission samples of the USE signal are used. Therefore, 16 transmission samples are used to transmit an 8-bit block. Here, the purpose of using the two transmission samples is to correctly decode the control signal by the MUSE decoder even when there is an extreme decrease in the reception CN ratio or a large waveform distortion.

Next, each block is transmitted three times in one field, as shown in FIG. 5, which is a multiple time slot of the MUSE signal. As can be seen from FIG. 5, the same blocks are arranged so as not to come on the same line. This is a consideration for burst noise, and if one line (horizontal row in the figure) is all missing, the other 2
The block is transmitted successfully.

Next, the control signal detection circuit in the MUSE decoder of this embodiment will be described.

First, as shown in FIG. 2, the control signal detection circuit 1 of this embodiment has an A / D converter 2, a video signal processing section 3, a D / A converter 4, a control signal detection section 5, and a synchronization. It is composed of a separation unit 6 and a timing generation unit 7.

The control signal detecting section 5 is shown in FIG.
As shown in, the control signal separation unit 11, the Hamming decoding unit 12, the majority decision circuit unit 13, the interpolation circuit 14, and the selector 15 are included.

As shown in FIG. 1, the interpolation circuit 14 is composed of a selector 21, an integrator 22, one-field delay devices 23 and 24, a selector 25 and the like.

The control signal detection processing in the control signal detection circuit 1 having the above configuration will be described.

First, in the control signal detection circuit 1,
As shown in FIG. 2, after the input MUSE signal is A / D converted by the A / D converter 2, it is input to the video signal processing unit 3 and the sync separation unit 6 and also to the control signal detection unit 5. To do. In the control signal detector 5, as shown in FIG. 3, the control signal demultiplexer 11 extracts all 24 blocks (1 block 8 bits) of the multiplexed control signal. The timing signal to be taken out is created by inputting the frame pulse signal and the horizontal synchronizing signal obtained from the sync separating unit 6 shown in FIG. 2 to the timing generating unit 7.

Next, as shown in FIG. 3, the Hamming decoding unit 12 performs Hamming decoding, error detection, and error correction for one error on each block. As a result, all 24 blocks (1 block 4 bits) of the decoded and corrected control signal are obtained. 2 Blocks judged to be erroneous are discarded here and are not used in the subsequent processing.

Next, the three blocks having the same contents transmitted three times are input to the majority decision circuit unit 13 to determine one value. Here, the majority decision circuit unit 13 is a circuit that literally takes a majority decision from a plurality of values to decide one value. This process is repeated 8 times to obtain 8 blocks (4 bits per block) of the final control signal and a majority OK / NG flag 1 bit for each block. If the values of 3 blocks are different when the majority decision is taken from the values of 3 blocks, or the value of 3 blocks is 2
If one value cannot be determined, such as when the Hamming decoding unit 12 discards it as an error, the majority decision is OK.
/ NG flag is set.

All 32 bits of the control signal thus obtained are input to the video signal processing section 3. Here, in the block in which the majority decision OK / NG flag is set, an accurate value cannot be detected due to the influence of noise on transmission, that is, the value of the detection result of the block is indefinite. means.

In this case, if an appropriate value is not interpolated in an undefined and missing portion, vertical lines may be jagged in the high-definition output image output from the MUSE decoder, or the brightness level of the outline of the image may become high. Then, various kinds of deterioration that can be visually confirmed in the image may occur. Therefore, the interpolation circuit 14 (see FIG. 3) needs to interpolate an appropriate value.

Various interpolation methods listed in Table 2 are generally used as the interpolation method. In other words, each item of the control signal of all 32 bits and 15 items has a constant value without changing the value even if it is a repeating signal having a certain period, a signal having an arbitrary value for each field, or a long period of several hundred fields. It has various characteristics such as a signal to take. Therefore, the interpolation method listed in Table 2 is an interpolation method that takes these characteristics into consideration.

Specifically, as shown in Table 2, the sub-sampled phase signal having periodicity in the signal is used by inverting the signal two fields before or one field before. The values of the horizontal motion vector signal and the vertical motion vector signal are forcibly set to 0. For the other signals, the signal of the previous field is used as it is.

[0054]

[Table 2]

Here, the signals one field before and two fields before are obtained from the one field delay units 23 and 24, respectively, as shown in FIG. The signals obtained one field before and two fields before are input to the selector 25. The selector 25 switches the timing signal sent from the timing generator 7 (see FIG. 2) and outputs the interpolation signal of the item to be selected to the selector 15 shown in FIG. In the case of a control signal item in a block in which the majority OK / NG flag is not set, the selector 15 outputs the signal from the majority circuit 13 to the video signal processor 3.
(See FIG. 2).

On the other hand, in the case of an item in a block in which the majority OK / NG flag is set, the signal generated by the interpolation circuit 14 is output to the video signal processing unit 3. By performing the interpolation by this method, the deterioration of the high-definition output video signal, which can be visually confirmed, is eliminated.

As described above, the control signal in the MUSE signal is extremely strongly protected against transmission distortion. Further, even when the value of the detection result of the control signal detection processing in the MUSE decoder becomes indefinite, the deterioration of the output image due to the indefiniteness is suppressed to the minimum by performing the interpolation considering the characteristics of the control signal.

By the way, in the transmission of the MUSE signal, as described above, when the majority values are taken from the values of the three blocks of the control signal, the values of the three blocks are different, or the values of the three blocks are different. If a single value cannot be determined, such as when the Hamming decoding unit 12 discards it as 2 errors, the majority decision is OK / NG.
The flag stands. Also, when the majority OK / NG flag is set, the interpolation process is performed.

Therefore, due to noise during transmission, 3
If all the values in one block are the same, but the values have changed to incorrect values, it is not undefined and the majority decision OK /
Since the NG flag is not held, no interpolation process is performed. As a result, there is a problem in that an erroneous value is treated as an apparently correct value.

This problem is particularly great in the AM / FM modulation information signal of bit number 20 in the control signal.

That is, the AM / FM modulation information signal has a modulation method of F when the MUSE signal is transmitted from the broadcasting station.
It takes a value of 0 during M transmission and takes a value of 1 during AM transmission.

In the FM modulation system, in order to deal with the triangular noise peculiar to FM modulation, emphasis is applied to improve the SN ratio. Therefore, when receiving the FM modulated signal,
On the MUSE decoder side, as shown in FIG.
The DUSE-converted MUSE signal is subjected to non-linear processing 41 and then passed through a de-emphasis filter 42 which is an inverse characteristic filter of the emphasis filter. Here, the characteristics of the emphasis and de-emphasis filters 42 are shown in FIG.
As shown in. Emphasis is not required during AM modulation, so no emphasis is applied at the MUSE encoder, and therefore no de-emphasis processing is performed at the MUSE decoder side. Therefore, in the MUSE decoder, the AM / FM modulation information signal of the control signal detected by the control signal detection unit 5 is used to determine the modulation method of the received MUSE signal, and the de-emphasis filter 42 is turned ON / OFF. The selector 43 switches appropriately.

If the switching decision is erroneous, the high-definition output image is deteriorated as follows. That is, when the AM modulated signal is added to the de-emphasis filter 42, the level of the high frequency part (edge part or the like) of the image is lowered and the image becomes blurred. On the other hand, if the FM modulation signal is not passed through the de-emphasis filter 42, the level of the high frequency part of the image remains elevated, and the outline portion becomes a glare-distorted image.

This image deterioration naturally gives an unpleasant feeling when it occurs in several consecutive fields, but even if only one field (1/60 second) occurs for a moment, it can be confirmed as a change in level. Therefore, it gives an unpleasant feeling to the viewer of the image.

Therefore, the control signal detection circuit 1 of this embodiment deals with this problem as follows.

That is, in the interpolation circuit 14 in the control signal detection circuit 1 of the present embodiment, as shown in FIG. 1, the selector 21 as a judging means is provided separately from the path from the selector 21 to the 1-field delay units 23 and 24. A path is provided from 21 to the video signal processing unit 3 via an integrator 22 as an interpolation means.

The operation of the interpolation circuit 14 having the above configuration will be described below.

First, of the control signals in the majority decision circuit section 13 shown in FIG. 3, the selector 21 shown in FIG.
Is used to determine that the control signal is a control signal of an item such as a reception mode control signal or an AM / FM modulation information signal that takes a constant value over a period of several hundred fields, and selects it. These signals are actually signals that do not change for about 30 minutes.

Then, the control signal of the selected item is input to the integrator 22. In the integrator 22, for example, the average of the past detection result values in 50 fields is obtained and directly output to the video signal processing unit 3. Therefore, this item is not passed to the selector 15 shown in FIG.

As for control signals such as items having periodicity and items that take an arbitrary value for each field, as described above, one field delay device 23 or 24 is used to delay two fields or one field. Is output.

In the control signal detection circuit 1 having this configuration, for items having a constant value over a period of several hundred fields, for example, even if error detection occurs in a certain field, the average of past values for several tens of fields is averaged. Since the value of the detection result is obtained from, the value of the error detection is absorbed.
Therefore, it is possible to prevent image deterioration due to error detection.

As described above, in the control signal detection circuit 1 of this embodiment, the selector 21 controls the reception mode control signal or the AM / FM modulation information signal whose control signal becomes a constant value over a long period of several hundred fields, for example. It is judged that it is a control signal such as. Then, the control signal determined by the selector 21 to be a constant value for a predetermined long period is input to the integrator 22.

The integrator 22 obtains the average of the detected values of the past 50 fields, for example, and outputs the average to the video signal processing unit 3.

Therefore, even if error detection occurs in which all three values in a certain field are the same due to noise during transmission, but the values have changed to erroneous values, the average value of several tens of fields in the past is used. It is used to interpolate by absorbing the error so that the value becomes almost correct. That is, it is possible to correct the error detection that is not the target of the conventional interpolation and prevent the deterioration of the image due to the error detection.

[Embodiment 2] Another embodiment of the present invention is shown in FIG.
The following is a description with reference to FIGS. 8 and 9. For convenience of explanation, members having the same functions as the members shown in the drawings of the first embodiment will be designated by the same reference numerals, and the description thereof will be omitted.

Control signal detection circuit 1 of this embodiment
In the same manner as in the first embodiment, the target is a control signal such as an AM / FM modulation information signal which has a constant value for several hundred fields, and the integrator 22 shown in the interpolation circuit 14 of the first embodiment is shown in FIG. CPU (Central Processing Unit) 3 shown
It consists of the ones replaced by one.

The interpolation operation of the control signal detection circuit 1 in this embodiment for the AM / FM modulation information signal will be described below.

First, as shown in FIG. 9, the control signal separation unit 11 extracts a control signal from the A / D converted MUSE signal. The control signal at this stage is in a state of 24 blocks (4 bits per block) to cope with transmission distortion. The Hamming decoding unit 12 and the majority decision circuit unit 13 perform processing such as Hamming decoding, error correction, and majority decision on this signal, and output control signals of all 32 bits and 15 items shown in Table 1 above. Next, as shown in FIG. 8, the selector 21 as the judgment means extracts the AM / FM modulation information signal from the 15 items and inputs it to the CPU 31 as the interpolation means. In the CPU 31, for example, the values of the detection results of the AM / FM modulation information signal for the past 49 fields are stored, and the total of the detection results of the current field is averaged for the total of 50 fields. Then, this average value is output to the video signal processing unit 3 shown in FIG. 2 as the value of the final detection result of the AM / AM modulation information. As a result, if error detection that does not become indefinite occurs in a certain field, an erroneous value is directly output to the video signal processing unit 3 by detecting only the control signal in that field. The error is absorbed by performing the operation of averaging with the correct value of.

As described above, according to the control signal detection circuit 1 of the present embodiment, the selector 21 determines that it is an AM / FM modulation information signal when interpolating the control signal for which an error has been detected. Based on this judgment
The CPU 31 interpolates the AM / FM modulation information signal based on the values of the past several tens of fields.

That is, the CPU 31 can freely integrate and calculate the values of the past fixed period in the control signal, and thus, for example, the average value of the past fixed period can be calculated, resulting in an error. Can be absorbed.

Therefore, among the control signals having a constant value over a period of several hundred fields, the AM / FM modulation information signal which has a great influence on the image is
It is possible to correct an error that is not the target of conventional interpolation and prevent the deterioration of the high-definition output video characteristics due to the error detection.

[0082]

As described above, the control signal detecting circuit according to the first aspect of the present invention includes, in the interpolating circuit, a judging means for judging that the control signal is an item having a constant value for a constant long period. When the determination unit determines that the control signal is the control signal, an interpolation unit that determines the interpolation value based on the value of the control signal in the past fixed period is provided.

As a result, when it is determined that the control signal is an item having a constant value for a certain long period of time, the interpolating means sets the value of the control signal in the past certain period regardless of whether the control signal is indefinite or not. The interpolation value is determined based on the interpolation.

Therefore, even if an error is detected that all three values in a certain field are the same due to noise during transmission, an error is detected so that the values are almost correct. Can be absorbed and interpolated. That is, it is possible to correct the error detection that is not the target of the conventional interpolation, and it is possible to prevent the deterioration of the image due to the error detection.

As described above, the control signal detection circuit according to the second aspect of the present invention is the control signal detection circuit according to the first aspect, wherein the determination means is a control signal of an item that has a constant value over a period of several hundred fields. On the other hand, the above-mentioned interpolation means is configured to interpolate based on the values of the past several tens of fields while judging that there is.

As a result, in the case of an item having a constant value over a period of several hundred fields, the detection result is conventionally obtained by using the control signal of only that field. Based on. Therefore, it is possible to correct the error detection that is not the target of the conventional interpolation and prevent the deterioration of the image due to the error detection.

As described above, the control signal detecting circuit according to the third aspect of the present invention is the control signal detecting circuit according to the first aspect, wherein the interpolating means includes an integrator or a CPU.

As a result, by the integrator or the CPU,
It is possible to integrate and calculate the values of the control signal for a certain period in the past, and thereby, for example, to calculate the average value of the past certain period and the like, which makes it possible to perform processing capable of absorbing an error. Play.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an interpolation circuit of a control signal detection circuit according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of the control signal detection circuit.

FIG. 3 is a block diagram showing a configuration of a control signal detection unit in the control signal detection circuit.

FIG. 4 is an explanatory diagram showing multiple time slots of a MUSE signal detected by the control signal detection circuit.

FIG. 5 is an explanatory diagram showing multiple time slots of a control signal in a MUSE signal detected by the control signal detection circuit.

FIG. 6 is a MUS including the control signal detection circuit.
It is a block diagram which shows the structure of the de-emphasis process part in an E decoder.

FIG. 7 is a MUS including the control signal detection circuit.
It is explanatory drawing which shows the characteristic of the emphasis and the de-emphasis filter in an E decoder.

FIG. 8 is a block diagram showing a configuration of an interpolation circuit of a control signal detection circuit according to another embodiment of the present invention.

FIG. 9 is a block diagram showing a configuration of a control signal detection unit in the control signal detection circuit.

FIG. 10 is a block diagram showing a conventional example and showing a configuration of a control signal detection circuit.

FIG. 11 is a block diagram showing a configuration of a control signal detection unit in the control signal detection circuit.

FIG. 12 is a block diagram showing a configuration of an interpolation circuit in the control signal detection circuit.

[Explanation of symbols]

 1 Control Signal Detection Circuit 5 Control Signal Detection Section 13 Majority Decision Circuit Section 14 Interpolation Circuit 21 Selector (Determination Means) 22 Integrator (Interpolation Means) 23 1 Field Delay 24 24 1 Field Delay 31 CPU (Interpolation Means) 42 De-emphasis Filter

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication H04N 7/081

Claims (3)

[Claims] 1. A control signal detection circuit provided in a MUSE decoder and provided with an interpolation circuit for interpolating a control signal in which an error has been detected, wherein the interpolation circuit provides a constant value for a predetermined long period of time. When it is determined that the control signal is the control signal of the item to be taken and the control signal is the determination signal, the interpolation value is determined based on the value of the control signal in the past fixed period. A control signal detection circuit, which is provided with an interpolation means for 2. The determining means determines that the control signal is an item that has a constant value over a period of several hundred fields, while the interpolating means interpolates based on the values of several tens of fields in the past. Claim 1 characterized by the above-mentioned.
The control signal detection circuit described. 3. The control signal detection circuit according to claim 1, wherein the interpolation means includes an integrator or a CPU.