JPH07235532A - Formation of protective film for semiconductor device - Google Patents
Formation of protective film for semiconductor deviceInfo
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- JPH07235532A JPH07235532A JP2463594A JP2463594A JPH07235532A JP H07235532 A JPH07235532 A JP H07235532A JP 2463594 A JP2463594 A JP 2463594A JP 2463594 A JP2463594 A JP 2463594A JP H07235532 A JPH07235532 A JP H07235532A
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- Prior art keywords
- protective film
- film
- semiconductor device
- silicon carbide
- silicon
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Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は半導体装置を汚染等から
保護する保護膜、特に炭化シリコンを含む半導体装置の
保護膜の形成方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a protective film for protecting a semiconductor device from contamination and the like, and more particularly to a method for forming a protective film for a semiconductor device containing silicon carbide.
【0002】[0002]
【従来の技術】従来、半導体装置を雰囲気中の水分やア
ルカリ金属イオン等の汚染或いは外部から加えられる応
力から守る目的で、半導体基板にアルミニウム膜などの
金属による電極膜や配線膜の形成後その上に成膜される
最終的な保護膜としては、プラズマCVDや減圧CVD
などのCVD法による酸化シリコン膜や窒化シリコン膜
あるいはそれらの積層構造が一般的である。そのような
最終保護膜の良否は半導体装置の長期信頼性に大きく影
響を及ぼすため、下記の点に留意する必要がある。2. Description of the Related Art Conventionally, in order to protect a semiconductor device from contamination such as moisture and alkali metal ions in the atmosphere or stress applied from the outside, after forming an electrode film or a wiring film of a metal such as an aluminum film on a semiconductor substrate, As a final protective film formed on the surface, plasma CVD or low pressure CVD
Generally, a silicon oxide film, a silicon nitride film, or a laminated structure thereof is formed by a CVD method such as. Since the quality of such a final protective film has a great influence on the long-term reliability of the semiconductor device, the following points should be noted.
【0003】1、膜質(緻密性、安定性、機械的強度な
ど)の確保。 2、配線ステップカバレージのよいこと。 3、低温で形成できること(一般に配線材料はアルミニ
ウムなどに代表されるような低融点金属であるため、約
400℃以下の低温形成が要求される)。 上に挙げたような従来のCVD法については現状で上記
1〜3項をほぼ満足した条件が確立されている。1. To secure film quality (denseness, stability, mechanical strength, etc.). 2. Good wiring step coverage. 3. It can be formed at a low temperature (generally, the wiring material is a low-melting metal represented by aluminum or the like, so that the formation at a low temperature of about 400 ° C. or lower is required). With respect to the conventional CVD method as mentioned above, the conditions that substantially satisfy the above-mentioned items 1 to 3 are established at present.
【0004】しかるに、従来のCVD法は生産技術的に
みると、次のような短所も持っている。すなわち、 4、シランなどの着火性ガスや、フォスフィン、ジボラ
ンなどの有毒ガスを使用するため、安全対策が不可欠で
ある。 5、パーティクル発生により歩留りが低下し易い。However, the conventional CVD method has the following disadvantages in terms of production technology. That is, 4, since ignitable gases such as silane and toxic gases such as phosphine and diborane are used, safety measures are indispensable. 5. The yield is likely to decrease due to the generation of particles.
【0005】6、成膜に時間がかかり生産性が低い。 といったCVD法そのものが抱える問題点が有る。特に
6項については図3に示すようなトレンチの埋め込みに
ついては課題が大きい。また場合によっては、上記2項
のステップカバレージが不十分であるという問題を再び
引き起こすこともある。図3に基づいてトレンチの埋め
込み工程を説明する。シリコンのサブストレート2に酸
化膜3を介してシリコン層4が積層されたいわゆるSO
I基板1を用い、そののシリコン層4に通常のフォトエ
ツチング技術を用いてトレンチ5を形成する[図3
(a)]。続いて、トレンチの内面および上面に酸化膜
6を被着する[同図(b)]。次に、減圧CVDにより
多結晶シリコン7をトレンチの内部に充填する。このと
き酸化膜6上にも多結晶シリコン7が堆積する[同図
(c)]。プラズマエッチングにより酸化膜6上の多結
晶シリコン7をエッチングする[同図(d)]。素子分
離のためのトレンチの充填は以上のような工程でなされ
る。この後、図には示していないがシリコン層4上の酸
化膜6を一部除去して、露出したシリコン層4の表面層
に素子を形成するのである。従来技術では、図3に示す
ような工程に従って多結晶シリコンをCVD法で充填す
るのが一般的であるが、トレンチを平坦に埋め込むには
かなりの堆積時間を必要とし問題となっている。溝幅が
広くしかも深い場合には一層深刻である。6. It takes time to form a film and productivity is low. There is a problem that the CVD method itself has. In particular, regarding item 6, there is a large problem in filling the trench as shown in FIG. In some cases, the problem of insufficient step coverage in the above item 2 may be caused again. The trench filling process will be described with reference to FIG. A so-called SO in which a silicon layer 4 is laminated on a silicon substrate 2 via an oxide film 3
Using the I substrate 1, a trench 5 is formed in the silicon layer 4 of the I substrate 1 by using a normal photoetching technique [FIG.
(A)]. Subsequently, an oxide film 6 is deposited on the inner surface and the upper surface of the trench [(b) of the same figure]. Next, polycrystalline silicon 7 is filled in the trench by low pressure CVD. At this time, polycrystalline silicon 7 is also deposited on the oxide film 6 [FIG. The polycrystalline silicon 7 on the oxide film 6 is etched by plasma etching [(d) in the figure]. The trenches for element isolation are filled in the above steps. After that, although not shown in the figure, the oxide film 6 on the silicon layer 4 is partially removed to form an element on the exposed surface layer of the silicon layer 4. In the prior art, it is general to fill the polycrystalline silicon by the CVD method according to the process shown in FIG. 3, but it takes a considerable amount of deposition time to fill the trench evenly, which is a problem. It becomes more serious when the groove width is wide and deep.
【0006】上記の4〜6項の問題を解決する方法とし
ては、フォトレジストに代表されるような回転塗布法に
よる半導体基板への表面保護膜の形成法がある。従来、
このような塗布法による表面保護膜の例としては、ポリ
イミドやスピンオンガラスが知られている。スピンオン
ガラスとは水ガラスを回転塗布、焼成し酸化シリコン膜
とする方法である。As a method for solving the above-mentioned problems 4 to 6, there is a method of forming a surface protective film on a semiconductor substrate by a spin coating method represented by a photoresist. Conventionally,
Polyimide and spin-on glass are known as examples of the surface protective film formed by such a coating method. Spin-on glass is a method in which water glass is spin-coated and baked to form a silicon oxide film.
【0007】[0007]
【発明が解決しようとする課題】しかし、塗布法によっ
て形成したこれらポリイミドやスピンオンガラスの膜
は、CVD法による窒化シリコンや酸化シリコンとは逆
に上記1項の膜質の点で難があり、従来技術で述べたよ
うなCVD法を主流とする方法に変わってきたというそ
もそもの過去の経緯がある。例えばポリイミドは密着性
や膜の硬さに難点があり、剥離等の問題を起こしやす
い。またスピンオンガラスは耐湿性、耐イオン透過性が
不十分である。これらの従来の塗布法の欠点の多くは、
用いられた材料にある。However, these polyimide and spin-on-glass films formed by the coating method are difficult in terms of the film quality of the above item 1 contrary to silicon nitride and silicon oxide formed by the CVD method, There is a history of the past that the CVD method as described in the technology has been changed to the mainstream method. For example, polyimide has problems in adhesiveness and film hardness, and is prone to problems such as peeling. Further, the spin-on glass has insufficient moisture resistance and ion permeability resistance. Many of the drawbacks of these conventional coating methods are:
It is in the material used.
【0008】すなわち本発明の目的は、半導体基板へ回
転塗布法で被着できる、膜質の優れた表面保護膜の形成
方法を見いだし、もって優れた信頼性特性を有する半導
体装置の保護膜の形成方法を提供することにある。That is, an object of the present invention is to find a method for forming a surface protective film having excellent film quality, which can be applied to a semiconductor substrate by a spin coating method, thereby forming a protective film for a semiconductor device having excellent reliability characteristics. To provide.
【0009】[0009]
【課題を解決するための手段】上記の課題を解決するた
め、本願発明者は新たな材料の発掘に努めた。炭化シリ
コン膜は半導体装置の保護膜として用いた例は無いが、
硬さが高く、熱伝導係数が大きく、しかも熱膨張係数も
シリコンのそれに近く保護膜として適した物性を有して
いる。そこで、炭化シリコンを主成分とする膜を半導体
装置の保護膜として選んだ。炭化シリコンはまた、原料
となる炭素原子を含む液状の有機シリコン化合物が比較
的容易に入手できるという利点もある。In order to solve the above problems, the inventor of the present application sought to find a new material. Although there is no example of using a silicon carbide film as a protective film for a semiconductor device,
It has a high hardness, a large thermal conductivity coefficient, and a thermal expansion coefficient close to that of silicon and has physical properties suitable as a protective film. Therefore, a film containing silicon carbide as a main component was selected as a protective film for the semiconductor device. Silicon carbide also has an advantage that a liquid organic silicon compound containing carbon atoms as a raw material can be obtained relatively easily.
【0010】保護膜の形成方法としては、半導体装置上
に、ポリシラン重合体を溶解した液体を塗布し、焼成す
るものとする。ポリシラン重合体はメチル基を有するも
の、例えば、ポリジメチルシリレンが適当である。焼成
は酸素(以下O2 と記す)を含む雰囲気中で行う。特
に、O2 と窒素(以下N2 と記す)の混合ガス雰囲気中
で焼成するのがよい。As a method of forming the protective film, a liquid in which a polysilane polymer is dissolved is applied onto the semiconductor device and baked. A polysilane polymer having a methyl group, for example, polydimethylsilylene is suitable. Firing is performed in an atmosphere containing oxygen (hereinafter referred to as O 2 ). In particular, firing is preferably performed in a mixed gas atmosphere of O 2 and nitrogen (hereinafter referred to as N 2 ).
【0011】[0011]
【作用】ポリジメチルシリレンのような、ポリシラン重
合体を溶解した液体を半導体装置に塗布、焼成すること
により、化合物中の炭素原子とシリコン原子が反応し
て、半導体装置表面に炭化シリコン膜を含んだ膜が形成
される。特に焼成雰囲気にO2 を加えることにより、ポ
リシラン重合体のメチル基が酸化され、より一層の重合
反応が促進されて、焼成温度を従来炭化シリコンを得る
のに必要であった1000℃より大幅に低減でき、半導
体の保護膜形成温度として実用可能な約400℃で形成
できるようになる。[Function] When a liquid having a polysilane polymer dissolved therein, such as polydimethylsilylene, is applied to a semiconductor device and baked, carbon atoms and silicon atoms in the compound react with each other to form a silicon carbide film on the surface of the semiconductor device. A saliva film is formed. In particular, by adding O 2 to the firing atmosphere, the methyl group of the polysilane polymer is oxidized and the polymerization reaction is further promoted, and the firing temperature is increased to a temperature higher than 1000 ° C., which is conventionally required to obtain silicon carbide. The temperature can be reduced, and it can be formed at a practical protective film forming temperature of about 400 ° C.
【0012】また焼成時のO2 とN2 との混合ガス雰囲
気のO2 とN2 との混合比を変え、また焼成温度を調節
することによって、炭化シリコンを含む膜の組成が変え
られ、適当な膜質の保護膜を得ることが出来る。The composition of the film containing silicon carbide can be changed by changing the mixing ratio of O 2 and N 2 in the mixed gas atmosphere of O 2 and N 2 at the time of baking and adjusting the baking temperature. A protective film having an appropriate film quality can be obtained.
【0013】[0013]
【実施例】以下に実施例について述べる。先ず環状ポリ
シランの合成から始める。ジメチルジクロロシランは金
属リチウム片の存在するテトラハイドロフラン(TH
F)溶媒中で、下記化学反応式(1)に従ってドデカメ
チルシクロヘキサシランとなる。EXAMPLES Examples will be described below. First, we start with the synthesis of cyclic polysilane. Dimethyldichlorosilane is tetrahydrofuran (TH
F) In a solvent, it becomes dodecamethylcyclohexasilane according to the following chemical reaction formula (1).
【0014】[0014]
【化1】 [Chemical 1]
【0015】得られたドデカメチルシクロヘキサシラン
をアルゴン(以下Arと記す)ガス封入の高圧釜中で4
8時間400℃に加熱すると、下記化学反応式(2)に
示す開環反応とそれに続く重合反応を起こし、ポリシラ
ン重合体[イ]、[ロ]が生成する。The obtained dodecamethylcyclohexasilane was placed in a high pressure vessel filled with argon (hereinafter referred to as Ar) gas.
When heated to 400 ° C. for 8 hours, a ring-opening reaction represented by the following chemical reaction formula (2) and a subsequent polymerization reaction are caused to generate polysilane polymers [a] and [b].
【0016】[0016]
【化2】 [Chemical 2]
【0017】生成したポリシラン重合体[イ]をジエチ
ルエーテルに溶かすと、[イ]の低分子重合体成分(n
が極端に小さい成分)はジエチルエーテルと一緒に蒸発
し、高分子重合体成分だけが残る。この残存物をノルマ
ルヘキサンとアセトンとの混合溶液に溶かすと、高分子
重合体成分はノルマルヘキサンに、低分子重合体成分は
アセトンに溶解分離するため、ノルマルヘキサンに溶解
したもののみ取り出せば、分子量の揃った高分子重合体
成分[ロ]が得られる。When the produced polysilane polymer [a] is dissolved in diethyl ether, the low molecular weight polymer component (n) of [a] (n)
Component is extremely small) evaporates with diethyl ether, leaving only the polymer component. When this residue is dissolved in a mixed solution of normal hexane and acetone, the high molecular polymer component is dissolved in normal hexane and the low molecular weight polymer component is dissolved and separated in acetone. Thus, a high molecular weight polymer component [B] having a uniform distribution can be obtained.
【0018】合成された高分子重合体成分[ロ]は上記
ポリシラン重合体[イ]でn=25が大部分の高分子重
合体成分がノルマルヘキサンに溶けたものであった。以
上の高分子重合体成分の調製方法は矢島らの報告による
合成法を採用した( 矢島ら:Chem.Lett.,(1975)931)。こ
のノルマルヘキサンに溶解した高分子重合体成分[ロ]
を半導体装置上に滴下し、500rpmで回転塗布し
て、半導体装置上に均一の厚さの高分子重合体成分
[ロ]層を形成した。その後、このウェファを100℃
のクリーンオーブン中で1時間程ベークし、乾燥した。
この過程で溶剤であるノルマルヘキサンは蒸発し高分子
重合体層が形成される。The synthesized high molecular polymer component [b] was the above polysilane polymer [a] in which n = 25 was most of the high molecular polymer component dissolved in normal hexane. The synthetic method reported by Yajima et al. Was adopted as the method for preparing the above-mentioned polymer component (Yajima et al .: Chem. Lett., (1975) 931). Polymer component dissolved in this normal hexane [B]
Was dropped on a semiconductor device and spin-coated at 500 rpm to form a high molecular weight polymer component [b] layer having a uniform thickness on the semiconductor device. Then, this wafer is heated to 100 ° C.
It was baked in a clean oven for about 1 hour and dried.
In this process, normal hexane, which is a solvent, evaporates to form a polymer layer.
【0019】その後、この半導体装置を400℃、O2
10%のN2 とO 2との混合雰囲気の電気炉で3時間焼成
することにより、炭化シリコンと窒化シリコンとからな
るアモルファス薄膜(膜厚約1μm)が得られた。得ら
れた膜について、耐湿性および耐イオン透過性の試験を
おこなったところ極めて優れた耐湿性、耐イオン透過性
を示した。[0019] Thereafter, the semiconductor device 400 ° C., O 2
By firing for 3 hours in an electric furnace in a mixed atmosphere of 10% N 2 and O 2 , an amorphous thin film (film thickness of about 1 μm) made of silicon carbide and silicon nitride was obtained. When the obtained membrane was tested for moisture resistance and ion permeation resistance, it showed extremely excellent moisture resistance and ion permeation resistance.
【0020】従来真空中や不活性ガス雰囲気などで炭化
シリコンの合成が試みられたが、低温(400℃以下)
においてはパウダー状になるため、400℃以上での焼
成が必要であり、また、アモルファスや多結晶の薄膜と
するためにはより高温(1000℃以上)の焼成が必要
で、半導体装置の最終保護膜としては温度が高すぎて適
用することはできなかった。すなわち、この半導体基板
への保護膜の形成のための焼成は、半導体基板上に設け
られているアルミニウム配線膜の融解や酸化防止の観点
から、その温度の上限が定められる。つまり、アルミニ
ウムの融点(660℃)以下であることが絶対に必要で
あり、酸化防止の観点からは500℃以下でなければな
らないことがわかった。酸化性雰囲気での焼成を実施す
ることにより、高分子重合体のメチル基を酸化し、より
一層の重合反応を促進することができ、所期の目的に合
致した表面保護膜形成が可能となった。Conventionally, synthesis of silicon carbide has been attempted in vacuum or in an inert gas atmosphere, but at low temperature (400 ° C. or lower).
In this case, since it becomes powdery, it needs to be baked at 400 ° C or higher, and higher temperature (1000 ° C or higher) is necessary to make an amorphous or polycrystalline thin film. The temperature of the film was too high to be applied. That is, the upper limit of the baking temperature for forming the protective film on the semiconductor substrate is determined from the viewpoint of melting and preventing oxidation of the aluminum wiring film provided on the semiconductor substrate. That is, it was found that it is absolutely necessary to be below the melting point of aluminum (660 ° C.), and from the viewpoint of preventing oxidation, it should be below 500 ° C. By firing in an oxidizing atmosphere, the methyl groups of the high molecular weight polymer can be oxidized and the polymerization reaction can be further promoted, enabling the formation of a surface protective film that meets the intended purpose. It was
【0021】図1はO 2/(N2 +O 2)が0.3の条
件で行ったステツプカバレージ試験の結果を示す断面図
である。保護膜10が、シリコン基板8の角度が100
度、高さが3μmのステップ9を被覆していることがわ
かる。図2は、種々のN2 とO 2とのガスの流量の割合
〔O 2/(N2 +O 2)〕で焼成した場合の、生成した
アモルファス薄膜を分析した結果で、薄膜中に含まれる
炭素原子C、酸素原子Oおよび窒素原子Nの原子数をシ
リコン原子Siを1として表したものである。O 2/
(N2 +O 2)が0.1未満の場合はパウダー状とな
り、本発明の目的とする薄膜は得られなかったが、0.
1以上では良好な薄膜が得られた。FIG. 1 is a sectional view showing the results of a step coverage test conducted under the condition of O 2 / (N 2 + O 2 ) of 0.3. The protective film 10 makes the angle of the silicon substrate 8 100.
It can be seen that the step 9 having a degree and a height of 3 μm is covered. FIG. 2 shows the results of analysis of the produced amorphous thin film when it was fired at various gas flow rate ratios [O 2 / (N 2 + O 2 )] of N 2 and O 2, and it was included in the thin film. The number of carbon atoms C, oxygen atoms O, and nitrogen atoms N is represented with silicon atom Si as one. O 2 /
When (N 2 + O 2 ) was less than 0.1, it became powdery and the thin film aimed at by the present invention could not be obtained.
When it was 1 or more, a good thin film was obtained.
【0022】O 2/(N2 +O 2)が0.1〜0.2の
範囲では太い実線で示した炭素と点線で示した窒素が多
いことから、炭化シリコンと窒化シリコンを主として含
んだ混合膜が得られたことがわかる。この範囲の膜は特
に優れた耐イオン透過性を示した。またO 2/(N2 +
O 2)が0.6以上では、細い実線で示した酸素がもっ
とも多く太い実線で示した炭素が含まれ、点線の窒素は
非常に少ないことから、酸化シリコンと炭化シリコンを
含んだ膜が得られたことがわかる。この範囲で得られた
膜は密着性が良かった。When O 2 / (N 2 + O 2 ) is in the range of 0.1 to 0.2, a large amount of carbon shown by a solid line and a large amount of nitrogen shown by a dotted line are large. Therefore, a mixture mainly containing silicon carbide and silicon nitride is contained. It can be seen that a film was obtained. Membranes in this range showed particularly good resistance to ion permeation. Also O 2 / (N 2 +
When O 2 ) is 0.6 or more, the thin solid line contains the most oxygen and the thick solid line contains carbon, and the dotted line nitrogen is very small, so a film containing silicon oxide and silicon carbide was obtained. I know that it was done. The film obtained in this range had good adhesion.
【0023】その中間のO 2/(N2 +O 2)が0.3
〜0.5の範囲では点線で示した窒素がやや少ないもの
の、炭素、酸素、窒素が全て含まれていて、炭化シリコ
ン、窒化シリコンと酸化シリコンとの混合膜が得られた
ことがわかる。O 2/(N2 +O 2)が0.1以上の条
件下で成膜した薄膜は全て図2に示すステップ9を充分
に被覆していた。The intermediate O 2 / (N 2 + O 2 ) is 0.3.
It can be seen that a mixed film of silicon carbide, silicon nitride, and silicon oxide was obtained because carbon, oxygen, and nitrogen were all contained in the range of 0.5 to 0.5 although the amount of nitrogen shown by the dotted line was slightly small. All the thin films formed under the condition that O 2 / (N 2 + O 2 ) was 0.1 or more covered step 9 shown in FIG. 2 sufficiently.
【0024】さらに、図3に示したトレンチの埋め込み
工程で多結晶シリコンのかわりに上記実施例の炭化シリ
コン、窒化シリコン、酸化シリコンからなる薄膜を用い
たところ、溝幅10μm、深さ30μmのトレンチも塗
布と焼成で埋め込むことが可能であった。また、下記の
化学反応式(3)に従い、環状でないポリジメチルシリ
レンをAr中450℃に加熱して得られた高分子重合体
[ハ]を溶剤に溶かしたものを半導体基板に塗布、焼成
しても同様の炭化シリコンを含んだ膜質のよい保護膜が
得られた。Further, when the thin film made of silicon carbide, silicon nitride, or silicon oxide of the above-mentioned embodiment was used in place of polycrystalline silicon in the step of filling the trench shown in FIG. 3, a trench having a groove width of 10 μm and a depth of 30 μm was formed. It was also possible to embed by coating and baking. Further, according to the following chemical reaction formula (3), a polymer obtained by heating non-cyclic polydimethylsilylene in Ar at 450 ° C. is dissolved in a solvent and applied to a semiconductor substrate, followed by baking. However, a similar protective film containing silicon carbide was obtained.
【0025】[0025]
【化3】 [Chemical 3]
【0026】[0026]
【発明の効果】ポリシラン重合体を溶剤に溶かしたもの
を半導体基板に塗布し、焼成することにより、前述の1
ないし6の項目を満足する炭化シリコンを含む保護膜が
得られる。本発明によれば、従来のCVD法による前述
の欠点が解消されるとともに、従来のCVD法に比べて
量産性に優れ、工程の単純化が図れることから低コスト
化ができる。さらに、実施例で説明したように、焼成時
のガス流量比O 2/(N2+O 2)を変えるだけで各種
組成の膜が任意に得られるため、用途に応じた最適な膜
を選定できるという利点もある。EFFECT OF THE INVENTION By dissolving a polysilane polymer in a solvent and applying it to a semiconductor substrate and baking it, the above-mentioned 1
A protective film containing silicon carbide that satisfies the items 1 to 6 can be obtained. According to the present invention, the above-mentioned drawbacks of the conventional CVD method are eliminated, the mass productivity is superior to the conventional CVD method, and the process can be simplified, so that the cost can be reduced. Further, as described in the examples, films having various compositions can be arbitrarily obtained only by changing the gas flow rate ratio O 2 / (N 2 + O 2 ) at the time of firing, so that the optimum film can be selected according to the application. There is also an advantage.
【図1】本発明の形成方法による保護膜の例のステップ
カバレージの評価の結果を表す断面図FIG. 1 is a sectional view showing a result of evaluation of step coverage of an example of a protective film according to a forming method of the present invention.
【図2】本発明の形成方法の実施時の焼成中のガス流量
比O 2/(N2 +O 2)と成膜した膜の組成の関係を示
す図FIG. 2 is a diagram showing the relationship between the gas flow rate ratio O 2 / (N 2 + O 2 ) during firing and the composition of a film formed during the execution of the forming method of the present invention.
【図3】従来のSOI基板を用いた誘電体分離のための
トレンチ埋め込み工程を(a)から(d)の順に示す断
面図FIG. 3 is a cross-sectional view showing a trench filling step for dielectric isolation using a conventional SOI substrate in the order of (a) to (d).
1 SOI基板 2 サブストレート 3 酸化膜 4 シリコン層 5 トレンチ 6 酸化膜 7 多結晶シリコン 8 シリコン基板 9 ステップ 10 保護膜 DESCRIPTION OF SYMBOLS 1 SOI substrate 2 Substrate 3 Oxide film 4 Silicon layer 5 Trench 6 Oxide film 7 Polycrystalline silicon 8 Silicon substrate 9 Step 10 Protective film
Claims (6)
液体を塗布し、400℃以上500℃以下の温度で焼成
し、炭化シリコンを主成分とする膜とすることを特徴と
する半導体装置の保護膜の形成方法。1. Protection of a semiconductor device, characterized in that a liquid containing a polysilane polymer is applied to the semiconductor device and is baked at a temperature of 400 ° C. to 500 ° C. to form a film containing silicon carbide as a main component. Method of forming a film.
を特徴とする請求項1に記載の半導体装置の保護膜の形
成方法。2. The method for forming a protective film for a semiconductor device according to claim 1, wherein the polysilane polymer has a methyl group.
であることを特徴とする請求項2に記載の半導体装置の
保護膜の形成方法。3. The method for forming a protective film for a semiconductor device according to claim 2, wherein the polysilane polymer is polydimethylsilylene.
を特徴とする請求項1ないし3のいずれかに記載の半導
体装置の保護膜の形成方法。4. The method for forming a protective film for a semiconductor device according to claim 1, wherein the firing is performed in an atmosphere containing oxygen.
行われることを特徴とする請求項4に記載の半導体装置
の保護膜の形成方法。5. The method for forming a protective film for a semiconductor device according to claim 4, wherein the baking is performed in a mixed gas atmosphere of nitrogen and oxygen.
量比を0.1以上とした混合ガスの雰囲気中で焼成が行
われることを特徴とする請求項5に記載の半導体装置の
保護膜の形成方法。6. The semiconductor device according to claim 5, wherein the firing is performed in an atmosphere of a mixed gas in which the flow rate ratio of oxygen gas in the mixed gas of nitrogen and oxygen is 0.1 or more. Method of forming protective film.
Priority Applications (1)
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JP06024635A JP3139263B2 (en) | 1994-02-23 | 1994-02-23 | Method for forming protective film of semiconductor device |
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JP06024635A JP3139263B2 (en) | 1994-02-23 | 1994-02-23 | Method for forming protective film of semiconductor device |
Publications (2)
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JPH07235532A true JPH07235532A (en) | 1995-09-05 |
JP3139263B2 JP3139263B2 (en) | 2001-02-26 |
Family
ID=12143597
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2000059022A1 (en) * | 1999-03-30 | 2000-10-05 | Jsr Corporation | Process for the formation of silicon oxide films |
US6737746B2 (en) | 2001-11-14 | 2004-05-18 | Renesas Technology Corp. | Semiconductor device containing copper diffusion preventive film of silicon carbide |
-
1994
- 1994-02-23 JP JP06024635A patent/JP3139263B2/en not_active Expired - Fee Related
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2000059022A1 (en) * | 1999-03-30 | 2000-10-05 | Jsr Corporation | Process for the formation of silicon oxide films |
EP1087433A4 (en) * | 1999-03-30 | 2001-08-16 | Jsr Corp | Process for the formation of silicon oxide films |
US6517911B1 (en) | 1999-03-30 | 2003-02-11 | Jsr Corporation | Process for the formation of silicon oxide films |
KR100702555B1 (en) * | 1999-03-30 | 2007-04-04 | 제이에스알 가부시끼가이샤 | Process for the Formation of Silicon Oxide Films |
US6737746B2 (en) | 2001-11-14 | 2004-05-18 | Renesas Technology Corp. | Semiconductor device containing copper diffusion preventive film of silicon carbide |
Also Published As
Publication number | Publication date |
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JP3139263B2 (en) | 2001-02-26 |
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