JPH07235463A - Method and apparatus for fabricating semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To provide method and apparatus for fabricating a semiconductor element having active function through a single apparatus. CONSTITUTION:The semiconductor fabrication apparatus comprises a port 3 for feeding in a rectangular chip 2, an exciting/processing chamber 9 for forming a thin film pattern on a chip 5, and a port 14 for feeding out a semiconductor integrated circuit 12. Since the required functions are formed on a semiconductor element while holding the chip on a fixing table within a semiconductor fabrication apparatus, a high performance semiconductor integrated circuit can be fabricated in a short term. Furthermore, since the chip requires minimum alignment and a pattern can be formed without taking account of the influence of distortion of image, the tolerance is increased in the technology for forming a fine pattern and a small-sized high performance semiconductor fabrication apparatus is realized at low cost.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing apparatus, and more particularly, to a semiconductor manufacturing method and manufacturing apparatus capable of manufacturing a highly integrated semiconductor element with high accuracy and in a short time, and realizing cost reduction.

[0002]

2. Description of the Related Art High integration of semiconductor integrated circuits has been advancing year by year.
For example, the degree of integration of the memory device DRAM has been quadrupled about every three years, and the circuit pattern size for realizing it has been three times.
Miniaturization is progressing to 1/2 every year. The high integration of the semiconductor integrated circuit for each generation has been realized by expanding the pattern size by half and the chip area by double. However, the increase in the chip area leads to a decrease in the number of rectangular chips that can be obtained from a circular wafer, that is, a decrease in yield, which is a main cause of a decrease in throughput. Therefore, as the degree of integration of the semiconductor integrated circuit increases, the diameter of the wafer becomes larger, and the semiconductor manufacturing apparatus is forced to deal with the wafer having the larger diameter with high accuracy, resulting in complication. This leads to enormous equipment costs.

In view of such a background, the performance of semiconductor manufacturing equipment has been improved. For example, JP-A-4-61
As described in 291, as a method of directly forming a functional element on a wafer without using a resist process, a first gas is injected in a vacuum container to form a mask, and then a second gas is injected. In addition, there is a method in which a plurality of processes are processed in one device so that the mask is patterned by irradiation with an electron beam, the mask is further heated to remove the remaining mask, and finally the crystal is grown. . Further, as described in Japanese Patent Application Laid-Open No. 4-63414, several semiconductor manufacturing apparatuses for process processing are integrated with a configuration in which means for cleaning, film formation, etching, latent image exposure, etc. are arranged around a transport means. There is something I did. Furthermore, JP-A-61-17
7709 discloses a method in which the width of a wafer is standardized or formed into a rectangular chip shape, the width of the wafer is aligned in the transfer direction to a semiconductor manufacturing apparatus that performs a process, and the wafer is transferred in and out by a belt conveyor method. .

[0004]

In the above-mentioned prior art, the size of the manufacturing apparatus is increased in order to handle wafers whose diameters are becoming larger along with the trend of higher integration of semiconductors, and at the same time, the miniaturization of circuit patterns is dealt with. There was a technical problem that it was necessary to improve the performance. That is, there are technical problems in high-precision position control technology for a large-sized stage that performs various kinds of processing and film-forming processing technology that requires uniform film formation on the entire surface of a large-diameter wafer and etching characteristics. It was In particular, the prior art has involved the transfer of wafers between semiconductor manufacturing process apparatuses for each of various process treatments. As a result, the alignment of each circuit pattern arranged on the wafer is required for each pattern formation process, and the alignment accuracy is required to be a value smaller than the pattern dimension by one digit or more. Was requested. These technical problems are accompanied by an increase in the technical difficulty of the device as the device becomes larger, which leads to an extreme increase in the device cost. In order to provide high-performance, highly integrated circuits at low cost and to spread good products widely, Had been an obstacle. The object of the present invention is to solve these problems.

[0005]

In order to achieve the above object, the present invention comprises a step of dividing a wafer-shaped substrate into a plurality of chip-shaped substrates having at least two planes orthogonal to each other on the outer periphery, and From the step of positioning the chip-shaped substrate in the process processing apparatus and the step of performing a plurality of process processing on the chip-shaped substrate without moving the chip-shaped substrate in the apparatus to form a part of an integrated circuit. And a manufacturing apparatus for a semiconductor integrated circuit. That is, a substrate used in a semiconductor manufacturing process is divided in advance into a size of one LSI chip or several LSI chips which are final products. The number of times this chip is taken out of the process device during the process is minimized, and the first process for forming the patterned functional element required for forming the semiconductor integrated circuit is performed for each chip. A plurality of types of processing, such as performing the second processing at the positioning position, are performed while the chips are fixed at the same position. As a plurality of types of process treatment, a step of forming a thin film on a chip-shaped substrate,
A step of applying a photosensitive film, a step of exposing a predetermined pattern on the photosensitive film, a step of diffusing atoms, a step of removing a thin film on a substrate, a step of oxidizing a substrate, a step of cleaning a substrate, a chemical treatment of a substrate At least two or more steps are included among the steps consisting of.

[0006]

Since the wafer is divided into chips in advance and a plurality of semiconductor manufacturing processes are carried out with the chips fixed at the same position, pattern alignment at the time of pattern formation becomes unnecessary. Further, the vacuum processing apparatus and the pattern forming apparatus can be downsized without being affected by the increase in the diameter of the wafer. Since it is a chip unit, a large-scale highly accurate moving stage and a positioning control system for sequentially and repeatedly arranging circuit patterns are unnecessary. Further, since the target sample area becomes small, homogenization control during thin film formation can be performed easily and at high speed. As a result, extremely uniform film formation and etching are facilitated, so that it is possible to realize a high-purity film formation processing technique that is accurate on the order of molecular atoms and is free from contamination. Since the alignment of the chip array during exposure transfer and drawing for forming extremely fine patterns is minimized and the technology can be specialized only for pattern formation with good reproducibility, high-performance manufacturing equipment can be provided easily and at low cost. Become.

[0007]

Embodiment A semiconductor integrated circuit (LSI) described in the present invention.
The term "means an element in a predetermined electric device in a state in which active operations such as predetermined storage, calculation, amplification, and signal conversion can be performed only by connecting a power supply terminal and a signal terminal. In addition, a chip is a generic term for one chip or an assembly of several LSIs, which is the final product of an LSI, and refers to those in which functional elements necessary for semiconductor formation are not formed or in the process of being formed.
Semiconductor integrated circuits that are incomplete, that is, those that are in the process of processing, are collectively referred to.

FIG. 1 is a schematic sectional view of a semiconductor manufacturing apparatus according to a first embodiment of the present invention. This device, after feeding the chip into the device, while maintaining the chip at the same position or the same position, while controlling the atmosphere under the excitation source to a predetermined condition,
It is an apparatus that realizes a manufacturing method in which a desired pattern shape is subjected to treatments such as diffusion, thin film deposition, etching, etc., and a semiconductor integrated circuit having an active function is completed and then moved and sent out.
The semiconductor manufacturing apparatus 1 has a gate valve (not shown) for feeding the chip 2 or a differential exhaust type feeding port 3, a fixed base 5 for holding the chip 4 being processed, and a desired pattern on the surface of the chip 4. A charged particle source 6 as an excitation means for performing an excitation process, a deflection optical system 8 for the charged particle beam 7, a diffusion or thin film deposition,
Gas supply systems 10 and 1 for highly accurately supplying various gases for processing such as etching and cleaning processing in the vacuum device 9.
1, and a differential exhaust type delivery port 14 for delivering the completed semiconductor chip 12, supply and exhaust means (not shown) of various gases and raw materials used in various processes necessary for forming active elements, and a process control system for these. It consists of and. When the deposition and growth process requires a long time, the chip is fixed in the deposition and growth chamber (not shown) directly connected to the excitation processing chamber for a predetermined time, and the chip fixing table 5 is used as the main body of the semiconductor manufacturing apparatus 1. The chip 4 is conveyed to the deposition growth chamber while being held on the fixed table 5. After the completion of the process in the deposition growth chamber, when carrying out the positioning of the fixed base under the excitation source of the semiconductor manufacturing apparatus 1 again, the reference of the fixed base 5 is set to the reference of the main body of the device, so that the chip is removed. It is positioned at the position of with good reproducibility.

Next, the features of the manufacturing method of the present invention will be described in which the semiconductor of the present invention is completed while the chip of the present invention is held in the same device without being moved and the atmosphere is controlled to a predetermined condition, and a semiconductor having an active function is completed. . FIG. 12 shows the memory device DRA.
The transition of the relationship between the integration degree of M, the line width of the minimum pattern, the chip area, and the dimension is shown. It is expected that the chip area will increase while the line width decreases as the degree of integration increases. Figure 1
3 shows the relationship between the degree of integration of the memory device DRAM and the number of chips that can be obtained from the wafer. It can be seen that one solution is to reduce the number of chips that can be acquired from one wafer of the same size due to the increase in the chip area accompanying the increase in the degree of integration, and to increase the wafer diameter to increase the number of acquisitions. Chip size is 10 to 30 in the era when the degree of integration exceeds 1 Gbit
It is thought that it will be a semiconductor integrated circuit with an area of several mm square, and the wafer diameter is 200 mm from the viewpoint of throughput.
It is expected that it will be above. Therefore, in order to improve the manufacturing technology aiming at increasing the diameter of the single crystal wafer itself and improving the wafer utilization efficiency, it is essential that the semiconductor manufacturing apparatus can handle the large diameter wafer. Therefore, in the conventional semiconductor manufacturing apparatus, it is premised that a large-diameter wafer having a diameter of 200 mm or more is handled and a substrate on which semiconductor circuits having an active function are arranged is diced into rectangular chips of 10 to 30 mm square after completion. I was there. On the other hand, the substrate according to the present invention is divided into a plurality of chips in advance, and handles rectangular chips of 10 to 30 mm square from the time of delivery. Therefore, the following 9 points are mainly advantageous. Have a point

1. In a conventional semiconductor manufacturing apparatus that transfers or draws a pattern on a large-diameter wafer, due to expansion and contraction deformation of the wafer that occurs during various processing steps, there is an alignment position error in hundreds of chips arranged on the wafer surface. occured.
Therefore, when the pattern is transferred or drawn through various processing steps, it is necessary to perform highly accurate alignment for each chip arranged on the wafer by using the alignment mark on the chip. On the other hand, in the case of the semiconductor manufacturing apparatus of the present invention, since the substrate to be processed is handled on a chip-by-chip basis, it is not necessary to consider the chip arrangement position error due to the expansion and contraction deformation of the wafer as in the conventional case. Further, the position of the chip with respect to the fixed base can be detected and the positioning can be performed by using two planes that intersect each other on the outer circumference of the chip, for example, two sides that are orthogonal to each other in the case of a rectangular chip. Capacitance displacement measurement means, light reflection type measurement means, and measurement positioning means such as enlarged scanning with a photo array sensor can be applied to detect the chip outer shape. Furthermore, the position of the chip with respect to the fixed base can be easily detected and positioned by means of mechanically pressing the two sides of the outer circumference of the chip against the reference points that regulate the three points on the plane. In addition, the two reference sides on the outer circumference of the chip have an average surface roughness of 0.1 by a known polishing technique or a dicing technique in which diamond abrasive grains are fixed with resin.
Rmax or less and flatness of 0.1 μm or less can be easily achieved. Moreover, if the flatness of the two sides of the outer shape of the chip can be obtained, the positioning can be performed easily, so that the strict requirement for the size of the chip is eliminated, and the processing technology can be facilitated and the cost can be easily reduced. Since two sides on the outer circumference of the chip are used as a reference, it is not necessary to detect the mark formed in the chip through the resist film as in the conventional case, the detection resolution can be easily improved, and the positioning can be performed at high speed. Can be fixed.
In the present invention, after holding a chip on a fixed base once, a plurality of processes required for semiconductor element formation and further all the processes can be performed at the same place. The alignment that was performed is minimized. Therefore, it is not necessary to provide an alignment means for detecting the mark under the resist, measuring the position and performing the alignment, which is required by the conventional semiconductor manufacturing apparatus, and it is possible to reduce the size of the pattern and increase the throughput by the margin. Can specialize in technology. As a result, there is a feature that the cost of the semiconductor manufacturing apparatus can be reduced.

2. In the conventional semiconductor manufacturing process, since a wafer is sent between a plurality of semiconductor manufacturing apparatuses for exposure or drawing through a transfer robot or a transfer belt conveyor, various manufacturing processes are performed, and therefore, each semiconductor manufacturing process is performed. In order to ensure compatibility between devices, it was necessary to establish a pattern forming technique that ensures absolute dimensional accuracy without image distortion or the like. As for this dimensional accuracy,
A value of 10% or less of the minimum pattern size is required,
As the miniaturization of patterns progresses with each generation, it becomes a factor of further increasing the technical difficulty in realizing a device that satisfies the accuracy requirement, and significantly increases the device cost. On the other hand, in the semiconductor manufacturing method and the semiconductor manufacturing apparatus of the present invention, the active function of the semiconductor integrated circuit is completed with only one chip, so that image distortion and absolute dimensional accuracy are compatible with other devices. There is no need to consider sex. That is, image distortion and the like can be tolerated, and absolute precision of pattern dimensions is not required. As a result, since the deviceization technology can be specialized only in terms of pattern miniaturization, there is a feature that a highly accurate semiconductor manufacturing device can be easily realized without increasing the device cost.

3. In the conventional semiconductor manufacturing process, since the pattern is accurately aligned and exposed without being affected by the expansion and contraction deformation of the large-diameter wafer, the positions of the chips arranged on the entire surface of the wafer are detected, and the exposure is sequentially repeated. I was drawing. In order to realize this sequential repetitive operation, a mechanism for highly accurately controlling movement of a large stage on which a large-diameter wafer is placed is required. On the other hand, in the case of the semiconductor manufacturing apparatus of the present invention, since the processing is performed on a chip-by-chip basis and on the spot, a large moving stage is not required, and the means for attaching and detaching the chip to the fixed base and the fixed base are provided at predetermined positions. It is sufficient to provide only the means for positioning. As a result, the size of the device can be reduced, vibration control, temperature control, and cleaning can be facilitated, and a high-performance and small-sized semiconductor manufacturing device can be put to practical use at low cost.

4. In the conventional semiconductor manufacturing equipment for thin film manufacturing, since a large-diameter wafer was taken in and out, and a working distance was required to secure processing conditions of uniform film thickness on the wafer surface, the contents of the vacuum container used in the equipment It was accompanied by an increase in product.

On the other hand, in the case of the semiconductor manufacturing apparatus of the present invention, since the processing is performed in chip units and a large-diameter wafer is not used, the internal volume of the vacuum apparatus which serves as a deposition growth chamber for thin films and the like is reduced. The film quality can be easily homogenized, and the film thickness can be controlled with high accuracy. As a result, a high-performance and compact semiconductor manufacturing apparatus can be put to practical use at low cost.

5. Although a machining process is used to flatten the substrate surface, achieving both flatness and flatness with high accuracy over the entire area of a large-diameter wafer has been a very difficult technical task. On the other hand, in the case of the semiconductor manufacturing apparatus of the present invention, since the processing is performed on a chip-by-chip basis having an area that is a few hundredth of that of a wafer, it is possible to reduce the area of the flat processing target. In machining with a small processing area, it is possible to easily improve the accuracy of flatness and flatness, and the processing time per unit area can be shortened.
As a result, a chip with extremely high flatness can be obtained,
It has the feature that a new hybrid type semiconductor device can be easily developed by chip assembly that joins chips together.

6. In the case of the semiconductor manufacturing apparatus of the present invention,
Since the flatness of the chip surface for forming the pattern can be easily improved by machining or the like, it becomes easy to transfer the pattern using a high-resolution reduction optical system having a shallow depth of focus. As a result, the design margin of the pattern transfer optical system is increased, and it is possible to specialize in the device technology that focuses on the miniaturization of the pattern. As a result, a high-performance and compact semiconductor manufacturing apparatus can be put to practical use at low cost.

7. Although the area of semiconductor chips increases with the increase in the degree of integration of semiconductors, the diameter of wafers is increasing due to the decrease in the number of rectangular chips obtained from circular wafers. Along with this, a manufacturing apparatus capable of processing wafers with increasing diameters. There were more technical issues in the development of the, and the investment cost was enormous. On the other hand, in the case of the semiconductor manufacturing apparatus of the present invention which handles chips, there is no restriction on the increase of the chip area and it is possible to develop a high-performance apparatus at a relatively low cost.

8. Heretofore, an increase in the degree of integration has been accompanied by an increase in the chip area, and a wafer in which hundreds of them are arranged has been required to have a large diameter because of the yield. For this reason, the manufacturing apparatus cannot be shared between generations with different integration levels, and the manufacturing apparatus needs to be replaced, resulting in an increase in capital investment for the manufacturing apparatus. On the other hand, in the case of the manufacturing apparatus handling the chip unit of the present invention, the increase of the chip area does not have a great influence on the apparatus, and the replacement of the manufacturing apparatus is not necessary. As a result, the degree of integration of semiconductors is increased, that is, even if the generations are changed, the manufacturing apparatus can be shared, so that unnecessary equipment investment can be eliminated, which can contribute to the reduction of the manufacturing cost of the semiconductor integrated circuit.

9. In the conventional semiconductor manufacturing equipment for thin film manufacturing, since a large-diameter wafer is loaded and unloaded, a gate valve is provided between adjacent processing equipment when loading and unloading a sample into and from the processing chamber made of a vacuum container of the equipment body. After the chamber was made to have the same atmosphere as the other processing chambers, the gate valve was opened to transfer the wafer, and then the gate valve was closed to set each processing chamber to an independent atmosphere state, and then the desired processing was performed. .
As described above, opening and closing the gate valve and resetting the atmospheric condition each time the wafer is moved poses a problem that the continuous operation cannot be performed in the same manner and the apparatus becomes large-scale. On the other hand, in the case of the semiconductor manufacturing apparatus of the present invention, since the processing is performed on a chip-by-chip basis, its lateral width is a few tenths smaller than that of a large-diameter wafer. The passage having a small cross-sectional area can be configured by the differential exhaust structure. As a result, the chip can be transported without changing the atmospheric conditions of the processing chambers adjacent to each other.

Next, FIG. 2 shows a method of holding the chip of the present invention on the fixed base. An edge detection mechanism 2 for detecting the positions of two sides of a rectangular chip 21 fed into the fixed table 20.
2, 23 are provided. The chip 21 in the first processing chamber is transported and the position of the chip 24 placed on the fixed base is measured by the edge detection mechanisms 22 and 23. It should be noted that the edge detection mechanism may be a mechanism in which a chip having a flat edge is mechanically pressed against and brought into contact with the reference surface as a reference surface having good flatness. The fixed base electrostatically attracts and holds the positioned chip. Next, the chip 24 is completed and carried out as a semiconductor integrated circuit 25 that has been subjected to predetermined processing. If the chip held on the fixed base is subjected to another processing, another semiconductor integrated circuit 26
Is obtained. Furthermore, the chip 2 held in chip units
Chip group 28 pre-processed in another process on 7
When the chips 29 from No. 1 are positioned on the basis of rectangular edges of each other, and processed in an overlapping manner, a hybrid semiconductor integrated circuit 30 in which the chips are laminated and joined can be manufactured.

A second embodiment of the present invention is shown in FIG. The semiconductor manufacturing apparatus 40 of the present invention includes a cleaning chamber 41, a thin film deposition growth chamber 42, a patterning chamber 43, an etching chamber 44, a flattening chamber 45, single function element stockers 46, 47 and 48,
A stacking bonding chamber 49, a transport path (not shown) that connects the chambers in a physically and chemically cleaned state, a delivery port (not shown) that delivers the semiconductor integrated circuit 50 having an active function to the outside of the device, Supply and discharge means (not shown) of various gases and raw materials used in various processes necessary for forming functional elements,
And these process control systems.
The large-diameter wafer 51 is shaped into a rectangular chip 53 by a dicing device 52, and is supplied into the semiconductor manufacturing device 40 from an unillustrated transfer port. The single-function element stockers 46, 47, and 48 are stocked with a single-function chip 53 that has undergone various process processes in the semiconductor manufacturing apparatus 40 and a single-function chip 54 manufactured by another external process apparatus. If necessary, the semiconductor integrated circuit 55 having an active function is assembled and carried out in the laminated bonding chamber, and is carried out. The moving chip 53 is easily positioned at the same position based on the same outer shape reference as the described method. Especially, this positioning is required only in the patterning chamber 40 and the laminated bonding chamber 49. Further, since all the patterning required for forming the semiconductor integrated circuit 50 is performed only in the patterning chamber 40 in this apparatus, it is not necessary for the exposure apparatus for patterning to have strict requirements for image distortion and absolute dimensional accuracy. Needless to say.

FIG. 4 shows an external view of a semiconductor manufacturing apparatus according to the third embodiment of the present invention. It mainly comprises a semiconductor manufacturing apparatus 60, various gas or raw material supply / discharge means 61 used for various processes, and these process control means 62.
The necessary design data 63 of the semiconductor integrated circuit is input to the process control means 62, and the silicon chip 64 is input to the input port 6.
5 is supplied to the semiconductor manufacturing apparatus 60, a predetermined process is performed in the semiconductor manufacturing apparatus 60, and the semiconductor integrated circuit 66 having the intended active function is sent out from the sending port 67. In this way, the desired semiconductor integrated circuit can be completed and obtained on the same day.

A fourth embodiment of the present invention is shown in FIG. Conventional semiconductor manufacturing apparatuses handle wafers as a unit, but the present invention is characterized by processing chips as a unit. Wafer 7 with a dicing device (not shown)
A chip 72 obtained by cutting 1 into a rectangular shape in advance is supplied to the semiconductor manufacturing apparatus 70. The semiconductor manufacturing apparatus 70 includes a feed port 74 for feeding a chip 72, and a plurality of deposition growth processing chambers 75 to 8 for depositing or growing a thin film on the chip.
0, an excitation processing chamber 81 for selectively forming or processing a thin film in a pattern on the chip, a transfer path 83 for connecting the processing chambers in a physically and chemically cleaned state, and a semiconductor chip having an active function Sending port 8 for sending 73 out of the device
2 and supply / discharge means (not shown) of various gases and raw materials for various processes necessary for forming elements having active functions,
And a process control system.

In order to maintain an atmosphere suitable for each process in each processing chamber, the arrow mark in the figure showing the part where the chip reciprocates between adjacent processing chambers is only the chip and its transfer jig. A differential exhaust type passage or a gate valve (not shown) that can pass therethrough is provided. In the deposition growth processing chamber, which requires a relatively long time for various types of processing on the substrate, multiple chips are allowed to stay for a predetermined time, and in the excitation processing chamber where processing can be performed in a relatively short time, one by one is processed continuously. To do. In the deposition growth processing chamber 75, dopant atoms are deposited on the surface of the chip while controlling the thickness at the atomic layer level. Next, when this chip is transported to the excitation processing chamber 81 and irradiated with ultraviolet light in a predetermined pattern shape with ultraviolet light, diffusion occurs only in the region of the irradiated dopant atoms. In the deposition growth processing chamber 76, unexcited dopant atoms on the silicon chip are removed, diffusion of the excited region is promoted, and a chip having a predetermined doping region is obtained. Further, in the deposition growth processing chamber 77, polycrystalline silicon is formed on the chip surface.
Next, when this chip is transported to the excitation processing chamber 81 and is irradiated with ultraviolet light in a predetermined pattern shape, only the irradiated polycrystalline portion is modified. Next, when a predetermined atmosphere is maintained in the deposition growth processing chamber 78, a thin film pattern serving as an insulating layer grows only on the polycrystal of the irradiated portion, and a chip in which a thin film is formed in a predetermined region in a pattern shape is obtained. . Further, similarly, in the deposition growth processing chamber 77, polycrystalline silicon is formed on the chip surface. Next, when this chip is transported to the excitation processing chamber 81 and is irradiated with ultraviolet light in a predetermined pattern shape, only the irradiated polycrystalline portion is modified. Next, when a predetermined atmosphere is maintained in the deposition growth processing chamber 79, the metal thin film pattern of the conductor grows only on the polycrystal of the irradiated portion, and a chip in which the wiring pattern is formed in the predetermined region is obtained. When a chip on which a thin film, wiring and the like are formed is conveyed to the excitation processing chamber 81 and a predetermined pattern shape is irradiated with ultraviolet light, the irradiated thin film portion is excited and sublimated. Next, a finishing process is performed in the processing chamber 80 to obtain a chip in which holes and grooves 7 are formed in a pattern in a predetermined region. By the supply / discharge means (not shown) of various gases and raw materials used in various processes, and these process control systems, the insides of the plurality of deposition growth processing chambers 75 to 80 and the excitation processing chamber 81 described above can be individually processed. It is maintained in a suitable atmosphere. Also, when forming thin films of different materials such as insulating layer patterns and metal wiring patterns, after cleaning each processing chamber, set the atmospheric conditions suitable for each to reduce the number of each processing chamber. Is possible. As a result, the material chip 72
After the wafer is sent to the device, the process treatments necessary for the active function of the semiconductor can be performed in a closed system, and the semiconductor substrate 73 having the active function can be obtained from the device. Although the case where ultraviolet light is used as the excitation source of the excitation processing chamber of the present invention has been described, X-rays, laser light, electron beams, charged particle beams, or the like may be used as the excitation source in addition to ultraviolet light, or both may be used in combination. It is possible to arrange a plurality of them. The method of positioning the chip at the same position in the excitation processing chamber 81 and the conditions for the exposure apparatus that forms a pattern by excitation in this apparatus can be easily performed in the same manner as in FIG. 3 described and other embodiments. Needless to say.

A fifth embodiment of the present invention will be described with reference to FIGS. 6 to 8. 6 to 8, the parts having common functions are designated by the same numbers. FIG. 6 is a schematic view of a semiconductor manufacturing apparatus of the present invention and a schematic view of a sample cross section in a diffusion process which is one of semiconductor manufacturing steps. Semiconductor manufacturing equipment 1
Reference numeral 10 designates a feed port 102 for feeding the substrate 101, a plurality of deposition growth processing chambers 103, 104, 105 for depositing or growing a thin film on the substrate, and selectively forming a thin film on the substrate in a pattern. Excitation processing chamber 106 for processing or
A transport path 107 for connecting the processing chambers in a physically and chemically cleaned state, a delivery port 109 for delivering the semiconductor integrated circuit 108 having an active function processed and formed to the outside of the apparatus, and various kinds necessary for forming an active functional element. It is composed of a supply / discharge means (not shown) for various gases and raw materials used in the process and a process control system for these. In order to maintain an atmosphere suitable for each process in each processing chamber, the arrow in the figure where the sample reciprocates across adjacent processing chambers
A differential evacuation type passage or gate valve (not shown) through which only the sample and the transfer jig can pass is provided. Since various processes on the substrate require a relatively long time, a plurality of samples are allowed to stay in the deposition growth processing chamber for a predetermined time. In addition, in the excitation processing chamber where the processing is performed in a relatively short time, the processing is performed continuously one by one. Therefore, although the speed of the sample transfer flow between the processing chambers is different, it can be managed individually by a control system (not shown).

An enlarged schematic sectional view of an example of the step of diffusing atoms into the silicon substrate 111 is shown on the left side of FIG. In the deposition growth processing chamber 103, the dopant atoms 1 are formed on the entire surface of the substrate 111.
12 is deposited at a controlled atomic layer level thickness. Next, this silicon substrate is transported to the excitation processing chamber 6 and is irradiated with ultraviolet light 113 in a predetermined pattern shape by ultraviolet light, so that only the irradiated dopant atom portion is diffused into the silicon substrate 115 and the doping portion 114 is formed into a desired portion. It is formed in a pattern shape. Next, in another deposition growth processing chamber 104, the non-excited dopant atoms on the silicon substrate are removed to promote the diffusion of the excited dopant atom portion into the silicon substrate, thereby forming a predetermined doping region. Board 11
6 is obtained.

FIG. 7 shows a schematic view of an example of a step of laminating and growing a thin film on the silicon substrate 121. Deposition growth processing chamber 103
Then, polycrystalline silicon 122 is formed on the entire surface of the substrate 121. Next, the silicon substrate 123 is transferred to the excitation processing chamber 106.
When it is transported to the substrate and irradiated with ultraviolet light 113 in a predetermined pattern shape, only the irradiated polycrystalline portion 126 is modified. Then, the thin film 124 is grown on the polycrystalline portion in the deposition growth processing chamber 104 in a predetermined atmosphere to obtain a substrate 125 having a thin film patterned in a predetermined region.

FIG. 8 shows a schematic view of an example of a processing step for forming a predetermined hole or groove in the thin film on the silicon substrate 131. When the silicon substrate on which a thin film or the like is formed is transported to the excitation processing chamber 6 and the predetermined pattern shape is irradiated with the ultraviolet light 113,
The irradiated thin film portion is excited and sublimated. Next, a finishing process is performed in the processing chamber 105 to obtain a substrate 133 having holes and groove portions 134 formed in a pattern in a predetermined region.

The plurality of deposition growth processing chambers 10 described above are used.
In 3, 104, 105 and the excitation processing chamber, an atmosphere suitable for each processing is maintained by supply and discharge means (not shown) of various gases and raw materials used for various processes and these process control systems. In addition, when forming thin films of different thin film materials such as insulating layer patterns and metal wiring patterns, after cleaning each processing chamber, the atmosphere conditions suitable for each are set to enable common use. It is possible to reduce the number of rooms. As a result, after the substrate 1, which is a raw material, is fed into the device, the process processing required for all the active functions of the semiconductor can be performed in a closed system, and the semiconductor substrate 108 having a complete active function can be easily manufactured from the device. Obtainable.

A conventional apparatus for clustering in which only the film forming step is performed in one closed system for the purpose of preventing contamination of the surface of the substrate due to exposure to the atmosphere on the order of molecular atoms. FIG. 9 shows an example of the configuration of the above. Focusing on the handling station 201, a cleaning station 204, a metal forming station 205, an annealing station 206, a dry etching station 207, an ion implantation station 208, a wafer 2
00 input port 202, circuit-formed wafer 21
0 delivery port 203 and a plurality of gate valves 209 connecting each station and the port to the handling station
Composed of and. Since this equipment handles large-diameter wafers, the equipment becomes large, and every time there is a change in the diameter of the wafer, it is necessary to change the entire equipment or to perform accurate alignment for each chip at the chip positions arranged on the wafer. Since it has to be repeated, there has been a problem that the device cost is significantly increased due to the increase in size and complexity of the device.

FIG. 10 shows a schematic diagram of the basic configuration of the semiconductor device process apparatus of each of the embodiments of the present invention described above. The wafer 220 preliminarily shaped into the chip 221 is sent into the semiconductor manufacturing apparatus 222, and the process processing necessary for all the active functions of the semiconductor is performed in one closed system apparatus to perform the active function. The semiconductor integrated circuit 223 included therein can be obtained from the device. The semiconductor integrated circuit 22
It is also possible to form the external terminal 3 in the apparatus to complete the packaging by the exterior.

[0032]

According to the semiconductor manufacturing method and the semiconductor manufacturing apparatus using the same of the present invention, after the substrate of the material is fed, all the processes necessary for forming the semiconductor are performed and the semiconductor integrated circuit having the active function is fed. This is advantageous in that the number of manufacturing apparatuses can be reduced, the clean room in which the manufacturing apparatuses are installed can be narrowed, or a semiconductor manufacturing line that does not require a clean room can be constructed. Furthermore, by using a semiconductor manufacturing device that handles rectangular chips, the margin for increasing the performance of each manufacturing device that aims to miniaturize pattern formation increases, so manufacturing that performs higher-performance semiconductor processes consistently The device can be downsized, and the cost of manufacturing equipment can be reduced. Further, since the target semiconductor integrated circuit can be manufactured in a short time with one device, there is an effect that it is possible to shorten the development period of the semiconductor integrated circuits of a small amount and a large variety.

Further, if a defective chip is found based on the measurement result, including the step of inspecting the active function of the chip in the semiconductor process step, the process processing is continued if it can be repaired in the subsequent step. It is possible to include a step of eliminating the irreparable substance when it cannot be repaired. In the case of forming chips on a conventional wafer in an array, even if a large number of defective chips are matched, as long as there are good chips, the entire process is inefficient, but in the case of the present invention, defective chips are eliminated on the way. Since it is possible, the production efficiency can be improved, and the yield of semiconductor integrated circuits obtained from the device can be dramatically improved.

An energy source such as a charged particle beam, an electron beam, an X-ray, an ultraviolet ray, an excimer laser or a visible light can be used as an excitation source for forming a pattern by the excitation of the present invention. It is also possible to improve the performance by using an electric field, a magnetic field, and a gas flow together in order to give or uniform the orientation of the thin film growth.

[Brief description of drawings]

FIG. 1 is a schematic sectional view of an apparatus according to an embodiment of the present invention.

FIG. 2 is a schematic view of an apparatus according to an embodiment of the present invention.

FIG. 3 is a schematic diagram of an apparatus according to an embodiment of the present invention.

FIG. 4 is a schematic view of the appearance of an apparatus according to an embodiment of the present invention.

FIG. 5 is a schematic view of an apparatus according to an embodiment of the present invention.

FIG. 6 is a schematic diagram of an apparatus according to an embodiment of the present invention.

FIG. 7 is a schematic diagram of an apparatus according to an embodiment of the present invention.

FIG. 8 is a schematic view of an apparatus according to an embodiment of the present invention.

FIG. 9 is a schematic view of a conventional device.

FIG. 10 is a schematic diagram of a semiconductor process device configuration of the present invention.

FIG. 11 is a transition diagram of the relationship between the degree of integration of a semiconductor integrated circuit and the chip area or the like.

FIG. 12 is a transition diagram of the relationship between the degree of integration of a semiconductor integrated circuit and the number of chips acquired per wafer.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor manufacturing apparatus, 2 ... 4 Chips, 5 ... Fixed stand, 6
... excitation source, 9 ... excitation processing chamber, 10, 11 ... gas control system,
12 ... Semiconductor integrated circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Fumihiko Uchida 1-280, Higashi Koikeku, Kokubunji, Tokyo Inside Central Research Laboratory, Hitachi, Ltd. (72) Eiichi Murakami 1-280, Higashi Koikeku, Kokubunji, Tokyo Hitachi, Ltd. (72) Inventor Natsuki Yokoyama 1-280, Higashi Koikekubo, Kokubunji, Tokyo Metropolitan Research Laboratory, Hitachi Ltd. (72) Inventor, Yasunari Hayata 1-280, Higashi Koikekubo, Kokubunji, Tokyo Hitachi Central Lab., Ltd. (72) Inventor Toshimitsu Miyata 1-280, Higashi Koigokubo, Kokubunji, Tokyo Inside the Central Research Laboratory, Hitachi, Ltd.

Claims (5)

[Claims] 1. A step of dividing a wafer-shaped substrate into a plurality of chip-shaped substrates having at least two planes orthogonal to each other on the outer periphery, and a step of positioning the divided chip-shaped substrates in a process processing apparatus, A method of manufacturing a semiconductor integrated circuit, comprising: performing a plurality of process treatments on the chip-shaped substrate without moving the chip-shaped substrate in the device to form a part of the integrated circuit. 2. The manufacturing method according to claim 1, wherein the chip-shaped substrate has a size of one semiconductor integrated circuit substrate or several semiconductor integrated circuit substrates to be a final product. Circuit manufacturing method. 3. The manufacturing method according to claim 2, wherein a thin film is formed on a chip-shaped substrate, a photosensitive film is applied, a predetermined pattern is exposed, and atoms are diffused as the plurality of process treatments. At least two steps, or at least two steps of a step of removing the thin film on the substrate, a step of oxidizing the substrate, a step of cleaning the substrate, and a step of chemically treating the substrate. A method of manufacturing a semiconductor integrated circuit, comprising the steps of: 4. The method of manufacturing a semiconductor integrated circuit according to claim 3, further comprising the step of positioning the two sides of the orthogonal substrates as reference planes. 5. A means for positioning a chip-shaped substrate which is divided from a wafer-shaped substrate and has at least two planes orthogonal to each other on the outer periphery, and a chip-shaped substrate without moving the chip-shaped substrate in the positioned state. An apparatus for manufacturing a semiconductor integrated circuit, comprising: a process processing unit that performs a plurality of process processes on a substrate to form a part of the integrated circuit.