JPH07234948A - Picture processor - Google Patents

Abstract

PURPOSE:To make the device compact by attaining the sufficiently fast processing speed when plotting the picture by using the shading technic and reducing the parts cost and the parts mounting area. CONSTITUTION:A write data controller 3 stores only the color data of the respective picture elements at the plotting start point and the plotting end point in the register of a register group 4 corresponding to the column address from a column address decoder 8. A color data shading arithmetic device 5 performs shading by linearly complementing the color data at the plotting start point and the color data of the plotting end point. The color data of the picture element which is shaded by the arithmetic device 5 is written successively in the corresponding register in the register group 4 by the write data controller 3. The data of the register group 4 are written in a memory cell array 11 by a max. amt. of 256 picture elements at the same time by a serial write controller 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus, and more particularly to a semiconductor image storage element used in an apparatus that requires high speed writing of image data in a memory cell.

[0002]

2. Description of the Related Art Conventionally, in the field of computer graphics, a shading model has been used to represent an image more realistically. The shading model is a method of approximately calculating what color and brightness each point of an object looks like when an object or a light source is present in a three-dimensional space.

That is, when an image gradually becomes brighter or darker, or when the color of the image gradually becomes darker or lighter, a shading method is used to express it. Is used.

In this shading method, the brightness, darkness, or color density of an image is calculated pixel by pixel with respect to image data, and the calculation is performed using software or external hardware. .

The calculation result of these software or external hardware is stored in the memory of the image storage element for each pixel of color data of the pixel by the address determined by the timing of the fall of the row address strobe signal and the column address strobe signal. I remember.

[0006]

In the above-mentioned conventional image storage element, only the color data of the pixel which is the calculation result of the software using the shading method or the external hardware is stored. In the case of the method of performing the calculation of and storing the calculation result in the memory, the above calculation requires a large calculation cost.
Even if the memory access speed is increased, a sufficient processing speed cannot be obtained when an image is drawn using the shading method.

Further, in the case of the method of performing the above calculation by the external hardware and storing the calculation result in the memory, a large component cost and a wide component mounting area are required to perform the above calculation. These are major obstacles in downsizing the device.

Therefore, an object of the present invention is to solve the above problems, to obtain a sufficient processing speed when drawing an image using a shading method, and to reduce the component cost and the component mounting area. An object of the present invention is to provide an image processing device capable of downsizing the device.

[0009]

An image processing apparatus according to the present invention is an image processing apparatus including an image storage element that stores a pixel data string having color information, and holds the color information of the pixel data string. A holding means; a color information changing means for sequentially changing the color information of each designated pixel data among the color information of the pixel data row held by the holding means in a preset direction; and the color information changing means. The image storage element is provided with a writing unit that writes the changed color information to the holding unit and a unit that transfers the contents of the holding unit to a memory cell that stores the color information of a plurality of pixel data strings.

According to another image processing apparatus of the present invention, in addition to the above configuration, a pixel designated externally when the color information changed by the color information changing means by the writing means is written in the holding means. The image storage element is provided with means for prohibiting writing of color information of data.

In addition to the above configuration, another image processing apparatus according to the present invention configures the color information when the color information changed by the color information changing means by the writing means is written in the holding means. The image storage element is provided with means for prohibiting writing of bit information designated from the outside of the bit information.

[0012]

The variable amount of the adjacent pixel is calculated from the difference between the color data of the pixel at the specified drawing start point and the color data of the pixel at the drawing end point in the pixel data string and the number of drawing pixels. The amount is added to the color data of the pixel at the drawing start point.

The addition result is held in the register next to the register in which the color data of the pixel at the drawing start point is held. This operation is sequentially repeated up to the register that should hold the color data of the pixel at the drawing end point.

As a result, since shading can be performed before the color data of each pixel is transferred to the memory cell, a sufficient processing speed can be obtained when an image is drawn using the shading method, The cost and the component mounting area can be reduced, and the device can be downsized.

Further, by prohibiting the writing of the color data of the pixel designated from the outside when adding the variable amount to the color data and writing the same in the register, it becomes possible to mask the shaded color data in the raster direction. The arrangement control of shaded color data is speeded up.

Furthermore, when adding a variable amount to the color data and writing it to the register, by prohibiting the writing of externally designated bit information out of the bit information forming the color data, the shaded color data can be written. The masking in the depth direction of the memory is enabled, and the speed of controlling the brightness and the like for the entire shaded color data is accelerated.

[0017]

An embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In the figure, an image storage device according to an embodiment of the present invention is shown as an input / output buffer (Input / Output).
tBuffer) 1 and a counter (Counter) 2
And write data controller (Write Data)
Controller) 3 and registers (Regi)
4) and a color data shading calculator (De
lta Value & Shade Color Ca
1) and a serial write controller (Serial Write Controller)
6 and the light controller (Write Control
(ller) 7 and a column address recorder (Column
n Decoder) 8 and an address buffer (Add
(resist buffer) 9, row address decoder (law decoder) 10, memory cell array (memory cell array) 11, serial access memory (serial access memory)
em) 12 and a serial output buffer (Serial
Output Buffer) 13 and write mask register (Write Mask Register) 1
4 and the light plane mask controller (Write
Plane Mask Controller) 15
It consists of and.

In this image storage element, the register group 4
Is composed of 256 registers (register numbers # 0 to # 255) each holding 8-bit color data.
Different types of 8-bit color data can be held. Here, each 8-bit color data represents a color value in a range of 0 to 255 that can be represented by an unsigned integer 1 byte.

Further, the color data shading calculator 5 has a function of shading 256 different 8-bit length color data held in the register group 4.

When shading of color data is performed using the above image storage element, first, the drawing start point and the drawing end are respectively set in two non-adjacent registers between the register numbers # 0 to # 255 in the register group 4. It is necessary to give the color data of the point pixel.

Therefore, the column address decoder 8 decodes the column address at the start point and the end point at which the writing of the shaded pixel color data is performed, and outputs the decoded column address to the write data controller 3. Only the color data of the pixels at the drawing start point and the drawing end point are stored in the registers of the register group 4 corresponding to.

The number of drawing pixels for this shading drawing is calculated by the counter 2 from the formula "(drawing end point column address)-(drawing start point column address) +1".
Is calculated and stored in.

The color data shading calculator 5 performs shading by linearly complementing the color data at the drawing start point and the color data at the drawing end point. That is, the color data shading calculator 5 calculates the difference between the color data at the drawing start point and the color data at the drawing end point, divides the difference by the number of drawing pixels, and obtains a value that is sequentially accumulated for each pixel. .

The color data shading calculator 5 performs shading by sequentially adding the obtained values to the color data of adjacent pixels. The color data of pixels shaded by the color data shading calculator 5 is sequentially written in the corresponding registers of the register group 4 by the write data controller 3.

When all the color data of the pixel to be subjected to the shading drawing is written in the register group 4, the serial write controller 6 simultaneously writes the data of the register group 4 for the maximum 256 pixels in the memory cell array 11.

Here, the memory cell array 11 is composed of eight memory cells of 256 bits × 512, and column addresses are supplied from eight column address decoders 8 to each of these eight memory cells. .

On the other hand, when mask data in the raster direction is given to the data bus (not shown) connected to the input / output buffer 1 together with the color data at the drawing start point and the drawing end point, the mask data is masked. Writing of color data to the register group 4 is prohibited.

That is, when the color data of the pixel shaded by the color data shading calculator 5 is written in the corresponding register of the register group 4 by the write data controller 3, the write data controller 3 determines the corresponding color according to the mask data. Writing of data to the register group 4 is prohibited.

Therefore, only the color data not masked by the mask data is transferred from the register group 4 to the memory cell array 11. As a result, writing of color data shaded in the raster direction of the display screen (not shown) can be prohibited in pixel units.

When mask data in the depth direction of the memory is given to the data bus connected to the input / output buffer 1 together with the color data at the drawing start point and the drawing end point, of the 8 bits forming the color data. Writing of the color data corresponding to the bits masked by the mask data into the memory cell array 11 is prohibited.

That is, the mask data input from the data bus to the input / output buffer 1 is stored in the write mask register 14 from the input / output buffer 1. When the shaded color data is transferred from the register group 4 to the memory cell array 11, the write plane mask controller 15 corresponds to the 8 bits forming the color data based on the mask data stored in the write mask register 14. The transfer of the bit color data from the register group 4 to the memory cell array 11 is prohibited. As a result, it is possible to prohibit the writing of the color data shaded in any bit in the depth direction of the memory cell array 11.

FIG. 2 is a block diagram showing the configuration of the color data shading calculator 5 of FIG. In the figure, a color data shading calculator 5 is an 8-bit subtractor (8 b
51) and a 16-bit divider (16
bit divider 52 and a 16-bit data register (16 bit data register)
53 and a 16-bit adder (16 bit add
r) 54. Here, the 16-bit data register 53 has an 8-bit integer part and 8-bit decimal part
Used as a bit.

When shading the color data, the color data shading calculator 5 calculates 2 based on the color data of the pixels of 2 points (drawing start point and drawing end point) given from the register group 4 and the number of drawing pixels. Calculate the difference in color data between points.

That is, the 8-bit subtractor 51 subtracts the color data at the drawing start point from the color data at the drawing end point to calculate the difference between these two points. The 16-bit divider 52 divides the difference between the two points calculated by the 8-bit subtractor 51 by the number of drawing pixels to calculate the difference Δ value of the color data between the two points.

As described above, the difference Δ value of the color data between the two points is calculated by the formula "[(color data at the drawing end point)-(color data at the drawing start point)] / number of drawing pixels". be able to. The difference Δ of the color data obtained between the two points
The value is held in the 16-bit data register 53.

In order to determine the color data to be written in the memory cell array 11 of each pixel between the drawing start point and the drawing end point, the 16-bit adder 54 adds 2 to the color data at the drawing start point.
This is performed by adding the difference Δ value of the color data between the points.

That is, when the color data at the drawing start point is stored in the register #n, the difference Δ value held in the 16-bit data register 53 is added to the color data stored in the register #n by the 16-bit adder. The value is added at 54 and the value is written in the register # (n + 1) as the color data of the pixel.

Further, the difference Δ value is added to the color data of the register # (n + 1), and the value is written in the register # (n + 2) as the color data of the pixel. The difference Δ value is added to and the data is sequentially written into the register group 4 under the control of the write data controller 3. Here, 8 bits of the integer part of the calculated color data are written in the register group 4.

The writing order of the color data calculated as described above is as follows: (register number storing color data at the drawing start point) <(register number storing color data at the drawing end point) The order of the register group 4 is from left to right.

On the other hand, if (the register number in which the color data at the drawing start point is stored)> (the register number in which the color data at the drawing end point is stored), the writing order of the color data is from right to left of register group 4. Will be in order.

For example, if the shaded color data is stored in the registers # 29 to # 228 and the color data at the drawing start point is x and the color data at the drawing end point is y, then x + (x- in the register # 30. y) / 200 is the register #
31 stores x + 2 [(xy) / 200], respectively.

Thereafter, the color data in which the difference Δ value is sequentially accumulated is stored in the registers # 32 to # 227, and the register # 2 is stored.
The color data y at the drawing end point is stored in 28, and Δ values [(x−y) / 200] are sequentially accumulated and stored.

Therefore, the color data shading calculator 5 is provided with a register for holding the addition result of the 16-bit adder 54 and a selector for selecting one of this register and color data input from the outside, and 16 bits are provided. The Δ value may be sequentially added to the addition result of the adder 54.

As described above, since the shading of the color data is performed by the color data shading calculator 5 provided inside the image storage element, external hardware for shading the color data becomes unnecessary.

Therefore, it is possible to obtain a sufficient processing speed when drawing an image using the shading method, reduce the component cost and the component mounting area, and make the apparatus compact.

Further, since shaded color data can be simultaneously drawn in the raster direction by one memory access, extremely high speed shading drawing can be performed.

Furthermore, the masking in the raster direction or the depth direction of the memory can be performed on the shaded color data by this one memory access.
It is possible to control the arrangement of shaded color data and the brightness and the like of the entire color data at high speed.

[0049]

As described above, according to the image processing apparatus of the present invention, the color information of each designated pixel data in the pixel data string is sequentially changed in the preset direction and written in the register. By transferring the color information of the pixel data written in the register to the memory cell, it is possible to obtain sufficient processing speed when drawing an image using the shading method, and reduce the component cost and component mounting area. Therefore, there is an effect that the device can be downsized.

Further, according to another image processing apparatus of the present invention, when the color information of the changed pixel data is written in the register, the writing of the color information of the pixel data designated from the outside is prohibited, There is an effect that masking in the raster direction can be performed on shaded color information, and the speed of arrangement control of shaded color data can be increased.

Further, according to another image processing apparatus of the present invention, when the color information of the changed pixel data is written in the register, the bit information designated from the outside among the bit information constituting the color information is written. By prohibiting the shading, it is possible to mask the shaded color information in the depth direction of the memory, and it is possible to speed up the control of the brightness and the like for the entire shaded color information.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a color data shading calculator shown in FIG.

[Explanation of symbols]

 2 counter 3 write data controller 4 register group 5 color data shading calculator 6 serial write controller 7 write controller 8 column address decoder 11 memory cell array 14 write mask register 15 write plane mask controller 51 8-bit subtractor 52 16-bit divider 53 16 Bit data register 54 16-bit adder

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location G09G 5/10 B 9471-5G G06F 15/66 310

Claims (5)

[Claims] 1. An image processing apparatus including an image storage element for storing a pixel data string having color information, the holding device holding the color information of the pixel data string, and the pixel held by the holding device. Color information varying means for sequentially varying the color information of each designated pixel data in the color information of the data string in a preset direction, and the color information varied by the color information varying means is written in the holding means. An image processing apparatus comprising: a writing unit; and a unit that transfers the contents of the holding unit to a memory cell that stores color information of a plurality of pixel data strings in the image storage element. 2. A means for inhibiting writing of color information of pixel data designated from the outside when the color information changed by the color information changing means by the writing means is written in the holding means. The image processing apparatus according to claim 1, further comprising: 3. When writing the color information changed by the color information changing means by the writing means to the holding means, writing of bit information designated from the outside among bit information forming the color information is prohibited. 3. The image processing apparatus according to claim 1, wherein the image storage element includes a means for performing the operation. 4. The drawing start point is based on the color information of pixel data serving as a drawing start point and the color information of pixel data serving as a drawing end point in the color information of the designated pixel data. 4. The image processing apparatus according to claim 1, wherein the color information of each pixel data between the drawing end point and the drawing end point is sequentially changed. 5. The subtraction means for subtracting the color information of the pixel data serving as the drawing start point from the color information of the pixel data serving as the drawing end point, and the subtraction result of the subtracting means. Is divided by the number of pixels between the drawing start point and the drawing end point, and addition means for adding the division result of the dividing means to the color information of adjacent pixel data. The image processing device according to claim 4.