JPH0723266Y2 - Light emitting element drive circuit for optical printer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application This invention relates to a light emitting element drive circuit of an optical printer using a light emitting element such as an LED (light emitting diode).

(B) Conventional technology The LED array head has a plurality of LED array chips arranged in series on an insulating substrate. N (for example, 64) LEDs are arranged in rows on each LED array chip. Is formed in. As a drive circuit of an optical printer using this LED array head, for example, a circuit shown in FIG. 5 is known.

The drive circuit shown in FIG. 5 is of a so-called matrix type, and each LED array chip is connected to each block B _i.
(I = 1, ..., N). Each LED block B
The cathodes of the LEDs L ₁ , ..., L ₆₄ of _i are commonly connected for each block, and the block signals V _K1 , V _K from the block selection circuit 12 are supplied.
Blocks are time-divisionally selected by _K2 , ....

Further, the LEDs L ₁ , ..., L ₆₄ of each LED block B _i are lit and driven by one drive IC 13 according to input data. Therefore, the anodes of the LEDs L ₁ , ..., L ₆₄ of the LED blocks B ₁ , B ₂ , ... Are commonly connected to the anodes corresponding to the other blocks. However, on the substrate where the LED block B ₁ is placed and the pattern in which the cathodes are connected to each other is formed, in order to avoid the wiring of each layer and to easily route the pattern, the anodes should be connected between adjacent blocks. And, it is made to correspond with the forward, reverse, forward and reverse ... alternately. For example, block B ₁
LEDL ₁ anode is block B ₂ LEDL ₆₄ , block B
Connected to the anode of LEDL ₁ of ₃ , the anode of LEDL ₆₄ of block B ₁ , the anode of LEDL ₁ of block B ₂ , block B
₃ LEDL ₆₄ connected to the anode respectively.

The drive IC 13 is a 64-bit shift register, a latch circuit,
Equipped with a drive circuit. Each time the clock signal CLK is applied to the shift register, the serial data DI is shifted in, and when 64 bit data is input, these bit data are latched in parallel by the latch signal LA in the latch circuit and further strobe When the signal STR is input to the drive circuit, the latch data of the latch circuit is
_1, ..., are output to L _64, LEDL ₁ block B _i that is selected by the block signal V _Ki, ..., L ₆₄ is turned on.

(C) Problems to be solved by the invention Since the LED array chips have variations in the optical output among the LED array chips, the drive circuit shown in FIG. 5 is commonly connected to each LED block B _i. The cathodes are provided with resistors R ₁ (i = 1, ..., N) to uniformly correct the light output of each LED block B _i .

However, not only the light output varies among the LED array chips, but also the light output varies among the LEDs in one LED array chip. Therefore, it is difficult to completely eliminate the variation in the optical output of the entire LED array head, and although it is currently allowed to allow a variation of up to ± 15%, it is inevitable that the printing quality will deteriorate.

The present invention has been made in view of the above, and
It is an object of the present invention to provide a light emitting element drive circuit for an optical printer, which can eliminate variations in LED light output.

(D) Means and Actions for Solving the Problems In order to solve the above problems, a light emitting element drive circuit of an optical printer according to the present invention has a plurality of light emitting elements arranged in a row, and a plurality of N light emitting elements each. The first electrode of each light emitting element is connected in common to each block, and the i-th (i =
, 2 ..., N) and the second electrode of the light emitting element and the second electrode of the i-th light emitting element from the right end of the other block are alternately connected, and each block of the light emitting element row A block selection circuit for giving a block selection signal to a common connection point of the first electrodes of the first and second driving electrodes for giving a light emission element selection signal according to input data to the second electrode of each light emitting element of the left end block A second light emitting element for applying an IC and a second electrode of each light emitting element of the right end block with a light emitting element selection signal according to input data at an alternate timing with the light emitting element selection signal of the first light emitting element driving IC. Based on the driving IC, a memory circuit that stores correction data for correcting the variation in the light amount of each light emitting element of each block, and the light emitting element selection signal based on the correction data stored in this memory circuit, Light for each light emitting element And it is characterized in by comprising a correction circuit for providing a signal for correcting the.

Therefore, in the light emitting element drive circuit of the optical printer of the present invention, the correction data is determined by actually measuring the light output of each light emitting element, and the correction data is stored in the storage circuit, and based on the correction data. The light output is uniformly corrected by controlling the energization time and the current value of each light emitting element.

(E) Embodiment An embodiment of the present invention will be described below with reference to FIGS. 1 to 4.

FIG. 1 is a diagram showing the overall configuration of an LED drive circuit (hereinafter simply referred to as a drive circuit) of the optical printer of this embodiment. The drive circuit of this embodiment employs a so-called matrix system. B ₁ , B ₂ , ..., B _n are 64 LEDs L ₁ , ..., L respectively
_{The number} of blocks is ₆₄ , and one block directly corresponds to one LED array chip.

In each block B ₁ , ..., B _n , the block signals V _K1 , V _K of the block selection circuit 2 are commonly connected to the LEDs L ₁ , ..., L _64.
Blocks are time-divisionally selected by _K2 , ..., V _Kn . Further, the anodes of the LEDs L ₁ , ..., L ₆₄ of the blocks B ₁ , ..., B _n are commonly connected to the anodes of the corresponding LEDs of the other blocks. Also in this case, the connection of the anodes is such that the blocks adjacent to each other alternately correspond to forward, reverse, forward and reverse. For example, the anode of LEDL ₁ block B _1, LEDL ₆₄ of the block B _2, LEDL ₁ block B _3, is connected to: anode, the anode of the LEDL ₆₄ of the block B _1,
Connected to the anode of LEDL ₁ of block B ₂ , the anode of LEDL ₆₄ of block B ₃ , and so on.

LEDL ₁ block B _1, ..., the anode of the L ₆₄ is the output terminal O ₁ of each of the drive IC3 _-1, ..., are connected to O _64. On the other hand, the anodes of the LEDs L ₁ , ..., L ₆₄ of the block B _n are driven respectively.
Connected to output terminals O ₁ , ..., O ₆₄ of IC3 _-2 . As described above, the LEDs L ₁ , ..., L ₆₄ of each block B ₁ , ..., B _n are connected in reverse order alternately in the forward and reverse directions. Therefore, in the case of one drive IC,
The data must be arranged in an alternating alternating sequence in synchronization with the block time sequential selection. Therefore, it is necessary to input data to the drive IC block by block in the forward and reverse directions, which complicates the drive circuit. Therefore, in the drive circuit of this embodiment, two drive ICs 3 _-1 , 3 _-2 are provided, the forward direction side is made to correspond to the drive IC 3 _-1 , and the reverse direction side is made to correspond to the drive IC 3 _-2. There is.

2A and 2B are block diagrams for explaining the configuration of the drive IC 3 _-1 (3 _-2 ). The drive IC _3-1 includes a shift register 31 that stores data [see FIG. 2 (a)]. The shift register 31 is formed by connecting flip-flops F ₁ , ..., F ₆₄ in cascade, and is serially input to data from a terminal DATA in synchronization with a clock CLK signal. The outputs of the respective flip-flops F ₁ , ..., F ₆₄ are latched by the latch signal LA (l ₁ ,.
l ₆₄ ), and is input to the output circuit 33 (D ₁ , ..., D ₆₄ ). The output of each output circuit D ₁ , ..., D ₆₄ is output terminal O ₁ ,
…, O ₆₄ output to the outside of drive IC 3 _-1, respectively.

On the other hand, the drive IC3 _-1 is provided with a shift register 34 for the correction data CDATA0~3 of 4 bits as shown in FIG. 2 (b), the flip-flop F _C1, ..., constituted by F _C64 . The correction data of the shift register 34 is held in the latch circuit 35 (l _c1 , ..., L _c64 ) by the latch LA signal. The data from the latch circuit 35 is transferred to the corresponding energization time correction circuit 36 (C ₁ , ..., C ₆₄ ) by strobe STR1.
It is input together with the signal. And each energization time correction circuit
C _1, ..., the output signal C _S1 than C _64, ..., C _S64, the output circuit D ₁ respectively corresponding, ..., are input to D _64. The shift register 34 stores data in synchronization with the clock CCLK signal.
CDATA0 to 3 are input. In this example, the clock CC
The CLK signal uses the previous clock CLK signal as it is.

Now, 4 is a 4-bit CPU with a built-in ROM (see Fig. 1). In this ROM, each block B ₁ , ..., B _n LEDL ₁ ,
..., correction data (CDATA0 to 3) for _L64 is stored. CPU4, based on the control CTL signal, the correction data CDAT for the block currently selected
A0 to 3 are synchronized with the clock CLK signal and drive IC3 _-1 and
Output to 3 _-2 .

Next, the operation of the embodiment drive circuit will be described. First, the data DAT corresponding to block B ₁ is synchronized with the clock CLK signal.
A is input to the drive IC 3 _-1 (3 _-2 ) (see Fig. 3).
A little before this, the control CTL signal was input to CPU4,
After all, the correction data CDATA 0 to 3 corresponding to the block B ₁ are
It is input to the drive ICs 3 _-1 , 3 _-2 . Then, the latch LA signal is input to the drive ICs 3 _-1 , 3 _-2 , the data of the shift register 31 is held in the latch circuit 32, and the correction data is also held in the latch circuit 35. Also, the V _K1 signal is "L (L
ow) ”and block B ₁ is selected.

The strobe STR1 signal consists of four pulses P _{0 to} P ₃ as shown in FIGS. 3 and 4 (b), and each pulse P ₀
The time width ratio of ~ P ₃ is 8: 4: 2: 1. Note that at this time the drive IC3 _-2, since STR2 signal is not input, the drive I
C3 _-2 input to the DATA, CDATA0~3 becomes invalid after all.

On the other hand, as for the correction data, the contents of CDATA0 to CDATA are as shown in FIG.
As shown in. For example, in the correction data i corresponding to LEDL ₁ , all of CDATA0 to CDATA3 are “H (High)”.
It has become. Therefore, the energization time correction circuit C ₁ uses P _{0 to} P ₃ of the STR1 signal as they are as C _S1 as shown in FIG. 4 (b).
As a signal, sent to the output circuit D _1, the output circuit D ₁ is the time corresponding to P ₀ to P ₃ of the STR1 signal (15 = 8 + 4 + 2 + 1), LE
Drive DL ₁ to light up.

Further, in the correction data ii corresponding to the LEDL ₂ , only CDATA 1 and 3 are “H”, and the energization time correction circuit C ₂ uses the STR signal P ₁ and P _{1 as} shown in FIG. 4 (b). Only ₃ is sent to the output circuit D ₂ as C _S1 signal, and the output circuit D ₂ outputs P _{1 of} STR1 signal,
The LEDL ₂ is driven to light for the time corresponding to P ₂ (5 = 4 + 1).

While the STR1 signal is input and the LEDs L ₁ , ..., L _{64 of the} block B ₁ are driven to light, the data corresponding to the block B ₂ is input to the shift register 31 of the drive IC 3 _-2 (3 _-1 ). (See FIG. 3). Further, the CTL signal is input to the CPU 4, and CDATA 0 to 3 corresponding to the block B ₂ are sent to the driving IC 3 _-2 (3 _-1 ). Then, DATA and CDATA0 to 3 are held in the latch circuits 32 and 35 as LA signals, respectively. Further block signal V _K2
With but becomes to "L", the the drive IC3 _-2 is input STR2 signal, LEDL ₁ Former similar block B _2, ..., L ₆₄ each CD
Lighting is driven in a situation where the energization time is corrected based on ATA0 to 3.

After that, DATA and CDATA0 to 3 corresponding to each block are driven
Input to IC3 _-1 , 3 _-2 and drive STR1 and STR2 signals
Alternately input to IC3 _-1 , 3 _-2 , remaining block B ₃ , ...,
The LEDs L ₁ , ..., L _{64 of} B _n are sequentially driven to light.

Although the drive circuit of this embodiment is configured to correct the energization time, it may be configured to correct the energization current value, and the design can be appropriately changed.

Further, although the drive circuit of the above embodiment is of matrix type, the present invention can be applied to the case of a circuit configuration in which a drive IC is provided for each block to turn on the LED of each block.

(F) Effects of the Invention As described above, the light emitting element drive circuit of the optical printer of the invention is based on the storage circuit for storing the correction data of each of the light emitting elements and the correction data stored in the storage circuit. And a correction circuit that corrects a signal from the light emitting element selection circuit to the corresponding light emitting element, which is advantageous in that it can eliminate variations in light output of the light emitting elements and improve print quality. Have.

In addition, a plurality of light emitting elements are divided into blocks, one electrode of each light emitting element of each block is alternately connected between adjacent blocks, and the blocks at both ends are respectively connected to separate light emitting element driving ICs. Therefore, by making the separate driving ICs in charge of the light emitting elements on the forward and backward sides,
As compared with the case where all the light emitting elements are driven by one drive IC, not only the drive circuit can be simplified, but also the speedup of the optical printer can be easily dealt with.

[Brief description of drawings]

FIG. 1 is an LED of an optical printer according to an embodiment of the present invention.
2A and 2B are block diagrams illustrating the configuration of the drive circuit, and FIG. 2A and FIG. 2B show the drive I of the LED drive circuit of the optical printer.
FIG. 3 is a block diagram illustrating the configuration of C, FIG. 3 is a time chart illustrating the operation of the LED drive circuit of the optical printer, and FIG. 4A is an example of correction data of the LED drive circuit of the optical printer. FIG. 4 (b) is a time chart showing the correction of the energization time of the LED drive circuit of the optical printer, and FIG. 5 is a block diagram showing the LED drive circuit of the conventional optical printer. . 3 _-1・ 3 _-2 : Drive IC, 4: CPU, L ₁・ ・ ・ ・ L ₆₄ : LED, CDATA 0 ・
… CDATA3: Correction data.

Claims (1)

[Scope of utility model registration request] 1. A plurality of light emitting elements are arranged in a row, the light emitting elements are divided into a plurality of N blocks, and the first electrodes of the respective light emitting elements are commonly connected to each block and adjacent blocks are provided. , I-th from the left end of one block (i = 1, 2
, N), the second electrode of the light emitting element and the light emitting element row in which the second electrode of the i-th light emitting element from the right end of the other block is alternately connected, and the first electrode of each block of the light emitting element row. A block selection circuit that gives a block selection signal to a common connection point of the electrodes, and a first light emitting element driving circuit that gives a light emitting element selection signal according to input data to the second electrode of each light emitting element of the leftmost block
A second light-emitting element that applies a light-emitting element selection signal according to input data to the IC and the second electrode of each light-emitting element of the right end block at an alternate timing with the light-emitting element selection signal of the first light-emitting element driving IC A driving IC, a memory circuit that stores correction data for correcting the variation in the light amount of each light emitting element in each block, and a light emitting element selection signal based on the correction data stored in the memory circuit. A light emitting element drive circuit for an optical printer, comprising: a correction circuit that gives a signal for correcting the amount of light for each light emitting element.