JPH0722755A - Multilayer printed wiring board - Google Patents
Multilayer printed wiring boardInfo
- Publication number
- JPH0722755A JPH0722755A JP4355953A JP35595392A JPH0722755A JP H0722755 A JPH0722755 A JP H0722755A JP 4355953 A JP4355953 A JP 4355953A JP 35595392 A JP35595392 A JP 35595392A JP H0722755 A JPH0722755 A JP H0722755A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- printed wiring
- wiring board
- multilayer printed
- opening
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は，各種のいわゆる半導体
チップあるいはその他のチップ部品を搭載するために用
いられる，多層プリント配線板に関するものである。こ
の多層プリント配線板は，チップキャリア，ピングリッ
ドアレイ等のパッケージに応用されるものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board used for mounting various so-called semiconductor chips or other chip parts. This multilayer printed wiring board is applied to packages such as chip carriers and pin grid arrays.
【０００２】[0002]
【従来技術】近年，半導体チップ等と称される電子部品
は，その集積度が非常に密になってきており，そのため
これを実装するためのプリント配線板も高密度化しなけ
ればならなくなってきている。このような実状に対処す
るために開発されたのが，多層プリント配線板である。2. Description of the Related Art In recent years, the degree of integration of electronic parts called semiconductor chips and the like has become very dense, and therefore the printed wiring boards for mounting these parts must also be highly dense. There is. A multi-layer printed wiring board was developed to cope with this situation.
【０００３】この多層プリント配線板は，これを構成す
る複数の基板に予め導体回路を形成しておき，これらの
基板を互いに接合することによって高集積電子部品の実
装に対応しようとするものである。このような多層プリ
ント配線板としては，例えば特開昭５９−２０１４４９
号公報に示された「半導体チップ担体パッケージ」があ
る。In this multilayer printed wiring board, a conductor circuit is formed in advance on a plurality of substrates constituting the multilayer printed wiring board, and these boards are bonded to each other so as to cope with mounting of highly integrated electronic components. . An example of such a multilayer printed wiring board is disclosed in Japanese Patent Laid-Open No. 59-201449.
There is a "semiconductor chip carrier package" disclosed in the publication.
【０００４】この担体パッケージは，「第１絶縁層と，
前記第１絶縁層内に穿孔を形成する手段と，前記第１絶
縁層の表面にボンディングしたチップ接続層と，前記チ
ップ接続層内にチップ保持用凹所を形成する手段と，前
記チップ接続層の下側で前記穿孔内を延在する熱伝導物
質からなるベースであって少なくとも部分的に前記凹所
を横断して延在し前記凹所内に装着される集積回路チッ
プと，熱伝導状態で接触する様に構成されるベースと，
前記チップ接続層から延在しており前記凹所の外側に存
在するコンタクトアレイとを有する」ものである。しか
し，凹所内に集積回路チップ，すなわち電子部品をどの
ように「装着」するのかは開示されていない。This carrier package has a "first insulating layer,
Means for forming perforations in the first insulating layer, a chip connecting layer bonded to the surface of the first insulating layer, means for forming a chip holding recess in the chip connecting layer, and the chip connecting layer An integrated circuit chip mounted in the recess, wherein the base is made of a heat conductive material and extends at least partially across the recess underneath A base configured to contact,
A contact array extending from the chip connection layer and outside the recess ”. However, there is no disclosure of how to "mount" the integrated circuit chip, or electronic component, within the recess.
【０００５】一般に，各導体回路にボンディングされた
電子部品は，そのままでは機械的強度に劣ったり，湿気
等に弱いためにその周囲を封止しなければならない。し
かも，この封止は，当該多層プリント配線板が完成され
た場合には，それ程厚いものであってはならない。電子
部品の高密度化に伴って，この種の多層プリント配線板
の実装密度も高めなければならないからである。In general, the electronic components bonded to the respective conductor circuits are inferior in mechanical strength as they are and are weak against moisture and the like, so that the periphery thereof must be sealed. Moreover, the encapsulation should not be so thick when the multilayer printed wiring board is completed. This is because the packaging density of this type of multilayer printed wiring board must be increased as the density of electronic components increases.
【０００６】このような封止は，通常，各導体回路にボ
ンディングされた電子部品の周囲に，適宜な樹脂等を滴
下してなされるが，この滴下はその量がまちまちであっ
て，滴下した後の表面が平坦になっているとは限らな
い。平坦になっていないと，完成後の多層プリント配線
板に，その他の各種電子部品を組み込む場合に障害とな
ることがある。当該多層プリント配線板上に電子部品を
実装する場合のスペースは限られているからである。[0006] Such encapsulation is usually done by dropping a suitable resin or the like around the electronic components bonded to the conductor circuits. However, the amount of this dropping varies, and The rear surface is not always flat. If it is not flat, it may be an obstacle when incorporating various other electronic components into the completed multilayer printed wiring board. This is because the space for mounting electronic components on the multilayer printed wiring board is limited.
【０００７】しかしながら，上記の特開昭５９−２０１
４４９号公報には，このような要望に応えるような開示
は全くない。また，特開昭６０−５７９９９号公報に
は，「絶縁板上に導体パターンを設けて積層した配線基
板の各面の一部を階段状に露出させ，かつ露出させた部
分に導体パターンと接続する導体パッドを設けたことを
特徴とする多層配線板」が示されている。しかし，上記
問題点及びその解決策は何ら示されていない。However, the above-mentioned Japanese Patent Laid-Open No. 59-201.
There is no disclosure in Japanese Patent Publication No. 449 that meets such a demand. Further, Japanese Patent Application Laid-Open No. 60-57999 discloses that "a part of each surface of a wiring board in which a conductor pattern is provided on an insulating plate and laminated is exposed in a stepwise manner, and the exposed portion is connected to the conductor pattern. A multilayer wiring board characterized in that it is provided with a conductive pad. However, none of the above problems and their solutions are shown.
【０００８】[0008]
【解決しようとする課題】上記のごとく，多層プリント
配線板においては，限られたスペース内に各種電子部品
を搭載する必要がある。そのため，高密度実装に当たっ
ては，電子部品を封止する場合における封止樹脂の突出
は大きな問題である。As described above, in a multilayer printed wiring board, it is necessary to mount various electronic components in a limited space. Therefore, in high-density mounting, the protrusion of the sealing resin when encapsulating an electronic component is a serious problem.
【０００９】本発明は，かかる従来の問題点に鑑み，簡
単な構造により，限られたスペースを有効に使用でき，
高密度実装を十分可能にすることのできる多層プリント
配線板を提供しようとするものである。In view of the above conventional problems, the present invention has a simple structure and can effectively use a limited space.
An object of the present invention is to provide a multilayer printed wiring board that can sufficiently realize high-density mounting.
【００１０】[0010]
【課題の解決手段】本発明は，電子部品搭載用の搭載部
及び導体回路を形成した基板に，前記搭載部に対応する
開口部及び導体回路が形成された少なくとも一つの基板
を積層することによって形成され，上記搭載部の内部に
は電子部品が搭載されていると共に該電子部品の周囲が
封止樹脂により封止されている多層プリント配線板にお
いて，前記各基板の内の最外層に位置する基板におけ
る，前記開口部近傍に位置する表面側には，段状端部又
は突起部分により構成された封止樹脂流出防止用の開口
段部を形成し，かつ封止樹脂は上記段状端部又は突起部
分まで注入されていることを特徴とする多層プリント配
線板にある。According to the present invention, by laminating at least one substrate on which an opening and a conductor circuit corresponding to the mounting portion are formed, on a substrate on which a mounting portion for mounting an electronic component and a conductor circuit are formed. In the multilayer printed wiring board that is formed and has an electronic component mounted inside the mounting portion and the periphery of the electronic component is sealed with a sealing resin, the multilayer printed wiring board is positioned at the outermost layer of each substrate. On the surface side of the substrate located near the opening, an opening step for preventing the sealing resin from flowing out is formed by a stepped end portion or a protruding portion, and the sealing resin is the stepped end portion. Alternatively, the multilayer printed wiring board is characterized in that the protrusions are also injected.
【００１１】本発明において最も注目すべきことは，最
外層に位置する基板における，前記開口部近傍に位置す
る表面側には，開口段部が形成されていること，また必
要に応じて封止樹脂が該開口段部まで充填されることで
ある。What is most noticeable in the present invention is that an opening step portion is formed on the surface side of the substrate located in the outermost layer in the vicinity of the opening portion, and if necessary, sealing is performed. That is, the resin is filled up to the opening step portion.
【００１２】本発明における多層プリント配線板は，１
又は複数の基板からなっている。これらの各基板は，樹
脂によって形成したものが主として使用されるが，必要
に応じてセラミックス等も使用可能である。樹脂を使用
した場合には加工性の面から優れている。また，多層プ
リント配線板を構成する各基板には所定の導体回路が形
成されている。そして，各基板を，接着層を介して交互
に積層した後加圧接着することによって，当該多層プリ
ント配線板が形成される。The multilayer printed wiring board according to the present invention comprises 1
Alternatively, it is composed of a plurality of substrates. Each of these substrates is mainly made of resin, but ceramics or the like can be used if necessary. When a resin is used, it is excellent in workability. In addition, a predetermined conductor circuit is formed on each of the substrates forming the multilayer printed wiring board. Then, the respective substrates are alternately laminated via the adhesive layer and then pressure-bonded to form the multilayer printed wiring board.
【００１３】これら各基板の内，最下端に位置するもの
は，その略中央部に電子部品を搭載するための搭載部が
形成してある。この搭載部を有する基板の上に積層され
ている各基板の中央部には，上記搭載部に対応し，かつ
上方に位置するに従って順次大きくなるような開口部が
それぞれ形成してある。Of these substrates, the one located at the lowermost end has a mounting portion for mounting electronic components formed in its substantially central portion. At the central portion of each substrate laminated on the substrate having the mounting portion, an opening corresponding to the mounting portion and gradually increasing in size as it is positioned above is formed.
【００１４】開口段部は，例えば，この開口段部を有す
る基板の開口部より大きな開口面積を有している。これ
によって，この開口段部は開口部に連続しており，最下
端に位置する基板の搭載部に連続する空間を形成してい
る。また，このような開口段部を開口部に連続するもの
を形成することによって，当該基板内には略直角な段状
端部が形成されるのである。The opening step portion has, for example, a larger opening area than the opening portion of the substrate having the opening step portion. As a result, the opening step portion is continuous with the opening portion and forms a continuous space with the board mounting portion located at the lowermost end. Further, by forming such an opening step portion which is continuous with the opening portion, substantially stepwise end portions are formed in the substrate.
【００１５】また，この開口段部は，開口部の内方上部
に当該開口部内に向けて突出する突起部分を形成して実
施してもよい。勿論，この開口段部は，上記突起部分
と，段状端部との両方が形成されるようなものであって
もよい。Further, the opening step portion may be implemented by forming a protrusion portion projecting toward the inside of the opening portion at an upper part inward of the opening portion. Of course, the opening step portion may be such that both the protruding portion and the stepped end portion are formed.
【００１６】このような開口段部を形成した後にあって
は，当該多層プリント配線板の中央部に全体として逆ピ
ラミッド状の凹所が形成されるが，最下端に位置する搭
載部内に電子部品を搭載した後この電子部品と各導体回
路とをボンディングワイヤによって接続し，当該凹所内
に封止樹脂を滴下することによって封止がされる。ま
た，本発明における多層プリント配線板は，ピングリッ
ドアレイ用基板であって，各導体回路に電気的に接続さ
れる多数の導体ピンを有しているものであっても良い。After forming such an opening step portion, an inverted pyramid-shaped recess is formed as a whole in the central portion of the multilayer printed wiring board, but electronic parts are placed in the mounting portion located at the lowermost end. After mounting, the electronic component and each conductor circuit are connected by a bonding wire, and sealing resin is dropped into the recess for sealing. The multilayer printed wiring board according to the present invention may be a pin grid array substrate having a large number of conductor pins electrically connected to each conductor circuit.
【００１７】上記段状端部又は突起部からなる開口段部
を形成するに当たっては，実施例に示すごとく，例えば
下記の工程により行う。 （ａ） 電子部品搭載用の搭載部及び導体回路を有した
基板と，この基板の上側に配置されて最外層となる基板
と，これら両基板間に必要に応じて介装されて前記搭載
部に対応する開口部及び導体回路を有した少なくとも一
つの中間基板とを，接着層を介して互いに加圧接着する
工程； （ｂ） このように加圧接着した各基板を貫通するスル
ーホールを形成して，このスルーホールにメッキを施す
工程； （ｃ） 前記最外層となる基板の表面に導体回路を形成
する工程； （ｄ） 前記最外層に位置する基板の表面にザグリ加工
等により前記搭載部を外部に通じさせる開口部及び開口
段部を形成する工程。The formation of the opening step portion composed of the stepped end portion or the projecting portion is performed, for example, by the following steps as shown in the embodiment. (A) A substrate having a mounting portion for mounting electronic components and a conductor circuit, a substrate which is disposed on the upper side of this substrate and serves as an outermost layer, and the mounting portion which is interposed between these substrates as necessary. Pressure-bonding at least one intermediate substrate having an opening and a conductor circuit corresponding to each other to each other through an adhesive layer; (b) forming a through hole penetrating each pressure-bonded substrate. And then plating the through holes; (c) forming a conductor circuit on the surface of the outermost substrate; (d) mounting the conductor circuit on the surface of the outermost substrate. A step of forming an opening and an opening step for communicating the part to the outside.
【００１８】[0018]
【作用及び効果】上記のように構成した多層プリント配
線板にあっては，まず搭載部内に電子部品を実装する。
次いで，ボンディングワイヤにより，電子部品と各導体
回路との電気的接続を行った後，逆ピラミッド状の凹所
内に封止樹脂を滴下して充填する。[Operations and Effects] In the multilayer printed wiring board having the above-mentioned structure, the electronic parts are first mounted in the mounting portion.
Next, after electrically connecting the electronic component and each conductor circuit with a bonding wire, a sealing resin is dropped and filled in the recess of the inverted pyramid shape.
【００１９】このとき，余剰となった封止樹脂は，開口
段部において表面張力が働き，盛り上がるようになる。
ところが，この開口段部は，上記段状端部又は突起部分
であり，該開口段部は当該基板の表面より低い位置にあ
る。そのため，盛り上がった封止樹脂の上端は基板の表
面より上になることはない。At this time, the surplus sealing resin is swelled due to surface tension acting on the opening step.
However, the opening step portion is the stepped end portion or the protruding portion, and the opening step portion is located at a position lower than the surface of the substrate. Therefore, the upper end of the raised sealing resin does not rise above the surface of the substrate.
【００２０】また，この封止樹脂は，当該開口段部内に
溜まったままの状態となって，基板の表面から出ること
はない。The sealing resin remains in the opening step portion and does not come out of the surface of the substrate.
【００２１】また，単に封止樹脂を滴下して樹脂封止を
完成させる場合だけではなく，その上に更に封止板を載
置して封止樹脂の突出を完全に防止する場合には，上記
段状端部は便利である。つまり，封止板によって基板の
表面を平坦にする場合には，この封止板を開口段部に係
止させるのみでよいから，その取付けが非常に容易にな
る。Further, not only when the sealing resin is simply dropped to complete the resin sealing, but when a sealing plate is further placed thereon to completely prevent the sealing resin from protruding, The stepped end is convenient. That is, when the surface of the substrate is flattened by the sealing plate, this sealing plate only needs to be locked to the opening step portion, so that the mounting thereof becomes very easy.
【００２２】以上のようにして，封止樹脂に例え余剰部
分があったとしても，この余剰部分は開口段部によって
吸収されるから，基板の表面から突出することがない。
また，そのため，樹脂封止を行う作業にあって，それ程
注意をすることなく完成することが可能なのである。As described above, even if there is a surplus portion in the sealing resin, the surplus portion is absorbed by the opening step portion and therefore does not protrude from the surface of the substrate.
Further, therefore, it is possible to complete the resin sealing work without paying much attention to it.
【００２３】以上のごとく，本発明に係る多層プリント
配線板にあっては，その最外層に位置する基板に，上記
段状端部又は突起部分からなる開口段部を形成してあ
る。そのため，搭載された電子部品を樹脂封止するに際
して，余剰の封止樹脂が基板の表面から突出することが
ない。As described above, in the multilayer printed wiring board according to the present invention, the opening step portion formed of the stepped end portion or the protruding portion is formed on the substrate located at the outermost layer. Therefore, when sealing the mounted electronic component with resin, excess sealing resin does not project from the surface of the substrate.
【００２４】また，封止樹脂の突出防止策も簡単な構造
である。したがって，本発明によれば，簡単な構造によ
り限られたスペースを有効に使用でき，高密度実装を十
分可能にすることができる多層プリント配線板を提供す
ることができる。Further, the measure for preventing the protrusion of the sealing resin has a simple structure. Therefore, according to the present invention, it is possible to provide a multilayer printed wiring board that can effectively use a limited space with a simple structure and can sufficiently realize high-density mounting.
【００２５】[0025]
【実施例】本発明の実施例について，図１〜図１１を用
いて説明する。図１には本実施例に係る多層プリント配
線板１００の平面斜視図が示してある。この実施例にお
ける多層プリント配線板１００は，図２に示したよう
に，合計４枚の基板１０からなっている。Embodiments of the present invention will be described with reference to FIGS. FIG. 1 shows a plan perspective view of a multilayer printed wiring board 100 according to this embodiment. The multilayer printed wiring board 100 in this embodiment is composed of a total of four substrates 10 as shown in FIG.
【００２６】これらの各基板１０は，樹脂によって形成
したものが主として使用されるが，必要に応じてセラミ
ックス等も使用可能である。樹脂を使用した場合には加
工性の面から優れている。Each of these substrates 10 is mainly made of resin, but ceramics or the like can be used if necessary. When a resin is used, it is excellent in workability.
【００２７】また，多層プリント配線板１００を構成す
る各基板１０には所定の導体回路１５が形成されてい
る。上記各基板１０を接着層１４と交互に積層した後加
圧接着することによって，当該多層プリント配線板１０
０が形成される。Further, a predetermined conductor circuit 15 is formed on each substrate 10 which constitutes the multilayer printed wiring board 100. The multilayer printed wiring board 10 is formed by alternately stacking the substrates 10 and the adhesive layer 14 and then pressure-bonding the substrates.
0 is formed.
【００２８】これら各基板１０の内，最下端に位置する
ものは，図２に示したように，その略中央部に電子部品
２０を搭載するための搭載部１１が形成してある。この
搭載部１１を有する基板１０の上に順次積層されている
各基板１０の中央部には，上記搭載部１１に対応し，か
つ上方に位置するに従って順次大きくなるような開口部
１２がそれぞれ形成してある。As shown in FIG. 2, the substrate located at the lowermost end of each of the substrates 10 has a mounting portion 11 for mounting the electronic component 20 at the substantially central portion thereof. An opening 12 is formed in the central portion of each substrate 10 sequentially stacked on the substrate 10 having the mounting portion 11 so as to correspond to the mounting portion 11 and increase in size as it is positioned above. I am doing it.
【００２９】そして，図２に示したような多層プリント
配線板１００を構成し，かつ最外層に位置する基板１０
の開口部１２の近傍に位置する表面には，本実施例の要
部を構成する開口段部１３が形成してある。The substrate 10 constituting the multilayer printed wiring board 100 as shown in FIG. 2 and located at the outermost layer.
On the surface located in the vicinity of the opening 12 of the above, an opening step portion 13 forming the main part of this embodiment is formed.
【００３０】開口段部１３は，図２に示したように，こ
の開口段部１３を有する基板１０の開口部１２より大き
な開口面積を有している。この開口段部１３は，段状端
部１３ｃにより開口部１２と略直角状に連続している。
また，開口段部１３は，最下端に位置する基板１０の搭
載部１１に連続する空間を形成している。As shown in FIG. 2, the opening step portion 13 has a larger opening area than the opening portion 12 of the substrate 10 having the opening step portion 13. The opening step portion 13 is continuous with the opening portion 12 at a substantially right angle by the stepped end portion 13c.
In addition, the opening step portion 13 forms a space continuous with the mounting portion 11 of the substrate 10 located at the lowermost end.
【００３１】なお，この開口段部１３は図１０に示した
ように，開口部１２の内方上部に当該開口部１２内に向
けて突出する突起部分１３ｄであってもよい。また，こ
の開口段部１３は，図１１に示したように，上述した突
起部分１３ｄと，段状端部１３ｃとの両方であってもよ
い。As shown in FIG. 10, the opening step portion 13 may be a protruding portion 13d which is protruded toward the inside of the opening portion 12 at the upper inside of the opening portion 12. Further, as shown in FIG. 11, the opening step portion 13 may be both the above-mentioned protruding portion 13d and the stepped end portion 13c.
【００３２】このような開口段部１３を有する開口部１
２は，当該多層プリント配線板１００の中央部に全体と
して逆ピラミッド状の凹所を形成する。そして，図７に
示すごとく，最下端に位置する搭載部１１内に電子部品
２０を搭載した後，この電子部品２０と各導体回路１５
とをボンディングワイヤ２１によって接続する。その
後，当該凹所内に封止樹脂２２を滴下することによって
封止する。The opening portion 1 having such an opening step portion 13
2 forms an inverted pyramid-shaped recess as a whole in the central portion of the multilayer printed wiring board 100. Then, as shown in FIG. 7, after the electronic component 20 is mounted in the mounting portion 11 located at the lowermost end, the electronic component 20 and each conductor circuit 15 are mounted.
Are connected by a bonding wire 21. After that, the sealing resin 22 is dropped into the recess for sealing.
【００３３】上記多層プリント配線板１００は，ピング
リッドアレイ用基板であって，各導体回路１５に電気的
に接続される多数の導体ピンを有している。これら各導
体ピン１７は，多層プリント配線板１００の所定部分に
多数のスルーホール１６を形成し，このスルーホール１
６内に導体層１６ａをメッキによって形成した後に，そ
の支持部１７ａを例えば強制嵌合することによって，当
該多層プリント配線板１００に固定されている。The multilayer printed wiring board 100 is a pin grid array substrate and has a large number of conductor pins electrically connected to each conductor circuit 15. Each of these conductor pins 17 has a large number of through holes 16 formed in a predetermined portion of the multilayer printed wiring board 100.
After the conductor layer 16a is formed in 6 by plating, the support portion 17a is fixed to the multilayer printed wiring board 100 by, for example, forcibly fitting.
【００３４】次に，上記多層プリント配線板１００の製
造方法について説明する。この製造方法は主として次の
（ａ）〜（ｄ）の各工程からなっている。 （ａ） まず，図３に示したように，電子部品収納用の
搭載部１１及び導体回路１５を有した基板１０と，この
基板１０の上側に配置され最外層となる基板１０と，こ
れらの両基板１０の間に必要に応じて介装されて搭載部
１１に対応する開口部１２及び導体回路１５を有した少
なくとも一つの基板１０とを，各基板１０の裏面等に形
成した接着層１４を介して互いに加圧接着する工程があ
る。Next, a method of manufacturing the multilayer printed wiring board 100 will be described. This manufacturing method mainly includes the following steps (a) to (d). (A) First, as shown in FIG. 3, a substrate 10 having a mounting portion 11 for accommodating electronic parts and a conductor circuit 15, a substrate 10 disposed on the upper side of the substrate 10 and serving as an outermost layer, and At least one substrate 10 having an opening 12 corresponding to the mounting portion 11 and a conductor circuit 15 interposed between both substrates 10 as necessary, and an adhesive layer 14 formed on the back surface or the like of each substrate 10. There is a step of pressure-bonding to each other via.
【００３５】勿論，最外層となる基板１０以外の基板１
０については，その各搭載部１１及び開口部１２のそれ
ぞれを，下から上に向かって順次大きくなるように形成
しておく。これにより，電子部品２０と各導体回路１５
とのボンディングワイヤ２１による接続を容易に行え
る。Of course, the substrate 1 other than the substrate 10 which is the outermost layer
As for 0, the respective mounting portions 11 and the opening portions 12 are formed so as to be sequentially increased from bottom to top. As a result, the electronic component 20 and each conductor circuit 15
The connection with the bonding wire 21 can be easily performed.
【００３６】また，各基板１０のための接着層１４は，
各基板１０の裏面に予め塗布しておくことも可能である
が，接着層１４に対応するシート状の材料を別途用意し
ておき，このシートを各基板１０間に介装して加圧接着
するようにしてもよい。The adhesive layer 14 for each substrate 10 is
It is also possible to apply it on the back surface of each substrate 10 in advance, but a sheet-like material corresponding to the adhesive layer 14 is prepared separately, and this sheet is interposed between the substrates 10 and pressure-bonded. You may do it.
【００３７】（ｂ） そして，このように加圧接着した
各基板１０を同時に貫通する多数のスルーホール１６を
形成して，このスルーホール１６にメッキを施して当該
スルーホール１６内に導体層１６ａを形成する。(B) Then, a large number of through holes 16 are formed at the same time so as to penetrate through the respective pressure-bonded substrates 10, and the through holes 16 are plated to form conductor layers 16a in the through holes 16. To form.
【００３８】（ｃ） このようなスルーホール１６を形
成した各基板１０の内の最外層に位置する基板１０の表
面に導体回路１５を形成する。 （ｄ） 以上のように接合して，必要な導体回路１５を
形成した各基板１０の最外層に位置する基板の表面に，
開口部１２及び開口段部１３を形成する。この開口段部
１３を形成する手段としては種々な方法があるが，本発
明を実施するにあたっては次のようにした。(C) The conductor circuit 15 is formed on the surface of the substrate 10 which is the outermost layer of the substrates 10 having the through holes 16 formed therein. (D) On the surface of the substrate located on the outermost layer of each substrate 10 on which the necessary conductor circuits 15 are formed by joining as described above,
The opening 12 and the opening step 13 are formed. There are various methods for forming the opening step portion 13, but the following was carried out in implementing the present invention.
【００３９】すなわち，図３に示したように，まず当該
開口段部１３となる部分を有する基板１０に対して，溝
部１３ａを形成しておき，これによって当該基板１０内
で突出する突起部１３ｂを形成しておく。このように形
成した基板１０を，その突起部１３ｂが既に積層されて
いる各基板１０の搭載部１１あるいは開口部１２に対向
するように積層する。このように積層完了後の突起部１
３ｂを有する基板１０に対して，ザグリ加工等によって
当該突起部１３ｂを取り除く。That is, as shown in FIG. 3, first, the groove portion 13a is formed in the substrate 10 having the portion to be the opening step portion 13, and thereby the protrusion portion 13b protruding in the substrate 10 is formed. Is formed. The substrate 10 thus formed is laminated so that the protrusion 13b faces the mounting portion 11 or the opening 12 of each substrate 10 on which the protrusions 13b are already laminated. Thus, the protrusion 1 after the stacking is completed.
The protrusion 13b is removed from the substrate 10 having 3b by counterboring or the like.
【００４０】この開口部１２は後述のように封止樹脂２
２の流れ止めを行うためのものであるから，図９に示し
たように開口部１２よりも大きいものとする場合だけで
なく，これとは逆に図１０に示すように，開口部１２よ
りも小さいものとなるように形成してもよい。この場合
には，前述した突起部分１３ｄが形成されるのである。
また，図１１に示したように，突起部分１３ｄと段状端
部１３ｃとの両方が含まれるように形成するようにして
もよい。This opening 12 is provided with the sealing resin 2 as described later.
Since it is for preventing the flow of No. 2, not only when it is made larger than the opening 12 as shown in FIG. 9, but conversely, as shown in FIG. May be formed to be small. In this case, the above-mentioned protruding portion 13d is formed.
Further, as shown in FIG. 11, it may be formed so as to include both the protruding portion 13d and the stepped end portion 13c.
【００４１】以上のように，開口部１２及び開口段部１
３を形成する工程を，最外層に位置する基板１０の表面
に導体回路１５を形成した後に行うようにしたのは，当
該導体回路１５を形成するに際して基板１０の表面に大
きな開口部があると，この開口部からエッチング液等が
侵入して搭載部１１等を所期の状態に保持することがで
きないからである。As described above, the opening 12 and the opening step 1
The step of forming 3 is performed after the conductor circuit 15 is formed on the surface of the substrate 10 located at the outermost layer, because when the conductor circuit 15 is formed, a large opening is formed on the surface of the substrate 10. The reason is that the etching solution or the like enters through this opening and the mounting portion 11 and the like cannot be held in a desired state.
【００４２】（ｅ） なお，以上のように開口部１２及
び開口段部１３を形成した後に，ニッケルメッキ及び金
メッキが施されたスルーホール１６内に導体ピン１７を
強制嵌合することによって植設して，図２に示したごと
き本実施例に係る多層プリント配線板１００を完成する
のである。(E) After forming the opening 12 and the opening step 13 as described above, the conductor pin 17 is forcibly fitted into the nickel-plated and gold-plated through hole 16 to be planted. Then, the multilayer printed wiring board 100 according to this embodiment as shown in FIG. 2 is completed.
【００４３】次に，本例の作用について説明する。ま
ず，上記のように構成した多層プリント配線板１００に
あっては，搭載部１１内に電子部品２０を実装してボン
ディングワイヤ２１による当該電子部品２０と各導体回
路１５との電気的接続を行う。その後，逆ピラミッド状
の凹所内に封止樹脂２２を滴下して充填する。この滴下
された封止樹脂２２の内の余剰部分は，図７に示したよ
うな状態となる。Next, the operation of this example will be described. First, in the multilayer printed wiring board 100 configured as described above, the electronic component 20 is mounted in the mounting portion 11 and the bonding wire 21 electrically connects the electronic component 20 to each conductor circuit 15. . After that, the sealing resin 22 is dropped and filled in the recess of the inverted pyramid shape. The surplus portion of the dropped sealing resin 22 is in a state as shown in FIG.
【００４４】すなわち，余剰となった封止樹脂２２は，
開口段部１３の段状端部１３ｃ部分において表面張力が
働くようになり，この段状端部１３ｃを起点にして盛り
上がるようになる。ところが，この段状端部１３ｃは当
該基板１０の表面より低い位置にあるから，盛り上がっ
た封止樹脂２２の上端は基板１０の表面より上になるよ
うなことはない。That is, the excess sealing resin 22 is
Surface tension acts on the stepped end portion 13c of the opening stepped portion 13, and rises from the stepped end portion 13c as a starting point. However, since the stepped end portion 13c is located at a position lower than the surface of the substrate 10, the raised upper end of the sealing resin 22 does not go above the surface of the substrate 10.
【００４５】また，この封止樹脂２２が更に余剰となっ
た場合には，図９に示したように，封止樹脂２２の一部
が段状端部１３ｃを乗り越えることもあり得るが，開口
段部１３は開口部１２よりも十分大きい開口であるから
この封止樹脂２２の一部は当該開口段部１３内に溜まっ
たままの状態となって，基板１０の表面から出ることは
ない。When the sealing resin 22 becomes excessive, a part of the sealing resin 22 may get over the stepped end portion 13c as shown in FIG. Since the step portion 13 is an opening sufficiently larger than the opening portion 12, a part of the sealing resin 22 remains in the opening step portion 13 and does not come out of the surface of the substrate 10.
【００４６】また，単に封止樹脂２２を滴下して樹脂封
止を完成させる場合だけではなく，その上に更に封止板
２３を載置して封止樹脂２２の突出を完全に防止する場
合に，この開口段部１３は便利である。つまり，図８に
示したように，封止板２３によって基板１０の表面を平
坦にする場合に，この封止板２３を開口段部１３に係止
させるのみでよいから，その取付けが非常に容易にな
る。Further, not only when the sealing resin 22 is simply dropped to complete the resin sealing, but also when the sealing plate 23 is further mounted thereon to completely prevent the sealing resin 22 from protruding. Moreover, this opening step portion 13 is convenient. That is, as shown in FIG. 8, when the surface of the substrate 10 is flattened by the sealing plate 23, the sealing plate 23 only needs to be locked to the opening step portion 13, so that the mounting is very easy. It will be easier.
【００４７】以上のようにして，封止樹脂２２に例え余
剰部分があったとしても，この余剰部分は開口段部１３
によって吸収されるから，基板１０の表面から突出する
ことがない。また，そのため，樹脂封止を行う作業にあ
って，それ程注意をすることなく完成することが可能な
のである。As described above, even if there is a surplus portion in the sealing resin 22, this surplus portion is left in the opening step portion 13
Therefore, it does not project from the surface of the substrate 10. Further, therefore, it is possible to complete the resin sealing work without paying much attention to it.
【００４８】次に本例の効果について説明する以上，詳
述した通り，本例に係る多層プリント配線板１００にあ
っては，その最外層に位置する基板１０に，上記段状端
部１３ｃ又は突起部分１３ｄからなる開口段部１３を形
成してある。そのため，搭載された電子部品２０を樹脂
封止するに際して，余剰の封止樹脂２２が基板１０の表
面から突出することがない。As described above in detail, in the multilayer printed wiring board 100 according to the present embodiment, the substrate 10 located at the outermost layer thereof has the stepped end portion 13c or An opening step portion 13 composed of a protruding portion 13d is formed. Therefore, when sealing the mounted electronic component 20, the excess sealing resin 22 does not project from the surface of the substrate 10.
【００４９】また，封止樹脂の突出防止策も簡単な構造
である。したがって，本例によれば簡単な構造により，
限られたスペースを有効に使用することができ，高密度
実装を十分可能にすることができる多層プリント配線板
１００を提供することができる。Further, the measure for preventing the protrusion of the sealing resin is also a simple structure. Therefore, according to this example, with a simple structure,
It is possible to provide a multilayer printed wiring board 100 that can effectively use a limited space and can sufficiently realize high-density mounting.
【図１】実施例に係る多層プリント配線板の表面斜視
図。FIG. 1 is a front perspective view of a multilayer printed wiring board according to an embodiment.
【図２】図１のＡ−Ａ線に沿って見た部分拡大縦断面
図。FIG. 2 is a partially enlarged vertical sectional view taken along the line AA of FIG.
【図３】実施例に係る製造方法の各工程を示す断面図。FIG. 3 is a sectional view showing each step of the manufacturing method according to the embodiment.
【図４】実施例に係る製造方法の各工程を示す断面図。FIG. 4 is a sectional view showing each step of the manufacturing method according to the embodiment.
【図５】実施例に係る製造方法の各工程を示す断面図。FIG. 5 is a sectional view showing each step of the manufacturing method according to the embodiment.
【図６】実施例に係る製造方法の各工程を示す断面図。FIG. 6 is a sectional view showing each step of the manufacturing method according to the embodiment.
【図７】実施例において，電子部品に封止樹脂による封
止を行った状態を示す断面図。FIG. 7 is a cross-sectional view showing a state in which an electronic component is sealed with a sealing resin in the example.
【図８】実施例において，封止樹脂の上に更に封止板を
覆蓋した状態の断面図。FIG. 8 is a cross-sectional view showing a state in which a sealing plate is further covered on the sealing resin in the example.
【図９】実施例における他の状態を示す，図７に対応し
た部分断面図。FIG. 9 is a partial sectional view corresponding to FIG. 7, showing another state in the embodiment.
【図１０】開口段部の他の実施例を示す部分拡大断面
図。FIG. 10 is a partially enlarged sectional view showing another embodiment of the opening step portion.
【図１１】開口段部の他の実施例を示す部分拡大断面
図。FIG. 11 is a partially enlarged sectional view showing another embodiment of the opening step portion.
１０．．．基板 １００．．．多層プリント配線板， １１．．．搭載部， １２．．．開口部， １３．．．開口段部， １３ｃ．．．段状端部， １３ｄ．．．突起部分， １４．．．接着層， １５．．．導体回路， １６．．．スルーホール， ２０．．．電子部品， ２１．．．ボンディングワイヤ， ２２．．．封止樹脂， ２３．．．封止板， 10. ． ． Substrate 100. ． ． Multilayer printed wiring board, 11. ． ． Mounting part, 12. ． ． Opening, 13. ． ． Opening step, 13c. ． ． Stepped end, 13d. ． ． Protruding portion, 14. ． ． Adhesive layer, 15. ． ． Conductor circuit, 16. ． ． Through hole, 20. ． ． Electronic components, 21. ． ． Bonding wire, 22. ． ． Sealing resin, 23. ． ． Sealing plate,
Claims (3)
形成した基板に，前記搭載部に対応する開口部及び導体
回路が形成された少なくとも一つの基板を積層すること
によって形成され，上記搭載部の内部には電子部品が搭
載されていると共に該電子部品の周囲が封止樹脂により
封止されている多層プリント配線板において， 前記各基板の内の最外層に位置する基板における，前記
開口部近傍に位置する表面側には，段状端部又は突起部
分により構成された封止樹脂流出防止用の開口段部を形
成し，かつ封止樹脂は上記段状端部又は突起部分まで注
入されていることを特徴とする多層プリント配線板。1. A mounting board for mounting an electronic component and a board having a conductor circuit formed thereon, and at least one board having an opening and a conductor circuit corresponding to the mounting section formed on the board. In a multilayer printed wiring board in which an electronic component is mounted inside the part and the periphery of the electronic component is sealed with a sealing resin, the opening in the board located in the outermost layer of each of the boards An opening step for preventing outflow of the sealing resin, which is composed of a stepped end or a protruding portion, is formed on the surface side near the stepped portion, and the sealing resin is injected to the stepped end or the protruding portion. A multilayer printed wiring board characterized by being provided.
によって形成したことを特徴とする多層プリント配線
板。2. The multilayer printed wiring board according to claim 1, wherein each of the substrates is made of resin.
多層プリント配線板は，ピングリッドアレイ用基板であ
ることを特徴とする多層プリント配線板。3. The multilayer printed wiring board according to claim 1 or 2, wherein the multilayer printed wiring board is a pin grid array substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4355953A JPH07101775B2 (en) | 1992-12-18 | 1992-12-18 | Multilayer printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4355953A JPH07101775B2 (en) | 1992-12-18 | 1992-12-18 | Multilayer printed wiring board |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60297417A Division JPS62156847A (en) | 1985-12-28 | 1985-12-28 | Multilayer printed circuit board and manufacture thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0722755A true JPH0722755A (en) | 1995-01-24 |
| JPH07101775B2 JPH07101775B2 (en) | 1995-11-01 |
Family
ID=18446580
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4355953A Expired - Lifetime JPH07101775B2 (en) | 1992-12-18 | 1992-12-18 | Multilayer printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07101775B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1996027900A1 (en) * | 1995-03-07 | 1996-09-12 | Nitto Denko Corporation | Method of production of semiconductor device and sealing pellet used for the method |
| JP2009176894A (en) * | 2008-01-23 | 2009-08-06 | Panasonic Corp | Optical semiconductor device |
| JP2009289790A (en) * | 2008-05-27 | 2009-12-10 | Japan Radio Co Ltd | Printed wiring board with built-in component and its manufacturing method |
| JP2023511424A (en) * | 2020-01-24 | 2023-03-17 | ローベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング | A method for potting a sensor housing and an open containment chamber of the sensor housing |
-
1992
- 1992-12-18 JP JP4355953A patent/JPH07101775B2/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1996027900A1 (en) * | 1995-03-07 | 1996-09-12 | Nitto Denko Corporation | Method of production of semiconductor device and sealing pellet used for the method |
| US5976916A (en) * | 1995-03-07 | 1999-11-02 | Nitto Denko Corporation | Method of producing semiconductor device and encapsulating pellet employed therein |
| JP2009176894A (en) * | 2008-01-23 | 2009-08-06 | Panasonic Corp | Optical semiconductor device |
| JP2009289790A (en) * | 2008-05-27 | 2009-12-10 | Japan Radio Co Ltd | Printed wiring board with built-in component and its manufacturing method |
| JP2023511424A (en) * | 2020-01-24 | 2023-03-17 | ローベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング | A method for potting a sensor housing and an open containment chamber of the sensor housing |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07101775B2 (en) | 1995-11-01 |
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