JPH07221263A - Semiconductor device - Google Patents

Abstract

PURPOSE:To provide, at low cost, a semiconductor device whose reliability is high by eliminating concentrated stress on a wiring terminal for the semiconductor device. CONSTITUTION:Out of wiring terminals 6a, 6b connecting semiconductor chips 1 to terminal metal fittings 9, every wiring terminal 6a arranged near the center and deformed largely when a case 8 is deformed is formed in such a way that it is given a deformation-tolerance amount which is larger than that of every wiring terminal 6b near the periphery while the length of the upper-side part is made different from that of the lower-side part of the C-bend part. Thereby, stresses in wiring-terminal soldered parts 2a, 2b due to the deformation of the case 8 are made uniform; a crack is hardly caused in the soldered parts due to the concentration of the stresses; and the high thermal reliability of the semiconductor device is obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an internal insulation type semiconductor module, and more particularly to a semiconductor device suitable for a package type power semiconductor module having a relatively large current capacity.

[0002]

2. Description of the Related Art A semiconductor module in which a plurality of semiconductor chips are built in and packaged is widely used for consumer use to industrial use.
Moreover, it is often required to have sufficiently high reliability even in a fairly bad thermal environment.

Therefore, as an example of a semiconductor module type capable of meeting such a demand, a semiconductor chip laminated on a supporting substrate surface sealed by a container with an insulating plate interposed between the supporting substrate surface and the supporting substrate surface of the container. And a terminal fitting arranged in a substantially parallel flat portion, and electrical connection between the semiconductor chip and the terminal fitting in the container is performed through a plurality of wiring terminals. A semiconductor device is known. According to this, a semiconductor chip is bonded to a supporting substrate that also functions as a heat sink only through a relatively thin insulating plate, so that it is possible to perform efficient cooling even though it is an internal insulation type. In addition to the fact that the wiring terminals can be directly soldered to the conductor layer on the insulating plate, it becomes possible to easily handle large currents with high reliability. And High power semiconductor module of the switching frequency, in particular widely used such as a power semiconductor module using IGBT (insulated gate bipolar transistor) as a semiconductor element.

Therefore, an example of a conventional semiconductor device of such a power semiconductor module is shown in FIG.
This will be described with reference to (a) and (b). Note that FIG. 8A shows a side cross section, and FIG. 8B shows an internal plane.
In these drawings, 1 is a semiconductor chip (semiconductor element), 2 is a conductor layer, 3 is an insulating plate, 4 is a metal layer, 5 is a support substrate, 6 is a wiring terminal, 7 is a bonding wire, and 8
Is a case, 8a is a side plate portion of the case, 9 is a terminal fitting for connecting an external conductor, and 10 is a sealing material.

The insulating plate 3 is made of an insulating material such as alumina, and has a conductor layer 2 having a wiring pattern formed on one surface (upper surface) thereof as shown in FIG. 8 (a). And
The other surface (lower surface) is provided with a metal layer 4 for enabling bonding with a brazing material such as solder.

A plurality of semiconductor chips 1 such as IGBTs are brazed to predetermined portions of the wiring pattern formed on the conductor layer 2 of each insulating plate 3 by soldering, and the metal layer 4 is further supported. It is laminated on the support substrate 5 by being brazed to the substrate 5. Then, these semiconductor chips 1 are further wired to predetermined portions of the wiring pattern by bonding wires 7 such as Al (aluminum) wires.

The support substrate 5 also functions as a heat sink for dissipating the heat generated in the semiconductor chip 1. Therefore, the support substrate 5 is made of a Cu (copper) material or a Cu alloy material having good heat conductivity. The supporting substrate 5 is generally attached to a predetermined cooling fin in a mounted state to radiate heat. However, the supporting substrate 5 itself has fins and is cooled. It may be configured to double as a fin.

The wiring terminal 6 connects a predetermined portion of the wiring pattern formed on the conductor layer 2 to each external lead wire connection terminal fitting 9 provided on the surface (upper surface) of the case 8. For this reason, as shown in FIG. 8 (a), there is a bent portion called a C bend in the shape of the letter C, and after connection, the wiring terminal soldering portion 2c
The stress applied to the C bend is relaxed at the C bend portion.

The case 8 constitutes a container of a semiconductor device, and is made of a predetermined insulating material such as plastic into a bottomless box shape having a side plate portion 8a. The inside is sealed. At this time, the inside of the case 8 is filled with a sealing material 10 such as silicon gel to coat the internal elements including the semiconductor chip 1 and prevent moisture and the like from entering the inside. There is.

In such a semiconductor device, as shown in FIG.
As shown in (b), the plane shape is generally made rectangular, and as shown in the figure,
The sides e and f of the support substrate 5 have different dimensions,
e> f.

As a publicly known example related to this type of technique, there is JP-A-4-316353.

[0012]

The above-mentioned prior art does not take into consideration the deformation of the case due to temperature changes and the like. Therefore, as will be described below, the reliability of the connection portion of the wiring terminals is improved. There was a problem with retention.

That is, in such a semiconductor device, due to temperature change appearing in the semiconductor device itself due to its operation and stop, temperature change given from the outside under a thermally harsh operating environment, and the like, The expansion and contraction of the encapsulant filled inside the semiconductor device is repeated, and the deformation of the case due to this repeatedly applies stress to the soldered parts of each wiring terminal, and the soldered parts of the wiring terminals that receive stress concentration are There is a risk of fracture. Therefore, it is necessary to consider the amount of deformation of the sealing material in each part of the semiconductor device and the stress generated in the soldered part of each wiring terminal due to the difference in arrangement position.

On the other hand, in a semiconductor device having such a plurality of semiconductor chips, there are a plurality of insulating plates corresponding to them, and the wiring terminals must be taken out from each insulating plate, so that they are present inside. The wiring terminals are arranged at various positions in the semiconductor device. As a result,
The stress due to the thermal deformation of the encapsulant is concentrated on the soldered portions of the wiring terminals arranged near the center of the semiconductor device, and the probability of disconnection is high.

On the other hand, in a power semiconductor module (especially IGBT module), which has been required to have a large capacity and a high switching frequency year after year, it is necessary to increase the cross-sectional area of the wiring terminal due to the potential drop caused by the wiring resistance. However, increasing the cross-sectional area further increases the stress.

Therefore, there is a limit to reducing the stress of all the wiring terminals in the semiconductor device, and the uniform stress generated in the soldered portion of each wiring terminal in the semiconductor device is reliable in the thermal environment. Has become important in securing.

Here, the deformation of the semiconductor device due to temperature change will be described with reference to FIGS. 9 (a) and 9 (b). In addition,
9 (a) is a horizontal cross section, and FIG. 9 (b) is a vertical cross section. When the temperature rises and the sealing material 10 filled in the case 8 expands, the case 8 deforms, and the upper ends of the wiring terminals 6 (the ends connected to the terminal fittings 9) move upward. As a result, the soldering portion 2c of the wiring terminal 6 is stressed.

At this time, the case 8 is deformed by the side plate portion 8a.
Therefore, as shown in the figure, the deformation amount in the central portion of the surface (upper surface) of the case 8 becomes large, and this portion becomes curved. Therefore, the deformation amount of the wiring terminal 6 arranged near the center of the case 8 is equal to that of the wiring terminal 5 arranged near the periphery.
It becomes larger than the deformation amount of c, and a high value of stress is applied to the soldered portion 2c.

An example of calculation of the amount of deformation at this time is as follows. The internal dimensions of the case 8 are 10 mm in height and 110 in length.
mm, width 60 mm, and this is from -40 ℃ to +150 ℃
When the temperature is changed to, the wiring terminals arranged near the center become 0.082 mm upward, and the wiring terminals arranged at the periphery become 0.073 mm upward. About 13% increase.

However, in the prior art, no consideration is given to such a point, and since the wiring terminals having the same shape are arranged, the soldered portion of the wiring terminals arranged near the center of the case is arranged. Stress concentrates on the surface of the steel, and there is a risk of premature cracking due to repeated temperature changes, leading to rupture, making it difficult to maintain reliability.

An object of the present invention is to eliminate the concern of stress concentration at the wiring terminals of a semiconductor device and provide a highly reliable semiconductor device at low cost.

[0022]

According to one aspect of the present invention, the above object is to use wiring terminals having different deformation adaptation amounts, and to arrange a wiring terminal having a large deformation adaptation amount in a portion which receives a large deformation amount. It is achieved by Specifically, the purpose is to make the length of the C-bend portion of the wiring terminal arranged near the center where the amount of deformation is large larger than the length of the C-bend portion of the wiring terminal arranged near the periphery. Achieved,
Alternatively, in the wiring terminal arranged near the center where the deformation amount is large, one of the lengths of the upper portion and the lower portion of the C-bend portion is made longer.

According to another aspect of the present invention, the object is to change the area of the soldering portion for each wiring terminal so that the soldering portion for the wiring terminal arranged near the center where the deformation amount is large is This is achieved by making the area larger than the soldered portion for the wiring terminal arranged at.

[0024]

According to one aspect of the present invention, the wiring terminals having different deformation adaptation amounts are arranged according to the degree of deformation of the case, and as a result, the stress generated in the soldered portion of each wiring terminal is uniform. As a result, the risk of breakage due to stress concentration on specific wiring terminals is eliminated, and sufficiently high reliability can be obtained.

According to another aspect of the present invention, a soldering portion having a wide joint area is previously provided for a wiring terminal arranged near the center where a large stress is applied by the deformation of the case. As a result, the stress received per unit area at the soldered part is made uniform, so there is no risk of breakage due to stress concentration on specific wiring terminals, and sufficiently high reliability is achieved. Obtainable.

Further, as a result of these, it is possible to prevent the occurrence of early cracks in the solder layer for connecting wiring terminals, and to extend the life of the semiconductor device.

[0027]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The semiconductor device according to the present invention will be described in detail below with reference to some embodiments shown in the drawings. First, Fig. 1
Is a first embodiment of the present invention, in which the present invention is implemented as a power semiconductor module for an inverter device, for example. In the embodiment of FIG. 1, 6a is a wiring terminal arranged near the center of the inside, 6b is a wiring terminal arranged near the periphery, and 2a is a wiring terminal arranged near the center. 6a is a soldering part to which is joined,
Reference numeral 2b is a soldering portion to which the wiring terminals 6b arranged in the vicinity of the periphery are joined, and other configurations are the same as those of the conventional technique shown in FIG. In addition, also in this embodiment, FIG.
Shows a lateral cross section, and FIG. 6 (b) shows an internal plane.

Each of the wiring terminals 6a and 6b has a C-bend as in the prior art. However, in this embodiment, as clearly shown in FIG. 1 (a), In the wiring terminal 6a arranged near the center, the lengths of the upper portion and the lower portion of the C bend portion are changed,
As shown, the upper portion is longer. As a result, the length of the entire connection conductive path of the wiring terminal 6a is about 1.1 times the length of the wiring terminal 6b arranged near the periphery.

Further, in this embodiment, as clearly shown in FIG. 1B, the areas of the soldering portions 2a and 2b are changed, and the soldering to the wiring terminal 6a arranged near the center is performed. The area of the portion 2a is made larger than the area of the soldering portion 2b for the wiring terminals 6b arranged in the vicinity of the periphery.

Next, in this embodiment, the wiring terminal C
The reason for changing the length of the upper portion of the bend portion will be described below. First, FIG. 2 shows the details of the wiring terminals 6a and 6b. Hereinafter, this will be used as an analytical model for the stress generated in the soldered portion, and the lower end portion of the wiring terminal having a C bend length of L will be described. Will be fixed and the stress generated in the soldered portion when the uppermost portion is forcibly displaced will be evaluated. At this time, the width W of the C-bend portion of the wiring terminal was 1.0 mm, the thickness T was 1.2 mm, and the amount of deformation was assumed to remain within the elastic deformation region.

FIG. 3 shows the relationship between the stress σ generated in the wiring terminal soldered portion obtained by this analysis and the C-bend length L. Assuming that the stress σ generated in the soldered portion is large and the C-bend length L is unchanged, the stress σ increases as the displacement amount increases.

Therefore, the wiring terminal 6a and the wiring terminal 6b
Assuming that the wiring terminals having the same C-bend length L are used, a stress of 1.13σ is generated in the soldered portion of the wiring terminal 6a depending on the deformation amount of the case 8, whereas the wiring terminal is At the soldered portion 6b, only a stress of σ is generated. .

Therefore, in the embodiment shown in FIG. 1, a wiring terminal having a stress relaxation shape in which the C-bend length L thereof is increased by 10% is adopted as the wiring terminal 6a near the center. The resulting stress can be reduced by 13%, and as a result, the stress generated in the soldered portions of the wiring terminals arranged at the positions where the deformation amounts of the case 8 are different can be made uniform, and the thermal reliability can be improved. It is possible to obtain a semiconductor device with high efficiency.

As a result, there is no possibility that a crack will occur only in the solder layer of the soldering portion of the specific wiring terminal and the life of the semiconductor device will be affected. In this respect as well, a semiconductor with high thermal reliability is obtained. The device can be obtained.

Next, FIG. 4 shows the relationship between the width W of the wiring terminal and the stress σ generated in the wiring terminal soldering portion. This Figure 4
The deformation amount of the case 8, that is, the displacement amount of the upper end of the wiring terminal,
It shows the magnitude of the stress σ generated in the soldered portion of the wiring terminal when the wiring terminal width W is changed while the C bend length L is kept constant, and the width W of the wiring terminal is 3 W. In such a case, the stress generated in the wiring terminal soldered portion becomes 1.2σ, and it is understood that the stress generated in the wiring terminal soldered portion also increases as the wiring terminal width W increases.

Therefore, in order to reduce the stress generated in the wiring terminal soldered portion, it can be achieved by narrowing the wiring terminal width W. However, in this case, the wiring resistance is increased and the allowable current value is increased. Therefore, it is not preferable to apply this method to the wiring terminals of the semiconductor device.

FIG. 5 shows the relationship between the wiring terminal thickness T and the stress σ generated in the wiring terminal soldering portion. This Figure 5
When only the wiring terminal thickness T is changed without changing the deformation amount of the case 8 and the C bend length L, the wiring terminal thickness T is set to 3T.
The stress generated in the soldered part of the wiring terminal is 1.5
It can be seen that when the wiring terminal thickness T increases, the stress σ generated in the wiring terminal soldering portion also increases, as in the case where the wiring terminal width W is changed.

Therefore, the stress generated in the soldered portion of the wiring terminal can be reduced by reducing the thickness T of the wiring terminal. However, even in this case, the wiring resistance increases and the allowable current value decreases. It is also unfavorable to apply this method to the wiring terminals of the semiconductor device because of concern.

Next, another embodiment of the present invention will be described. FIG. 6 shows an embodiment of a wiring terminal in which the length of the upper portion of the C bend portion and the length of the lower portion of the C bend portion are changed.
L1 is the C bend upper length, and L2 is the C bend lower length. The relationship between these lengths is L1 ≧ in this embodiment.
It is set to L2.

Next, FIG. 7 shows the wiring terminal solder when the length L2 is changed while the length L1 of the wiring terminal shown in FIG. 6 is kept constant and the ratio of the length L1 to the length L2 is changed. It shows the change of stress σ generated in the attached part, and the width W of the wiring terminal is 5 m.
m, the thickness T of the wiring terminal is 1.2 mm, it is assumed that the deformation is within the elastic region, and σ is the stress generated in the wiring terminal soldered portion when the ratio of L1 and L2 is 1: 1. . Then, the peak of the stress at this time occurs in the front portion A of the wiring terminal soldering portion in FIG.

Therefore, L2 is shortened and L1: L2 is 1:
If it is set to 0.5, the stress generated in the wiring terminal soldering portion at this time is 0.2σ and 1: 1 as shown in the figure.
The value is much smaller than that of. At this time, since the peak of stress is generated in the central portion B of the wiring terminal soldering portion of FIG. 6, cracks are less likely to occur in the solder layer in this portion, and stress relaxation is less likely to occur. Considered to be effective.

Next, when L2 is further shortened and L1: L2 is set to 1: 0.3, on the contrary, the stress generated in the soldered portion of the wiring terminal becomes 1.4σ, and L1: L2 becomes 1:
Since the stress value is larger than in the case of 1, and the stress peak also occurs in the rear portion C of the wiring terminal soldering portion in FIG. 6, it is feared that it may cause a solder crack. Therefore, in this case, , It is considered that it is not effective for stress relaxation.

Next, the wiring terminal deformation mechanism when the C bend upper length L1 of the wiring terminal is fixed and the C bend lower length L2 is changed will be described in more detail below. When the uppermost part of the wiring terminals in FIG. 6 is forcibly displaced upward, first, when L1: L2 is 1: 1,
The amount of deformation is shared and absorbed by the C bend upper part, the C bend lower part, and the C bend bending part D. The deformation of the lower portion of the C bend at this time also affects the soldered portion, and the rear portion C of the soldered portion serves as a fulcrum to lift the front portion A of the soldered portion. Therefore, the peak of stress occurs in the front part A of the soldered part.

Next, when L1: L2 is 1: 0.5,
Since L2 is as short as about 1/2 of L1, and the rigidity is higher than that of L1, the deformation of the lower portion of the C bend is minute. And the amount of deformation is C bend upper part, and C
The bend bending portion D shares and is absorbed. As described above, as a result of the deformation of the lower part of the C bend becoming minute, almost uniform stress is generated in the soldering portion, and the center portion B of the soldering portion
Although a peak of stress is generated at, it becomes a very small peak.

When L1: L2 is 1: 0.3, the C bend lower length L2 is about 1/3 of L1, which is shorter than that of L1: L2 being 1: 0.5. Since the point of action of the stress further approaches the C-bend bending portion D, the deformation that should be absorbed by the C-bending bending portion D also affects the wiring terminal soldering portion, and this time before the soldering portion. The portion A serves as a fulcrum to lift the rear portion C of the soldered portion, and as a result, a stress peak occurs in the rear portion C of the soldered portion.

From the above, regarding the stress relaxation of the wiring terminal, the ratio L1: L2 of the length of the C-bend upper portion L1 and the length of the C-bend lower length L2 of the wiring terminal is optimally 1: 0.5. It turns out that

As a result of the above, in the embodiment shown in FIG. 1, the wiring terminal 6a arranged near the center is L1:
A wiring terminal of L2 = 1: 0.5 was adopted, and a wiring terminal of L1: L2 = 1: 1 was adopted as the wiring terminal 6b arranged in the periphery. Therefore, according to this embodiment, the stress generated in the soldered portions of the wiring terminals, which are given different amounts of displacement due to the deformation of the case 8, is equalized, so that the thermal reliability is improved. Since a high semiconductor device can be obtained and the life of the semiconductor device is less likely to be affected by the solder crack of a specific wiring terminal, a semiconductor device with high thermal reliability can be obtained in this respect as well.

Further, in this embodiment, for the wiring terminals 6b arranged in the periphery, the length of the entire connecting conductive path can be shortened, so that the resistance and reactance can be suppressed to be small, and the characteristic A good semiconductor device can be obtained.

By the way, in the above embodiment, the length of the upper portion of the C bend portion is made longer than that of the lower portion, that is, the shape of the bent portion formed by the C bend portion is changed. Although a large deformation adaptation amount is given to the wiring terminal 6a arranged near the center, conversely, the length of the lower portion of the C bend portion is made longer than the length of the upper portion to cause large deformation. An adaptation amount may be provided, or the length of the upper portion and the lower portion of the C-bend portion may be kept the same and the length of the entire C-bend portion may be increased, that is, A large deformation adaptation amount may be given by changing the size of the bent portion formed of the C-bend portion.

Further, the change of the dimension at this time is not limited to the change of the length of the bent portion formed of the C-bend portion, and the change of the width W and the thickness T shown in FIG. Alternatively, it may be provided by changing the material of the wiring terminal.

Next, as described above, in the embodiment of FIG. 1, the areas of the soldering portions 2a, 2b are changed, and the soldering portion 2a for the wiring terminal 6a arranged near the center is formed.
Area of the wiring terminal 6b located near the periphery
It is made wider than the area of the soldering portion 2b with respect to.

Correspondingly, for each wiring terminal 6a among the wiring terminals, the width w and the length l (L) of the soldering portion shown in FIG. 2 are made large, and as a result, ,
The adhesion area w × l between the wiring terminal 6a and the soldering portion 2a is widened.

Therefore, according to this embodiment, since the joint area between the wiring terminal and the conductor layer 2 which is easily affected by the deformation of the case 8 is widened, the solder bonding strength at this portion is increased. The effect of stress generated in the wiring terminal soldered portion can be reduced, and as a result, a semiconductor device having high thermal reliability can be obtained.

As a result, in the wiring terminal 6a having a large adhesive area w × l, even if the stress applied to the terminal itself becomes large, the stress can be prevented from changing per unit area of the adhesive surface. Further, it becomes possible to make the stress uniform on the solder joint surface of each wiring terminal having a different deformation amount, and also in this respect, a semiconductor device having sufficiently high thermal reliability can be obtained.

[0055]

According to the present invention, it is possible to make the probability of occurrence of cracks in the wiring terminal soldering portion due to temperature change, which is one of the major causes of failure of the semiconductor device, uniform among a plurality of terminals.
Furthermore, since it is possible to prevent local solder cracks from being generated, it is possible to easily obtain a highly reliable semiconductor device.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing an embodiment of a semiconductor device according to the present invention.

FIG. 2 is an enlarged perspective view showing an embodiment of a wiring terminal according to the present invention.

FIG. 3 is a characteristic diagram showing an analysis result of stress with respect to a length of a bent portion of a wiring terminal in an example of the present invention.

FIG. 4 is a characteristic diagram showing an analysis result of stress with respect to a width of a bent portion of a wiring terminal in an example of the present invention.

FIG. 5 is a characteristic diagram showing an analysis result of stress with respect to a thickness of a bent portion of a wiring terminal in an example of the present invention.

FIG. 6 is an enlarged plan view showing another embodiment of the wiring terminal according to the present invention. [FIG. 6] is a side view cross-section showing deformation of a semiconductor device due to temperature change.

FIG. 7 is a characteristic diagram showing an analysis result of stress with respect to a ratio of a length of a bent portion of a wiring terminal in an example of the present invention.

FIG. 8 is an explanatory diagram showing a conventional example of a semiconductor device.

FIG. 9 is an explanatory diagram showing a deformed state of the case of the semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 semiconductor chip (semiconductor element) 2 conductor layers 2a, 2b soldering part 3 insulating plate 4 metal layer 5 support substrate 6a wiring terminals arranged near the center 6b wiring terminals arranged near the periphery 7 bonding wire 8 case 8a case Side plate part 9 Terminal fittings for connecting external conductors 10 Sealing material

Claims (4)

[Claims] 1. A semiconductor chip laminated on a surface of a supporting substrate sealed by a container with an insulating plate interposed therebetween, and a terminal fitting arranged on a plane portion of the container substantially parallel to the surface of the supporting substrate. In the semiconductor device in which the electrical connection between the semiconductor chip and the terminal fitting in the container is made via a plurality of wiring terminals having a bent portion, the deformation adaptation by the bent portion is adapted. A semiconductor device characterized in that wiring terminals having different amounts are used, and wiring terminals having a large deformation adaptation amount are arranged in a portion which receives a large amount of displacement due to deformation of the container. 2. The semiconductor device according to claim 1, wherein the change of the deformation adaptation amount is given by changing the shape of the bent portion. 3. The semiconductor device according to claim 1, wherein the change of the deformation adaptation amount is given by changing the dimension of the bent portion. 4. A semiconductor chip laminated on a surface of a supporting substrate sealed by a container with an insulating plate interposed therebetween, and a terminal fitting arranged on a plane portion of the container substantially parallel to the supporting substrate surface. In the semiconductor device, wherein the electrical connection between the semiconductor chip and the terminal fitting in the container is performed via a plurality of wiring terminals, in the semiconductor chip side of the wiring terminals By changing the area of the joint, the area of the joint with respect to the wiring terminals arranged in a portion that receives a large displacement due to the deformation of the container is made wider than the area of the joint with respect to the wiring terminals arranged in other portions. A semiconductor device characterized by the above.