JPH07221030A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form a low-dislocation density compound semiconductor layer on a semiconductor single crystal substrate by forming a dislocation block layer in the middle of a first compound semiconductor layer using second compound semiconductor and third compound semiconductor and arranging the second compound semiconductor and the third compound semiconductor alternately in a filamentary. CONSTITUTION:A GaAs layer 9a is gown on a silicon substrate 8. Then, a superlattice buffer layer 10 is grown. The bottommost layer, the bottom layer and the third layer from the bottom of the superlattice buffer layer 10 constituted of four layers are constituted of filamentary dislocation block layers 10a and 10c. The filamentary dislocation block layers 10a and 10c are formed by forming InxGa1-xAs layers 11 and 13, which are the second compound semiconductor, and InyGa1-yAs layers 12 and 14, which are the third compound semiconductor, in a filamentary form and alternately arranging them.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a compound semiconductor layer grown on a semiconductor single crystal substrate.

[0002]

2. Description of the Related Art When a compound semiconductor crystal layer, for example, a gallium arsenide-based crystal layer is grown on a semiconductor single crystal substrate, for example, a silicon substrate, a difference in lattice constant between the silicon substrate and the gallium arsenide-based layer Due to the difference in the coefficient of thermal expansion (difference in internal stress), the dislocation density of the grown gallium arsenide-based layer is extremely high at 10 ^-17 to 10 ^-18 cm ^-2 . This dislocation density far exceeds the maximum dislocation density of 10 ^-4 cm ^-2 required for semiconductor lasers made of gallium arsenide-based materials.

Several attempts have heretofore been made as methods for reducing the dislocation density. FIG. 6 shows an example using a superlattice buffer layer, and FIG. 7 shows an example using selective growth. In the example shown in FIG. 6, a gallium arsenide layer 2, a superlattice buffer layer 3, and a gallium arsenide layer 4 are sequentially crystal-grown on a silicon substrate 1. When the superlattice buffer layer 3 is used, dislocation bending from the semiconductor single crystal substrate (silicon substrate 1) to the upper surface of the gallium arsenide layer 2 is bent especially by using a strained superlattice as the superlattice. On the other hand, when the selective growth shown in FIG. 3 is used, the insulating film 6 (SiO2 or the like) is formed on the silicon substrate 5, and the SiN gallium arsenide layer 7 is provided with an opening in the insulating film 6 only in the portion requiring the opening. The SiN gallium arsenide layer 7 is grown in order to relax the stress in the lateral direction. In addition, there is also one in which dislocation density is reduced by moving dislocations by heat treatment during crystal growth and relaxing internal stress.

[0004]

However, as described above, the use of the superlattice buffer layer 3 alleviates only the dislocations propagating in the vertical direction, while the method by selective growth has a lateral direction. It only relaxed the propagating transitions. Further, the method of moving dislocations by heat treatment cannot control the propagation direction of dislocations, and thus the conventional technique has a problem that the dislocation density of the compound semiconductor layer is reduced only to about 10 −6 cm −2.

The present invention has been made in view of the above problems.
It is an object of the present invention to provide a method for manufacturing a semiconductor device capable of forming a compound semiconductor layer having a low dislocation density on a semiconductor single crystal substrate.

[0006]

In order to achieve the above object, a method of manufacturing a semiconductor device according to claim 1 is a method of manufacturing a semiconductor device having a first compound semiconductor layer crystal-grown on a semiconductor single crystal substrate. In, the dislocation blocking layer is formed in the middle of the first compound semiconductor layer using the second compound semiconductor and the third compound semiconductor, and the second compound semiconductor and the third compound semiconductor are alternately arranged in a thin line shape. It is characterized by.

A method of manufacturing a semiconductor device according to a second aspect is the method of manufacturing a semiconductor device having a first compound semiconductor layer crystal-grown on a semiconductor single crystal substrate, wherein the first compound semiconductor layer is provided in the middle thereof. The dislocation blocking layer is formed by using a second compound semiconductor and a third compound semiconductor, and the first compound semiconductor is arranged in a lattice in the dislocation blocking layer.

According to a third aspect of the present invention, there is provided a method of producing a semiconductor device according to the first aspect, wherein the fourth compound semiconductor layer is irradiated with a holographic interference pattern of light or particle beams. The dislocation blocking layer is formed by changing the molar ratio of the elements forming the fourth compound semiconductor layer.

Further, a method for manufacturing a semiconductor device according to a fourth aspect is the method for manufacturing a semiconductor device according to the second aspect, wherein the fourth compound semiconductor layer is irradiated with a holographic interference pattern and surface electromagnetic waves by light or particle beams. And then the fourth
The dislocation blocking layer is formed by changing the molar ratio of the elements constituting the compound semiconductor layer.

[0010]

[Function] When a compound semiconductor crystal, for example, a gallium arsenide-based crystal is grown on a semiconductor single crystal substrate, for example, a silicon substrate, dislocations are generated due to a lattice constant difference (4% or less) between the silicon substrate and the gallium arsenide-based layer. , Due to the difference in thermal expansion coefficient, internal stress generated in the process of lowering the temperature of the silicon substrate to room temperature in a lattice-matched state at the growth temperature causes
Dislocations occur near the interface and propagate upward. The present invention is 2
Compound semiconductors of different types (second compound semiconductor and third compound semiconductor
Since the transition prevention layer was formed by forming (compound semiconductor) in the plane in the form of thin lines or lattices, it is necessary to prevent the transition from propagating by bending downward the dislocations that occur near the interface and propagate upward. You can In addition, by forming a thin line-shaped or lattice-shaped structure of two different kinds of compound semiconductors (second compound semiconductor and third compound semiconductor) in the plane of the transition prevention layer, it acts in the in-plane direction of the transition prevention layer. Since the stress can be dispersed and relaxed, the propagation of dislocation can be further prevented.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a semiconductor device formed by using the method for manufacturing a semiconductor device of the present invention will be described with reference to FIGS. The example shown in FIGS. 1 and 2 shows an example in which a gallium arsenide layer is grown on a silicon substrate.
2 is a cross-sectional view of the semiconductor device, and FIG. 2 is a perspective view showing the structure of the transition blocking layer of the semiconductor device. The semiconductor device shown in the figure has a GaAs layer 9a on a silicon substrate 8 (single crystal semiconductor substrate).
After growing (the lower part of the first compound semiconductor layer), the superlattice buffer layer 10 is grown. In this embodiment,
The bottom layer of the superlattice buffer layer 10 composed of the four layers and the third layer from the bottom are the thin-line transition prevention layer 1
It is composed of 0a and 10c.

Further, the fine line-shaped transition prevention layers 10a, 10
c is a second compound semiconductor as shown in FIGS. 1 and 2.
There In_xGa_1-xAs layers 11, 13 and the third compound semiconductor
In _yGa_1-yAs layers 12 and 14 are formed in a thin line shape and alternated
Has a structure (fine linear in-plane superlattice structure)
It In_xGa_1-xAs layer 11, 13 and In_yGa_1-yAs layer 12,
Both 14 are InGaAs materials, but the molar ratio of In and Ga is different.
It is a layer. Above the superlattice buffer layer 10, the first compound
The GaAs layer 9b, which is the upper part of the semiconductor layer, is formed.
It

FIG. 3 is a block diagram showing an embodiment of a crystal growth apparatus used in the method for manufacturing a semiconductor device of the present invention. As a crystal growth apparatus, ordinary metal organic vapor phase epitaxy (MOVPE
) Equipment or metalorganic molecular beam epitaxy (MOMBE
) Is a device in which an optical system 19 capable of forming a holographic interference pattern by using a laser 18 on a semiconductor substrate 17 arranged on a sample stage 16 in a crystal growth chamber 15 is used. As shown in FIG. 3, the optical system 19 includes
For example, a laser 18 for emitting a laser beam, lenses 20a and 20b for converging the laser beam, a pinhole 21 for removing an excessive laser beam, a beam splitter 22 for separating the laser beam into two beams, and an irradiation position of the laser beam are set. It is composed of mirrors 23a and 23b for changing, and a view port 24 fixed to the opening 15a formed in the crystal growth chamber 15 and transmitting a laser beam.

Next, using the crystal growth apparatus for generating the holographic interference pattern shown in FIG. 3, the holographic interference pattern is emitted to the InGaAs material which is the fourth compound semiconductor, and as shown in FIGS. 1 and 2. in _x Ga _1-x as layers 11 and 13 having different thin linear molar ratio and in _y Ga _1-y as layer 1
Transition prevention layers 10a, 10 in which 2 and 14 are alternately arranged
A method of forming the structure c will be described with reference to FIG.
(A) is a diagram showing the relationship between the light intensity of the holographic interference pattern and the position on the semiconductor substrate on which the layer of the fourth compound semiconductor is formed. Thus, by periodically forming the holographic interference pattern on the semiconductor substrate, it is possible to form a temperature distribution according to the light intensity distribution on the layer of the fourth compound semiconductor.

FIG. 4B is a diagram showing the relationship between the molar ratio of the group III element of the fourth compound semiconductor layer and the position on the fourth compound semiconductor layer corresponding to the light intensity of the holographic interference pattern. It is shown that different portions are formed alternately corresponding to the period of light intensity. In this embodiment,
As shown in FIGS. 1 and 2, In _x Ga _1-x As layers 11 and 13 and In _y Ga _1-y having different molar ratios of group III elements (In, Ga)
As layers 12 and 14 are formed alternately.

When the layer of the fourth compound semiconductor is not irradiated with the holographic interference pattern, the In _x Ga _1-x As layers 11 and _{1 are} formed.
3 and the In _y Ga _1-y As layers 12 and 14 are the same fourth compound semiconductor layer (InGaAs material), but the fourth holographic interference pattern is applied to the fourth compound semiconductor layer to form a fourth compound semiconductor layer.
When a light intensity distribution, a so-called temperature distribution, is formed on the compound semiconductor layer, the group III raw materials, organometals, trimethylindium (TMI), and trimethylgallium (TMG) are thermally decomposed at their own temperatures and , Becomes gallium and combines with arsenic to form an InGaAs crystal.
The decomposition efficiency of indium and gallium is modulated by the formation of a temperature distribution according to the light intensity, and In
_x Ga _1-x As layers 11, 13 and a third compound semiconductor In _y
Different compound semiconductor layers such as Ga _1-y As layers 12 and 14 grow. Here, since the temperature characteristics of decomposition efficiency of indium and gallium are different, it is possible to freely change the molar ratio of indium and gallium by forming a temperature distribution corresponding to the light intensity. Since the refractive index of the semiconductor material can be largely changed, the amount of stress relaxation can be controlled by locally irradiating light.

On the other hand, the period Λh of the In _x Ga _1-x As layer and the In _y Ga _1-y As layer alternately formed by the holographic interference pattern is such that the wavelength λ of the laser and the layer of the fourth compound semiconductor are irradiated. Angle θ (angle of incidence of the laser beam from the vertical direction, see FIG. 3) and is expressed by the following equation.

[0018]

[Equation 1]

By using a laser having a short wavelength and reducing the angle θ, it is possible to form a fine line-shaped transition blocking layer having a shorter period.

FIG. 5 shows a different embodiment in which a transition blocking layer is formed on the superlattice type buffer layer by the method for manufacturing a semiconductor device according to the present invention. The figure is a perspective view showing the structure of the transition prevention layer, which is obtained by growing the GaAs layer 28a on the silicon substrate 27 and then growing the superlattice buffer layer (the uppermost layer is not shown).
In this embodiment, as in the example shown in FIGS. 1 and 2, the bottom layer 29a of the superlattice buffer layer 29 composed of four layers is used.
And the third third layer 29c from the bottom is composed of lattice-like transition prevention layers 29a and 29c. In this embodiment, the lattice-shaped transition blocking layers 29a and 29c are formed of In _x Ga _1-x As layers 30, which are second compound semiconductors, as shown in FIG.
32 are arranged in a lattice pattern, and the third compound semiconductor, In _y Ga
_{The 1-y} As layers 31 and 33 have a structure (in-plane superlattice structure) in which the lattice-shaped gaps are filled.

Forming lattice-like transition blocking layers 29a and 29c
The structure of the crystal growth apparatus for this is the same as that shown in FIG.
It is like. Ordinary metal-organic vapor phase epitaxy (MOVPE) equipment
Uses a metalorganic molecular beam epitaxy (MOMBE) device
And then use a laser on the substrate to create a holographic interference pattern.
It is a device that incorporates an optical system that can form a lens. here
Differences from the method of forming the thin-line transition prevention layer shown above
Is a lattice-shaped in-plane super
This is the point where a lattice structure is formed. Holographically
With respect to the period Λ h by
Period Λr is In_xGa _1-xAs the real part of the dielectric constant of the active layer material,
Let imaginary part be ε₁, Ε₂Will be shown as follows
Be done. (Jpn.J.Appl.Phys.Vol.32 (1993) 1308).

[0022]

[Equation 2]

As shown in the above equation, the period Λr of the surface electromagnetic wave
Is determined by the wavelength λ, and by using a short-wavelength laser, it becomes possible to form a lattice-like in-plane superlattice structure with a shorter period, and control the relaxation amount of the three-dimensional in-plane stress. It can be performed.

In the above embodiments, the case where the InGaAs material is used is shown as an example of using the III-V group compound semiconductor, but the present invention is not limited to the materials shown in the embodiments. It can also be applied to the case of using a material such as AlGaAs, InGaAsP, InGaP, or a II-VI group compound semiconductor such as ZnSe. Further, in the embodiment, the holographic interference pattern or the surface electromagnetic wave is generated by light, but it may be configured to be generated by a particle beam such as an electron beam or X-ray. Further, in the embodiment, the dislocation blocking layer having the fine line structure or the lattice structure is incorporated in the superlattice buffer layer having a four-stage structure, but the present invention is not limited to the embodiment.

[0025]

As described above, claim 1 or claim 2 is provided.
According to the method for manufacturing a semiconductor device described above, by forming two different types of compound semiconductors in a plane in a thin line shape or a lattice shape, the compound semiconductors are generated near the interface between the semiconductor single crystal substrate and the compound semiconductor layer and propagated upward. Dislocations can be bent downward and internal stress can be relaxed not only in the longitudinal direction but also in the in-plane direction, so that a very high quality compound semiconductor layer with low dislocation density can be formed on a semiconductor single crystal substrate. Can be realized.

According to the semiconductor device manufacturing method of the third or fourth aspect, the in-plane superlattice structure of the first or second aspect is subjected to physicochemical damage such as etching or ion implantation to the semiconductor. Without giving it to the device
A fine line-shaped or lattice-shaped in-plane superlattice structure can be formed by a series of crystal growth steps in the crystal growth chamber.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing an example of a semiconductor device formed by using a method for manufacturing a semiconductor device according to the present invention.

FIG. 2 is a perspective view showing a structure (fine linear in-plane superlattice structure) of a transition blocking layer of the semiconductor device shown in FIG.

FIG. 3 is a configuration diagram showing a schematic configuration of an example of a crystal growth apparatus used in a method for manufacturing a semiconductor device according to the present invention.

FIG. 4 is a diagram illustrating a crystal growth mechanism of a method for manufacturing a semiconductor device according to the present invention.

FIG. 5 is a perspective view showing the structure (lattice-like in-plane superlattice structure) of a different embodiment of the semiconductor device.

FIG. 6 is a cross-sectional view showing an example of a semiconductor device formed by a conventional semiconductor device manufacturing method.

FIG. 7 is a cross-sectional view showing a different example of a semiconductor device formed by a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

8, 27 Silicon substrate (semiconductor single crystal substrate) 9a, 9b GaAs layer (first compound semiconductor layer) 10a, 10c Dislocation blocking layer (fourth compound semiconductor) 29a, 29c Dislocation blocking layer (fourth compound semiconductor) 11, 13 In _x Ga _1-x As layer (second compound semiconductor) 12, 14 In _y Ga _1-y As layer (third compound semiconductor) 28 4th compound semiconductor

Claims (4)

[Claims] 1. A method of manufacturing a semiconductor device having a first compound semiconductor layer crystal-grown on a semiconductor single crystal substrate, wherein a second dislocation blocking layer is provided in the middle of the first compound semiconductor layer.
A method of manufacturing a semiconductor device, which is formed by using a compound semiconductor and a third compound semiconductor, wherein the second compound semiconductor and the third compound semiconductor are alternately arranged in a thin line shape. 2. A method of manufacturing a semiconductor device having a first compound semiconductor layer crystal-grown on a semiconductor single crystal substrate, wherein a second dislocation blocking layer is provided in the middle of the first compound semiconductor layer.
A method for manufacturing a semiconductor device, which is formed by using a compound semiconductor and a third compound semiconductor, wherein the first compound semiconductor is arranged in a lattice in the dislocation blocking layer. 3. A holographic interference pattern of light or particle beams is applied to the fourth compound semiconductor layer to change the molar ratio of elements constituting the fourth compound semiconductor layer to form the dislocation blocking layer. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is manufactured. 4. A holographic interference pattern by light or particle beams and a surface electromagnetic wave are applied to the fourth compound semiconductor layer to change the molar ratio of the elements constituting the fourth compound semiconductor layer to form the dislocation blocking layer. The method for manufacturing a semiconductor device according to claim 2, wherein