JPH07220489A - Data processor and data processing method - Google Patents

Abstract

PURPOSE:To double the writing times of data collating the system information stored during software processing with the check data stored at the time of writing data and skipping the the writing of data. CONSTITUTION:A microprocessor CPU reads out system information stored in each block of a memory EEPROM 1, e.g. the check data (preferable, check sum) derived at the time of writing data to each block, and derives first check information therefrom. The first check information thus derived is then collated with second check information (preferably, check sum) being stored in each block at the time of writing data. Writing of data to each block is then skipped based on the collation results. Writing state of data to each block is diagnosed regardless of the number of times for writing data to each block in order to ensure writing thus doubling the number of times for writing data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data processing method and a data processing apparatus for doubling the apparent number of writes of a memory device having a limited number of writes by software processing.

[0002]

2. Description of the Related Art Conventionally, a memory device having a limited number of times of writing, such as an EEPROM (Electrically Erasabl)
As a method of doubling the number of times of writing of (e Programmable Read-Only Memory) by software processing, there is disclosed in
As described in Japanese Patent No. 323749, an EEPROM
Is divided into a plurality of blocks, and the number of times of writing is recorded at the head of the block. If the number of times of writing set in the EEPROM specifications is equal to the number of times of writing, the next block is used.

[0003]

However, in the above method, when the number of writing times of the EEPROM has a variation in specifications, writing is performed in the already destroyed EEPROM in a portion having lower durability than the specifications. In order to prevent this, it has to be compared with the maximum margin write count, which is the lower limit of the specification variation, and there is a problem that the write count for one block becomes smaller than the specification.

The present invention has been made in order to solve the above problems, and a first object is to provide the same check block as the first check information derived by reading the system information stored in each block. By collating with the stored second check information and limiting the writing of the block,
Even if the allowable write count of each block varies, EEPR
It is to provide a data processing method in which the block can be used until the OM is substantially destroyed.

The second purpose is to read the system information stored in each block, compare the first check information derived with the second check information stored in the block, and write the block. By executing the processing for limiting the number of times, even if the allowable number of times of writing of each block varies, the data processing apparatus can use the block until the EEPROM is substantially destroyed.

A third object is to rewrite the pointer reference value so as to skip the writing of data to each block, so that an unused block can be easily recognized and used when accessing each block by the pointer. It is an object of the present invention to provide a data processing device capable of skipping data access to.

[0007]

A data processing method according to the present invention includes a read step of reading system information stored in each block of a memory device having a limited number of write operations, and a system read by this read step. The derivation step of deriving the first check information from the information, the collation step of collating the second check information stored in each block at the time of writing the data with the first check information, and the collation result by this collation step. And a skip step of skipping writing of data to each block based on the above.

A first data processing apparatus according to the present invention is a first means for reading out system information stored in each block of a memory device having a limited number of times of writing and a system information read out by the reading means. Derivation means for deriving the first check information, the second check information stored in each block at the time of writing the data, and the first check information.
It has a collating means for collating the check information of 1. and a control means for controlling the skip of writing data to each block based on the collating result by this collating means.

In the second data processing apparatus according to the present invention, the control means rewrites the pointer reference value so as to skip the writing of data to each block based on the collation result by the collating means, and does not use the block. It is configured to be a block.

[0010]

In the data processing method of the present invention, the system information stored in each block of the memory device having a limited number of write operations is read, the first check information is derived from the read system information, and the data is written. Sometimes the second check information stored in each block is collated with the derived first check information, data writing to each block is skipped based on the collation result, and the number of data writing to each block is performed. Regardless of the above, the data write state of each block is diagnosed and the data write to each block is guaranteed until the write failure occurs, and the number of times of data write is substantially doubled.

In the first data processor of the present invention,
When the reading means reads the system information stored in each block of the memory device with a limited number of writes,
The derivation means derives the first check information from the read system information, and the collation means collates the second check information stored in each block when writing the data with the derived first check information. , The control means controls the data write skip to each block based on the collation result, regardless of the number of data writes to each block,
The program control is performed so that the data write state of each block is diagnosed and the data write to each block is guaranteed until the write failure occurs, and the number of data write is substantially doubled.

In the second data processing device of the present invention, the control means rewrites the pointer reference value so as to skip the writing of data to each block based on the collation result by the collating means, and the block is an unused block. age,
When a block is accessed to each block, an unused block is easily recognized and data access is skipped to a usable block.

[0013]

【Example】

[First Embodiment] FIG. 1 shows a first embodiment of the present invention.
It is a block diagram explaining the composition of the 2nd data processor.

In the figure, a CPU is a microprocessor, which performs arithmetic operations for character processing, logical decisions, etc., and has an address bus AB, a control bus CB, and a data bus D.
Via B, each component connected to those buses is controlled.

The address bus AB is a microprocessor C
An address signal for instructing a component to be controlled by the PU is transferred. The control bus CB transfers and applies a control signal of each constituent element to be controlled by the microprocessor CPU. The data bus DB transfers data between the constituent devices.

Next, the program memory ROM functions as a read-only fixed memory, and PA is a program area. The work memory RAM is composed of a writable memory medium having a structure of 1 word 16 bits, and is used for temporary storage of various data from each component.

TBUF is a document buffer, keyboard K
It functions as a memory for storing the document information input from B. The DIC 1 is a single kanji input dictionary memory and is used when searching for kanji by radical input, stroke number input, single kanji input, or the like.

The DIC2 is a kana-kanji dictionary memory, which is searched when performing kana-kanji conversion. YBUF is the keyboard K
It functions as a memory for storing the kana reading code input from the kana input key KANA in B.

PREDIC is a prefix (positional classifier) dictionary memory that precedes a number. NUMDIC is a numeric dictionary memory. PSTDIC is a classifier (postfix classifier) dictionary memory.

The keyboard KB is provided with function keys for instructing various functions such as alphabet keys, hiragana keys, katakana keys, and the like, inputting characters for the tail characters, conversion keys, non-conversion keys, and cancel keys.
N is a conversion key, and KANA is a character / symbol input key for inputting reading. Further, BUSHU functions as a key for activating radical input, and the selection key is the display unit CR.
This is a key for selecting the corresponding word from the word candidates displayed in the T window.

DISK stores a document created in a memory for storing a standard document, and the stored document is called when necessary by an instruction of the keyboard KB.
CR is a cursor register, which is a microprocessor CPU
Can read and write the contents of the cursor register CR. The CRT controller CRTC, which will be described later, displays a cursor at a position on the display unit CRT for the address stored here. The display unit CRT is a display device using a cathode ray tube or the like, and the display of the dot configuration pattern and the cursor is controlled by the CRT controller CRTC. The present invention can be applied to the display unit even if it is a liquid crystal display of various display systems. Further, it may be a lightweight, thin, and highly visible FLC display panel using a ferroelectric liquid crystal.

DBUF is a display buffer memory and stores patterns such as document information stored in the document buffer TBUF. MDBUF is a message display buffer memory that stores a pattern of message data MSDAT in the ROM.

The EEPROM 1 is a data memory composed of a memory medium such as an EEPROM, and the memory access to each block is controlled by the microprocessor CPU (controlled according to the procedure shown in a flowchart described later) by a memory writing method described below.

CG is a character generator for storing patterns of characters and symbols displayed on the display CRT.

In the data processing device composed of the respective constituent elements, various document processes are performed in response to various inputs from the keyboard KB. That is, an interrupt signal (not shown) is read by the microprocessor CPU from various control signals stored in the program memory ROM,
Various controls are executed in accordance with those control signals.

In the first data processing apparatus thus constructed, the control means of this embodiment stores the system in each block (see FIG. 2) of the memory device (EEPROM 1) having a limited number of writing operations. The information is read, the first check information is derived from the read system information, the second check information stored in each block at the time of data writing is collated with the derived first check information, and Data write to each block is skipped based on the collation result, and the data write status of each block is diagnosed regardless of the number of data write to each block until the write failure occurs. And program control is performed so as to substantially double the number of times data is written. Processor CPU, a memory EE shown in memory device (in this embodiment where the number of write-in times limit
System information stored in each block of PROM 1),
For example, the check information (preferably CRT value, checksum, etc.) derived at the time of writing data to each block is read, and the first check information (preferably CRT value, checksum, etc.) is read from the read system information. The second check information (preferably CRT value, checksum, etc.) that is derived and stored in each block at the time of writing data is collated with the derived first check information, and based on the collation result, each block is checked. Skipping the writing of data of, regardless of the number of data writing to each block,
Data writing to each block is guaranteed until the data writing state of each block is diagnosed and a writing failure occurs, and the number of times of data writing is substantially doubled.

In the second data processing device of the present invention, the control means rewrites the pointer reference value so as to skip the writing of data to each block based on the collation result by the collating means, and the block is an unused block. In addition, when accessing each block by the pointer, it is configured to easily recognize an unused block and skip data access to a usable block. Specifically, the microprocessor CPU is /
Alternatively, the memory access is started according to the variable information indicating the head access destination of the memory EEPROM1 during the system operation, but the data writing to the normal block by the pointer is performed by determining whether the value stored in the access destination is "0". The microprocessor CPU is configured to be able to determine the destination, and in the check processing shown in FIG. 3, the microprocessor CPU controls steps (1) to (5) and steps (1) to (3) and step (6). ~ (8) control is performed, and in the check process shown in Fig. 4, steps (1) ~
The control of (6) and the control of steps (1) to (4) and steps (7) to (13) are performed, and the error block is skipped to a normal block according to the value of the EEPROM based on the instruction by the pointer. Is configured so that the data access can be efficiently performed.

FIG. 2 is a diagram for explaining the data structure of the EEPROM to which the data processing method of the present invention is applied.

In the figure, reference numeral 21 denotes an EEPROM, which shows a case where write data (write data) 2 is written. CHK is a check byte, and check data for determining the quality of data written in each block, such as CRT value and checksum, is stored as system information. Note that (a) corresponds to the case where the flag of the variable ptr = 0 is "0" because the block BL1 is still writable, and (b) corresponds to the block B.
Since L1 is already in a defective write state, the variable ptr =
A flag of 0 indicates the next block.

In the thus configured EEPROM 21, the CPU of the data processing device (not shown) is EEPROM.
When writing to M21, the write data 2 is verified, and if an error occurs as a result, all the data in that block is copied to the next block, and the data is written to the next block.

Further, at the end of writing, a CRC (Cyclic Redundancy Check) value as a check data, and a value for judging pass / fail of block data such as a checksum are recorded as a check byte CHK1.

When the system is started up, the data of this block is read, and the recorded check data value is compared with the value calculated and derived by the above-described data check calculation algorithm to obtain the block data. Check if the data has been destroyed according to the procedure shown in the flowchart described later.

A flag is provided at the beginning of the block so that the quality of the block can be easily checked.

In this embodiment, a pointer to the beginning of the next block is used instead of the flag.

That is, if the pointer to the head of the next block is "0", the block is usable,
If it is not "0", the block data has been destroyed and becomes a pointer to the next block.

EE for system startup by the method of the present invention
Checking of the PROM 21 and write operation are shown by a flowchart.

FIG. 3 is a flow chart for explaining a check processing procedure at system startup in the data processing method according to the first embodiment of the present invention. In addition, (1) ~
(8) indicates each step, which is stored in a ROM or the like of a data processing device (not shown) and is executed by the CPU of the same device. In addition, in the configuration of the data processing method according to the present invention, the first step is based on the reading step of reading the system information stored in each block of the memory device having a limited number of times of writing, and the system information read by this reading step. Derivation step of deriving the check information of the first check information, the second check information stored in each block at the time of writing the data, and the first check information.
It includes a collating step of collating the check information with the check information and a skip step of skipping writing of data to each block based on the collating result of the collating step, and specifically, the step (6) as the reading step. However, the step (7) corresponds to the derivation step, the step (8) corresponds to the collation step, and the processing after NO in step (8) (the processing to skip writing) corresponds to the skip step.

First, the variable ptr = 0 is set (1). The variable ptr points to the pointer from the beginning of the EEPROM 21.

Next, the variable ptr is read (2) and it is judged whether or not this flag is "0" (3). If it is "0", it means that this block was used when the system was operated last time. The determination is made, and the flow advances to the block data pass / fail check from step (6). In addition, the first time, the variable ptr
The flag of = 0 will be checked.

On the other hand, when the flag is not "0", the flag which has the variable ptr = Base in step (4) is E.
It is checked whether the size is larger than that of the EPROM 21 (5). This flag serves as a pointer to the next block. If the determination is YES, that is, if the pointer points to the end of the last block, it is determined that there is no usable block, and a system error is notified,
If the usable block is determined as a result of the flag check after the processing is completed, the quality of the block data is checked from step (2).

On the other hand, if the judgment in step (3) is YES, all the blocks are read (6) and the checksum is derived from data other than the check data (7).
It is checked whether the calculated value is equal to the checksum value recorded on the EEPROM 21 as data (8). If they are equal, the block data is considered usable and the process ends normally.

On the other hand, in the judgment of step (8), if the derived checksum and the recorded data are not equal,
EEP due to some reason since the system went down last time
Since the ROM may have been destroyed, a system error is notified and the process ends.

In this embodiment, the above step (7)
Although it is described that a checksum is used, any calculation method can be used as long as it can check the validity of data. For example, if the CRC check is used for evaluation, the check data recorded in the block may be used as the CRC value.

FIG. 4 is a flow chart for explaining a data write processing procedure during system operation in the data processing method according to the first embodiment of the present invention. In addition, (1) to (1
3) indicates each step, which is stored in a ROM or the like of a data processing device (not shown) and is executed by the CPU of the device.

When the CPU (not shown) receives the write offset and the write Data of the EEPROM 21, the present invention searches for the write address and receives the received D.
Write ata.

First, the CPU (not shown) is an EEPROM.
When the write offset and the write Data of 21 are received (1), the variable ptr is set to "0" (2). Then, the flag of the variable ptr = Base is read (3),
It is determined whether the flag is "0" (4), if NO, Base (ptr) is set to the variable ptr (5), and it is determined whether the variable ptr is larger than the size of the EEPROM 21 (6). If YES, the processing is ended as system error, and if NO, the processing returns to step (2).
As a result, it is possible to search for usable blocks in the same manner as when starting up.

On the other hand, if the determination in step (4) is YES, that is, if a usable block is found, the received data is Base (ptr) + offset + 1.
And write it as +1 (7).

Here, Base (ptr) + of
The reason for adding +1 like fset + 1 is that there is a 1-byte flag and a pointer to the next block at the beginning of the block as shown in FIG. 1, and the actual data starts from the second byte.

Then, the write data written in the block is rechecked. Read the data from the write address and see if it matches the write data,
A so-called verify check is performed (8). If an error occurs in this check, a pointer to the next block is set at the beginning of this block (9), and it is determined whether or not the next block remains (10).
All the data of the current block is copied to the next block (11), and the process returns to step (7) to execute the data write procedure again from the pointer written at the beginning of the block.

On the other hand, if it is judged in step (10),
If no block remains in the EEPROM, a system error is issued and the process ends.

On the other hand, if the result of the determination in step (8) is YES, that is, if the verify check is normal, all the block data are read to derive the checksum (12), and the checksum is obtained at the end of the block. It is recorded as a checksum value (13), and the fact that the data write operation has been completed normally is indicated by C in the system on the data write request side.
The PU is notified and the process ends.

As described above, according to this embodiment, a memory device having a limited number of writing operations, that is, an EEPROM.
21 reads the system information stored in each block, derives the first check information from the read system information, and writes the second check information stored in each block at the time of writing data (step (7) above). Collate the check information with the derived first check information (step (8) above)
Then, the writing of data to each block is skipped based on the collation result (steps (9) and (10) above to diagnose the data writing state of each block regardless of the number of data writing to each block). By the way, the number of times of data writing is substantially doubled by guaranteeing the data writing to each block until the writing becomes defective. Although it is not specified whether or not to handle the above, the present invention can be applied as it is when it is mapped in the memory of the system.

As shown in FIG.
The present invention can be used even in the case of controlling with the / O port as follows.

FIG. 5 is a schematic diagram showing an example of a circuit to which the data processing method according to the present invention is applied, and corresponds to the case where it is used as an I / O port.

As shown in this figure, the I / O port 10
(I / O port n) is the address port of the EEPROM 21, and I / O port 11 (I / O port n + 1) is E
The data port of the EPROM 21.

In the circuit thus constructed, E
The 1-byte read / write operation from the EPROM 21 may be incorporated into the above memory writing method.

That is, in the data write operation, the step of inhibiting the interrupt process and the EEPRO to the I / O port n are performed.
Setting the offset of M21, adjusting the write timing to the port, and I / O port n +
The step of writing data to 1, the step of adjusting the write timing to the port, and the step of canceling the prohibition of interrupts.

On the other hand, in the read operation, a step of inhibiting interrupt processing, a step of setting an EEPROM offset in the I / O port n, a step of adjusting the write timing to the port, and a data writing in the I / O port n + 1. Are read, the timing of writing to the port is adjusted, and the interruption prohibition is released. [Third Embodiment] In the above embodiment, the device having a limited number of times of writing, particularly the EEPROM, has been described. However, like the CMOS in the RTC, a battery constantly supplies current to retain internal data. Even in the device of the type described above, it is possible to check the battery exhaustion during system operation by verifying the write data when writing the data.

When the system is started up, the block data is checksummed to check whether the recorded data is retained without being destroyed, and the battery is depleted while the system is turned off. be able to.

The present invention may be applied to a system composed of a plurality of devices or an apparatus composed of one device. Further, it goes without saying that the present invention can be applied to the case where it is achieved by supplying a program to a system or an apparatus.

[0061]

As described above, according to the data processing method of the present invention, the system information stored in each block of the memory device having a limited write count is read out from the read system information. The first check information is derived, the second check information stored in each block at the time of data writing is collated with the derived first check information, and the data is written to each block based on the collation result. Since data is skipped, the data write status is guaranteed by diagnosing the data write state of each block and the data write is guaranteed for each block, regardless of the number of data write times for each block, and the number of data writes is substantially doubled. can do.

Further, it is possible to write data until one of the bytes in one block is destroyed without paying attention to the write count specification of the memory device.

According to the first data processing device of the present invention,
When the reading means reads the system information stored in each block of the memory device with a limited number of writes,
The derivation means derives the first check information from the read system information, and the collation means collates the second check information stored in each block when writing the data with the derived first check information. , The control means controls the data write skip to each block based on the collation result, regardless of the number of data writes to each block,
It is possible to perform program control so as to guarantee the data writing to each block and substantially double the number of times of data writing until the data writing state of each block is diagnosed and a writing failure occurs.

According to the second data processing device of the present invention,
The control unit rewrites the pointer reference value so as to skip writing of data to each block based on the collation result by the collating unit and sets the block as an unused block, so that it is easy to access each block by the pointer. It is possible to recognize unused blocks and skip data access to usable blocks.

Therefore, as compared with the data processing device using the conventional memory writing method for managing the total number of writes or the conventional memory writing method for managing the total number of writes, E
While maintaining the reliability of write data for a memory medium such as an EPROM that has a limited number of memory writes,
It has an excellent effect that the number of times of writing can be substantially increased.

[Brief description of drawings]

FIG. 1 is a block diagram illustrating a configuration of first and second data processing devices showing a first embodiment of the present invention.

FIG. 2 is an EEPRO to which the data processing method of the present invention is applied.
It is a figure explaining the data structure of M.

FIG. 3 is a flowchart illustrating a check processing procedure at system startup in the data processing method according to the first embodiment of the present invention.

FIG. 4 is a flowchart illustrating a data write processing procedure during system operation in the data processing method according to the first embodiment of the present invention.

FIG. 5 is a schematic diagram showing an example of a circuit to which the data processing method according to the present invention is applied.

[Explanation of symbols]

 21 EEPROM CPU Microprocessor

Claims (3)

[Claims] 1. A reading step of reading system information stored in each block of a memory device having a limited number of writing operations, and a deriving step of deriving first check information from the system information read by this reading step. ,
A collating step of collating the second check information stored in each block with the first check information at the time of writing data, and a skip step of skipping writing of data to each block based on the collating result of this collating step. And a data processing method comprising: 2. A reading means for reading system information stored in each block of a memory device having a limited number of writing operations, and a deriving means for deriving first check information from the system information read by the reading means. ,
Collation means for collating the second check information stored in each block with the first check information at the time of data writing, and control for controlling data write skip to each block based on the collation result by this collating means. Data processing device having means. 3. The control means rewrites the pointer reference value so as to skip the writing of data to each block based on the collation result by the collating means, and sets the block as an unused block. 2. The data processing device according to 2.