JPH07218580A - Digital ic leg floatage, bridge solder detecting method by in-circuit tester - Google Patents

Digital ic leg floatage, bridge solder detecting method by in-circuit tester

Info

Publication number
JPH07218580A
JPH07218580A JP6026012A JP2601294A JPH07218580A JP H07218580 A JPH07218580 A JP H07218580A JP 6026012 A JP6026012 A JP 6026012A JP 2601294 A JP2601294 A JP 2601294A JP H07218580 A JPH07218580 A JP H07218580A
Authority
JP
Japan
Prior art keywords
digital
pins
input
pin
independent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6026012A
Other languages
Japanese (ja)
Inventor
Takao Miyasaka
隆夫 宮坂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hioki EE Corp
Original Assignee
Hioki EE Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hioki EE Corp filed Critical Hioki EE Corp
Priority to JP6026012A priority Critical patent/JPH07218580A/en
Publication of JPH07218580A publication Critical patent/JPH07218580A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To make no need of a probe exclusively used for a digital IC and carry out inspection at high speed. CONSTITUTION:Regarding digital ICs 30, 32 which are mounted on and soldered with a board and are provided with a plurality of input protective circuits connecting all the electric power source pins 34, 40 to one another and all the ground pins 38, 44 to one another in respectively independent patterns 46, 50 and connecting at least one input pin 42 with one output pin 36 in an independent pattern 48; a.c. or d.c. rated voltage is applied between the independent pattern 48, in which the input and output pins 42, 36 are connected, and either the independent pattern 46 or the independent pattern 50, in which all the electric power source pins 34, 40 or all the ground pins 38, 44 are connected respectively, and the electric current between the patterns 48 and either 46 or 50 is measured. Based on the obtained current value, whether leg floating and bridge soldering exist or not is judged.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はインサーキットテスタを
用いて行うプリント基板に実装半田付けした複数の入力
保護付きデジタルICの足浮き及びブリッジ半田検出方
法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for detecting foot floating and bridge soldering of a plurality of digital ICs with input protection mounted and soldered on a printed circuit board using an in-circuit tester.

【0002】[0002]

【従来の技術】従来、実装基板即ち種々の電子部品を半
田付けしたプリント基板はインサーキットテスタを用い
て、その基板の必要な各測定点に適宜プローブを接触さ
せ、それ等の各部品の電気的測定によって基板の良否の
判定を行っている。特に、被検査基板を載せる測定台上
にX−Yユニットを設置したものは、そのX軸方向に可
動するアームの上に、Y軸方向に可動するZ軸ユニット
を備え、そのZ軸ユニットでプローブをZ軸方向に可動
可能に支持しているので、そのX−Yユニットを制御す
ると、プローブを基板の上方からX軸、Y軸、Z軸方向
にそれぞれ適宜移動して、予め設定した各測定点に順次
接触できる。なお、1部品毎に複数個の測定点を同時に
測定しなければならないので、X−Y方式のインサーキ
ットテスタには通常複数組のX−Yユニットを備え付け
る。
2. Description of the Related Art Conventionally, a printed circuit board, that is, a printed circuit board to which various electronic parts are soldered, uses an in-circuit tester, and a probe is appropriately contacted with each necessary measurement point on the board to electrically connect the parts. The quality of the substrate is determined by dynamic measurement. In particular, the one in which the XY unit is installed on the measuring table on which the board to be inspected is mounted has the Z-axis unit movable in the Y-axis direction on the arm movable in the X-axis direction. Since the probe is supported so as to be movable in the Z-axis direction, when the XY unit is controlled, the probe is appropriately moved in the X-axis, Y-axis, and Z-axis directions from above the substrate to set each preset value. The measurement points can be contacted in sequence. Since it is necessary to simultaneously measure a plurality of measurement points for each component, an XY in-circuit tester is usually equipped with a plurality of sets of XY units.

【0003】このようなインサーキットテスタを用い
て、プリント基板に実装半田付けしたデジタルIC(集
積回路)の半田付け不良によるピンのパターンとの接触
不良、即ち足浮きを検査する場合、図6に示すような先
端部10を拡張し、その先端部10を金属電極12と絶
縁体14との積層体から構成した専用プローブ16を用
いる。そして、検査時には専用プローブ16の先端部1
0をデジタルIC18の本体上面に広く接触させ、他の
通常プローブ20を基板上のパターン22に接触させた
後、ピン24とパターン22との導通状態を知るため、
交流定電圧電源26から両プローブ16、20の間に定
電圧を印加し、電流計28を用いて電流を測定し、その
電流値によって足浮きの有無の判定を行っている。その
際、専用プローブ16とデジタルIC18の本体とで数
PFのコンデンサを形成するため、ピン24とパターン
22との半田付けが良好であれば電流値が大きくなる
が、足浮き状態にあれば電流値が小さくなる。なお、通
常のプローブ20は先端まで全体が細長く、軸方向にス
プリング性を有し、先端を測定点に当て、静荷重を加え
ることによって電気的接触を得るものである。
When using such an in-circuit tester to inspect a contact failure with a pin pattern due to a soldering failure of a digital IC (integrated circuit) mounted and soldered on a printed circuit board, that is, a floating foot, FIG. A dedicated probe 16 in which the tip portion 10 as shown is expanded and the tip portion 10 is composed of a laminated body of a metal electrode 12 and an insulator 14 is used. At the time of inspection, the tip portion 1 of the dedicated probe 16
0 is widely contacted with the upper surface of the main body of the digital IC 18, and another normal probe 20 is contacted with the pattern 22 on the substrate.
A constant voltage is applied between the probes 16 and 20 from the AC constant voltage power source 26, the current is measured using the ammeter 28, and the presence or absence of foot floating is determined by the current value. At this time, since the dedicated probe 16 and the main body of the digital IC 18 form a capacitor of several PF, the current value becomes large if the soldering of the pin 24 and the pattern 22 is good, but the current becomes large if the foot is in a floating state. The value becomes smaller. The general probe 20 is elongated to the tip and has a spring property in the axial direction. The tip is applied to a measurement point and a static load is applied to obtain electrical contact.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、このよ
うな専用プローブ16はプリント基板に実装半田付けし
た種々の電子部品の内、デジタルIC18のピン24と
パターン22との半田付け状態を検査する場合のみに使
用する専用具であるため問題がある。何故なら、他の電
子部品の電気的測定を行なう場合には通常のプローブ2
0を使用するので、デジタルIC18の足浮きの検査の
みに専用プローブ16を必要とするのでは、検査上の負
担が大きくなるからである。特に、X−Y方式インサー
キットテスタではデジタルIC18の足浮きを検査する
場合のみ1組のX−Yユニットに専用プローブ16を装
着しなければならないが、それまで使用していた通常の
プローブ20と専用プローブ16との交換に時間がかか
る。それ故、検査をスピード化できず不都合である。
However, such a dedicated probe 16 is used only when inspecting the soldering state of the pin 24 and the pattern 22 of the digital IC 18 among various electronic components mounted and soldered on the printed circuit board. There is a problem because it is a dedicated tool used for. This is because the normal probe 2 is used when making electrical measurements of other electronic components.
This is because 0 is used, and the inspection probe becomes heavy if the dedicated probe 16 is required only for the inspection of the floating of the digital IC 18. In particular, in the XY type in-circuit tester, the dedicated probe 16 must be attached to one XY unit only when inspecting the floating of the digital IC 18, but with the normal probe 20 used up to that point. It takes time to replace the dedicated probe 16. Therefore, the inspection cannot be speeded up, which is inconvenient.

【0005】因みに、プリント基板に複数のデジタルI
Cを実装する場合には、通常それ等のデジタルICの全
電源ピン間と全グランドピン間をそれぞれ独立パターン
で接続するが、更にデジタルIC間で少なくとも1個の
入力ピンと1個の出力ピンを独立パターンを介して接続
するものが多い。しかも、各デジタルICは通常入力保
護回路を備えている。
Incidentally, a plurality of digital I's are provided on the printed circuit board.
When C is mounted, normally all the power supply pins and all the ground pins of those digital ICs are connected in independent patterns, but at least one input pin and one output pin are further connected between the digital ICs. Many are connected through independent patterns. Moreover, each digital IC usually has an input protection circuit.

【0006】本発明はこのような従来の問題点に着目し
てなされたものであり、デジタルIC間に存在する特有
の接続関係を利用することによって、デジタルICに対
する専用プローブの必要性をなくして、検査をスピード
化できるデジタルICのインサーキットテスタによる足
浮き及びブリッジ半田検出方法を提供することを目的と
する。
The present invention has been made by paying attention to such a conventional problem, and by utilizing a peculiar connection relation existing between digital ICs, the need for a dedicated probe for the digital ICs is eliminated. An object of the present invention is to provide a method for detecting foot floating and bridge solder by an in-circuit tester of a digital IC, which can speed up inspection.

【0007】[0007]

【課題を解決するための手段】上記目的を達成するため
に、本発明によるデジタルICのインサーキットテスタ
による足浮き及びブリッジ半田検出方法では、基板に実
装半田付けし、全電源ピン34、40と全グランドピン
38、44をそれぞれ独立パターン46、50で接続
し、少なくとも1個の入力ピン42と1個の出力ピン3
6を独立パターン48で接続する複数の入力保護回路付
きデジタルIC30、32に対し、上記入出力ピン4
2、36を接続する独立パターン48と、全電源ピン3
4、40を接続する独立パターン46或いは全グランド
ピン38、44を接続する独立パターン50との間に、
交流或いは直流の定電圧を印加して電流を測定し、その
電流値によって足浮き及びブリッジ半田の有無を判定す
る。
In order to achieve the above object, in the method for detecting foot floating and bridge soldering by an in-circuit tester of a digital IC according to the present invention, all the power supply pins 34 and 40 are mounted on a board and soldered. All ground pins 38 and 44 are connected by independent patterns 46 and 50, respectively, and at least one input pin 42 and one output pin 3 are connected.
The input / output pin 4 is connected to a plurality of digital ICs 30 and 32 with an input protection circuit for connecting 6 by an independent pattern 48.
Independent pattern 48 connecting 2 and 36, and all power pins 3
Between the independent pattern 46 connecting 4 and 40 or the independent pattern 50 connecting all the ground pins 38 and 44,
The current is measured by applying a constant voltage of AC or DC, and the presence or absence of foot floating and bridge soldering is determined by the current value.

【0008】[0008]

【作用】上記入力保護回路付きデジタルIC32の入力
ピン内部等価回路は電源ピン40とグランドピン44と
の間に2個のダイオード60、62を各カソードを電源
ピン40の側に向けて直列接続し、入力ピン42と両ダ
イオード60、62の接続点との間に抵抗64を接続し
た構成を備えており、出力ピン内部等価回路は電源ピン
34とグランドピン38との間に2個のダイオード5
2、54を各カソードを電源ピン34の側に向けて直列
接続し、出力ピン36と両ダイオード52、54の接続
点とを直接接続した構成を備えている。それ故、入出力
ピン42、36を接続する独立パターン48と、全電源
ピン34、40を接続する独立パターン46或いは全グ
ランドピン38、44を接続する独立パターン50とに
それぞれプローブを当接して、電源66より交流又は直
流の定電圧を印加すると、その定電圧がダイオード60
又は62と抵抗64との直列回路と、その両端に並列接
続するダイオード52又は54に加わる。
The internal equivalent circuit of the input pin of the digital IC 32 with the input protection circuit has two diodes 60 and 62 connected in series between the power supply pin 40 and the ground pin 44 with their cathodes facing the power supply pin 40 side. , A resistor 64 is connected between the input pin 42 and the connection point of the diodes 60 and 62, and the output pin internal equivalent circuit has two diodes 5 between the power supply pin 34 and the ground pin 38.
2, 54 are connected in series with each cathode facing the power supply pin 34 side, and the output pin 36 and the connection point of both diodes 52, 54 are directly connected. Therefore, the probe is brought into contact with the independent pattern 48 that connects the input / output pins 42 and 36, the independent pattern 46 that connects all the power supply pins 34 and 40, or the independent pattern 50 that connects all the ground pins 38 and 44. When a constant voltage of AC or DC is applied from the power source 66, the constant voltage is applied to the diode 60.
Alternatively, it is added to the series circuit of the resistor 62 and the resistor 64 and the diode 52 or 54 connected in parallel to both ends thereof.

【0009】そこで、定電圧印加回路に電流計68を直
列接続しておくと、それ等の内部回路を通って外部に流
れる電流(合成電流)を測定できる。その際、両プロー
ブが接触する各独立パターン46、48又は48、50
に対する各ピン34、36、40、42又は36、3
8、42、44の半田付けが全て良好に行なわれている
場合の電流と、それ等の各ピン34、36、40、42
又は36、38、42、44の半田付けが1つ又は複数
不良で、足浮き状態にある場合の電流とを比べると、後
者の電流値が2〜3割減少する。しかし、同一デジタル
ICの入力ピン同士或いは出力ピン同士が半田でつなが
っているブリッジ半田の場合には逆に電流値が2〜3割
増加する。この結果、電流値によって足浮き及びブリッ
ジ半田の有無の判定が可能になる。なお、1つの入力ピ
ンに対して複数個の出力ピンを独立パターンで接続する
場合にはダイオードと抵抗との直列回路に、複数個のダ
イオードを並列接続することになり、1つの出力ピンに
対して複数個の入力ピンを独立パターンで接続する場合
にはダイオードに、ダイオードと抵抗との直列回路を複
数個並列接続することになる。
Therefore, if an ammeter 68 is connected in series to the constant voltage application circuit, the current (combined current) flowing to the outside through these internal circuits can be measured. At that time, each of the independent patterns 46, 48 or 48, 50 with which both probes come into contact
To each pin 34, 36, 40, 42 or 36, 3
Currents when all of the soldering of Nos. 8, 42, 44 are performed well, and the respective pins 34, 36, 40, 42 of those currents
Alternatively, when compared with the current when one or more soldering of 36, 38, 42 and 44 is defective and the feet are in a floating state, the current value of the latter is reduced by 20 to 30%. However, in the case of bridge solder in which the input pins or output pins of the same digital IC are connected by solder, the current value increases by 20 to 30%. As a result, it is possible to determine whether or not the foot is floating and the bridge solder is present based on the current value. If multiple output pins are connected to one input pin in an independent pattern, multiple diodes are connected in parallel in a series circuit of a diode and a resistor. If a plurality of input pins are connected in an independent pattern, a plurality of series circuits of a diode and a resistor are connected in parallel to the diode.

【0010】[0010]

【実施例】以下、添付図面に基づいて、本発明の実施例
を説明する。図1は本発明によるデジタルICのインサ
ーキットテスタによる足浮き検出方法の対象となる基板
に実装半田付けした2個の入力保護回路付きデジタルI
C間に存在する特有の接続関係を示す図である。図中、
30、32は第1、第2デジタルIC、34、36、3
8は第1デジタルIC30の電源、出力、グランドの各
ピン、40、42、44は第2デジタルIC32の電
源、入力、グランドの各ピン、46は両電源ピン34、
40を接続する独立パターン、48は出入力ピン36、
42を接続する独立パターン、50は両グランドピン3
8、44を接続する独立パターンである。なお、独立パ
ターン46は電源に接続し、独立パターン50は基板
(図示なし)のグランドに接続する。
Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 shows two digital I with an input protection circuit mounted and soldered on a substrate which is a target of a method for detecting a floating foot by an in-circuit tester of a digital IC according to the present invention.
It is a figure which shows the peculiar connection relation which exists between C. In the figure,
30 and 32 are first and second digital ICs, 34, 36 and 3
Reference numeral 8 denotes power supply, output, and ground pins of the first digital IC 30, 40, 42, and 44 denote power supply, input, and ground pins of the second digital IC 32, and 46 denotes both power supply pins 34,
Independent pattern connecting 40, 48 input / output pin 36,
Independent pattern for connecting 42, 50 for both ground pins 3
It is an independent pattern that connects 8 and 44. The independent pattern 46 is connected to the power source, and the independent pattern 50 is connected to the ground of the substrate (not shown).

【0011】この第1デジタルIC30の出力ピン内部
等価回路は図2に示すような電源ピン34とグランドピ
ン38との間に2個のダイオード52、54を各カソー
ドを電源ピン34の側に向けて直列接続し、出力ピン3
6と両ダイオード52、54の接続点とを直接接続した
構成を備えている。なお、FET56、58をダイオー
ド52、54とそれぞれ等価と見る。又、第2デジタル
IC32の入力ピン内部等価回路は入力保護回路を備え
ることにより、図3に示すような電源ピン40とグラン
ドピン44との間に2個のダイオード60、62を各カ
ソードを電源ピン40の側に向けて直列接続し、入力ピ
ン42と両ダイオード60、62の接続点との間に抵抗
64を接続した構成を備えている。
The output pin internal equivalent circuit of the first digital IC 30 has two diodes 52 and 54 between the power supply pin 34 and the ground pin 38 as shown in FIG. Connected in series and output pin 3
6 and the connection point of both diodes 52 and 54 are directly connected. The FETs 56 and 58 are regarded as equivalent to the diodes 52 and 54, respectively. Further, the input pin internal equivalent circuit of the second digital IC 32 is provided with an input protection circuit so that two diodes 60 and 62 are provided between the power supply pin 40 and the ground pin 44 as shown in FIG. It has a configuration in which it is connected in series toward the pin 40 side, and a resistor 64 is connected between the input pin 42 and the connection point of the diodes 60 and 62.

【0012】図4はこのような実装基板におけるデジタ
ルICの足浮きをX−Y方式インサーキットテスタを用
いて検査する場合の回路例を示す図である。図中、66
は交流又は直流の定電圧電源、68は電流計、70(7
0a、70b)は計測回路のグランドである。検査の際
には、先ずインサーキットテスタに備えた2組のX−Y
ユニットをそれぞれ制御し、一方のプローブを入出力ピ
ン42、36を接続する独立パターン48に当接し、他
方のプローブを電源ピン34、40を接続する独立パタ
ーン46に当接する。そこで、電源66より定電圧を印
加すると、その定電圧がダイオード60と抵抗64との
直列回路と、その両端に並列接続するダイオード52に
加わる。それ故、その定電圧印加回路に電流計68を直
列接続しておくと、それ等の内部回路を通って外部に流
れる電流(合成電流)を測定できる。そこで、両プロー
ブが接触する各独立パターン46、48に対する各ピン
34、36、40、42の半田付けが全て良好に行なわ
れている場合の電流と、それ等の各ピン34、36、4
0、42の半田付けが1つ又は複数不良で、足浮き状態
にある場合の電流とを比べる。すると、後者の場合には
電流値が2〜3割減少するので、電流値によって足浮き
の有無の判定できる。
FIG. 4 is a diagram showing a circuit example in the case of inspecting the floating of the digital IC on such a mounting board by using an XY type in-circuit tester. 66 in the figure
Is an AC or DC constant voltage power source, 68 is an ammeter, 70 (7
0a, 70b) is the ground of the measurement circuit. At the time of inspection, first, two sets of XY provided for the in-circuit tester.
Each unit is controlled, and one probe is brought into contact with the independent pattern 48 connecting the input / output pins 42 and 36, and the other probe is brought into contact with the independent pattern 46 connecting the power supply pins 34 and 40. Therefore, when a constant voltage is applied from the power source 66, the constant voltage is applied to the series circuit of the diode 60 and the resistor 64 and the diode 52 connected in parallel to both ends thereof. Therefore, if an ammeter 68 is connected in series to the constant voltage application circuit, the current (combined current) flowing to the outside through these internal circuits can be measured. Therefore, the currents when the pins 34, 36, 40, 42 are soldered well to the independent patterns 46, 48 with which the probes contact each other, and the respective pins 34, 36, 4 of those pins.
Comparison is made with the current when one or more soldering of Nos. 0 and 42 are defective and the feet are in a floating state. Then, in the latter case, the current value is reduced by 20 to 30%, so that it is possible to determine whether or not the foot is floating based on the current value.

【0013】又、図5に示すように、一方のプローブを
グランドピン38、44を接続する独立パターン50に
当接し、他方のプローブを入出力ピン42、36を接続
する独立パターン48に当接し、同様に電源66より定
電圧を印加してもよい。その際には、定電圧がダイオー
ド62と抵抗64との直列回路と、その両端に並列接続
するダイオード54に加わる。それ故、電流計68によ
って両プローブが接触する各独立パターン48、50に
対する各ピン36、38、42、44の半田付けが全て
良好に行なわれている場合の電流と、それ等の各ピン3
6、38、42、44の半田付けが1つ又は複数不良
で、足浮き状態にある場合の電流とを比べると、やはり
後者の場合には電流値が2〜3割減少するので、電流値
によって足浮きの有無の判定できる。
As shown in FIG. 5, one probe is brought into contact with the independent pattern 50 connecting the ground pins 38 and 44, and the other probe is brought into contact with the independent pattern 48 connecting the input / output pins 42 and 36. Similarly, a constant voltage may be applied from the power source 66. At that time, a constant voltage is applied to the series circuit of the diode 62 and the resistor 64 and the diode 54 connected in parallel at both ends thereof. Therefore, the current when the pins 36, 38, 42, and 44 are all well soldered to the independent patterns 48 and 50 with which the probes contact each other by the ammeter 68, and the pins 3 and the like.
Comparing with the current when one or more soldering of 6, 38, 42 and 44 is defective and the feet are in a floating state, the current value also decreases by 20 to 30% in the latter case. The presence or absence of floating feet can be determined by.

【0014】このようにして、デジタルIC30、32
に対し、それ等の入出力ピン42、36を接続する独立
パターン48と、電源ピン34、40を接続する独立パ
ターン46或いはグランドピン38、44を接続する独
立パターン50との間に、定電圧を印加して電流を測定
し、その電流値によって足浮きの有無の判定を行なう
と、他の実装部品の電気的測定に用いる通常のプローブ
をそのままデジタルIC30、32の足浮きの検査に使
用できる。それ故、デジタルIC専用プローブを製作す
る必要がなく、プローブ交換の必要性もないので検査を
スピード化できる。なお、1つの入力ピンに対して複数
個の出力ピンを独立パターンで接続する場合にはダイオ
ードと抵抗との直列回路に、複数個のダイオードが並列
接続することになり、1つの出力ピンに対して複数個の
入力ピンを独立パターンで接続する場合にはダイオード
に、ダイオードと抵抗との直列回路が複数個並列接続す
ることになる。
In this way, the digital ICs 30, 32 are
On the other hand, a constant voltage is provided between the independent pattern 48 connecting the input / output pins 42 and 36 and the independent pattern 46 connecting the power supply pins 34 and 40 or the independent pattern 50 connecting the ground pins 38 and 44. When a current is applied to measure the current and the presence / absence of a foot float is determined based on the current value, a normal probe used for electrical measurement of other mounted components can be used as it is for the foot float inspection of the digital ICs 30 and 32. . Therefore, it is not necessary to manufacture a probe for exclusive use of the digital IC, and there is no need to replace the probe, so the inspection can be speeded up. If multiple output pins are connected to one input pin in an independent pattern, multiple diodes will be connected in parallel to the series circuit of the diode and the resistor. If a plurality of input pins are connected in an independent pattern, a series circuit of a diode and a resistor is connected in parallel to the diode.

【0015】なお、上記実施例ではデジタルICの足浮
き検出について説明したが、同一デジタルICの例えば
隣接する入力ピン同士或いは出力ピン同士が半田でつな
がるブリッジ半田の場合も同様の検出方法を採用する
と、正常な場合と比べ、電流値が変化するため検出が可
能になる。但し、ブリッジ半田の場合は正常の場合と比
べ、電流値が2〜3割増加する。
In the above embodiment, the detection of the floating foot of the digital IC has been described. However, the same detection method is adopted in the case of bridge solder in which adjacent input pins or output pins of the same digital IC are connected by solder. As compared with the normal case, the current value changes, so detection becomes possible. However, in the case of bridge soldering, the current value increases by 20 to 30% compared to the normal case.

【0016】[0016]

【発明の効果】以上説明した本発明によれば、基板に実
装半田付けした複数のデジタルICの足浮き及びブリッ
ジ半田を検査する場合にも、デジタルIC間に存在する
特有の接続関係を利用することによって、他の実装部品
の電気的測定に用いる通常のプローブをそのまま使用で
きる。それ故、デジタルIC専用プローブを製作する必
要がなく、プローブ交換の必要性もないので検査をスピ
ード化できる。
According to the present invention described above, the peculiar connection relationship existing between digital ICs is utilized even when inspecting the foot float and bridge solder of a plurality of digital ICs mounted and soldered on a substrate. As a result, a normal probe used for electrical measurement of other mounted components can be used as it is. Therefore, it is not necessary to manufacture a probe for exclusive use of the digital IC, and there is no need to replace the probe, so the inspection can be speeded up.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明によるデジタルICのインサーキットテ
スタによる足浮き検出方法の対象となる基板に実装半田
付けした2個の入力保護回路付きデジタルIC間に存在
する特有の接続関係を示す図である。
FIG. 1 is a diagram showing a peculiar connection relationship existing between two digital ICs with an input protection circuit mounted and soldered to a substrate which is a target of a foot floating detection method by an in-circuit tester of a digital IC according to the present invention. .

【図2】同デジタルICの出力ピン内部等価回路を示す
図である。
FIG. 2 is a diagram showing an output pin internal equivalent circuit of the digital IC.

【図3】同デジタルICの入力ピン内部等価回路を示す
図である。
FIG. 3 is a diagram showing an input pin internal equivalent circuit of the digital IC.

【図4】同実装基板におけるデジタルICの足浮きをX
−Y方式インサーキットテスタを用いて検査する場合の
回路例を示す図である。
[Fig. 4] It is possible to prevent the digital IC from floating on the same mounting board.
It is a figure which shows the example of a circuit at the time of inspecting using a -Y system in-circuit tester.

【図5】同実装基板におけるデジタルICの足浮きをX
−Y方式インサーキットテスタを用いて検査する場合の
他の回路例を示す図である。
FIG. 5 shows the floating of digital ICs on the same mounting board as X.
It is a figure which shows the other circuit example at the time of inspecting using a -Y system in-circuit tester.

【図6】従来の実装基板におけるデジタルICの足浮き
をX−Y方式インサーキットテスタを用いて検査する場
合の回路例を示す図である。
FIG. 6 is a diagram showing a circuit example in the case of inspecting a floating foot of a digital IC on a conventional mounting board using an XY type in-circuit tester.

【符号の説明】[Explanation of symbols]

30、32…デジタルIC 34、40…電源ピン 3
6、42…出、入力ピン 38、44…グランドピン
46、48、50…独立パターン 52、54、60、
62…ダイオード 64…抵抗 66…定電圧電源 6
8…電流計
30, 32 ... Digital IC 34, 40 ... Power supply pin 3
6, 42 ... Out, input pin 38, 44 ... Ground pin
46, 48, 50 ... Independent patterns 52, 54, 60,
62 ... Diode 64 ... Resistor 66 ... Constant voltage power supply 6
8 ... Ammeter

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 基板に実装半田付けし、全電源ピンと全
グランドピンをそれぞれ独立パターンで接続し、少なく
とも1個の入力ピンと1個の出力ピンを独立パターンで
接続する複数の入力保護回路付きデジタルICのインサ
ーキットテスタによる足浮き及びブリッジ半田検出方法
において、上記入出力ピンを接続する独立パターンと、
全電源ピン或いは全グランドピンを接続する独立パター
ンとの間に、交流又は直流の定電圧を印加して電流を測
定し、その電流値によって足浮き及びブリッジ半田の有
無を判定することを特徴とするデジタルICのインサー
キットテスタによる足浮き及びブリッジ半田検出方法。
1. A digital circuit with a plurality of input protection circuits, which is mounted on a board and soldered, all power pins and all ground pins are connected in independent patterns, and at least one input pin and one output pin are connected in independent patterns. In a method for detecting foot floating and bridge soldering by an IC in-circuit tester, an independent pattern for connecting the input / output pins,
A characteristic is that a constant voltage of AC or DC is applied between an independent pattern connecting all power pins or all ground pins to measure the current, and the presence or absence of floating feet and bridge solder is determined by the current value. A method for detecting foot float and bridge solder by an in-circuit tester of a digital IC.
JP6026012A 1994-01-27 1994-01-27 Digital ic leg floatage, bridge solder detecting method by in-circuit tester Pending JPH07218580A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6026012A JPH07218580A (en) 1994-01-27 1994-01-27 Digital ic leg floatage, bridge solder detecting method by in-circuit tester

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6026012A JPH07218580A (en) 1994-01-27 1994-01-27 Digital ic leg floatage, bridge solder detecting method by in-circuit tester

Publications (1)

Publication Number Publication Date
JPH07218580A true JPH07218580A (en) 1995-08-18

Family

ID=12181792

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6026012A Pending JPH07218580A (en) 1994-01-27 1994-01-27 Digital ic leg floatage, bridge solder detecting method by in-circuit tester

Country Status (1)

Country Link
JP (1) JPH07218580A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20130115117A (en) * 2012-04-10 2013-10-21 니혼덴산리드가부시키가이샤 Built-in substrate inspection method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20130115117A (en) * 2012-04-10 2013-10-21 니혼덴산리드가부시키가이샤 Built-in substrate inspection method
JP2013217796A (en) * 2012-04-10 2013-10-24 Nidec-Read Corp Method of inspecting component embedded substrate

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