JPH07211879A - Solid-state image pick up device - Google Patents

Solid-state image pick up device

Info

Publication number
JPH07211879A
JPH07211879A JP6007351A JP735194A JPH07211879A JP H07211879 A JPH07211879 A JP H07211879A JP 6007351 A JP6007351 A JP 6007351A JP 735194 A JP735194 A JP 735194A JP H07211879 A JPH07211879 A JP H07211879A
Authority
JP
Japan
Prior art keywords
insulating film
electrode
semiconductor layer
junction
solid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP6007351A
Other languages
Japanese (ja)
Inventor
Nobuyuki Kajiwara
信之 梶原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6007351A priority Critical patent/JPH07211879A/en
Publication of JPH07211879A publication Critical patent/JPH07211879A/en
Withdrawn legal-status Critical Current

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  • Solid State Image Pick-Up Elements (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To uniformalize the dark-current characteristics of an individual photodiode, to make the occurrence of defective pixels and the like hard to occur by decreasing the noises of a fixed pattern, and to make the time delay of image display hard to occur by simplifying an external correcting circuit. CONSTITUTION:Surface protecting insulating films 5 and 6 are formed on semiconductor layers 2 and 3 so as to cover the outer surface of a p-n junction 4 of each photodiode 1. Electric charge, which neutralizes the surface potential of the insulating films 5 and 6 and an interface 10 of the semiconductor layer/ surface protecting insulating films around the p-n junction 4, is infected. A first electrode 9, which is formed around the p-n junction 4 and on the surface protecting insulating films 5 and 6, is provided. Furthermore, a second electrode 11, which holds the electric charge injected from the first electrode 9 and is held on the periphery of the p-n junction 4 and in the surface protecting insulating films 5 and 6, is provided.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、固体撮像素子に係り、
詳しくは、複数個の光を検知するフォトダイオードと各
フォトダイオードの電気信号を電子走査によって読み出
す信号処理回路を有する固体撮像素子に適用することが
でき、特に、個々のフォトダイオードの暗電流特性を均
一化し、固定パターン雑音を低減して欠陥画素等を生じ
難くすることができ、しかも外部補正回路を簡略化して
画像表示の時間遅れを生じ難くすることができる固体撮
像素子に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image sensor,
More specifically, it can be applied to a solid-state imaging device having a photodiode for detecting a plurality of lights and a signal processing circuit for reading out an electric signal of each photodiode by electronic scanning. The present invention relates to a solid-state imaging device that can be made uniform and can reduce fixed pattern noise to make it difficult to generate defective pixels and the like, and further can simplify an external correction circuit to make it difficult to cause a time delay in image display.

【0002】近年、光を検知する複数個のフォトダイオ
ードと各フォトダイオードの電気信号を電子走査によっ
て読み出す信号処理回路を有する固体撮像素子において
は、多画素化や高感度化等の高性能化の要求に伴い、個
々の暗電流や感度等のフォトダイオード特性がばらつき
易く、この個々のフォトダイオード特性のばらつきによ
り画像上の固定パターン雑音が生じ易くなるため、各フ
ォトダイオード特性の均一化が要求されている。このた
め、製造プロセス上の改良が進められているとともに、
固体撮像素子からの信号を外部回路で演算加工して、特
性の均一化を図って画像化する必要がある。しかしなが
ら、特に、化合物半導体をフォトダイオードに用いてい
る固体撮像素子では、個々のフォトダイオード特性の均
一化が半導体表面の活性度が高く、安定な表面保護膜が
形成し難いという理由からプロセス技術的に難しいた
め、結局フォトダイオード特性がばらつき易く、外部で
の信号処理を複雑なものにしている。
In recent years, in a solid-state image pickup device having a plurality of photodiodes for detecting light and a signal processing circuit for reading out an electric signal of each photodiode by electronic scanning, high performance such as a large number of pixels and high sensitivity has been achieved. In accordance with the demand, individual photodiode characteristics such as dark current and sensitivity are likely to vary, and this variation in individual photodiode characteristics tends to cause fixed pattern noise on the image. ing. For this reason, improvements are being made in the manufacturing process,
It is necessary to calculate the signal from the solid-state image pickup device by an external circuit to make the characteristics uniform and to form an image. However, in particular, in a solid-state imaging device using a compound semiconductor for a photodiode, it is difficult to form a stable surface protective film because the uniformity of individual photodiode characteristics is high on the semiconductor surface and it is difficult to form a stable surface protection film. Therefore, the photodiode characteristics tend to vary easily, which complicates external signal processing.

【0003】[0003]

【従来の技術】従来の固体撮像素子には、複数個の光を
検知するフォトダイオードと各フォトダイオードの電気
信号を電子走査によって読み出す信号処理回路を有する
ものが知られている。この固体撮像素子に用いられるフ
ォトダイオードは、通常ダイオードの暗電流は小さい
が、エネルギーギャップが非常に小さいため、絶縁膜/
半導体界面の固定電荷発生によって、暗電流が発生し易
く、各フォトダイオード素子を形成する時に、個々のフ
ォトダイオードで暗電流がばらつき易い。そして、この
従来の固体撮像素子では、フォトダイオードの数が多い
という理由から、素子内で各フォトダイオードに同一の
バイアス条件しか印加することができず、個々のフォト
ダイオードの暗電流ばらつきを含んだ電荷蓄積を行って
いる。
2. Description of the Related Art A conventional solid-state image pickup device is known which has a photodiode for detecting a plurality of lights and a signal processing circuit for reading out an electric signal of each photodiode by electronic scanning. The photodiode used in this solid-state image sensor usually has a small dark current, but has a very small energy gap, so
Due to the generation of fixed charges at the semiconductor interface, dark current is likely to occur, and when forming each photodiode element, the dark current tends to vary among individual photodiodes. In this conventional solid-state imaging device, because the number of photodiodes is large, only the same bias condition can be applied to each photodiode within the device, and the dark current variation of each photodiode is included. It is accumulating charges.

【0004】また、従来の固体撮像素子は、外部回路に
半導体メモリを有しており、この半導体メモリに個々の
暗電流等のフォトダイオード特性を記憶し、外部演算回
路によりメモリから読み出した個々のフォトダイオード
の暗電流の多少を信号補正している。
Further, the conventional solid-state image pickup device has a semiconductor memory in an external circuit, and the photodiode characteristics such as individual dark currents are stored in this semiconductor memory, and the individual characteristics read from the memory by an external arithmetic circuit. The signal is corrected for the dark current of the photodiode.

【0005】[0005]

【発明が解決しようとする課題】上記したように、従来
の固体撮像素子では、素子内で各フォトダイオードに同
一のバイアス条件しか印加することができず、個々のフ
ォトダイオードの暗電流ばらつきを含んだ電荷蓄積を行
っていたため、特に暗電流を多く発生するフォトダイオ
ードを有すると、その部分の蓄積容量が他のフォトダイ
オードの蓄積容量(基準値)よりも足りなくなって、C
CD出力の頭打ちになってしまい、欠陥画素となってし
まうという問題があった。
As described above, in the conventional solid-state image pickup device, only the same bias condition can be applied to each photodiode in the device, and the dark current variation of each photodiode is included. However, when a photodiode that generates a large amount of dark current is included because the charge is accumulated, the storage capacitance of that portion becomes less than the storage capacitance (reference value) of other photodiodes, and C
There is a problem in that the output of the CD reaches the ceiling and the pixel becomes defective.

【0006】そこで、固体撮像素子を構成するフォトダ
イオード素子全体のバイアス条件を低くして、これらの
暗電流を多く発生するフォトダイオードを救済していた
が、フォトダイオード素子全体のバイアス条件を低くす
るため、全体的に信号の注入効率が低下して、感度が低
下してしまうという問題があった。また、上記したよう
に、従来、外部回路に半導体メモリを有する固体撮像素
子では、信号を読み出した後、回路を構成する半導体メ
モリに個々の暗電流等のフォトダイオード特性を記憶
し、外部演算回路により、メモリから読み出した個々の
フォトダイオードの暗電流の多少を信号補正していたた
め、固体撮像素子の外部回路が複雑になって演算処理す
る時間が掛り、1フレーム程度の時間遅れで画像表示し
てしまうという問題があった。特に、オフセット補正や
感度補正をした基準の映像状態から対象物体がずれる
と、補正画素が固定パターン雑音として大きく目立つこ
とがあった。
Therefore, the bias condition of the entire photodiode element constituting the solid-state image pickup device is lowered to relieve the photodiode which generates a large amount of these dark currents. However, the bias condition of the entire photodiode element is lowered. Therefore, there is a problem that the signal injection efficiency is lowered as a whole, and the sensitivity is lowered. Further, as described above, conventionally, in a solid-state image sensor having a semiconductor memory in an external circuit, after reading a signal, the semiconductor memory forming the circuit stores the photodiode characteristics such as individual dark currents, and the external arithmetic circuit As a result, the signal of the dark current of each photodiode read out from the memory was corrected, so that the external circuit of the solid-state image sensor became complicated and it took time to perform arithmetic processing. There was a problem that it would end up. In particular, when the target object deviates from the reference image state that has been offset-corrected or sensitivity-corrected, the corrected pixels may be noticeable as fixed pattern noise.

【0007】そこで、本発明は、個々のフォトダイオー
ドの暗電流特性を均一化し、固定パターン雑音を低減し
て欠陥画素等を生じ難くすることができ、しかも外部補
正回路を簡略化して画像表示の時間遅れを生じ難くする
ことができる固体撮像素子を提供することを目的とす
る。
Therefore, according to the present invention, the dark current characteristics of the individual photodiodes can be made uniform, fixed pattern noise can be reduced to prevent defective pixels from occurring, and the external correction circuit can be simplified to achieve image display. It is an object of the present invention to provide a solid-state image sensor that can prevent a time delay from occurring.

【0008】[0008]

【課題を解決するための手段】請求項1記載の発明は、
複数個の光を検知し、かつp型半導体層とn型半導体層
から構成されるフォトダイオードと、各フォトダイオー
ドの電気信号を電子走査によって読み出す信号処理回路
とを有する固体撮像素子において、該各フォトダイオー
ド1のpn接合の周囲を覆うように該半導体層上に形成
された表面保護絶縁膜と、該pn接合周囲の該半導体層
/表面保護絶縁膜界面の表面ポテンシャル電位を中和す
るための電荷を注入するとともに、該pn接合周囲上
で、かつ該表面保護絶縁膜上に形成された第1の電極
と、該第1の電極若しくは半導体層から注入してきた電
荷を保持するとともに、該pn接合周囲上で、かつ該表
面保護絶縁膜内に形成された第2の電極とを有すること
を特徴とするものである。
The invention according to claim 1 is
In a solid-state imaging device having a photodiode configured to detect a plurality of lights and composed of a p-type semiconductor layer and an n-type semiconductor layer, and a signal processing circuit for reading out an electric signal of each photodiode by electronic scanning, For neutralizing the surface protective insulating film formed on the semiconductor layer so as to cover the periphery of the pn junction of the photodiode 1 and the surface potential potential of the semiconductor layer / surface protective insulating film interface around the pn junction. In addition to injecting charges, the first electrode formed around the pn junction and on the surface protective insulating film and the charges injected from the first electrode or the semiconductor layer are retained, and the pn The second electrode is formed on the periphery of the junction and in the surface protection insulating film.

【0009】請求項2記載の発明は、複数個の光を検知
し、かつp型半導体層とn型半導体層から構成されるフ
ォトダイオードと、各フォトダイオードの電気信号を電
子走査によって読み出す信号処理回路とを有する固体撮
像素子において、該各フォトダイオードのpn接合の周
囲を覆うように該半導体層上に形成された表面保護絶縁
膜と、該pn接合周囲の該半導体層/表面保護膜界面の
表面ポテンシャル電位を中和するための電荷を注入する
とともに、該pn接合周囲上で、かつ該表面保護絶縁膜
上に形成された第1の電極と、該pn接合周囲上で、か
つ該表面保護絶縁膜内に形成された該表面保護絶縁膜と
は異なる材質からなる絶縁膜とを有し、かつ該第1の電
極若しくは半導体層から注入してきた電荷を、該表面保
護絶縁膜と該絶縁膜間の電荷トラップ及び該絶縁膜中の
電荷トラップのうち、少なくともどちらか一方の電荷ト
ラップで保持してなることを特徴とするものである。
According to a second aspect of the present invention, there is provided a signal processing which detects a plurality of lights and which comprises a p-type semiconductor layer and an n-type semiconductor layer and an electric signal of each photodiode is read out by electronic scanning. In a solid-state imaging device having a circuit, a surface protective insulating film formed on the semiconductor layer so as to cover the periphery of the pn junction of each photodiode, and a semiconductor layer / surface protective film interface around the pn junction. A charge for injecting a surface potential potential is injected, and a first electrode formed on the periphery of the pn junction and on the surface protection insulating film, and on the periphery of the pn junction, and the surface protection. An insulating film made of a material different from that of the surface protective insulating film formed in the insulating film, and insulating the charge injected from the first electrode or the semiconductor layer from the surface protective insulating film. Among charge trapping and charge trapping in the insulating film between and it is characterized by comprising retaining at least one of the charge trapping.

【0010】請求項3記載の発明は、上記請求項1,2
記載の発明において、前記第1の電極の前記表面保護絶
縁膜内への電荷注入は、電気的あるいは光学的な電荷注
入によって行われてなることを特徴とするものである。
請求項4記載の発明は、上記請求項1乃至3記載の発明
において、前記第1の電極から前記第2の電極又は前記
絶縁膜へ注入する電荷は、前記pn接合周囲の前記半導
体層/表面保護絶縁膜界面の表面ポテンシャルの大きさ
に応じて、該界面に存在する固定電荷を打ち消す反対極
性の電荷であることを特徴とするものである。
The invention according to claim 3 is the same as claims 1 and 2 above.
In the invention described above, the charge injection into the surface protective insulating film of the first electrode is performed by electrical or optical charge injection.
The invention according to claim 4 is the invention according to any one of claims 1 to 3, wherein the charge injected from the first electrode to the second electrode or the insulating film is the semiconductor layer / surface around the pn junction. According to the magnitude of the surface potential of the interface of the protective insulating film, the charges are of opposite polarities that cancel the fixed charges existing at the interface.

【0011】請求項5記載の発明は、上記請求項1乃至
4記載の発明において、前記第1の電極は、ランダムに
アクセスする機能と、正負の任意の電荷を注入する機能
と、電荷量を調整する機能とを有することを特徴とする
ものである。請求項6記載の発明は、上記請求項5記載
の発明において、前記第1の電極から注入する電荷量の
調整は、印加電圧及び印加時間の少なくともどちらか一
方によって行われてなることを特徴とするものである。
According to a fifth aspect of the present invention, in the first to fourth aspects of the invention, the first electrode has a function of randomly accessing, a function of injecting an arbitrary positive or negative charge, and a charge amount. It has a function of adjusting. According to a sixth aspect of the present invention, in the above-mentioned fifth aspect, the amount of charges injected from the first electrode is adjusted by at least one of an applied voltage and an applied time. To do.

【0012】請求項7記載の発明は、上記請求項1乃至
6記載の発明において、前記n型半導体層(3)は、前
記p型半導体層(2)上部に形成されてなることを特徴
とするものである。請求項8記載の発明は、上記請求項
1乃至6記載の発明において、前記p型半導体(2)
は、前記n型半導体層(3)上部に形成されてなること
を特徴とするものである。
According to a seventh aspect of the present invention, in the above first to sixth aspects, the n-type semiconductor layer (3) is formed on the p-type semiconductor layer (2). To do. The invention according to claim 8 is the same as the invention according to any one of claims 1 to 6, wherein the p-type semiconductor (2) is used.
Is formed on the n-type semiconductor layer (3).

【0013】[0013]

【作用】図1〜3は本発明の原理説明図である。図1は
フォトダイオードとpn接合周囲に配した固定電荷を中
和する電荷を記憶する電極を有する本発明の固体撮像素
子の基本構成を示している。図1において、1はp型半
導体層2とn型半導体層3から構成されるフォトダイオ
ードであり、4はp型半導体層2とn型半導体層3間に
形成されるpn接合であり、5,6はpn接合4周囲を
保護するように半導体層2,3上に順次形成される表面
保護絶縁膜であり、7は表面保護絶縁膜6及び表面保護
絶縁膜5に形成され、フォトダイオード1のn型半導体
層3が露出された開口部であり、8はこの開口部7を介
してフォトダイオード1のn型半導体層3とコンタクト
するように形成されたダイオード電極であり、9はpn
接合4周囲のp型半導体層2、3/表面保護絶縁膜5の
界面10の表面ポテンシャル電位を中和するための電荷
を注入するとともに、pn接合4周囲上で、かつ表面保
護絶縁膜6上に形成された電荷注入用電極であり、11
は電荷注入用電極9から注入してきた電荷を保持すると
ともに、pn接合4周囲上で、かつ表面保護絶縁膜5,
6内に形成された記憶用浮遊電極である。この記憶用浮
遊電極11は、表面保護絶縁膜5上に堆積した後パター
ニングし、更に表面保護絶縁膜6で覆うように形成され
ている。
1 to 3 are explanatory views of the principle of the present invention. FIG. 1 shows a basic structure of a solid-state image pickup device of the present invention having a photodiode and an electrode which stores an electric charge for neutralizing a fixed electric charge arranged around a pn junction. In FIG. 1, 1 is a photodiode composed of a p-type semiconductor layer 2 and an n-type semiconductor layer 3, and 4 is a pn junction formed between the p-type semiconductor layer 2 and the n-type semiconductor layer 5. , 6 are surface protection insulating films sequentially formed on the semiconductor layers 2 and 3 so as to protect the periphery of the pn junction 4, and 7 is formed on the surface protection insulating film 6 and the surface protection insulating film 5, and the photodiode 1 Is an opening where the n-type semiconductor layer 3 is exposed, 8 is a diode electrode formed so as to contact the n-type semiconductor layer 3 of the photodiode 1 through the opening 7, and 9 is a pn
A charge for neutralizing the surface potential potential of the interface 10 of the p-type semiconductor layers 2 and 3 / surface protection insulating film 5 around the junction 4 is injected, and at the periphery of the pn junction 4 and on the surface protection insulating film 6. The charge injection electrode formed in
Holds the charges injected from the charge injection electrode 9, and is provided on the periphery of the pn junction 4 and on the surface protective insulating film 5,
6, which is a floating electrode for storage. The storage floating electrode 11 is formed so as to be deposited on the surface protection insulating film 5, patterned, and then covered with the surface protection insulating film 6.

【0014】次に、図2は電荷注入用電極9から記憶機
能付の記憶用浮遊電極11へ電荷を注入する方法を示し
ており、記憶用浮遊電極11への記憶機能は、この図2
から判るように、表面保護絶縁膜5,6内に埋め込んだ
記憶用浮遊電極11に、電荷注入用電極9下の電子(若
しくは正孔)を電気的に注入するか、若しくは表面保護
絶縁膜6の障壁を超えるエネルギーを有する光を照射し
注入して行う。
Next, FIG. 2 shows a method of injecting charges from the charge injection electrode 9 to the storage floating electrode 11 having a storage function. The storage function to the storage floating electrode 11 is shown in FIG.
As can be seen from the above, electrons (or holes) under the charge injection electrode 9 are electrically injected into the storage floating electrode 11 embedded in the surface protection insulating films 5 and 6, or This is performed by irradiating and injecting light having energy exceeding the barrier.

【0015】さて、従来の固体撮像素子では、図3
(a)に示す如く、暗電流の多いフォトダイオード1で
は、表面保護絶縁膜5/半導体層2,3界面10に固定
電荷が存在し、半導体の表面ポテンシャルを曲げて、界
面10に電荷を誘起してしまい、この結果、pn接合4
周囲での空乏層の電界が強くなってしまう。このため、
トンネルリーク電流が発生して暗電流の不均一を生じて
しまうという不具合があった。
Now, in the conventional solid-state image pickup device, as shown in FIG.
As shown in (a), in the photodiode 1 with a large dark current, fixed charges exist at the interface 10 of the surface protective insulating film 5 / semiconductor layers 2 and 3, and the surface potential of the semiconductor is bent to induce charges at the interface 10. As a result, the pn junction 4
The electric field of the depletion layer in the surroundings becomes strong. For this reason,
There is a problem that a tunnel leak current is generated and a dark current becomes non-uniform.

【0016】そこで、本発明は、前述した図1,2に示
す如く、この表面保護絶縁膜5/半導体層2,3界面1
0に存在する固定電荷を中和する電荷を、電荷注入用電
極9から表面保護絶縁膜6を介して記憶機能付の記憶用
浮遊電極11に注入し、この記憶用浮遊電極11に注入
した注入電荷によって界面10の固定電荷を中和する。
このため、記憶用浮遊電極11に注入した注入電荷によ
って界面10の固定電荷を中和することができるので、
トンネル電流の発生を防ぐことができ、暗電流の均一化
を図ることができる。更に、記憶機能付記憶用浮遊電極
11は、浮遊電極構造を採っているため、電源を切って
も注入電荷を記憶用浮遊電極11内に残すことができ、
長期に渡って補正機能をそのまま保護して機能させるこ
とができる他、必要に応じて書換も行うことができる。
Therefore, according to the present invention, as shown in FIGS. 1 and 2, the surface protective insulating film 5 / semiconductor layers 2 and 3 interface 1 is used.
The charge for neutralizing the fixed charge existing at 0 is injected from the charge injection electrode 9 to the storage floating electrode 11 with a storage function via the surface protection insulating film 6 and then injected to the storage floating electrode 11. The charge neutralizes the fixed charge of the interface 10.
Therefore, the fixed charges on the interface 10 can be neutralized by the injected charges injected into the storage floating electrode 11.
Generation of tunnel current can be prevented, and dark current can be made uniform. Furthermore, since the storage floating electrode 11 with a storage function has a floating electrode structure, the injected charges can be left in the storage floating electrode 11 even when the power is turned off.
The correction function can be protected and operated as it is for a long period of time, and rewriting can be performed as necessary.

【0017】次に、本発明においては、次のような構成
を採っても本発明の効果を達成することができる。以
下、具体的に図面を用いて説明する。図4は本発明の原
理説明図である。図4はフォトダイオードとpn接合周
囲に配した固定電荷を中和する電荷を記憶する絶縁膜を
有する本発明の固体撮像素子の基本構成を示している。
図4において、図1と同一符号は同一又は相当部分を示
し、21は電荷注入用電極9から注入してきた電荷を膜
中の電荷トラップで保持するとともに、pn接合4周囲
上で、かつ表面保護絶縁膜5,6内に形成された表面保
護絶縁膜5,6とは異なる材質からなる絶縁膜である。
この時、絶縁膜21は、表面保護絶縁膜5上に堆積した
後、パターニングし、更に表面保護絶縁膜6で覆うよう
に形成されている。
Next, in the present invention, the effects of the present invention can be achieved even if the following configuration is adopted. Hereinafter, a specific description will be given with reference to the drawings. FIG. 4 is a diagram illustrating the principle of the present invention. FIG. 4 shows a basic structure of a solid-state image pickup device of the present invention having an insulating film for arranging charges for neutralizing fixed charges arranged around a photodiode and a pn junction.
In FIG. 4, the same reference numerals as those in FIG. 1 denote the same or corresponding portions, and 21 holds the charges injected from the charge injection electrode 9 by the charge traps in the film, and protects the surface around the pn junction 4 and the surface. It is an insulating film made of a material different from the surface protection insulating films 5 and 6 formed in the insulating films 5 and 6.
At this time, the insulating film 21 is formed so as to be deposited on the surface protection insulating film 5, patterned, and then covered with the surface protection insulating film 6.

【0018】ここでの電荷注入用電極9から記憶機能付
の絶縁膜21へ電荷を注入する方法も、図1と同様、表
面保護絶縁膜5,6内に埋め込んだ記憶用浮遊絶縁膜2
1に、電荷注入用電極9下の電子(若しくは正孔)を電
気的に注入するか、若しくは表面保護絶縁膜6の障壁を
超えるエネルギーを有する光を照射して注入して行う。
The method of injecting charges from the charge injecting electrode 9 into the insulating film 21 having a memory function here is also the same as in FIG. 1, and the floating floating insulating film 2 for memory embedded in the surface protective insulating films 5 and 6 is used.
Electrons (or holes) under the charge injection electrode 9 are electrically injected into the first electrode 1, or light having energy exceeding the barrier of the surface protective insulating film 6 is irradiated and injected.

【0019】本発明では、図4に示す如く、表面保護絶
縁膜5/半導体層2,3界面10に存在する固定電荷を
中和する電荷を、電荷注入用電極9から表面保護絶縁膜
6を介して記憶機能付の絶縁膜21に注入し、この絶縁
膜21に注入した注入電荷によって界面10の固定電荷
を中和する。このため、絶縁膜21に注入した注入電荷
によって界面10の固定電荷を中和することができるの
で、トンネル電流の発生を防ぐことができ、暗電流の均
一化を図ることができる。更に、記憶機能付絶縁膜21
は、浮遊構造を採っているため、電源を切っても注入電
荷を絶縁膜21内に残すことができ、長期に渡って補正
機能をそのまま保持して機能させることができる他、必
要に応じて書換も行うことができる。なお、ここでは、
電荷注入用電極9から注入してきた電荷の保持は、絶縁
膜21中の電荷トラップで行う場合を示したが、絶縁膜
21と表面保護絶縁膜5間の電荷トラップで行うように
構成してもよいし、絶縁膜21中の電荷トラップ及び絶
縁膜21と表面保護絶縁膜5間の電荷トラップの両方で
行うように構成してもよい。
In the present invention, as shown in FIG. 4, charges for neutralizing fixed charges existing at the surface protective insulating film 5 / semiconductor layer 2, 3 interface 10 are transferred from the charge injection electrode 9 to the surface protective insulating film 6. It is injected into the insulating film 21 having a memory function via the insulating film 21, and the fixed charges of the interface 10 are neutralized by the injected charges injected into the insulating film 21. Therefore, the fixed charges at the interface 10 can be neutralized by the injected charges injected into the insulating film 21, so that the tunnel current can be prevented from occurring and the dark current can be made uniform. Further, the insulating film with a memory function 21
Has a floating structure, the injected charges can be left in the insulating film 21 even when the power is turned off, and the correction function can be maintained as it is for a long period of time. Rewriting can also be performed. In addition, here
The case where the charge injected from the charge injection electrode 9 is held by the charge trap in the insulating film 21 is shown, but the charge trap between the insulating film 21 and the surface protection insulating film 5 may be performed. Alternatively, both of the charge trapping in the insulating film 21 and the charge trapping between the insulating film 21 and the surface protection insulating film 5 may be performed.

【0020】[0020]

【実施例】以下、本発明の実施例を図面を参照して説明
する。 (実施例1)図1は本発明に係る実施例1の固体撮像素
子の構成を示す図である。図示例はフォトダイオードと
pn接合周囲に配した固定電荷を中和する電荷を記憶す
る電極を有する場合である。図5において、31はp型
半導体層32とn型半導体層33から構成されるフォト
ダイオードであり、34はp型半導体層32とn型半導
体層33間に形成されるpn接合であり、35,36は
pn接合34周囲を保護するように半導体層32,33
上に順次形成される表面保護絶縁膜であり、37は表面
保護絶縁膜35,36に形成され、フォトダイオード3
1のn型半導体層33が露出された開口部である。そし
て、38はこの開口部37を介してフォトダイオード3
1のn型半導体層33とコンタクトするように形成され
たダイオード電極であり、39はpn接合34周囲のp
型半導体層32、33/表面保護絶縁膜35の界面40
の表面ポテンシャル電位を中和するための電荷を注入す
るとともに、pn接合34周囲上で、かつ表面保護絶縁
膜36上に形成された電荷注入用電極であり、41は電
荷注入用電極39から注入してきた電荷を保持するとと
もに、pn接合34周囲上で、かつ表面保護絶縁膜3
5,36内に形成された記憶用浮遊電極である。この記
憶用浮遊電極41は、表面保護絶縁膜35上に堆積した
後パターニングし、更に表面保護絶縁膜36で覆うよう
に形成されている。そして、42は列選択シフトレジス
タ又はデコーダであり、43は行選択シフトレジスタ又
はデコーダであり、44はパルス印加電源であり、45
は特性フィードバック機能部である。
Embodiments of the present invention will be described below with reference to the drawings. (Embodiment 1) FIG. 1 is a diagram showing the configuration of a solid-state image sensor according to Embodiment 1 of the present invention. The illustrated example is a case where the photodiode and an electrode arranged around the pn junction have electrodes for storing charges for neutralizing fixed charges. In FIG. 5, 31 is a photodiode including a p-type semiconductor layer 32 and an n-type semiconductor layer 33, 34 is a pn junction formed between the p-type semiconductor layer 32 and the n-type semiconductor layer 33, and 35. , 36 are semiconductor layers 32, 33 so as to protect the periphery of the pn junction 34.
37 is a surface protection insulating film sequentially formed on the surface of the photodiode 3 and is formed on the surface protection insulating films 35 and 36.
This is the opening where the n-type semiconductor layer 33 of No. 1 is exposed. Then, 38 is the photodiode 3 through the opening 37.
1 is a diode electrode formed so as to be in contact with the n-type semiconductor layer 33 of No. 1, and 39 is p around the pn junction 34.
-Type semiconductor layers 32 and 33 / interface 40 of surface protective insulating film 35
Is a charge injection electrode formed on the surface of the pn junction 34 and on the surface protection insulating film 36, while 41 is injected from the charge injection electrode 39. Stored charge is retained, and the surface protection insulating film 3 is provided on the periphery of the pn junction 34.
5, which is a floating electrode for storage formed inside. The storage floating electrode 41 is formed so as to be deposited on the surface protection insulating film 35, patterned, and then covered with the surface protection insulating film 36. Further, 42 is a column selection shift register or decoder, 43 is a row selection shift register or decoder, 44 is a pulse applying power supply, and 45
Is a characteristic feedback function unit.

【0021】次に、電荷注入用電極39から記憶機能付
の記憶用浮遊電極41へ電荷を注入する方法は、表面保
護絶縁膜35,36内に埋め込んだ記憶用浮遊電極41
に、電荷注入用電極39下の電子(若しくは正孔)を電
気的に注入するか、若しくは表面保護絶縁膜36の障壁
を超えるエネルギーを有する光を照射して注入して行
う。
Next, in the method of injecting charges from the charge injection electrode 39 to the storage floating electrode 41 with a storage function, the storage floating electrode 41 embedded in the surface protective insulating films 35 and 36 is used.
Then, electrons (or holes) under the charge injection electrode 39 are electrically injected, or light having energy exceeding the barrier of the surface protective insulating film 36 is irradiated and injected.

【0022】本実施例では、外部回路を列選択シフトレ
ジスタ又はデコーダ42、行選択シフトレジスタ又はデ
コーダ43、パルス印加電源44及び特性フィードバッ
ク機能部45等で構成し、これにより、電荷注入用電極
39にランダムにアクセスする機能と、正負の任意の電
荷を注入する機能と、電荷量を調整する機能を有するよ
うに構成する。そして、電荷を記憶させる時は、フォト
ダイオード31に光を入射しないで暗電流だけを取り出
す状態にするか、若しくは一定の光を各フォトダイオー
ドに入射する状態にする。次に、この時の出力特性か
ら、平均値を大きく外れるフォトダイオード31の周囲
に配置した記憶用浮遊電極41へ正の電荷を注入する。
注入電荷量は、印加電圧の大きさ、若しくは電圧を印加
する時間を調整して行う。また、個々の注入電荷量の決
定は、出力特性から判断される固定電荷量を用いる。次
に、再び光を入れない状態で、出力特性を計測し、より
特性が悪くなったダイオードの周囲電極に負の電荷を注
入する。この操作を数回繰り返すことにより、より最適
な中和電荷量の注入を行うことができる。
In the present embodiment, the external circuit is composed of a column selection shift register or decoder 42, a row selection shift register or decoder 43, a pulse applying power supply 44, a characteristic feedback function section 45, etc., whereby the charge injection electrode 39 is formed. Are randomly accessed, a function of injecting an arbitrary positive or negative charge, and a function of adjusting the amount of charges. Then, when the electric charge is stored, only the dark current is taken out without making the light incident on the photodiode 31 or the constant light is made incident on each photodiode. Next, from the output characteristics at this time, positive charges are injected into the storage floating electrode 41 arranged around the photodiode 31 which greatly deviates from the average value.
The amount of injected charges is adjusted by adjusting the magnitude of the applied voltage or the time for applying the voltage. Further, the fixed charge amount determined from the output characteristics is used to determine the individual injected charge amount. Next, the output characteristic is measured again without light, and a negative charge is injected into the peripheral electrode of the diode whose characteristic becomes worse. By repeating this operation several times, a more optimal injection of the neutralizing charge amount can be performed.

【0023】このように、本実施例では、表面保護絶縁
膜35/半導体層32,33界面40に存在する固定電
荷を中和する電荷を、電荷注入用電極39から表面保護
絶縁膜36を介して記憶機能付の記憶用浮遊電極41に
注入し、この記憶用浮遊電極41に注入した注入電荷に
よって界面40の固定電荷を中和することができる。こ
のため、記憶用浮遊電極41に注入した注入電荷によっ
て界面40の固定電荷を中和することができるので、ト
ンネル電流の発生を防ぐことができ、暗電流の均一化を
図ることができる。更に、記憶機能付記憶用浮遊電極4
1は、浮遊電極構造を採っているため、電源を切っても
注入電荷を記憶用浮遊電極41内に残すことができ、長
期に渡って補正機能をそのまま保持して機能させること
ができる他、必要に応じて書換も行うことができる。
As described above, in this embodiment, the charges for neutralizing the fixed charges existing at the surface protection insulating film 35 / semiconductor layer 32, 33 interface 40 are transferred from the charge injection electrode 39 through the surface protection insulating film 36. The fixed charges at the interface 40 can be neutralized by the injected charges injected into the storage floating electrode 41 having a storage function and injected into the storage floating electrode 41. Therefore, the fixed charges at the interface 40 can be neutralized by the injected charges injected into the storage floating electrode 41, so that the tunnel current can be prevented from occurring and the dark current can be made uniform. Furthermore, a floating electrode 4 for storage with a storage function
Since No. 1 has a floating electrode structure, the injected charges can be left in the memory floating electrode 41 even when the power is turned off, and the correction function can be retained and operated for a long period of time. Rewriting can also be performed if necessary.

【0024】(実施例2)図6は本発明に係る実施例2
の固体撮像素子の構成を示す図である。図示例はフォト
ダイオードとpn接合周囲に配した固定電荷を中和する
電荷を記憶する絶縁膜を有する場合である。図6におい
て、図5と同一符号は同一又は相当部分を示し、51は
電荷注入用電極39から注入してきた電荷を膜中の電荷
トラップで保持するとともに、pn接合34周囲上で、
かつ表面保護絶縁膜35,36内に形成された表面保護
絶縁膜35,36とは異なる材質からなる絶縁膜であ
る。この絶縁膜51は、表面保護絶縁膜35上に堆積し
た後パターニングし、更に表面保護絶縁膜36で覆うよ
うに形成されている。なお、表面保護絶縁膜35及び表
面保護絶縁膜36は、SiO2 で構成し、絶縁膜51は
Si3 4 で構成する。
(Second Embodiment) FIG. 6 shows a second embodiment according to the present invention.
It is a figure which shows the structure of the solid-state image sensor of FIG. The illustrated example is a case where the photodiode and an insulating film arranged around the pn junction for storing charges for neutralizing fixed charges are provided. In FIG. 6, the same reference numerals as those in FIG. 5 indicate the same or corresponding portions, and 51 holds the charges injected from the charge injection electrode 39 by the charge traps in the film, and at the periphery of the pn junction 34,
Further, it is an insulating film made of a material different from the surface protective insulating films 35 and 36 formed in the surface protective insulating films 35 and 36. The insulating film 51 is formed so as to be deposited on the surface protection insulating film 35, patterned, and then covered with the surface protection insulating film 36. The surface protective insulating film 35 and the surface protective insulating film 36 are made of SiO 2 , and the insulating film 51 is made of Si 3 N 4 .

【0025】ここでの電荷注入用電極39から記憶機能
付の絶縁膜51へ電荷を注入する方法も、実施例1と同
様、表面保護絶縁膜35,36内に埋め込んだ記憶用浮
遊絶縁膜51に、電荷注入用電極39下の電子(若しく
は正孔)を電気的に注入するか、若しくは表面保護絶縁
膜36の障壁を超えるエネルギーを有する光を照射して
注入して行う。本実施例も、図5と同様外部回路を列選
択シフトレジスタ又はデコーダ42、行選択シフトレジ
スタ又はデコーダ43、パルス印加電源44及び特性フ
ィードバック機能部45等で構成し、これにより、電荷
注入用電極39にランダムにアクセスする機能と、正負
の任意の電荷を注入する機能と、電荷量を調整する機能
を有するように構成する。そして、電荷を記憶させる時
は、フォトダイオード31に光を入射しないで暗電流だ
けを取り出す状態にするか、若しくは一定の光を各フォ
トダイオードに入射する状態にする。次に、この時の出
力特性から、平均値を大きく外れるフォトダイオード3
1の周囲に配置した記憶用浮遊絶縁膜51へ正の電荷を
注入する。注入電荷量は、印加電圧の大きさ、若しくは
電圧を印加する時間を調整して行う。また、個々の注入
電荷量の決定は、出力特性から判断される固定電荷量を
用いる。次に、再び光を入れない状態で、出力特性を計
測し、より特性が悪くなったダイオードの周囲電極に負
の電荷を注入する。この操作を数回繰り返すことによ
り、より最適な中和電荷量の注入を行うことができる。
The method of injecting charges from the charge injecting electrode 39 to the insulating film 51 having a memory function here is also the same as in the first embodiment, that is, the floating floating insulating film 51 for memory embedded in the surface protective insulating films 35 and 36. Then, electrons (or holes) under the charge injection electrode 39 are electrically injected, or light having energy exceeding the barrier of the surface protective insulating film 36 is irradiated and injected. Also in this embodiment, as in the case of FIG. 5, the external circuit is composed of the column selection shift register or decoder 42, the row selection shift register or decoder 43, the pulse applying power supply 44, the characteristic feedback function unit 45, etc. It is configured to have a function of randomly accessing 39, a function of injecting arbitrary positive and negative charges, and a function of adjusting the amount of charges. Then, when the electric charge is stored, only the dark current is taken out without making the light incident on the photodiode 31 or the constant light is made incident on each photodiode. Next, from the output characteristics at this time, the photodiode 3 that greatly deviates from the average value
A positive charge is injected into the storage floating insulating film 51 arranged around 1. The amount of injected charges is adjusted by adjusting the magnitude of the applied voltage or the time for applying the voltage. Further, the fixed charge amount determined from the output characteristics is used to determine the individual injected charge amount. Next, the output characteristic is measured again without light, and a negative charge is injected into the peripheral electrode of the diode whose characteristic becomes worse. By repeating this operation several times, a more optimal injection of the neutralizing charge amount can be performed.

【0026】このように、本実施例では、表面保護絶縁
膜35/半導体層32,33界面40に存在する固定電
荷を中和する電荷を、電荷注入用電極39から表面保護
絶縁膜36を介して記憶機能付の絶縁膜51に注入し、
この絶縁膜51に注入した注入電荷によって界面40の
固定電荷を中和することができる。このため、絶縁膜5
1に注入した注入電荷によって界面40の固定電荷を中
和することができるので、トンネル電流の発生を防ぐこ
とができ、暗電流の均一化を図ることができる。更に、
記憶機能付絶縁膜51は、浮遊構造を採っているため、
電源を切っても注入電荷を絶縁膜51内に残すことがで
き、長期に渡って補正機能をそのまま保持して機能させ
ることができる他、必要に応じて書換も行うことができ
る。
As described above, in this embodiment, the charges for neutralizing the fixed charges existing at the surface protection insulating film 35 / semiconductor layer 32, 33 interface 40 are transferred from the charge injection electrode 39 through the surface protection insulating film 36. To the insulating film 51 with memory function,
The fixed charges on the interface 40 can be neutralized by the injected charges injected into the insulating film 51. Therefore, the insulating film 5
Since the fixed charges at the interface 40 can be neutralized by the injected charges injected into the device 1, the tunnel current can be prevented from occurring and the dark current can be made uniform. Furthermore,
Since the insulating film 51 with a memory function has a floating structure,
Even if the power is turned off, the injected charges can be left in the insulating film 51, and the correction function can be maintained as it is for a long period of time, and rewriting can be performed as necessary.

【0027】なお、実施例2では、電荷注入用電極39
から注入してきた電荷の保持は、絶縁膜51中の電荷ト
ラップで行う場合を示したが、絶縁膜51と表面保護絶
縁膜35間の電荷トラップで行うように構成してもよい
し、絶縁膜51中の電荷トラップ及び絶縁膜51と表面
保護絶縁膜35間の電荷トラップの両方で行うように構
成してもよい。
In the second embodiment, the charge injection electrode 39 is used.
The case where the charges injected from the above are held by the charge traps in the insulating film 51 has been described, but it may be configured so as to be held by the charge traps between the insulating film 51 and the surface protection insulating film 35. It may be configured to perform both the charge trap in 51 and the charge trap between the insulating film 51 and the surface protection insulating film 35.

【0028】なお、上記の実施例では、p型基板上のp
n接合で説明したが、n型基板上のpn接合でも同様の
構成で、同じ効果が期待できる。
In the above embodiment, p on the p-type substrate is used.
Although the n-junction has been described, the same effect can be expected in a pn-junction on an n-type substrate with a similar configuration.

【0029】[0029]

【発明の効果】本発明は、個々のフォトダイオードの暗
電流特性を均一化し、固定パターン雑音を低減して欠陥
画素等を生じ難くすることができ、しかも外部補正回路
を簡略化して画像表示の時間遅れを生じ難くすることが
できるという効果がある。
According to the present invention, the dark current characteristics of individual photodiodes can be made uniform, fixed pattern noise can be reduced and defective pixels can be made less likely to occur, and the external correction circuit can be simplified to achieve image display. There is an effect that a time delay can be made less likely to occur.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の原理説明図である。FIG. 1 is a diagram illustrating the principle of the present invention.

【図2】本発明の原理説明図である。FIG. 2 is a diagram illustrating the principle of the present invention.

【図3】本発明の原理説明図である。FIG. 3 is a diagram illustrating the principle of the present invention.

【図4】本発明の原理説明図である。FIG. 4 is a diagram illustrating the principle of the present invention.

【図5】本発明に係る実施例1の固体撮像素子の構成を
示す図である。
FIG. 5 is a diagram showing a configuration of a solid-state image sensor according to a first embodiment of the present invention.

【図6】本発明に係る実施例2の固体撮像素子の構成を
示す図である。
FIG. 6 is a diagram showing a configuration of a solid-state image sensor according to a second embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1,31 フォトダイオード 2,32 p型半導体層 3,33 n型半導体層 4,34 pn接合 5,6,35,36 表面保護絶縁膜 7,37 開口部 8,38 ダイオード電極 9,39 電荷注入用電極 10,40 界面 11,41 記憶用浮遊電極 21,51 絶縁膜 42 列選択シフトレジスタ又はデコーダ 43 行選択シフトレジスタ又はデコーダ 44 パルス印加電源 45 特性フィードバック機能部 1,31 Photodiode 2,32 p-type semiconductor layer 3,33 n-type semiconductor layer 4,34 pn junction 5,6,35,36 Surface protective insulating film 7,37 Opening 8,38 Diode electrode 9,39 Charge injection Electrode 10,40 interface 11,41 storage floating electrode 21,51 insulating film 42 column selection shift register or decoder 43 row selection shift register or decoder 44 pulse application power supply 45 characteristic feedback function unit

Claims (8)

【特許請求の範囲】[Claims] 【請求項1】複数個の光を検知し、かつp型半導体層
(2)とn型半導体層(3)から構成されるフォトダイ
オード(1)と、各フォトダイオード(1)の電気信号
を電子走査によって読み出す信号処理回路とを有する固
体撮像素子において、該各フォトダイオード(1)のp
n接合(4)の周囲を覆うように該半導体層(2,3)
上に形成された表面保護絶縁膜(5,6)と、該pn接
合(4)周囲の該半導体層/表面保護絶縁膜界面(1
0)の表面ポテンシャル電位を中和するための電荷を注
入するとともに、該pn接合(4)周囲上で、かつ該表
面保護絶縁膜(5,6)上に形成された第1の電極
(9)と、該第1の電極(9)若しくは半導体層(2,
3)から注入してきた電荷を保持するとともに、該pn
接合(4)周囲上で、かつ該表面保護絶縁膜(5,6)
内に形成された第2の電極(11)とを有することを特
徴とする固体撮像素子。
1. A photodiode (1) for detecting a plurality of lights and comprising a p-type semiconductor layer (2) and an n-type semiconductor layer (3), and an electric signal of each photodiode (1). In a solid-state imaging device having a signal processing circuit for reading by electronic scanning, p of each photodiode (1) is
The semiconductor layer (2, 3) so as to cover the periphery of the n-junction (4)
The surface protection insulating film (5, 6) formed above and the semiconductor layer / surface protection insulating film interface (1 around the pn junction (4)
0) to inject a charge for neutralizing the surface potential potential of the first electrode (9) formed around the pn junction (4) and on the surface protective insulating film (5, 6). ) And the first electrode (9) or the semiconductor layer (2,
3) Holds the charge injected from
On the periphery of the junction (4) and on the surface protection insulating film (5, 6)
A solid-state image sensor, comprising: a second electrode (11) formed therein.
【請求項2】複数個の光を検知し、かつp型半導体層
(2)とn型半導体層(3)から構成されるフォトダイ
オード(1)と、各フォトダイオード(1)の電気信号
を電子走査によって読み出す信号処理回路とを有する固
体撮像素子において、該各フォトダイオード(1)のp
n接合(4)の周囲を覆うように該半導体層(2,3)
上に形成された表面保護絶縁膜(5,6)と、該pn接
合(4)周囲の該半導体層/表面保護膜界面(10)の
表面ポテンシャル電位を中和するための電荷を注入する
とともに、該pn接合(4)周囲上で、かつ該表面保護
絶縁膜(5,6)上に形成された第1の電極(9)と、
該pn接合(4)周囲上で、かつ該表面保護絶縁膜
(5,6)内に形成された該表面保護絶縁膜(5,6)
とは異なる材質からなる絶縁膜(21)とを有し、かつ
該第1の電極(9)若しくはp型半導体(2)から注入
してきた電荷を、該表面保護絶縁膜(5)と該絶縁膜
(21)間の電荷トラップ及び該絶縁膜(21)中の電
荷トラップのうち、少なくともどちらか一方の電荷トラ
ップで保持してなることを特徴とする固体撮像素子。
2. A photodiode (1) which detects a plurality of lights and is composed of a p-type semiconductor layer (2) and an n-type semiconductor layer (3), and an electric signal of each photodiode (1). In a solid-state imaging device having a signal processing circuit for reading by electronic scanning, p of each photodiode (1) is
The semiconductor layer (2, 3) so as to cover the periphery of the n-junction (4)
While injecting charges for neutralizing the surface potential potential of the surface protective insulating film (5, 6) formed above and the semiconductor layer / surface protective film interface (10) around the pn junction (4), A first electrode (9) formed around the pn junction (4) and on the surface protection insulating film (5, 6),
The surface protective insulating film (5, 6) formed on the periphery of the pn junction (4) and in the surface protective insulating film (5, 6).
And an insulating film (21) made of a material different from that of the first electrode (9) or the p-type semiconductor (2) for insulating the surface protective insulating film (5) A solid-state imaging device characterized by being held by at least one of a charge trap between the films (21) and a charge trap in the insulating film (21).
【請求項3】前記第1の電極(9)の前記表面保護絶縁
膜(6)内への電荷注入は、電気的あるいは光学的な電
荷注入によって行われてなることを特徴とする請求項
1,2記載の固体撮像素子。
3. The charge injection of the first electrode (9) into the surface protective insulating film (6) is performed by electrical or optical charge injection. 2. The solid-state image sensor according to 2.
【請求項4】前記第1の電極(9)から前記第2の電極
(11)又は前記絶縁膜(21)へ注入する電荷は、前
記pn接合(4)周囲の前記半導体層/表面保護絶縁膜
界面(10)の表面ポテンシャルの大きさに応じて、該
界面(10)に存在する固定電荷を打ち消す反対極性の
電荷であることを特徴とする請求項1乃至3記載の固体
撮像素子。
4. The charges injected from the first electrode (9) to the second electrode (11) or the insulating film (21) are the semiconductor layer / surface protection insulation around the pn junction (4). 4. The solid-state imaging device according to claim 1, wherein the solid-state imaging device has opposite polarities that cancel fixed charges existing at the interface (10) according to the magnitude of the surface potential of the film interface (10).
【請求項5】前記第1の電極(9)は、ランダムにアク
セスする機能と、正負の任意の電荷を注入する機能と、
電荷量を調整する機能とを有することを特徴とする請求
項1乃至4記載の固体撮像素子。
5. The first electrode (9) has a function of randomly accessing and a function of injecting an arbitrary positive or negative charge.
The solid-state imaging device according to claim 1, which has a function of adjusting the amount of charges.
【請求項6】前記第1の電極(9)から注入する電荷量
の調整は、印加電圧及び印加時間の少なくともどちらか
一方によって行われてなることを特徴とする請求項5記
載の固体撮像素子。
6. The solid-state image pickup device according to claim 5, wherein the adjustment of the amount of charge injected from the first electrode (9) is performed by at least one of the applied voltage and the applied time. .
【請求項7】前記n型半導体層(3)は、前記p型半導
体層(2)上部に形成されてなることを特徴とする請求
項1乃至6記載の固体撮像素子。
7. The solid-state imaging device according to claim 1, wherein the n-type semiconductor layer (3) is formed on the p-type semiconductor layer (2).
【請求項8】前記p型半導体(2)は、前記n型半導体
層(3)上部に形成されてなることを特徴とする請求項
1乃至6記載の固体撮像素子。
8. The solid-state imaging device according to claim 1, wherein the p-type semiconductor (2) is formed on the n-type semiconductor layer (3).
JP6007351A 1994-01-27 1994-01-27 Solid-state image pick up device Withdrawn JPH07211879A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6007351A JPH07211879A (en) 1994-01-27 1994-01-27 Solid-state image pick up device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6007351A JPH07211879A (en) 1994-01-27 1994-01-27 Solid-state image pick up device

Publications (1)

Publication Number Publication Date
JPH07211879A true JPH07211879A (en) 1995-08-11

Family

ID=11663543

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6007351A Withdrawn JPH07211879A (en) 1994-01-27 1994-01-27 Solid-state image pick up device

Country Status (1)

Country Link
JP (1) JPH07211879A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
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JP2006054263A (en) * 2004-08-10 2006-02-23 Sony Corp Solid-state imaging apparatus and its manufacturing method
JP2009278129A (en) * 2009-08-17 2009-11-26 Sony Corp Solid-state imaging device and manufacturing method thereof

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006054263A (en) * 2004-08-10 2006-02-23 Sony Corp Solid-state imaging apparatus and its manufacturing method
US7737520B2 (en) 2004-08-10 2010-06-15 Sony Corporation Solid-state imaging device and camera implementing the same
US7998778B2 (en) 2004-08-10 2011-08-16 Sony Corporation Method of producing a solid-state imaging device
US8008108B2 (en) 2004-08-10 2011-08-30 Sony Corporation Solid-state imaging device, method of producing the same, and camera
US8349638B2 (en) 2004-08-10 2013-01-08 Sony Corporation Method of manufacturing back illuminated solid-state imaging device with improved transmittance of visible light
US8669634B2 (en) 2004-08-10 2014-03-11 Sony Corporation Solid-state imaging device with a hole storage layer
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