JPH07210640A - Inspection method for memory incorporated in ic card - Google Patents

Abstract

PURPOSE:To inspect an incorporated memory by storing a program for memory inspection in a ROM. CONSTITUTION:A first program for inspection is loaded in a second area of an EEPROM 15 as shown by a figure (a), and this program is used to inspect a first area. Next, a second program for inspection is loaded in the first area of the EEPROM 15 as shown by a figure (b), and this program is used to inspect the second area. After the end of inspection, contents of the EEPROM 15 are erased, and an inspection end code is written in a system area.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to an IC card, especially a CP.
The present invention relates to an IC card having a built-in U and having a memory inspection function.

[0002]

2. Description of the Related Art IC cards have attracted attention as a new information recording medium replacing magnetic cards. Especially CPU
Since the IC card having a built-in card has a high degree of security, it is expected to be used in various fields. Generally I
C card has 3 such as RAM, ROM, EEPROM
It has built-in types of memory, both of which are accessed by the built-in CPU. A program to be executed by the CPU is stored in the ROM, and an EEPROM stores
Personal data and the like for the user are stored. Also, R
The AM is used as a work area when the CPU executes instructions. Transmission / reception of data to / from the IC card is performed by a reader / writer device. When a given command is given to the IC card from the reader / writer device, this command is executed by the CPU in the IC card.

Since IC cards are distributed as devices that perform socially and economically important functions such as bank account management and payment settlement, IC card manufacturers perform strict inspection at the time of shipment. . In particular, the EEPROM used for recording personal data causes serious troubles even if the storage area of 1 byte is defective, and therefore a strict memory inspection is required at the time of shipment. C
In an IC card with a built-in PU, all of the built-in memory is normally accessed only by the built-in CPU, and the built-in memory cannot be directly accessed from outside. Therefore, in a conventional general IC card, a test program for performing a memory test is prepared in the ROM.
At the time of shipment, this inspection program is executed by the built-in CPU to inspect the built-in memory.

[0004]

Since the IC card is an extremely thin medium that can be carried, the capacity of the built-in memory is significantly limited as compared with the ordinary OA equipment. On the contrary, the contents to be processed by the IC card are becoming more complicated, and the capacity of application programs to be written in the ROM tends to increase more and more. Therefore, R
If a part of the capacity of the OM is set aside for storing the memory inspection program, the capacity of the application program necessary for causing the IC card to execute the original processing function is limited, and the IC card is provided with a sufficient function. I will not be able to give.

Further, if the memory inspection program is stored in the ROM, in the unlikely event that the CPU malfunctions, there is a possibility of accidentally rewriting the data in the memory. . That is, since the memory inspection program includes a routine for performing a writing operation and a reading operation for the memory to be inspected, C
If this routine is erroneously executed when the PU goes out of control, an unexpected write process to the memory will be performed, and the data in the memory will be destroyed. In particular, since important personal data is recorded in the EEPROM, in the unlikely event that the data is accidentally rewritten, it becomes a serious problem. Also,
Not only in the case of an accident, but there is also a risk that an unauthorized user may illegally modify the personal data in the EEPROM by using the memory inspection program in the ROM, which is also a security problem.

It is therefore an object of the present invention to provide an IC card built-in memory inspection method capable of inspecting the built-in memory without storing a memory inspection program in the ROM.

[0007]

[Means for Solving the Problems]

(1) At least a RAM, a ROM,
In a method of inspecting a memory for an IC card having three kinds of memories of EEPROM and a CPU having a function of accessing these memories,
A memory inspection program is written in the ROM, the memory inspection is performed by executing the inspection program, and the inspection program is erased after the inspection is completed.

(2) A second invention of the present application is the inspection method according to the above-mentioned first invention, wherein a first inspection program for inspecting the first area of the EEPROM is
A first step of writing in the second area of the ROM, a second step of executing the first inspection program to inspect the first area, and a second step of inspecting the second area of the EEPROM. Of the inspection program written in the first area of the EEPROM, a fourth step of executing the second inspection program to inspect the second area, and the inspection written in the EEPROM. The fifth step of erasing the application program and
The memory inspection for M is performed.

(3) The third invention of the present application is a program code input instruction indicating that a program code is inputted to the IC card from the outside in the inspection method according to the second invention. , When a given program code and an address in the EEPROM are given, a program code input process for storing the given program code at the given address, and an IC card from the outside, A program execution instruction indicating that the program in the EEPROM is executed,
A routine for executing an address in the EEPROM and a program execution process for executing the program stored at the given address when the RO is given
The first step is stored in M and externally given to the IC card a program code input instruction, a code of the first inspection program, and a predetermined address of the second area. The second step is executed by giving a program execution instruction and a predetermined address of the second area to the IC card from the outside, and a program code input instruction from the outside to the IC card. , The second inspection program code and the predetermined address of the first area are given to execute the third step, and the program execution instruction and the first area The fourth step is executed by giving a predetermined address and.

(4) A fourth invention of the present application is the inspection method according to the above-mentioned third invention, wherein a special area for writing the inspection completion information is provided at a predetermined address location in the EEPROM to provide an IC card. On the other hand, when a reset command is given, it is determined whether the inspection completion information is written in the special area, and only when the inspection completion information is not written, the first to fifth steps are performed. A routine for executing the processes up to is stored in the ROM.

[0011]

[Operation] The feature of the inspection method of the IC card built-in memory according to the present invention is that the memory inspection program is not resident in the ROM as in the conventional case, but it is
The point is to write in the EPROM. At the time of executing the inspection, the IC card manufacturer supplies the inspection program to the EEPROM.
The program may be written in the memory, the program may be executed to inspect the memory, and then the program may be erased before shipment. Since the inspection program does not remain in the EEPROM, the EEPROM is the same as the conventional IC card.
The OM can be used as a data area according to the purpose of use of the IC card. Moreover, since the inspection program does not exist in the ROM, the memory capacity allocated to the ROM can be used for storing the application program for executing the original processing of the IC card, and efficient use of memory resources Can be achieved. Further, there is no possibility that the inspection program will be erroneously executed due to the malfunction of the CPU, and there is no possibility that the inspection program will be misused by an unauthorized user.

According to the present invention, since the EEPROM itself needs to be inspected by the inspection program loaded in the EEPROM, the EEPROM is divided into two areas, and the inspection is performed separately for each area. That is, when the inspection of the first area is performed, the inspection program is loaded into the second area, and when the inspection of the second area is performed, the inspection program is loaded into the first area. In an IC card to which the present invention is applied, a program code input processing routine for loading an inspection program into an EEPROM from the outside, and an EEPROM
A program execution processing routine for executing the program in M is prepared. Using these respective routines, the inspection program loading process and the inspection execution process are performed.

[0013]

The present invention will be described below based on illustrated embodiments. FIG. 1 is a block diagram showing a state in which a general IC card 10 is connected to a reader / writer device 20.
In the IC card 10, an I / O device 11 for connecting to the reader / writer device 20, a CPU 12, and a RAM 1
3, ROM 14, and EEPROM 15 are built in. The CPU 12 receives an instruction given from the reader / writer device 20 via the I / O device 11 and executes it. Of the three types of memories, the RAM 13 is a volatile memory and is used as a work area for the CPU 12. The ROM 14 and the EEPROM 15 are both non-volatile memories, but the ROM 14 is read-only, whereas the EEPROM 15 can be rewritten at any time. Therefore, normally, the ROM 14
Has a program to be executed by the CPU 12,
In the EEPROM 15, data according to the use of the IC card 10 is recorded. Therefore, in the conventional IC card, the memory inspection program is written in the ROM 14. Before the IC card manufacturer ships the IC card, the reader / writer device 20 to the CPU 12
The memory can be inspected by giving a predetermined memory inspection command to. That is, the CPU 12 having received the memory inspection command executes the memory inspection program in the ROM 14, inspects the EEPROM 15 and the RAM 13, and outputs the result to the reader / writer device 2.
Perform processing to report to 0.

FIG. 2 is a memory map showing an example of address allocation for these three types of memories. In this example, “0000 to 0FFF”, R for the ROM 14
"1000 to 1 FFF" for AM13, EEPRO
An address of "2000 to 2FFF" is assigned to M15 (all address values are displayed in hexadecimal notation, and hereinafter, all address values in this specification are expressed in hexadecimal notation). In the conventional IC card, as described above, since the memory inspection program is prepared in the ROM 14, "0000-0000" assigned to the ROM 14 is assigned.
A part of the memory capacity of 4 kbytes "0FFF" is occupied by the memory inspection program, and the area for storing the application program for giving the original processing function to the IC card is reduced accordingly. That is as described above. In the present invention, the memory inspection program is EEPR.
It is written and executed in the OM 15, and is erased after execution. However, when the RAM 13 is inspected by using the memory inspection program written in the EEPROM 15, there is no problem, but when inspecting the EEPROM 15 itself, some kind of device is required. This is because the memory inspection program includes a writing process and a reading process for the memory area to be inspected, and therefore the memory inspection program may rewrite itself. Therefore, in the present invention, the following measures are taken.

In this embodiment, the memory map (1
(The line shows the memory area for 16 bytes)
"2000 to 2FF" assigned to the EEPROM 15
The address area "F" is set to the first area "2000" in the first half.
~ 27FF "and the second area of the latter half" 2800-2FF "
It will be handled separately as "F". Moreover, regarding the 16-byte area at the beginning of the first area (the area on the first line in FIG. 3),
Especially, it is defined as "system area".
Use in application programs is prohibited.
The meaning of providing this "system area" will be described later.

The inspection method of the present invention comprises the following five steps of processing. First stage: The first inspection program for inspecting the first area is written in the second area (see FIG. 4 (a)). Second stage: The first inspection program is executed to inspect the first area (the area to be inspected hatched in FIG. 4A). Third step: A second inspection program for inspecting the second area is written in the first area (see FIG. 4 (b)). Fourth stage: The second inspection program is executed to inspect the second area (the area to be inspected hatched in FIG. 4B). Fifth step: Erase the written inspection program.

Here, the first inspection program is a program for inspecting the address area "2000 to 27FF", for example, from address 2000 to 27FF.
The processing program is such that "FF" is written to all addresses up to, and then data is read from each address to determine whether "FF" has been correctly written. Actually, not only "FF" but also "00" is written and various other data is written. Writing and reading are repeated 100 times, for example. Similarly, the second inspection program is a program for inspecting the address areas “2800 to 2FFF”.

By the way, as shown in FIG.
In the IC card 10 incorporating the PU 12, the RAM 13,
The ROM 14 and the EEPROM 15 are usually accessed only by the CPU 12, and these memories cannot be directly accessed by the reader / writer device 20. This feature helps ensure a high degree of security. Therefore, the processing in each of the above steps is performed by the CPU
12 must be performed. Therefore, in this embodiment, the following two commands are defined as commands to the CPU 12.

The first command is a code input command whose format is shown in FIG. This command is a command for inputting (loading) a code given from the outside (reader / writer device 20) to a predetermined address in the EEPROM 15. I of this example
In the C card, various commands given from the reader / writer device 20 to the IC card 10 are defined, but the first byte of each command is a code indicating the command type. In the code input command shown in FIG. 5, the first byte indicating the type is “01”. After all, this command is EEPRO for this first byte "01".
It indicates that this is a command requesting a code input into M15. The storage start address of the code to be input (the address assigned to the EEPROM 15) follows at the second and third bytes, and the code length of the code to be input follows at the next fourth and fifth bytes. The code itself to be input follows the sixth byte.

The second command is a program execution command whose format is shown in FIG. This command is a command that gives an instruction to execute the program loaded in the EEPROM 15. The type of this command is "02" shown in the first byte.
Is. In other words, the first byte “02” indicates that this command is a command requesting execution of the program loaded in the EEPROM 15. The start address of the program to be executed (the address assigned to the EEPROM 15) follows the second and third bytes.

Of course, the command to the CPU 12 is not limited to the above-mentioned two commands, but various commands are defined.
The description is omitted here. When these commands are given from the outside (reader / writer device 20),
A routine for interpreting and executing the command is stored in the ROM 14.

When the IC card 10 capable of interpreting and executing the above-mentioned two commands is prepared, the reader / writer device 20 prepares five kinds of commands as shown in FIG. Of these commands, commands 1-
3 is a code input command shown in FIG. 5 (command whose first byte command type is “01”), and commands 4 and 5 are program execution commands shown in FIG. 6 (first byte command type is “01”). 02 ”). The meaning of each command is explained below.

Command 1 is a command for inputting the first inspection program code. "2800" of the second and third bytes of this command indicates that the storage start address is "2800", and "XXXX" of the fourth and fifth bytes indicates that the code length of the following program is "X".
XXX ”bytes (no specific numerical value is shown). Then, after the 6th byte, the "first
The actual program code of the "inspection program of" is described. Therefore, when this command 1 is given from the reader / writer device 20 to the IC card 10, the CPU 12 causes the "first inspection program" to be "2800" in the EEPROM 15 as shown in FIG. 4 (a). "
The process of storing at the address from the address will be performed.

Command 2 is a command for inputting the second inspection program code. The second and third bytes “2010” of this command indicate that the storage start address is “2010”, and the fourth and fifth bytes “XXXX” indicate that the code length of the subsequent program is “X”.
XXX ”bytes (no specific numerical value is shown). Then, after the 6th byte, "second
The actual program code of the "inspection program of" is described. Therefore, when this command 2 is given from the reader / writer device 20 to the IC card 10, the CPU 12 causes the "second inspection program" to be stored in the "2010" in the EEPROM 15 as shown in FIG. 4B. "
The process of storing at the address from the address will be performed.

Command 3 is a command for inputting an "inspection end code". In the second and third bytes "2000" of this command, the storage start address is "200".
"0", and "0001" at the 4th and 5th bytes
Indicates that the following code length is 1 byte. Then, "5A" which is the "inspection end code" is described in the 6th byte. Here, the code "5A" itself has no special meaning, and "5A" is simply agreed as the "inspection end code" as one unique value. After all, when this command 3 is given from the reader / writer device 20 to the IC card 10, the CP
U12 EEPs "5A" which is the "inspection end code"
The process of writing to the address "2000" in the ROM 15 will be performed. As shown in FIG. 3, addresses “2000-
"200F" is an area reserved as a "system area", and especially the head address "2000" is an address which functions as a flag indicating whether or not the inspection is completed.
Here, the data at address 2000 will be referred to as FLG. In this embodiment, if FLG = “5A”, it means that the inspection of the EEPROM 15 is completed, and if FLG ≠ “5A”, it means that the inspection of the EEPROM 15 is not completed. .

Command 4 is a command for executing the first inspection program. 2, of this command
The execution start address of the second byte "2800" is "2800".
800 ”. Therefore, when this command 4 is given from the reader / writer device 20 to the IC card 10, the CPU 12 causes the "first inspection" loaded in the address "2800" as shown in FIG. 4 (a). Program "is executed, and as a result, the inspection target area" 2000- "indicated by hatching in FIG.
27FF ”will be inspected.

Command 5 is a command for executing the second inspection program. 2, of this command
In the third byte “2010”, the execution start address is “2”.
010 ”. Therefore, when this command 5 is given from the reader / writer device 20 to the IC card 10, the CPU 12 causes the "second inspection" loaded at the address "2010" as shown in FIG. 4 (b). As a result, the inspection target area "2800-" indicated by hatching in FIG.
2FFF ”will be checked.

In this embodiment, the internal memory is tested by I
A reset routine as shown in FIG. 8 is prepared in the ROM 14 so that it can be executed when a reset command is first given to the C card. That is, when a reset command is given to the IC card 10 from the reader / writer device 20, the CPU 12 executes the reset routine shown in the flowchart of FIG. First,
In step S1, it is determined whether FLG = “5A”. As mentioned above, FLG is EEP
This is data at address 2000, which is the "system area" in the ROM 15, and this data functions as an inspection end code. If FLG = “5A” in step S1, the inspection has been completed, so in step S2 a normal reset process (process executed in a reset routine of a conventional IC card: for example, initializing a variable) is performed. Processing) is performed, and then the application program routine is executed. On the other hand, if FLG ≠ “5A” in step S1, the inspection has not yet been performed, so the inspection is performed by the procedure from step S3.

First, in step S3, a command waiting state is entered. That is, a standby state is provided until some command is given from the reader / writer device 20 side. If any command is given, first step S
At 4, it is determined whether the command is a "code input command" (ie 1 of the given command).
It is determined whether the command type at the byte is "01"). If it is not the "code input command", it is determined in the next step S5 whether or not the command is the "program execution command" (that is, the command type of the first byte of the given command is "02". It is determined whether or not). If the given command is neither a "code input command" nor a "program execution command", an abnormal command reception response is sent to the reader / writer device 20 side in step S6, and the process from step S1 is executed again. Will be done. That is, the inspection process after step S3 is based on the premise that any one of the five commands 1 to 5 shown in FIG. 7 is given.

When the command given from the reader / writer device 20 is the "code input command", the process branches from step S4 to step S7, and the EEP is executed.
Code input processing to the ROM 15 is executed. As described above, the “code input command” is a command having a format as shown in FIG. 5, and this command is stored in the address location subsequent to the storage start address shown in the second and third bytes of this command. The code to be input after the 6th byte is stored. Then, in the next step S8, it is again determined whether FLG = “5A”. If FLG = “5A”, step S9
In the EEPROM area (2001 to 2001) other than FLG
After the erasing process is executed for the address 2FFF), the process returns to step S1. On the other hand, if FLG ≠ “5A”, the process directly returns from step S8 to step S1.

On the other hand, if the command given from the reader / writer device 20 is the "program execution command", the process branches from step S5 to step S10.
The designated program in the EEPROM 15 is executed. As described above, the “program execution command” is a command having the format shown in FIG. 6, and the program is executed from the execution start address shown in the second and third bytes of this command. . The process of step S10 is performed in the form of a subroutine call of the program in the EEPROM 15.
When the execution of the program in the OM15 is completed, step S
It returns from 10 to step S1.

The program called as a subroutine from step S10 is a memory inspection program loaded in the EEPROM 15. As previously mentioned,
In this embodiment, a first inspection program for inspecting the first area of the EEPROM 15 and a second inspection program for inspecting the second area are prepared. FIG. 9 is a flow chart showing an example of the processing procedure of the first inspection program. In this program, first, in step S11, the address "2000
The data "FF" is written in "~ 27FF address". In the following step S12, the same address "2000-27
Data is read from the "FF address" byte by byte, and it is checked whether or not they are "FF". Thus, if all the read data are "FF",
In step S13, it is determined as normal, and step S1
In 4, the normal response to the reader / writer device 20 is sent. On the other hand, when the read data is "F
If anything other than "F" is included, it is determined to be abnormal in step S13, and an abnormal response is sent to the reader / writer device 20 in step S15. Note that the inspection procedure shown in FIG. 9 shows a simple model as an example. In practice, various data write / read inspections other than “FF” are performed.
In addition, writing / reading is generally performed a plurality of times.

As described above, the IC shown in this embodiment
Card 10 contains in ROM 14 the specific routines required to perform the memory test of the present invention. That is, the reset routine shown in FIG. 8 and the routine for interpreting and executing the “code input command” shown in FIG.
It is a routine that interprets and executes the "program execution command" shown in. However, these specific routines are relatively simple processing routines, and the memory capacity required to store these routines is smaller than the memory capacity required to store the routines for performing the memory check. End

Finally, the IC card 1 as described above
A memory inspection procedure using 0 will be described. This memory inspection is performed at the time of shipment by the IC card manufacturer. Before shipment, the manufacturer connects the IC card 10 to the reader / writer device 20 as shown in FIG. 1 and gives a reset command to the IC card 10 from the reader / writer device 20. The CPU 12 receives this reset instruction and
The reset routine shown in FIG. 8 prepared in the OM 14 is executed. First, in step S1, FLG = “5
It is determined whether or not it is "A". Since the initial state of all address areas of the EEPROM 15 is a state in which data "FF" or "00" is normally stored,
The data FLG stored in the address is not "5A". Therefore, the inspection process after step S3 is executed. The IC card 10 enters a command standby state in step S3. Therefore, the reader / writer device 20 gives the command 1 shown in FIG. 7 to the IC card 10. Since this command 1 is a "code input command", it branches from step S4 to step S7, and the "first inspection program" is loaded at address 2800 and later (see FIG. 4 (a)). . In the next step S8, it is determined that FLG ≠ “5A”, and the process returns to step S1 again.

Then, the process proceeds from step S1 to step S3, and the command standby state is entered again. Therefore, this time, the command 4 shown in FIG. 7 is given from the reader / writer device 20 to the IC card 10. Since this command 4 is a “program execution command”, the process branches from step S5 to step S10, the “first inspection program” loaded at address 2800 and thereafter is executed, and the first area of the EEPROM 15 is written. The inspection will be performed (see Fig. 4 (a)). In this inspection, for example, the process shown in the flowchart of FIG. 9 is executed, and a normal response is sent to the reader / writer device 20 (step S14) or an abnormal response is sent (step S).
15) is done. Once the inspection is complete, step S again
I will return to 1.

Then, again, from step S1 to step S3
And the command standby state is entered. Therefore, next, the command 2 shown in FIG. 7 is given from the reader / writer device 20 to the IC card 10. This command 2 is
Since this is a "code input command", the process branches from step S4 to step S7, and the "second inspection program" is loaded at address 2010 and thereafter (Fig. 4 (b)).
reference). In the next step S8, it is determined that FLG ≠ “5A”, and the process returns to step S1 again.

Then, the process proceeds from step S1 to step S3, and the command standby state is entered again. Therefore, this time, the command 5 shown in FIG. 7 is given from the reader / writer device 20 to the IC card 10. Since this command 5 is a "program execution command", the process branches from step S5 to step S10, the "second inspection program" loaded at address 2010 and thereafter is executed, and the second area of the EEPROM 15 is written. The inspection will be conducted (see Fig. 4 (b)). When the inspection is completed, the process returns to step S1 again.

Then, again, from step S1 to step S3
And the command standby state is entered. So this time,
From the reader / writer device 20 to the IC card 10,
Command 3 shown in FIG. 7 is given. This command 3
Is a "code input command", so step S4
To step S7, the data "5A" as the "inspection end code" is written at the address 2000. Therefore, in the next step S8, it is determined that FLG = “5A”, and step S9 is executed. This step S9
Is a process for erasing the EEPROM area other than FLG. That is, the area other than the address 2000 assigned to the FLG is erased, and specifically, for example, the data “FF” is written in the address “2001-2FFF address”.

When the erasing process of step S9 is completed, the process returns to step S1 again, but this time, it is determined that FLG = “5A”, the normal reset process of step S2 is executed, and then the application program routine is executed. It will be. This completes the memory inspection process at the time of shipment by the IC card manufacturer. 2000 F
In LG, data “5A” as “inspection end code”
Remains in the written state. As mentioned above, EEPRO
The address "2000-200F" of M15 is defined as a "system area" and is prohibited from being used in an application program. Therefore, the data "5A" as the "inspection end code" is rewritten thereafter. Never. In this embodiment, "system area (addresses 2001 to 200F)" other than address 2000
However, in practice, it can be appropriately used for storage of system variables and the like.

Now, the IC thus tested for memory
The card 10 is delivered from the manufacturer to a user (for example, a bank). The user issues this IC card 10 to each customer (for example, issues it to a bank depositor as a cash card). As described above, when the IC card 10 is being used by the user or the customer, the memory inspection program in the EEPROM 15 has already been erased. Therefore, even if the CPU 12 malfunctions, the memory inspection program is erroneously executed. The memory inspection program is not illegally used. Further, since the "inspection end code: 5A" is written in the address 2000, when the reader / writer device 20 gives a reset command to the IC card 10, in step S1 in the flowchart of FIG.
Since the application program is started after the judgment of 5A is made and the normal reset process in step S2 is executed, it is possible to use the IC card in the same manner as the conventional IC card.

Although the present invention has been described above based on the illustrated embodiment, the present invention is not limited to this embodiment and can be implemented in various modes other than this. For example, the command formats shown in FIGS. 5 and 6 are shown as an example, and any other format may be defined. Further, in the above-described embodiment, only the memory inspection for the EEPROM 15 is performed, but the memory inspection for the RAM 13 can be similarly performed.

[0042]

As described above, according to the method for inspecting a memory with a built-in IC card according to the present invention, the memory inspection program is written in the EEPROM, and the memory inspection is performed by executing the inspection program, and the inspection is performed. Since the inspection program is erased after the end, ROM
Without storing the program for memory inspection in
It becomes possible to inspect the built-in memory.

[Brief description of drawings]

FIG. 1 is a block diagram showing a state in which a general IC card 10 is connected to a reader / writer device 20.

FIG. 2 is a memory map showing an example of address allocation for three types of memories built in the IC card 10 shown in FIG.

FIG. 3 is a detailed diagram of a memory map of the EEPROM 15 shown in FIG.

FIG. 4 shows an EE in the memory inspection method according to the present invention.
Inspection of the first area of the first half of the PROM 15 (see FIG.
(a)) and inspection for the second area in the latter half ((b) in the same figure)
It is a figure which shows performing separately.

FIG. 5 is a diagram showing a format of a code input command defined for implementing the memory inspection method according to the present invention.

FIG. 6 is a diagram showing a format of a program execution command defined for implementing the memory inspection method according to the present invention.

FIG. 7 is a diagram showing five types of commands prepared for carrying out the method for inspecting a memory according to the present invention.

FIG. 8 is a flowchart showing a reset routine in a ROM prepared for carrying out the memory inspection method according to the present invention.

FIG. 9 is a flow chart showing an example of an inspection program loaded in the EEPROM for carrying out the memory inspection method according to the present invention.

[Explanation of symbols]

 10 ... IC card 11 ... I / O device 12 ... CPU 13 ... RAM 14 ... ROM 15 ... EEPROM 20 ... Reader / writer device

Claims (4)

[Claims] 1. At least RAM, ROM, EEPRO
In a method of inspecting a memory for an IC card having three types of memory M, and a CPU having a function of accessing these memories, a memory inspecting program is written in the EEPROM, and A method for inspecting a memory with a built-in IC card, comprising inspecting a memory by executing a program and erasing the inspection program after the inspection is completed. 2. The inspection method according to claim 1, further comprising: a first step of writing a first inspection program for inspecting the first area of the EEPROM into a second area of the EEPROM; Second step of executing the inspection program of 1. to inspect the first area, and second step of inspecting the second area of the EEPROM.
In the EEPROM, a third step of writing the inspection program in the first area of the EEPROM, a fourth step of executing the second inspection program to inspect the second area, and A method of inspecting a memory built in an IC card, characterized by performing a fifth step of erasing the inspection program written in, and performing a memory inspection for the EEPROM. 3. The inspection method according to claim 2, wherein a program code input instruction indicating that a program code is input into the EEPROM from the outside to the IC card, a predetermined program code, and the program code in the EEPROM. Indicates that when an address is given, a program code input process for storing the given program code at the given address and executing the program in the EEPROM to the IC card from the outside Program execution instruction and EE
When the address in the PROM and the given address are given, the program execution process for executing the program stored at the given address and the routine for performing are stored in the ROM and externally stored in the IC card. On the other hand, the first step is executed by giving the program code input instruction, the code of the first inspection program, and the predetermined address of the second area. The second stage is executed by giving a program execution instruction and a predetermined address of the second area, and the program code input instruction and the code of the second inspection program are externally supplied to the IC card. And a predetermined address of the first area, the third step is executed, and the program is executed from the outside to the IC card. Shows a, the first predetermined address and, IC card built test method of the memory, characterized in that to perform the fourth stage by providing the region. 4. The inspection method according to claim 3, wherein a special area for writing inspection completion information is provided at a predetermined address location in the EEPROM, and when a reset command is given to the IC card. ,
It is determined whether the inspection completion information is written in the special area, and the processes from the first step to the fifth step are executed only when the inspection completion information is not written. A method for inspecting an IC card built-in memory, characterized in that a routine is stored in a ROM.