JPH07210489A - Data processor - Google Patents

Abstract

PURPOSE:To prevent the performance of input/output processing from deteriorating by distributing input/output processing requirements to plural channel controllers corresonding to the loading condition of the channel controller so as to reduce overrunning caused by overload of a channel controller. CONSTITUTION:A counting means 21 adds or subtracts at fixed periods corresonding to whether an input/output processing control means 20 controls input/output processing with channel devices 31 to 3k and 41 to 4m and peripheral devices 51 to 5n or not. When the count value is larger than a prescribed value, a comparing means 22 informs a busy display means 23 of the result. At the time of requiring input/output processing to a peripheral device 5n, CPU 1 refers to the busy display and requires input/output processing to a channel controller 2j which is not busy. Then, when all the channel controllers 25 are busy at the time of referring to the busy display, input/output processing requirement is queued at an input/output processing requirement queue 12 until the busy display of one of the channel controllers is released.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data processing device,
In particular, the present invention relates to a data processing device that prevents a decrease in input / output processing performance due to a load on a channel controller when the load is concentrated on a specific channel controller.

[0002]

2. Description of the Related Art A conventional data processing apparatus of this type will be described with reference to FIG. Channel devices 21 to 2j
Are connected to the central processing unit 1. Channel device 3
1 to 3k and channel devices 41 to 4m are connected to the channel control devices 21 to 2j, respectively. Peripheral device 51
5n are connected to the channel devices 31 to 3k and the channel devices 41 to 4m, respectively. Each peripheral device has multiple alternate paths from multiple channel controllers.

The central processing unit 1 prepares a channel program 11 when making an input / output processing request to the peripheral device 51, and makes an input / output processing request 100 to any channel control device having a path with the peripheral device 51. -J is issued by the input / output processing requesting means 10.

Upon receiving the input / output processing request 100-j to the peripheral device 51, the channel control device 2j executes the channel program 11 by the input / output processing control means 20, and the peripheral device via the channel device 31 or the channel device 41. It controls input / output processing with the device 51.

Similarly, the central processing unit 1 has a peripheral device 5n.
Channel program 1 when requesting input / output processing to / from
1 is prepared, and the input / output processing request means 100 issues an input / output processing request 100-j to any channel control device having a path with the peripheral device 5n.

Upon receiving the input / output processing request 100-j to the peripheral device 5n, the channel control device 2j executes the channel program 11 by the input / output processing control means 20 and the peripheral device via the channel device 3k or the channel device 4m. It controls input / output processing with the device 51.

As described above, the input / output processing control means 20 in the channel control device 2j controls the input / output processing of a plurality of channel devices and peripheral devices.

[0008]

When constructing the above-described data processing device, the path from the peripheral device 5n is such that the path from the channel controller 21 has the first priority and the path from the channel controller 2j has the jth priority. Therefore, the load may be concentrated on a specific channel control device 2j.

Therefore, due to the overrun which may occur due to the overload of the channel control device, the input / output processing performance of the entire system is lowered by the relief of the overrun.

[0010]

A data processor according to the present invention comprises a central processor, a plurality of channel controllers,
A channel device and a peripheral device, wherein the peripheral device is
An input / output processing control means having an alternative path from a plurality of channel control apparatuses, the channel control apparatus receiving an input / output processing request from the central processing unit and controlling input / output processing with the channel apparatus and the peripheral apparatus. A count means for adding at a constant cycle if the input / output processing control means is busy, and a subtraction at a constant cycle if the input / output processing control means is not busy, and a comparing means for comparing a count value of the count means with a predetermined value. And a means for indicating to the central processing unit that the channel device is busy when the comparison result in the comparison unit is larger than a predetermined value, the central processing unit requesting input / output processing with the peripheral device. I / O processing that refers to the channel controller busy display and requests I / O processing to a channel controller that is not busy And an input / output processing request queuing means for waiting an input / output processing request until the busy display of any one of the channel control apparatuses is released when all the channel control apparatuses are busy at the time of referring to the busy display. It is characterized by including.

[0011]

Embodiments of the present invention will now be described with reference to the drawings.

Referring to FIG. 1, in a data processor according to an embodiment of the present invention, channel controllers 21 to 2 are provided.
j is connected to the central processing unit 1. The channel devices 31 to 3k and the channel devices 41 to 4m are connected to the channel control devices 21 to 2j, respectively. Peripheral device 5
1 to 5n are connected to the channel devices 31 to 3k and the channel devices 41 to 4m, respectively. Each peripheral device has multiple alternate paths from multiple channel controllers.

The central processing unit 1 prepares the channel program 11 when making an input / output processing request to the peripheral device 51, searches for a path that is not in use as a path to the peripheral device 51, and passes the path to the peripheral device 51. The input / output processing request 100-j is issued by the input / output processing requesting means 10 to any channel controller having

Upon receiving the input / output processing request 100-j to the peripheral device 51, the channel control device 2j executes the channel program 11 by the input / output processing control means 20 and the peripheral device via the channel device 31 or the channel device 41. It controls input / output processing with the device 51.

Similarly, the central processing unit 1 includes a peripheral device 5n.
Channel program 1 when requesting input / output processing to / from
1 is prepared, the path to the peripheral device 5n is searched for an unused path, and the input / output processing request 100-j is issued to the input / output processing request 100-j to any channel control device having the path to the peripheral device 5n. Issued by.

Upon receiving the input / output processing request 100-j to the peripheral device 5n, the channel control device 2j executes the channel program 11 by the input / output processing control means 20 and the peripheral device via the channel device 3k or the channel device 4m. It controls input / output processing with the device 51.

In this way, the input / output processing control means 20 in the channel control device 2j controls the input / output processing of a plurality of channel devices and peripheral devices.

The counting means 21 adds at a constant cycle when the input / output processing control means 20 controls the input / output processing with the channel device and the peripheral device, and adds at a constant cycle when the input / output processing is not controlled. Subtract. The counting means 21 does not add or subtract when the count value overflows or underflows. This counting means 2
At 1, the busy monitoring of the input / output processing control means is performed.

The comparing means 22 compares the count value of the counting means 21 with a preset value, and when the count value is larger than the preset value, notifies the busy display means 23 of the result. The busy display means 23 notifies the central processing unit 1 that the channel control device 2j is busy via the line 101-j. The central processing unit 1 makes a peripheral request when it makes an input / output processing request to the peripheral device 5n. The path with the device 5n is searched for an unused path, the channel controller busy display 101-j corresponding to this path is referred to, and if the channel controller 2j is not busy, the channel program 11 is prepared,
The input / output processing request 100-j is issued.

When an input / output processing request 100-j to the peripheral device 5n is issued to the channel controller 2j,
When the busy display 101-j is displayed from all the channel control devices 2j on the unused path to the peripheral device 5n, the I / O processing request waits until the busy display of any channel control device is released. The queue 12 waits for the input / output processing request 100-j.

[0021]

As described above, according to the present invention, by distributing the input / output processing request to a plurality of channel control devices according to the load state of the channel control devices, it can be caused by the channel control device overload. Overrun can be reduced.

Further, since the waiting time for the input / output processing due to the overload of the channel controller can be shortened, the deterioration of the input / output processing performance of the entire system can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a block diagram of a conventional data processing device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Central processing unit 21-2j Channel control device 31-3k, 41-4m Channel device 51-5n Peripheral device 10 Input / output processing request means 11 Channel program 12 Input / output processing request queue 20 Input / output processing control means 21 Counting means 22 Comparing means 23 Busy display means 100-1 to 100-j Input / output processing request 101-1 to 101-j Channel controller busy display

Claims (1)

[Claims] 1. A central processing unit, a plurality of channel control devices, a channel device, and a peripheral device, wherein the peripheral device has an alternative path from the plurality of channel control devices, and the channel control device is , An input / output processing control means for receiving an input / output processing request from the central processing unit and controlling input / output processing with the channel device and the peripheral device, and at a constant cycle when the input / output processing control means is busy. Counting means for adding and subtracting at regular intervals if not busy, comparing means for comparing the count value of the counting means with a preset value, and the central processing unit if the comparison result in the comparing means is greater than the preset value To the channel device, means for indicating that the channel device is busy, the central processing unit, when making an input / output processing request with the peripheral device, I / O processing requesting means for referring to the channel controller busy display and issuing an input / output processing request to a non-busy channel controller; and when all the channel controllers are busy when the busy display is referenced, one of the above I / O processing request queuing means for waiting I / O processing requests until the busy display of the channel controller is released.