US20130191841A1 - Method and Apparatus For Fine Grain Performance Management of Computer Systems - Google Patents
Method and Apparatus For Fine Grain Performance Management of Computer Systems Download PDFInfo
- Publication number
- US20130191841A1 US20130191841A1 US13/797,796 US201313797796A US2013191841A1 US 20130191841 A1 US20130191841 A1 US 20130191841A1 US 201313797796 A US201313797796 A US 201313797796A US 2013191841 A1 US2013191841 A1 US 2013191841A1
- Authority
- US
- United States
- Prior art keywords
- task
- tasks
- work
- execution
- completed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
Definitions
- This invention relates to systems and methods for management of the performance of tasks in a computer system.
- a computer system often runs a number of different tasks during a particular period of time.
- the tasks can be associated with a variety of applications.
- the tasks operate using a variety of computer system resources.
- An operating system controls and provides access to many of the computer system resources, such as the memory system.
- the tasks can make requests for the computer system resources to the operating system.
- the tasks can perform various functions, some of which may need to be performed in real time. Functions that are performed in real time are usually associated with certain service requirements to meet real time deadlines. The service requirements are usually measured in the frequency of requests and/or response time. Thus, the real time task needs a certain minimum number of resources including execution resources to operate in real time. Other tasks may not operate in real time. Therefore, requests by these tasks can be serviced whenever the resources are available.
- a method for managing the performance of a computer system includes the steps of assigning a task profile that specifies task parameters for each of the one or more tasks.
- the one or more tasks are executed on a processing module of the computer system.
- the method also includes comparing a current real time and a computed start time associated with the one or more tasks to determine whether to select one or more tasks to be scheduled for execution on the processing module.
- a task to be scheduled for execution is selected when the value of the difference between the current real time and the calculated start time meets a threshold criteria.
- the selection can be in accordance with the task parameters including a parameter indicating that the task is not waiting on one of the occurrence and non-occurrence of an event.
- the scheduling of the execution of the task is delayed when the value of the difference between the current real time and the calculated start time fails to meet the threshold criteria.
- the method also includes prioritizing the execution schedule of the task based on the task parameters including a task priority.
- the execution of the task can be monitored to determine a monitored value related to the amount of work completed by the task. Further, the method includes comparing the monitored value related to the amount of work completed to a parameter value related to the amount of work to be completed by the task. A responsive action is taken when the difference between the monitored value related to the amount of work completed and the parameter value related to the amount of work to be completed meets a first threshold criteria.
- a system for managing the performance of a computer system includes a management module to assign a task profile that specifies task parameters for each of the one or more tasks.
- the one or more tasks can be executed on a processing module of the computer system.
- the task profile for the one or more tasks can be stored in a storage device.
- the system also includes a shaper module to compare the current real time and a computed start time associated with a task of the one or more tasks to determine whether to select a task to be scheduled for execution on the processing module.
- the shaper module selects the task to be scheduled for execution when the value of the difference between the current real time and the calculated start time meets a threshold criteria.
- the selection can be in accordance with the task parameters including a parameter indicating the task is not waiting on one of the occurrence and non-occurrence of an event.
- the shaper module delays the scheduling of the execution of the task when the value of the difference between the current real time and the calculated start time fails to meet the threshold criteria.
- the system further includes a scheduler module to prioritize the execution schedule of the task based on the task parameters including a task priority.
- a metering module monitors the execution of the task to determine a monitored value related to the amount of work completed by the task. The metering module compares the monitored value related to the amount of work completed to a parameter value related to the amount of work to be completed of the task. A responsive action can be taken when the difference between the monitored value related to the amount of work completed and the parameter value related to the amount of work to be completed meets a first threshold criteria.
- FIG. 1 is a block diagram of a computer system according to an embodiment
- FIG. 2 is a block diagram of a metering module according to an embodiment
- FIG. 3 illustrates one embodiment of an operation implemented in the scheduler module according to an embodiment
- FIG. 4 illustrates one embodiment of the operation implemented in the shaper module according to an embodiment
- FIG. 5 is a flowchart of a method for managing the performance of tasks in a computer system according to an embodiment.
- FIG. 1 is a simplified block diagram of a computer system including a processor system 10 , a management module 106 and a system memory 150 . Some of the commonly known elements of the processor system and the computer system are not shown in the figure in order to aid understanding of the present invention.
- the processor system 10 can be a central processing unit, a processor, a microprocessor, a processor core or the like.
- the functional elements of the processor system depicted in FIG. 1 can be implemented in hardware or with a combination of hardware and software (or firmware).
- One embodiment of the processor system 10 includes an instruction cache 104 , instruction fetch/branch unit 115 , an instruction decode module 125 , an execution unit 135 , a load/store unit 140 , a data cache 145 and a performance management system 105
- the performance management system 105 includes a metering module 110 , a scheduler module 120 , and a shaper module 130 .
- a task context memory which stores the task profiles for a task, is incorporated into the system memory 150 . In other embodiments, the task context memory may be independent of the system memory 150 .
- a task may be referred to as a set of instruction to be executed by the processor system 10 .
- a task may also be processes such as instances of computer programs that are being executed, threads of execution such as one or more simultaneously, or pseudo-simultaneously, executing instances of a computer program closely sharing resources, etc. that execute within one or more processor systems 10 (e.g., microprocessors) or virtual machines such as virtual execution environments on one or more processors.
- a virtual machine (VM) is a software implementation of a machine (computer) that executes programs like a real machine.
- the tasks may be state machines such as DMA controllers and the collection of commands for such state machines (e.g., DMA channels), etc.
- Direct memory access is a feature of modern computers and microprocessors that allows certain hardware subsystems within the computer to access system memory for reading and/or writing independently of the central processing unit.
- Many hardware systems use DMA including disk drive controllers, graphics cards, network cards, sound cards and Graphics Processing Units (GPUs).
- DMA may also used for intra-chip data transfer in multi-core processors, especially in multiprocessor system-on-chips, where its processing element is equipped with a local memory (often called scratchpad memory) and DMA is used for transferring data between the local memory and the main memory.
- the management module 106 may be part of the computer system coupled to the processing module (for example, a program residing in the system memory 150 ).
- the management module may create and assign task profiles that specify task parameters for tasks.
- the management module 106 controls the allocation of resources by determining/controlling the task profiles (e,g. through a set of policies/rules).
- the performance management system 105 of the processor system 10 controls the allocation of processor execution resources to individual tasks executing in the computer system.
- the performance management system 105 controls the allocation of state machine execution resources to individual tasks executing in the state machine.
- the management module 106 controls the allocation of resources by determining/controlling the task profiles (e,g. through a set of policies/rules). For example, by controlling the allocation of execution resources to all tasks in the state machine, each task may be provided with throughput and response time guarantees.
- this control is accomplished through task or workload shaping which delays the execution of tasks that have used their task or workload allocation until sufficient time has passed to accumulate credit for execution (accumulate credit over time to perform their allocated work) and task or workload prioritization which gives preference to tasks based on configured priorities.
- Tasks are assigned task profiles that specify task parameters. Examples of task parameters include task priority, P, work to be completed, We, scheduling interval, Ti, and maximum work to be completed, Wm.
- the task priority determines the task's priority, including the task priority class such that, tasks of higher priority classes may be preferentially scheduled or queued ahead of lower priority classes.
- the work to be completed determines the expected work to be performed by the task when it is scheduled for execution.
- the maximum work to be completed specifies the maximum work the task may accumulate if, for example, the completion of its expected work is postponed.
- the scheduling interval is the desired time between scheduled execution runs. Thus, the expected work rate can be calculated as We/Ti, called work rate Wr.
- the work may be a measure of data transference, processor instructions completed, or other meaningful units of measure of work done by the processor system 10 or state machine such as a direct memory access (DMA) controller.
- DMA direct memory access
- the processor system 10 executes instructions stored in the system memory 150 where many of the instruction operate on data stored in the system memory 150 .
- the instructions may be referred to as a set of instructions or program instructions throughout this document.
- the system memory 150 may be physically distributed in the computer system.
- the instruction cache 104 temporarily stores instructions from the system memory 150 .
- the instruction cache 104 acts as a buffer memory between system memory 150 and the processor system 10 .
- the fetch/branch unit 115 is coupled to the instruction cache 104 and configured to retrieve instructions from the system memory 150 for storage within the instruction cache 104 .
- the instruction decode module 125 interprets and implements the instructions retrieved. In one embodiment the decode module 125 breaks down the instructions into parts that have significance to other portions of the processor system 10 .
- the execution unit 135 passes the decoded information as a sequence of control signals, for example, to relevant function units of the processor system 10 to perform the actions required by the instructions.
- the execution unit includes register files and Arithmetic Logic Unit (ALU). The actions required by the instructions can include reading values from registers, passing the values to an ALU (not shown) to add them together and writing the result to a register.
- ALU Arithmetic Logic Unit
- the execution unit 135 may include a load/store unit 140 that is configured to perform access to the data cache 145 .
- the load/store unit 140 may be independent of the execution unit 135 .
- the data cache 145 can be a high-speed storage device, for example a random-access memory, which contains data items that have been recently accessed from system memory 150 , for example.
- the data cache 145 can be accessed independently of the instruction cache 104 .
- the metering module 110 measures and monitors the work completed by a task that is currently being executed on the processor system 10 .
- One or more tasks can be implemented on the processor system 10 .
- the monitored value of work completed or information about the amount of work completed can be measured by the amount of instructions completed and can be acquired from the instruction fetch/branch unit 115 as illustrated by the arrow 170 in FIG. 1 .
- the monitored values can also be measured by the memory operations that can be acquired from the load/store unit 140 as illustrated by the arrow 165 in FIG. 1 .
- the meter module 110 when used to monitor memory operations (bandwidth), may be configured to only account for memory operations to/from certain addresses (such as a video frame buffer).
- This configuration can be varied on a task-by-task basis (with the configuration information part of the Task Context or task profile).
- the instructions completed information includes information as which thread had completed certain instructions (typically by tagging the thread or process or task identifier).
- the memory operations information similarly includes this thread identifier in order for the metering module 110 associate these operations to the correct task.
- the example task performs video decompression and is managed by the performance management system 105 by monitoring its output data rate.
- Video compression algorithms used by most advanced video encoding standards, achieve high rates of data compression by exploiting the redundancy in video information. These compression algorithms remove both the temporal redundancy, arising from successive frames of video images displaying the same scene, and spatial redundancy, occurring when portions of the picture are replicated (often with minor changes) within a single frame of video.
- the level of computation required to decompress each frame may vary significantly from one frame to another, however the resulting output data rate is, in general, constant determined by the number of pixels in the display frame, the number of bits in each pixel and the frame rate.
- a task performing video decompression can be managed effectively by monitoring its output data rate.
- a video decompression playback at 320 pixels wide ⁇ 240 pixels high video display with 16 bit pixel depth at 20 frames/second requires the video decompression task to generate 1,228,800 bits every 50 milliseconds. These values may be utilized as the expected work and the work rate in the profile for this task. Therefore, the task is scheduled to generate 1,228,800 bits of data every 50 milliseconds (so long as there is input data) regardless of the actual time required to decompress each frame (system design would require the maximum frame decompression/decode time to be less than 50 milliseconds).
- the shaper module 130 has the list of ineligible tasks to be performed by the processor system 10 .
- the shaper module determines when a task can be passed to the scheduler module 120 to be scheduled for execution.
- a task is eligible if the current real time (value of a real time clock) is equal to or greater than the computed start time for the task and ineligible if the start time is greater than real time.
- a task may be blocked if it is awaiting an event (such as arrival of a message from another task, data from an external Input-Output device, etc.) before it can be scheduled for execution and is deemed unblocked if it is not waiting for such an event. This information can be provided to the shaper by an operating system.
- the shaper module 130 queues ineligible tasks until they become eligible, whether they are blocked or not.
- a task is eligible for execution if it is eligible and not blocked.
- the scheduler module 120 selects the next task(s) to be executed from its list of tasks based on the task parameters including task priority.
- the currently executing task selected by the scheduler module 120 is monitored by the metering module 110 as illustrated in FIG. 1 .
- the scheduler module 120 may indicate that a higher priority task is ready to the processor system 10 .
- the processor system 10 (or software on the processor system 10 ) may decide to preemptively switch from the currently running task and run the higher priority task.
- the scheduler or software in the processor system indicates the that a higher priority task is available. In which case, the task currently running or executed in the processor system 10 is placed in the scheduler module 120 .
- the metering module 110 monitors the selected higher priority task that is now currently executing.
- the moving of tasks from the scheduler and shaper and as described elsewhere can be accomplished through the use of pointers or actually moving instructions between memory locations depending on design concerns.
- the metering module 110 can be implemented in hardware, only the metering module 110 need be for practical high performance applications. Some implementations may utilize software to implement the shaper module 130 and/or the scheduler module 120 depending on scheduling time and task workload granularity and scheduling/shaping processor overhead. Lower performance applications could implement the metering module 110 , or some portion thereof, in software.
- FIG. 2 is a block diagram of a metering module 110 according to an embodiment. For explanatory purposes, FIG. 2 will be discussed with reference to FIG. 1 .
- the metering module 110 measures the work performed or amount of work completed by the currently executing task(s). In one embodiment the metering module 110 monitors the execution of the task to determine a monitored value related to the amount of work completed for the task.
- the monitored value related to the amount of work completed can be the actual amount of work completed, a counter value or the like that is proportional to or related to the amount of work completed.
- one embodiment of the metering module 110 includes a work completed module 210 , a work to be completed module 220 , a comparator module 230 , and an adder module 240 .
- the work completed module 210 is a work completed counter and the work to be completed module 220 is also a work to be completed counter.
- the work to be completed counter can be updated based on the work rate while the task is executing to account for the passage of time
- the work to be completed can calculated by the scheduler when the task is selected or moved from the scheduler to the meter, for example.
- a monitored value related to the work performed or work completed W c is measured by counting the accesses to memory, instructions completed, or other measurable quantities that are meaningful measurements of work by the currently executing task(s).
- the monitored value for example the number of accesses to memory may be received at the adder module 240 where they are summed and provided to the work completed module 210 .
- the monitored values can also be measured by the memory operations that can be acquired from the load/store unit 140 as illustrated by the arrow 165 in FIG. 1 above.
- the work to be completed module 220 receives a parameter value W e related to the amount of work to be completed.
- the parameter value related to the amount of work to be completed is a predetermined value that is stored in the task profile of a task.
- the parameter value can be the actual amount of work to be completed, a counter value or the like that is proportional to or related to the amount of work to be completed.
- the parameter value can also be a constant parameter or calculated from the work rate and work credit over time.
- the parameter value is predetermined by the management module 106 during the process of mapping task to a target computer system.
- the comparator module 230 receives the monitored value related to the work performed or completed W c and the monitored value related to the amount of work to be completed W e .
- the amount of work to be completed determines the expected work to be performed by the task when it is scheduled for execution.
- the comparator module 230 compares the value related to the amount of work completed W c to a value related to the expected amount of work to be completed W e of the task. In one embodiment the result of the comparison is provided to the scheduler module 120 and the shaper module 130 .
- an interrupt occurs and the task is put back in the shaper or the scheduler depending on the start time calculation.
- Either the scheduler module 120 or the metering module 110 can, for example, generate an interrupt that is read by Instruction fetch/branch unit 115 to cause the processor system 10 to move to execute a different task as selected by the scheduler module 120 .
- the processor system 10 takes a responsive action when the difference between the values related to the amount of work completed and the amount of work to be completed meets a first threshold criteria.
- the first threshold criteria occurs if Wc is greater than or equal to We as illustrated in the comparator module 230 .
- the responsive action may be to signal the processor system 10 (or state machine) that the current task(s) has completed its scheduled work and the next selected task(s) should replace the current task(s).
- the elapsed time is the time since the task was last executed and the work rate Wr is the rate at which the task is performed.
- the accumulated credit Cw is limited to a max value Wm).
- the responsive action taken can also include the selection of a new task for execution by the scheduler module 120 .
- FIG. 3 illustrates one embodiment of an operation implemented in the scheduler module 120 according to an embodiment.
- the scheduler module 120 includes a priority multiplexor 310 .
- the priority multiplexor 310 receives a task identification (e.g. a pointer to the task) that identifies a task to be executed by the processor system 10 of FIG. 1 .
- the fetch/branch unit 115 receives interrupt and transfers control to a software, such as an interrupt handler, necessary to perform the task switch to the next selected task, for example.
- the interrupt handler reads the selected task identification from the scheduler and then place that task in execution, and move the necessary task into to the metering module 110 .
- scheduler module provides the interrupt to a hardware task switch, for example for handling the interrupt.
- the interrupt handler is independent of the fetch/branch unit 115 .
- the tasks can be received from the system memory 150 , for example.
- the priority multiplexor 310 ranks the tasks received based on their task priority parameter acquired from the task profile associated with each task.
- the task profile can be stored in the system memory 150 or in a task context memory (not shown).
- the task priority is predetermined during the process of mapping a task to a target computer system.
- the tasks can be grouped into different priority ranks ranging from the highest priority queue 330 to the lowest priority queue 350 .
- the lowest ranked priority tasks are placed in the lowest priority queue 350 while the highest ranked priority tasks are placed in the highest priority queue 330 .
- Tasks under the same priority queue, for example, the highest priority queue 330 may be further ranked or prioritized by the priority queue itself.
- the ranking may be based on the task with the smallest start time, for example.
- the start time of each task may be a task parameter in the task profile.
- the start time can be defined as the time a task should be scheduled for the execution.
- the start time (St) is calculated each time the task is executed or each time the task completes execution (is moved from the meter).
- a task with an earlier (smaller) start time should be scheduled ahead of another task, of the same priority class, with a later (larger) start time.
- there are two levels of searching a intra-priority queue (search by start time, and then a inter-priority queue for the highest priority queue, for example, with a ready task.
- the priority multiplexor 310 searches the scheduling queue for the task(s) of the highest priority with the smallest start time. This task, for example Task B, is selected as the next task to run and may change as new tasks become ready (as they may have higher priority or (equal priority and) smaller start times than the currently selected next task to run).
- the start time is continuously calculated and as such may be used on to compare against other start times to potentially preempt the current task. Whenever a task switch occurs, the currently selected task is selected as the new task. In some embodiments after all of the tasks from the highest priority queue have been selected, tasks from the lower priority queues are then selected as described above with respect to the highest priority queue 330 .
- the scheduler module 120 may signal the processor system 10 , depending on configuration, that a higher priority task is ready to run.
- the processor system 10 (or software on the processor) may decide to preemptively switch from the currently running task and run the higher priority task.
- the task currently running is placed in the scheduler module 120 as illustrated in FIG. 1 above, with the work so-far completed, Wc saved and new (higher priority) task selected for execution.
- this preempted task is re-selected for execution, it will begin where it left off (and complete the remaining work to be done).
- the work to be done may be updated to include work credit accumulated during the time it was waiting.
- This preemptive task switching may be conditionally controlled (to allow some minimum work completed (Wc greater than or equal to Wmin minimum work threshold, or minimum elapsed time threshold) if so configured.
- FIG. 4 illustrates one embodiment of an operation implemented in the shaper module 130 according to an embodiment.
- the shaper module 130 receives task parameters, for example, a start time for a particular task and real time.
- the real time is the current time, for example indicated by a computer system clock
- the calculated start time is the start time calculated for a particular task.
- the initial start time may be calculated by the management module 106 and included as a task parameter in the task profile.
- the start time is calculated by the scheduler module 120 whenever a task becomes the non-current task (i.e. is moved from the metering module 110 ).
- the start time can be calculated by the metering module 110 .
- the shaper module 130 and the scheduler module 120 are a single unit.
- the shaper module compares the calculated start time with the real time and delays task for scheduling based on the results of the comparison.
- the shaper module 130 delays tasks for scheduling when the calculated start time is greater than (i.e. at a future time) the real time (i.e. when the calculated start time is at a future time in comparison to the real time).
- a task(s) become unblocked, it may be ineligible (delayed in the shaper) until it becomes eligible in compliance with its task profile.
- the task parameters of the task profile are used to calculate the start time. The task can be blocked in the scheduler or in the shaper.
- the shaper module 130 utilizes a calendar queue for example, Calendar Queue Entry 1 .
- the calendar queue implementation of this embodiment is only one way of implementing a calendar queue. There are many other existing ways of implementing calendar queues.
- the shaper module 130 inserts an ineligible task into the location St ⁇ Rt (difference from the start time, St, to real time, Rt) units in the future, where the task will be eligible (for example the tasks under Calendar Queue Entry N ⁇ 1).
- the index is calculated as MAX(St ⁇ Rt, MAX_CALENDAR_SIZE ⁇ 1) where MAX_CALENDAR_SIZE (N) is the number of discrete time entries of the calendar queue.
- St Rt at calendar queue entry 0 illustrated in FIG. 4 and the task with the smallest St can be selected first for execution.
- the index represents a time related value in the future from the current time or real time.
- a task with St>Rt is reinserted into the calendar queue within a certain threshold.
- the threshold and the size of the calendar depend on the system design, precision of the real time clock and the desired time granularity.
- the calendar queue is a circular queue such that as the real time advances, the previous current time entry becomes the last entry in the calendar queue. In the example of FIG.
- entry 0 becomes the oldest queue entry.
- the index must take into account the fact that the calendar is a circular queue.
- the current time index advances from 0 to N ⁇ 1 as real time advances. Thus at point N ⁇ 1 the current time index wraps back to zero.
- One shaper module 130 implementation continuously searches its calendar queue for a task with a start time less than the current real time. For any task whose St is less than or equal to the real time Rt, that task is placed in the scheduler module 120 .
- a task can be delayed for execution when the start time is at a future time with respect to the current time. For example, tasks in calendar queue entry 1 up to calendar queue entry N ⁇ 1 are delayed in the shaper module 120 .
- Cw Cw (Wr*Elapsed Time).
- Wm maximum work to be completed
- FIG. 5 is a flowchart of a method for managing the performance of tasks in a computer system according to an embodiment.
- the method can be implemented in the processor system 10 of FIG. 1 .
- a task profile is assigned to one or more tasks or a set of instructions representing the one or more tasks.
- the task profile specifies the task parameters for one or more tasks, where the one or more tasks are scheduled to be executed on the computer system.
- the work element can be, for example, work related to a subset of the set of instructions to be performed by the processor system 10 illustrated in FIG. 1 above.
- an initialization process may be completed where the task parameters (profile) for the task are determined.
- a management module 106 or entity determines the individual task profile parameters in accordance with certain policies appropriate for the computer system's intended operation.
- the information for this new task is stored in the task context memory. These parameters can be statically determined.
- the parameters of the task can be determined in terms of the amount of data that a task is expected to write to a certain buffer at specific interval, and this is something that may be predetermined during the process of mapping task to a target computer system.
- the task parameters may be dynamically determined so that the parameters can be tailored to current conditions of the computer system, for example.
- step 502 the current real time is compared to a computed start time associated with a task of the one or more tasks to determine whether to schedule the execution of the task.
- the process then continues to block 504 where the task is selected to be scheduled for execution when the value of the difference between the current real time and the calculated start time meets a threshold criteria.
- step 504 occurs in accordance with the task parameters including a parameter indicating that the task is not waiting on one of the occurrence and non-occurrence of an event.
- the steps of block 502 and 504 can be implemented in the scheduler module 120 and the shaper module 130 of FIG. 1 .
- a task may be blocked if it is awaiting an event (such as arrival of a message from another task, data from an external Input-Output device, etc.) before it can be scheduled for execution and is deemed unblocked if it is not waiting for such an event.
- This state may be controlled by software, such as an operating system.
- a task is eligible for execution if the current real time (value of a real time clock) is equal to or greater than the computed start time and ineligible if the start time is greater than real time. If the task is, both unblocked and eligible for execution, it is termed ready and may be selected for execution scheduling.
- a task can be blocked or unblocked in the scheduler module 120 or the shaper module 130 .
- the scheduling of the execution of the task is delayed when the value of the difference between the current real time and the calculated start time fails to meet the threshold criteria.
- the steps of block 506 can be implemented in the shaper module 130 of FIG. 1 .
- the tasks are scheduled based on priority.
- the steps of block 508 can be implemented in the scheduler module 120 of FIG. 1 .
- Prioritizing the execution schedule of the task is based on the task parameters including a task priority associated with the task profile.
- a task may be available for scheduling in block 508 when the task is unblocked and eligible. For example, when a task is placed in the scheduler module 120 , it is placed in the appropriate priority queue according to priority, P, specified in the task's profile.
- the process then continues to block 510 where the execution of the task is monitored determine a value related to the amount of work completed for the task.
- the steps of block 508 can be implemented in the metering module 110 of FIG. 1 .
- the monitored value related to the amount of work completed may be indicated by a counter of the metering module 110 .
- the value related to the amount of work completed is compared to a parameter value related to the amount of work to be completed of the task.
- a responsive action is taken when the difference between the monitored value related to the amount of work completed and the parameter value related to the amount of work to be completed meets a first threshold criteria.
- the amount of work to be completed determines the expected work to be performed by the task when it is scheduled for execution. In one embodiment, if Wc becomes greater than or equal to We, the expected work to be completed, the processor system 10 (or state machine) is signaled (with an interrupt for example) to switch to a new task. If the task remains in an unblocked state then a new start time, St, is calculated. There are several ways to calculate start time based on desired system behavior.
- Some embodiments may use multiple equations, configured for each task or class of tasks. If the task is eligible, that is the new St is less than or equal to the (current) real time, then the task is placed in the scheduler module 120 otherwise it is placed in the shaper module 130 . When the task completes its expected work, Wc is set to zero in preparation of the next time the task is scheduled for execution.
- An additional method for performance management is the use of buffer or cache occupancy quotas. These occupancy quotas are numerical limits of the number of buffers a task may (or should) use. This occupancy quota, Oq, and current occupancy Oc may be additional stored in the task profile.
- the management entity controls the occupancy
- Occupancy in this case is an indication of actual number of buffers being used by a particular task.
- a buffer is a memory or region of memory used to temporarily hold data (such as an input/output buffer cache) while it is being moved from one place to another or to allow faster access (such as an instruction/data cache).
- the occupancy counter Oc is incremented. Whenever the occupancy quota is greater than the Occupancy counter (Oc>Oq), the task is exceeding its occupancy quota.
- the description provides mechanisms to control the allocation of processor (or state machine) execution resources to individual tasks executing in computer systems.
- the management module 106 controls the allocation of execution resources, to all tasks, each task may be provided with throughput and response time guarantees. This control is accomplished through workload shaping which delays the execution of tasks that have used their workload allocation until sufficient time has passed to accumulate credit for execution (accumulate credit over time to perform their allocated work) and workload prioritization which gives preference to tasks based on configured priorities.
- DSP digital signal processor
- ASIC sub-station specific integrated circuit
- FPGA field programmable gate array
- a general-purpose processor can be a microprocessor, but in the alternative, the processor can be any processor, controller, microcontroller, or state machine.
- a processor can also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
- a software module can reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium.
- An exemplary storage medium can be coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium can be integral to the processor.
- the processor and the storage medium can reside in an ASIC.
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
- Hardware Redundancy (AREA)
Abstract
A system and method to control the allocation of processor (or state machine) execution resources to individual tasks executing in computer systems is described. By controlling the allocation of execution resources, to all tasks, each task may be provided with throughput and response time guarantees. This control is accomplished through workload metering shaping which delays the execution of tasks that have used their workload allocation until sufficient time has passed to accumulate credit for execution (accumulate credit over time to perform their allocated work) and workload prioritization which gives preference to tasks based on configured priorities.
Description
- This invention relates to systems and methods for management of the performance of tasks in a computer system.
- A computer system often runs a number of different tasks during a particular period of time. The tasks can be associated with a variety of applications. The tasks operate using a variety of computer system resources. An operating system controls and provides access to many of the computer system resources, such as the memory system. The tasks can make requests for the computer system resources to the operating system.
- The tasks can perform various functions, some of which may need to be performed in real time. Functions that are performed in real time are usually associated with certain service requirements to meet real time deadlines. The service requirements are usually measured in the frequency of requests and/or response time. Thus, the real time task needs a certain minimum number of resources including execution resources to operate in real time. Other tasks may not operate in real time. Therefore, requests by these tasks can be serviced whenever the resources are available.
- In practice, there are real time tasks that are measured for real time performance with an average response time over a longer time period. Additionally, the tasks may make more frequent requests during shorter periods of time.
- In practice, real time tasks require a variable amount of time to process a request or event and most real time systems must budget resources, particularly execution, resources for the worst case processing time. This situation typically results in inefficient underutilized systems.
- Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.
- The present invention includes methods, apparatuses, and systems as described in the written description and claims. In one embodiment, a method for managing the performance of a computer system includes the steps of assigning a task profile that specifies task parameters for each of the one or more tasks. The one or more tasks are executed on a processing module of the computer system. The method also includes comparing a current real time and a computed start time associated with the one or more tasks to determine whether to select one or more tasks to be scheduled for execution on the processing module. A task to be scheduled for execution is selected when the value of the difference between the current real time and the calculated start time meets a threshold criteria. The selection can be in accordance with the task parameters including a parameter indicating that the task is not waiting on one of the occurrence and non-occurrence of an event. The scheduling of the execution of the task is delayed when the value of the difference between the current real time and the calculated start time fails to meet the threshold criteria. The method also includes prioritizing the execution schedule of the task based on the task parameters including a task priority. The execution of the task can be monitored to determine a monitored value related to the amount of work completed by the task. Further, the method includes comparing the monitored value related to the amount of work completed to a parameter value related to the amount of work to be completed by the task. A responsive action is taken when the difference between the monitored value related to the amount of work completed and the parameter value related to the amount of work to be completed meets a first threshold criteria.
- In another embodiment, a system for managing the performance of a computer system is described. The system includes a management module to assign a task profile that specifies task parameters for each of the one or more tasks. The one or more tasks can be executed on a processing module of the computer system. The task profile for the one or more tasks can be stored in a storage device. The system also includes a shaper module to compare the current real time and a computed start time associated with a task of the one or more tasks to determine whether to select a task to be scheduled for execution on the processing module. The shaper module selects the task to be scheduled for execution when the value of the difference between the current real time and the calculated start time meets a threshold criteria. The selection can be in accordance with the task parameters including a parameter indicating the task is not waiting on one of the occurrence and non-occurrence of an event. In one embodiment, the shaper module delays the scheduling of the execution of the task when the value of the difference between the current real time and the calculated start time fails to meet the threshold criteria. The system further includes a scheduler module to prioritize the execution schedule of the task based on the task parameters including a task priority. A metering module monitors the execution of the task to determine a monitored value related to the amount of work completed by the task. The metering module compares the monitored value related to the amount of work completed to a parameter value related to the amount of work to be completed of the task. A responsive action can be taken when the difference between the monitored value related to the amount of work completed and the parameter value related to the amount of work to be completed meets a first threshold criteria.
- Other features and advantages of the present invention will become more readily apparent to those of ordinary skill in the art after reviewing the following detailed description and accompanying drawings.
- The details of the present invention, both as to its structure and operation, may be gleaned in part by study of the accompanying drawings, in which like reference numerals refer to like parts, and in which:
-
FIG. 1 is a block diagram of a computer system according to an embodiment; -
FIG. 2 is a block diagram of a metering module according to an embodiment; -
FIG. 3 illustrates one embodiment of an operation implemented in the scheduler module according to an embodiment; -
FIG. 4 illustrates one embodiment of the operation implemented in the shaper module according to an embodiment; and -
FIG. 5 is a flowchart of a method for managing the performance of tasks in a computer system according to an embodiment. - After reading this description, it will become apparent to one skilled in the art how to implement the invention in various alternative embodiments and alternative applications. However, although various embodiments of the present invention are described herein, it is understood that these embodiments are presented by way of example only, and not limitation. As such, this detailed description of various alternative embodiments should not be construed to limit the scope or breadth of the present invention as set forth in the appended claims.
-
FIG. 1 is a simplified block diagram of a computer system including aprocessor system 10, amanagement module 106 and asystem memory 150. Some of the commonly known elements of the processor system and the computer system are not shown in the figure in order to aid understanding of the present invention. Theprocessor system 10 can be a central processing unit, a processor, a microprocessor, a processor core or the like. The functional elements of the processor system depicted inFIG. 1 can be implemented in hardware or with a combination of hardware and software (or firmware). - One embodiment of the
processor system 10 includes aninstruction cache 104, instruction fetch/branch unit 115, aninstruction decode module 125, anexecution unit 135, a load/store unit 140, adata cache 145 and aperformance management system 105 Theperformance management system 105 includes ametering module 110, ascheduler module 120, and ashaper module 130. In one embodiment, a task context memory, which stores the task profiles for a task, is incorporated into thesystem memory 150. In other embodiments, the task context memory may be independent of thesystem memory 150. - Throughout this document, a task may be referred to as a set of instruction to be executed by the
processor system 10. A task may also be processes such as instances of computer programs that are being executed, threads of execution such as one or more simultaneously, or pseudo-simultaneously, executing instances of a computer program closely sharing resources, etc. that execute within one or more processor systems 10 (e.g., microprocessors) or virtual machines such as virtual execution environments on one or more processors. A virtual machine (VM) is a software implementation of a machine (computer) that executes programs like a real machine. In some embodiments, the tasks may be state machines such as DMA controllers and the collection of commands for such state machines (e.g., DMA channels), etc. Direct memory access is a feature of modern computers and microprocessors that allows certain hardware subsystems within the computer to access system memory for reading and/or writing independently of the central processing unit. Many hardware systems use DMA including disk drive controllers, graphics cards, network cards, sound cards and Graphics Processing Units (GPUs). DMA may also used for intra-chip data transfer in multi-core processors, especially in multiprocessor system-on-chips, where its processing element is equipped with a local memory (often called scratchpad memory) and DMA is used for transferring data between the local memory and the main memory. - The
management module 106 may be part of the computer system coupled to the processing module (for example, a program residing in the system memory 150). The management module may create and assign task profiles that specify task parameters for tasks. In some embodiments, themanagement module 106 controls the allocation of resources by determining/controlling the task profiles (e,g. through a set of policies/rules). - The
performance management system 105 of theprocessor system 10 controls the allocation of processor execution resources to individual tasks executing in the computer system. In some embodiments, theperformance management system 105 controls the allocation of state machine execution resources to individual tasks executing in the state machine. In other embodiments themanagement module 106 controls the allocation of resources by determining/controlling the task profiles (e,g. through a set of policies/rules). For example, by controlling the allocation of execution resources to all tasks in the state machine, each task may be provided with throughput and response time guarantees. In one embodiment, this control is accomplished through task or workload shaping which delays the execution of tasks that have used their task or workload allocation until sufficient time has passed to accumulate credit for execution (accumulate credit over time to perform their allocated work) and task or workload prioritization which gives preference to tasks based on configured priorities. - Tasks are assigned task profiles that specify task parameters. Examples of task parameters include task priority, P, work to be completed, We, scheduling interval, Ti, and maximum work to be completed, Wm. The task priority determines the task's priority, including the task priority class such that, tasks of higher priority classes may be preferentially scheduled or queued ahead of lower priority classes. The work to be completed determines the expected work to be performed by the task when it is scheduled for execution. The maximum work to be completed specifies the maximum work the task may accumulate if, for example, the completion of its expected work is postponed. The scheduling interval is the desired time between scheduled execution runs. Thus, the expected work rate can be calculated as We/Ti, called work rate Wr.
- The work may be a measure of data transference, processor instructions completed, or other meaningful units of measure of work done by the
processor system 10 or state machine such as a direct memory access (DMA) controller. As this work may be measured to a fine granularity, the performance may be similarly managed to a fine granularity. - The
processor system 10 executes instructions stored in thesystem memory 150 where many of the instruction operate on data stored in thesystem memory 150. The instructions may be referred to as a set of instructions or program instructions throughout this document. Thesystem memory 150 may be physically distributed in the computer system. Theinstruction cache 104 temporarily stores instructions from thesystem memory 150. Theinstruction cache 104 acts as a buffer memory betweensystem memory 150 and theprocessor system 10. When instructions are to be executed, they are typically retrieved from system memory copied into theinstruction cache 104. If the same instruction or group of instructions is used frequently in a set of program instructions, storage of these instructions in theinstruction cache 104 yields an increase in throughput because external bus accesses are eliminated. - The fetch/
branch unit 115 is coupled to theinstruction cache 104 and configured to retrieve instructions from thesystem memory 150 for storage within theinstruction cache 104. Theinstruction decode module 125 interprets and implements the instructions retrieved. In one embodiment thedecode module 125 breaks down the instructions into parts that have significance to other portions of theprocessor system 10. Theexecution unit 135 passes the decoded information as a sequence of control signals, for example, to relevant function units of theprocessor system 10 to perform the actions required by the instructions. The execution unit includes register files and Arithmetic Logic Unit (ALU). The actions required by the instructions can include reading values from registers, passing the values to an ALU (not shown) to add them together and writing the result to a register. Theexecution unit 135 may include a load/store unit 140 that is configured to perform access to thedata cache 145. In other embodiments, the load/store unit 140 may be independent of theexecution unit 135. Thedata cache 145 can be a high-speed storage device, for example a random-access memory, which contains data items that have been recently accessed fromsystem memory 150, for example. In one embodiment, thedata cache 145 can be accessed independently of theinstruction cache 104. - The
metering module 110 measures and monitors the work completed by a task that is currently being executed on theprocessor system 10. One or more tasks can be implemented on theprocessor system 10. In one embodiment the monitored value of work completed or information about the amount of work completed can be measured by the amount of instructions completed and can be acquired from the instruction fetch/branch unit 115 as illustrated by thearrow 170 inFIG. 1 . The monitored values can also be measured by the memory operations that can be acquired from the load/store unit 140 as illustrated by thearrow 165 inFIG. 1 . Themeter module 110, when used to monitor memory operations (bandwidth), may be configured to only account for memory operations to/from certain addresses (such as a video frame buffer). This configuration can be varied on a task-by-task basis (with the configuration information part of the Task Context or task profile). In some implementations, there areseparate metering modules 110 for instruction completion and memory operations depending on specific details of the computer system implementation. These metering modules would be similar to asingle metering module 10 with data from both sources. As someprocessing modules 10 handle multiple threads simultaneously, the instructions completed information includes information as which thread had completed certain instructions (typically by tagging the thread or process or task identifier). The memory operations information similarly includes this thread identifier in order for themetering module 110 associate these operations to the correct task. - We will now describe one example of the processing of a task. The example task performs video decompression and is managed by the
performance management system 105 by monitoring its output data rate. Video compression algorithms, used by most advanced video encoding standards, achieve high rates of data compression by exploiting the redundancy in video information. These compression algorithms remove both the temporal redundancy, arising from successive frames of video images displaying the same scene, and spatial redundancy, occurring when portions of the picture are replicated (often with minor changes) within a single frame of video. Because the decompression work load is both dependant on the content of a scene and the change in content among successive frames, the level of computation required to decompress each frame may vary significantly from one frame to another, however the resulting output data rate is, in general, constant determined by the number of pixels in the display frame, the number of bits in each pixel and the frame rate. Thus, a task performing video decompression can be managed effectively by monitoring its output data rate. - For example, a video decompression playback at 320 pixels wide×240 pixels high video display with 16 bit pixel depth at 20 frames/second, requires the video decompression task to generate 1,228,800 bits every 50 milliseconds. These values may be utilized as the expected work and the work rate in the profile for this task. Therefore, the task is scheduled to generate 1,228,800 bits of data every 50 milliseconds (so long as there is input data) regardless of the actual time required to decompress each frame (system design would require the maximum frame decompression/decode time to be less than 50 milliseconds).
- The
shaper module 130 has the list of ineligible tasks to be performed by theprocessor system 10. The shaper module determines when a task can be passed to thescheduler module 120 to be scheduled for execution. A task is eligible if the current real time (value of a real time clock) is equal to or greater than the computed start time for the task and ineligible if the start time is greater than real time. A task may be blocked if it is awaiting an event (such as arrival of a message from another task, data from an external Input-Output device, etc.) before it can be scheduled for execution and is deemed unblocked if it is not waiting for such an event. This information can be provided to the shaper by an operating system. In some embodiments, theshaper module 130 queues ineligible tasks until they become eligible, whether they are blocked or not. In other embodiments, a task is eligible for execution if it is eligible and not blocked. - The
scheduler module 120 selects the next task(s) to be executed from its list of tasks based on the task parameters including task priority. The currently executing task selected by thescheduler module 120 is monitored by themetering module 110 as illustrated inFIG. 1 . Thescheduler module 120 may indicate that a higher priority task is ready to theprocessor system 10. The processor system 10 (or software on the processor system 10) may decide to preemptively switch from the currently running task and run the higher priority task. In one embodiment, the scheduler or software in the processor system indicates the that a higher priority task is available. In which case, the task currently running or executed in theprocessor system 10 is placed in thescheduler module 120. When this happens, themetering module 110 monitors the selected higher priority task that is now currently executing. The moving of tasks from the scheduler and shaper and as described elsewhere can be accomplished through the use of pointers or actually moving instructions between memory locations depending on design concerns. - While the
metering module 110, thescheduler module 120 and theshaper module 130 can be implemented in hardware, only themetering module 110 need be for practical high performance applications. Some implementations may utilize software to implement theshaper module 130 and/or thescheduler module 120 depending on scheduling time and task workload granularity and scheduling/shaping processor overhead. Lower performance applications could implement themetering module 110, or some portion thereof, in software. -
FIG. 2 is a block diagram of ametering module 110 according to an embodiment. For explanatory purposes,FIG. 2 will be discussed with reference toFIG. 1 . Themetering module 110 measures the work performed or amount of work completed by the currently executing task(s). In one embodiment themetering module 110 monitors the execution of the task to determine a monitored value related to the amount of work completed for the task. The monitored value related to the amount of work completed can be the actual amount of work completed, a counter value or the like that is proportional to or related to the amount of work completed. - In general, one embodiment of the
metering module 110 includes a work completedmodule 210, a work to be completedmodule 220, acomparator module 230, and anadder module 240. In some embodiments, the work completedmodule 210 is a work completed counter and the work to be completedmodule 220 is also a work to be completed counter. The work to be completed counter can be updated based on the work rate while the task is executing to account for the passage of time The work to be completed can calculated by the scheduler when the task is selected or moved from the scheduler to the meter, for example. - In one embodiment, a monitored value related to the work performed or work completed Wc is measured by counting the accesses to memory, instructions completed, or other measurable quantities that are meaningful measurements of work by the currently executing task(s). The monitored value, for example the number of accesses to memory may be received at the
adder module 240 where they are summed and provided to the work completedmodule 210. The monitored values can also be measured by the memory operations that can be acquired from the load/store unit 140 as illustrated by thearrow 165 inFIG. 1 above. The work to be completedmodule 220 receives a parameter value We related to the amount of work to be completed. The parameter value related to the amount of work to be completed is a predetermined value that is stored in the task profile of a task. The parameter value can be the actual amount of work to be completed, a counter value or the like that is proportional to or related to the amount of work to be completed. The parameter value can also be a constant parameter or calculated from the work rate and work credit over time. In one embodiment, the parameter value is predetermined by themanagement module 106 during the process of mapping task to a target computer system. - The
comparator module 230 receives the monitored value related to the work performed or completed Wc and the monitored value related to the amount of work to be completed We. The amount of work to be completed determines the expected work to be performed by the task when it is scheduled for execution. Thecomparator module 230 compares the value related to the amount of work completed Wc to a value related to the expected amount of work to be completed We of the task. In one embodiment the result of the comparison is provided to thescheduler module 120 and theshaper module 130. When the completed work meets the expected work within a certain threshold criteria (e.g. when Wc>=We), an interrupt occurs and the task is put back in the shaper or the scheduler depending on the start time calculation. Either thescheduler module 120 or themetering module 110 can, for example, generate an interrupt that is read by Instruction fetch/branch unit 115 to cause theprocessor system 10 to move to execute a different task as selected by thescheduler module 120. Themetering module 110 can interrupt when the expected work is completed (e.g. when Wc>=We), thescheduler module 120 can interrupt when a higher priority task is ready. - In general, the
processor system 10 takes a responsive action when the difference between the values related to the amount of work completed and the amount of work to be completed meets a first threshold criteria. In some embodiments, the first threshold criteria occurs if Wc is greater than or equal to We as illustrated in thecomparator module 230. The responsive action may be to signal the processor system 10 (or state machine) that the current task(s) has completed its scheduled work and the next selected task(s) should replace the current task(s). In some embodiments, a different responsive action may be to “throttle” the task (prevent it from completing additional work until it accumulates sufficient credit to perform additional work). This credit is accumulated at the work rate Wr times the elapsed time; thus, Cw=Cw+(Wr*Elapsed Time). Where the elapsed time is the time since the task was last executed and the work rate Wr is the rate at which the task is performed. The accumulated credit Cw is limited to a max value Wm). The Work completion counter may have the accumulated credit subtracted from it, Wc=Wc−Cw, for the comparison to expected work. In an other embodiment, the Work to b Completed Counter, We, may have the accumulated credit added to it, We=We+Cw, for the comparison to work completed. The responsive action taken can also include the selection of a new task for execution by thescheduler module 120. -
FIG. 3 illustrates one embodiment of an operation implemented in thescheduler module 120 according to an embodiment. For explanatory purposes,FIG. 3 will be discussed with reference toFIG. 1 . In general, one embodiment of thescheduler module 120 includes apriority multiplexor 310. Thepriority multiplexor 310 receives a task identification (e.g. a pointer to the task) that identifies a task to be executed by theprocessor system 10 ofFIG. 1 . The fetch/branch unit 115 receives interrupt and transfers control to a software, such as an interrupt handler, necessary to perform the task switch to the next selected task, for example. In one embodiment, the interrupt handler reads the selected task identification from the scheduler and then place that task in execution, and move the necessary task into to themetering module 110. In some embodiments scheduler module provides the interrupt to a hardware task switch, for example for handling the interrupt. In some embodiments, the interrupt handler is independent of the fetch/branch unit 115. The tasks can be received from thesystem memory 150, for example. The priority multiplexor 310 ranks the tasks received based on their task priority parameter acquired from the task profile associated with each task. The task profile can be stored in thesystem memory 150 or in a task context memory (not shown). In one embodiment, the task priority is predetermined during the process of mapping a task to a target computer system. The tasks can be grouped into different priority ranks ranging from thehighest priority queue 330 to thelowest priority queue 350. The lowest ranked priority tasks are placed in thelowest priority queue 350 while the highest ranked priority tasks are placed in thehighest priority queue 330. Tasks under the same priority queue, for example, thehighest priority queue 330 may be further ranked or prioritized by the priority queue itself. The ranking may be based on the task with the smallest start time, for example. The start time of each task may be a task parameter in the task profile. The start time can be defined as the time a task should be scheduled for the execution. In one embodiment, the start time (St) is calculated each time the task is executed or each time the task completes execution (is moved from the meter). A task with an earlier (smaller) start time should be scheduled ahead of another task, of the same priority class, with a later (larger) start time. In some embodiments, there are two levels of searching, a intra-priority queue (search by start time, and then a inter-priority queue for the highest priority queue, for example, with a ready task. To select the next task(s) for execution, thepriority multiplexor 310 searches the scheduling queue for the task(s) of the highest priority with the smallest start time. This task, for example Task B, is selected as the next task to run and may change as new tasks become ready (as they may have higher priority or (equal priority and) smaller start times than the currently selected next task to run). In one embodiment, the start time is continuously calculated and as such may be used on to compare against other start times to potentially preempt the current task. Whenever a task switch occurs, the currently selected task is selected as the new task. In some embodiments after all of the tasks from the highest priority queue have been selected, tasks from the lower priority queues are then selected as described above with respect to thehighest priority queue 330. - Should a higher priority task than the currently executing task be selected as the next task to run, the
scheduler module 120 may signal theprocessor system 10, depending on configuration, that a higher priority task is ready to run. The processor system 10 (or software on the processor) may decide to preemptively switch from the currently running task and run the higher priority task. In which case, the task currently running is placed in thescheduler module 120 as illustrated inFIG. 1 above, with the work so-far completed, Wc saved and new (higher priority) task selected for execution. When this preempted task is re-selected for execution, it will begin where it left off (and complete the remaining work to be done). The work to be done may be updated to include work credit accumulated during the time it was waiting. This preemptive task switching may be conditionally controlled (to allow some minimum work completed (Wc greater than or equal to Wmin minimum work threshold, or minimum elapsed time threshold) if so configured. -
FIG. 4 illustrates one embodiment of an operation implemented in theshaper module 130 according to an embodiment. For explanatory purposes,FIG. 4 will be discussed with reference toFIG. 1 . Theshaper module 130 receives task parameters, for example, a start time for a particular task and real time. The real time is the current time, for example indicated by a computer system clock, and the calculated start time is the start time calculated for a particular task. The initial start time may be calculated by themanagement module 106 and included as a task parameter in the task profile. In one embodiment, the start time is calculated by thescheduler module 120 whenever a task becomes the non-current task (i.e. is moved from the metering module 110). In other embodiments, the start time can be calculated by themetering module 110. In one embodiment, theshaper module 130 and thescheduler module 120 are a single unit. The shaper module compares the calculated start time with the real time and delays task for scheduling based on the results of the comparison. In one embodiment, theshaper module 130 delays tasks for scheduling when the calculated start time is greater than (i.e. at a future time) the real time (i.e. when the calculated start time is at a future time in comparison to the real time). When a task(s) become unblocked, it may be ineligible (delayed in the shaper) until it becomes eligible in compliance with its task profile. In one embodiment, the task parameters of the task profile are used to calculate the start time. The task can be blocked in the scheduler or in the shaper. - In some embodiments, the
shaper module 130 utilizes a calendar queue for example,Calendar Queue Entry 1. The calendar queue implementation of this embodiment is only one way of implementing a calendar queue. There are many other existing ways of implementing calendar queues. Theshaper module 130 inserts an ineligible task into the location St−Rt (difference from the start time, St, to real time, Rt) units in the future, where the task will be eligible (for example the tasks under Calendar Queue Entry N−1). As the calendar queue is of finite size, the index is calculated as MAX(St−Rt, MAX_CALENDAR_SIZE−1) where MAX_CALENDAR_SIZE (N) is the number of discrete time entries of the calendar queue. When the current real time Rt advances to a non-empty calendar location, theshaper module 130 transfers each task at that location for which St=Rt to thescheduler module 120. This occurs when St=Rt at calendar queue entry 0 illustrated inFIG. 4 and the task with the smallest St can be selected first for execution. The index represents a time related value in the future from the current time or real time. A task with St>Rt is reinserted into the calendar queue within a certain threshold. The threshold and the size of the calendar depend on the system design, precision of the real time clock and the desired time granularity. The calendar queue is a circular queue such that as the real time advances, the previous current time entry becomes the last entry in the calendar queue. In the example ofFIG. 4 , when the real time advances toentry 1, entry 0 becomes the oldest queue entry. The index must take into account the fact that the calendar is a circular queue. The current time index advances from 0 to N−1 as real time advances. Thus at point N−1 the current time index wraps back to zero. - One
shaper module 130 implementation continuously searches its calendar queue for a task with a start time less than the current real time. For any task whose St is less than or equal to the real time Rt, that task is placed in thescheduler module 120. A task can be delayed for execution when the start time is at a future time with respect to the current time. For example, tasks incalendar queue entry 1 up to calendar queue entry N−1 are delayed in theshaper module 120. - Should a task be delayed from execution for an period of time, it may accumulate credit for work to be completed. This credit (Cw) is accumulated at the rate Wr times the elapsed time; thus, Cw=Cw (Wr*Elapsed Time). A maximum work to be completed (Wm) may be used if so configured to limit the work accumulated such that Cw is not greater than Wm. When a task is not executing it is accumulating credit. When task is executing the credit is updated based on work completed in excess of the expected work.
-
FIG. 5 is a flowchart of a method for managing the performance of tasks in a computer system according to an embodiment. In one embodiment, the method can be implemented in theprocessor system 10 ofFIG. 1 . - In
block 500, a task profile is assigned to one or more tasks or a set of instructions representing the one or more tasks. The task profile specifies the task parameters for one or more tasks, where the one or more tasks are scheduled to be executed on the computer system. The work element can be, for example, work related to a subset of the set of instructions to be performed by theprocessor system 10 illustrated inFIG. 1 above. In one embodiment each time a new task is created, an initialization process may be completed where the task parameters (profile) for the task are determined. Amanagement module 106 or entity (for example, a computer program) determines the individual task profile parameters in accordance with certain policies appropriate for the computer system's intended operation. The information for this new task is stored in the task context memory. These parameters can be statically determined. For example, the parameters of the task can be determined in terms of the amount of data that a task is expected to write to a certain buffer at specific interval, and this is something that may be predetermined during the process of mapping task to a target computer system. In some embodiments, the task parameters may be dynamically determined so that the parameters can be tailored to current conditions of the computer system, for example. - In
block 502, the current real time is compared to a computed start time associated with a task of the one or more tasks to determine whether to schedule the execution of the task. The process then continues to block 504 where the task is selected to be scheduled for execution when the value of the difference between the current real time and the calculated start time meets a threshold criteria. In one embodiment,step 504 occurs in accordance with the task parameters including a parameter indicating that the task is not waiting on one of the occurrence and non-occurrence of an event. The steps ofblock scheduler module 120 and theshaper module 130 ofFIG. 1 . In one embodiment, a task may be blocked if it is awaiting an event (such as arrival of a message from another task, data from an external Input-Output device, etc.) before it can be scheduled for execution and is deemed unblocked if it is not waiting for such an event. This state may be controlled by software, such as an operating system. A task is eligible for execution if the current real time (value of a real time clock) is equal to or greater than the computed start time and ineligible if the start time is greater than real time. If the task is, both unblocked and eligible for execution, it is termed ready and may be selected for execution scheduling. A task can be blocked or unblocked in thescheduler module 120 or theshaper module 130. - In
block 506, the scheduling of the execution of the task is delayed when the value of the difference between the current real time and the calculated start time fails to meet the threshold criteria. The steps ofblock 506 can be implemented in theshaper module 130 ofFIG. 1 . Inblock 508, the tasks are scheduled based on priority. The steps ofblock 508 can be implemented in thescheduler module 120 ofFIG. 1 . Prioritizing the execution schedule of the task is based on the task parameters including a task priority associated with the task profile. A task may be available for scheduling inblock 508 when the task is unblocked and eligible. For example, when a task is placed in thescheduler module 120, it is placed in the appropriate priority queue according to priority, P, specified in the task's profile. - The process then continues to block 510 where the execution of the task is monitored determine a value related to the amount of work completed for the task.
- The steps of
block 508 can be implemented in themetering module 110 ofFIG. 1 . The monitored value related to the amount of work completed may be indicated by a counter of themetering module 110. In one embodiment, themetering module 110 updates a work completed counter, Wc, with the monitored work value each time the monitored value changes (Wc(current)=Wc+Monitored_Value). - Finally in
block 512, the value related to the amount of work completed is compared to a parameter value related to the amount of work to be completed of the task. A responsive action is taken when the difference between the monitored value related to the amount of work completed and the parameter value related to the amount of work to be completed meets a first threshold criteria. The amount of work to be completed determines the expected work to be performed by the task when it is scheduled for execution. In one embodiment, if Wc becomes greater than or equal to We, the expected work to be completed, the processor system 10 (or state machine) is signaled (with an interrupt for example) to switch to a new task. If the task remains in an unblocked state then a new start time, St, is calculated. There are several ways to calculate start time based on desired system behavior. One embodiment may calculate start time St=St (the last calculated start time)+Ti, while another embodiment may calculate start time St=MAX(St, Rt−Cw/Wr)+Wc/Wr where Rt is the current real time. Some embodiments may use multiple equations, configured for each task or class of tasks. If the task is eligible, that is the new St is less than or equal to the (current) real time, then the task is placed in thescheduler module 120 otherwise it is placed in theshaper module 130. When the task completes its expected work, Wc is set to zero in preparation of the next time the task is scheduled for execution. - An additional method for performance management is the use of buffer or cache occupancy quotas. These occupancy quotas are numerical limits of the number of buffers a task may (or should) use. This occupancy quota, Oq, and current occupancy Oc may be additional stored in the task profile. The management entity controls the occupancy
- Occupancy in this case is an indication of actual number of buffers being used by a particular task. A buffer is a memory or region of memory used to temporarily hold data (such as an input/output buffer cache) while it is being moved from one place to another or to allow faster access (such as an instruction/data cache).
- As buffers (or cache blocks/lines) are allocated to a particular task, the occupancy counter Oc is incremented. Whenever the occupancy quota is greater than the Occupancy counter (Oc>Oq), the task is exceeding its occupancy quota.
- Exceeding the occupancy quotas will cause that task's buffers to be replaced preferentially (cache block/line replacement) or prevent the allocation of new buffers until the entity is in compliance with its quota (Oc=<Oq).
- The description provides mechanisms to control the allocation of processor (or state machine) execution resources to individual tasks executing in computer systems. The
management module 106 controls the allocation of execution resources, to all tasks, each task may be provided with throughput and response time guarantees. This control is accomplished through workload shaping which delays the execution of tasks that have used their workload allocation until sufficient time has passed to accumulate credit for execution (accumulate credit over time to perform their allocated work) and workload prioritization which gives preference to tasks based on configured priorities. - It should be noted that many components that are included in the elements of
FIGS. 1-5 have been omitted to make the descriptions more clear. One will note that these omitted elements such as processors, network ports, memories, buses, transceivers, etc., would be included in such elements in a manner that is commonly known to those skilled in the art. - Those of skill will appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein can often be implemented as electronic hardware, computer software, or combinations of both. To illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. In addition, the grouping of functions within a module, block or step is for ease of description. Specific functions or steps can be moved from one module or block without departing from the invention.
- The various illustrative logical blocks and modules described in connection with the embodiments disclosed herein can be implemented or performed with a general purpose processor, a digital signal processor (DSP), a security beacon device, server, and sub-station specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general-purpose processor can be a microprocessor, but in the alternative, the processor can be any processor, controller, microcontroller, or state machine. A processor can also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
- The steps of a method or algorithm described in connection with the embodiments disclosed herein can be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module can reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium. An exemplary storage medium can be coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium can be integral to the processor. The processor and the storage medium can reside in an ASIC.
- The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles described herein can be applied to other embodiments without departing from the spirit or scope of the invention. Thus, it is to be understood that the description and drawings presented herein represent a presently preferred embodiment of the invention and are therefore representative of the subject matter which is broadly contemplated by the present invention. It is further understood that the scope of the present invention fully encompasses other embodiments that may become obvious to those skilled in the art and that the scope of the present invention is accordingly limited by nothing other than the appended claims.
Claims (32)
1-37. (canceled)
38. A method comprising:
calculating credit for a plurality of processor tasks;
selecting, from the plurality of processor tasks, processor tasks for execution by one or more processors of a processor system;
monitoring execution of the selected tasks to determine, for each selected task, a monitored value related to an amount of work completed for the corresponding selected task; and
throttling one of the selected tasks from completing additional work when a difference between the monitored value related to the amount of work completed for such task and a value related to the amount of work to be completed for such task meets a threshold criteria, the throttling ending upon an occurrence of at least one pre-defined event for such task.
39. A method as in claim 38 , wherein the at least one pre-defined event comprises a pre-defined amount of credit for performing work is accumulated for such task.
40. A method as in claim 39 , wherein credit is accumulated at a rate equal to a corresponding product of work rate and elapsed time and credit for the task is reduced when the task is selected for execution.
41. A method as in claim 40 , further method comprising:
creating a list of the processor tasks to be executed by one or more processors of the processor system with each task having an associated task profile that specifies task parameters including a calculated start time, wherein each task comprises a set of instructions to be executed by at least one processor of the processor system.
42. A method as in claim 41 , further comprising:
selecting at least one first task to be scheduled for execution from the list of tasks when a value of a difference between the current real time and the calculated start time for the at least one first task meets a first threshold criteria and in accordance with the task parameters including a parameter indicating the at least one first task is not dependent on one of an occurrence and non-occurrence of an event.
43. A method as in claim as in claim 42 , further comprising:
comparing the monitored value related to the amount of work completed to a value based on the calculated credit that is related to an amount of work to be completed by the at least one first task.
44. A method as in claim 43 , further comprising: signaling the processor system that the at least one first task has completed its scheduled work and a next selected task should replace the at least one first task.
45. A method as in claim 44 , wherein signaling the processor system comprises sending an interrupt to an instruction fetch/branch unit of the processor system.
46. A method as in claim 43 , further comprising determining start time including a time between scheduled execution runs of the at least one first task.
47. A method as in claim 43 , further comprising controlling allocation of processing resources to the at least one first task by delaying the execution of one or more other tasks that have used their respective workload allocation until sufficient time has passed to accumulate credit for execution above a pre-defined threshold.
48. A method as in claim 43 , further comprising: blocking the scheduling of execution of at least one second task when the at least one second task is waiting on the occurrence of an event.
49. A method as in claim 43 , wherein the event includes waiting for arrival of one of a message from another task and data from an external input-output device.
50. A method as in claim 43 , wherein the task profile comprises one or more of: task priority, work rate, scheduling interval, work to be completed, and maximum work to be completed.
51. A method as in claim 43 , further comprising: managing execution of resources by scheduling the tasks based on completing a certain amount of work periodically.
52. A method as in claim 43 , wherein the amount of work completed is a measure of one of data transference and processor instructions completed.
53. A method as in claim 43 , further comprising: setting the task parameters of the one or more tasks by control software, the task parameters being pre-determined during the process of mapping the corresponding task to a target computer system.
54. A method as in claim 38 , wherein the tasks are selected from a group consisting of: computer processes, instances of computer programs that are being executed, threads of execution including one or more simultaneously, pseudo-simultaneously, executing instances of a computer program closely sharing resources that execute within one or more processors, virtual machines including virtual execution environments on one or more processors, or state machine tasks.
55. A method as in claim 43 , wherein the at least one first task has a smallest calculated start time as compared to other tasks having a same task priority class.
56. A method as in claim 43 , further comprising: allocating at least one buffer occupancy value to each task and storing the buffer occupancy value as a parameter of the associated task profile, the buffer occupancy value related to one of a buffer size value and number of buffers.
57. A method as in claim 56 , further comprising: monitoring allocation of buffers on behalf of a task to determine a monitored buffer value related to one of a buffer size value and number of buffers.
58. A method as in claim 57 , further comprising: comparing the monitored buffer value to a buffer occupancy value associated with a task and taking a responsive action when a difference between the monitored buffer value and the buffer occupancy value meets a second threshold criteria.
59. A method as in claim 58 , wherein the responsive action includes one of replacing the buffers of the task and preventing the allocation of new buffers.
60. A method as claim 38 , wherein the processor system is a state machine, and the tasks are state machine tasks.
61. A method as in claim 43 , wherein the start time is calculated continuously or when the task is no longer being executed.
62. A method as in claim 43 , wherein the task list can be created dynamically, with tasks added and subtracted over time.
63. A method as in claim 41 , wherein the calculated start time characterizes a time at which the corresponding task should be next scheduled to be executed by at least one of the processors.
64. A method as in claim 41 , wherein at least one of the task parameters dynamically changes prior to completion of execution of the task.
65. A method as in claim 64 , wherein the at least of the task parameters changes based on buffer occupancy values.
66. A method as in claim 38 , wherein credit for each task is based on a product of (i) a difference between a start time for the task and a current time, and (ii) a work rate for the task.
67. A method comprising:
selecting tasks for execution by one or more processors of a processor system;
allocating at least one buffer occupancy value to each task that relates to one of a buffer size value and number of buffers;
monitoring allocation of buffers on behalf of a task to determine a monitored buffer value related to one of a buffer size value and number of buffers;
comparing the monitored buffer value to a buffer occupancy value associated with a task; and
taking a responsive action when a difference between the monitored buffer value and the at least one buffer occupancy value meets a threshold criteria, the responsive action including one of replacing the buffers of the task and preventing the allocation of new buffers.
68. A non-transitory computer program product storing instructions, which when executed by at least one data processor of at least one computing system, result in operations comprising:
calculating credit for a plurality of processor tasks;
selecting, from the plurality of processor tasks, processor tasks for execution by one or more processors of a processor system;
monitoring execution of the selected tasks to determine, for each selected task, a monitored value related to an amount of work completed for the corresponding selected task; and
throttling one of the selected tasks from completing additional work when a difference between the monitored value related to the amount of work completed for such task and a value related to the amount of work to be completed for such task meets a threshold criteria, the throttling ending upon an occurrence of at least one pre-defined event for such task.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/797,796 US20130191841A1 (en) | 2007-08-24 | 2013-03-12 | Method and Apparatus For Fine Grain Performance Management of Computer Systems |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US96617307P | 2007-08-24 | 2007-08-24 | |
US12/197,165 US8397236B2 (en) | 2007-08-24 | 2008-08-22 | Credit based performance managment of computer systems |
US13/797,796 US20130191841A1 (en) | 2007-08-24 | 2013-03-12 | Method and Apparatus For Fine Grain Performance Management of Computer Systems |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/197,165 Continuation US8397236B2 (en) | 2007-08-24 | 2008-08-22 | Credit based performance managment of computer systems |
Publications (1)
Publication Number | Publication Date |
---|---|
US20130191841A1 true US20130191841A1 (en) | 2013-07-25 |
Family
ID=40383353
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/197,165 Expired - Fee Related US8397236B2 (en) | 2007-08-24 | 2008-08-22 | Credit based performance managment of computer systems |
US13/797,796 Abandoned US20130191841A1 (en) | 2007-08-24 | 2013-03-12 | Method and Apparatus For Fine Grain Performance Management of Computer Systems |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/197,165 Expired - Fee Related US8397236B2 (en) | 2007-08-24 | 2008-08-22 | Credit based performance managment of computer systems |
Country Status (2)
Country | Link |
---|---|
US (2) | US8397236B2 (en) |
WO (1) | WO2009029549A2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10007440B2 (en) * | 2015-11-22 | 2018-06-26 | Cisco Technology, Inc. | Method of reordering a queue of write requests |
Families Citing this family (118)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8959328B2 (en) * | 2007-11-13 | 2015-02-17 | Intel Corporation | Device, system, and method for multi-resource scheduling |
US8561072B2 (en) * | 2008-05-16 | 2013-10-15 | Microsoft Corporation | Scheduling collections in a scheduler |
US8566830B2 (en) * | 2008-05-16 | 2013-10-22 | Microsoft Corporation | Local collections of tasks in a scheduler |
US8185512B2 (en) * | 2008-12-04 | 2012-05-22 | International Business Machines Corporation | Prioritization of search requests using search templates |
JP2010211526A (en) * | 2009-03-10 | 2010-09-24 | Fujitsu Ltd | Program, computer, and control method |
US20110099052A1 (en) * | 2009-10-28 | 2011-04-28 | Xerox Corporation | Automatic checking of expectation-fulfillment schemes |
US8677071B2 (en) * | 2010-03-26 | 2014-03-18 | Virtualmetrix, Inc. | Control of processor cache memory occupancy |
US8782653B2 (en) * | 2010-03-26 | 2014-07-15 | Virtualmetrix, Inc. | Fine grain performance resource management of computer systems |
CN102906696A (en) * | 2010-03-26 | 2013-01-30 | 维尔图尔梅特里克斯公司 | Fine grain performance resource management of computer systems |
US8977677B2 (en) | 2010-12-01 | 2015-03-10 | Microsoft Technology Licensing, Llc | Throttling usage of resources |
US8683479B1 (en) * | 2011-02-16 | 2014-03-25 | Hewlett-Packard Development Company, L.P. | Shifting information technology workload demands |
US20120290810A1 (en) * | 2011-04-18 | 2012-11-15 | Jean-Jacques Lecler | Memory Access Latency Metering |
US20120304186A1 (en) * | 2011-05-26 | 2012-11-29 | International Business Machines Corporation | Scheduling Mapreduce Jobs in the Presence of Priority Classes |
US9329901B2 (en) | 2011-12-09 | 2016-05-03 | Microsoft Technology Licensing, Llc | Resource health based scheduling of workload tasks |
EP2615511A1 (en) * | 2012-01-12 | 2013-07-17 | Siemens Aktiengesellschaft | Method for synchronous execution of programmes in a redundant automation system |
US9305274B2 (en) | 2012-01-16 | 2016-04-05 | Microsoft Technology Licensing, Llc | Traffic shaping based on request resource usage |
US9122524B2 (en) * | 2013-01-08 | 2015-09-01 | Microsoft Technology Licensing, Llc | Identifying and throttling tasks based on task interactivity |
US9367357B2 (en) * | 2013-01-18 | 2016-06-14 | Nec Corporation | Simultaneous scheduling of processes and offloading computation on many-core coprocessors |
US9086925B2 (en) * | 2013-01-18 | 2015-07-21 | Nec Laboratories America, Inc. | Methods of processing core selection for applications on manycore processors |
US9329671B2 (en) * | 2013-01-29 | 2016-05-03 | Nvidia Corporation | Power-efficient inter processor communication scheduling |
US9645848B2 (en) * | 2013-05-20 | 2017-05-09 | International Business Machines Corporation | Scheduling homogeneous and heterogeneous workloads with runtime elasticity in a parallel processing environment |
US9282051B2 (en) * | 2013-06-26 | 2016-03-08 | Netronome Systems, Inc. | Credit-based resource allocator circuit |
US10534683B2 (en) * | 2013-08-29 | 2020-01-14 | International Business Machines Corporation | Communicating outstanding maintenance tasks to improve disk data integrity |
US10140210B2 (en) * | 2013-09-24 | 2018-11-27 | Intel Corporation | Method and apparatus for cache occupancy determination and instruction scheduling |
US9471377B2 (en) * | 2013-11-13 | 2016-10-18 | Reservoir Labs, Inc. | Systems and methods for parallelizing and optimizing sparse tensor computations |
JP6318751B2 (en) * | 2014-03-20 | 2018-05-09 | 富士通株式会社 | Information processing apparatus, action switching method, and action switching program |
US9424102B2 (en) * | 2014-05-14 | 2016-08-23 | International Business Machines Corporation | Task grouping by context |
US10649796B2 (en) | 2014-06-27 | 2020-05-12 | Amazon Technologies, Inc. | Rolling resource credits for scheduling of virtual computer resources |
US9635103B2 (en) | 2014-09-11 | 2017-04-25 | Amazon Technologies, Inc. | Dynamic virtual resource request rate control for utilizing physical resources |
US10048974B1 (en) | 2014-09-30 | 2018-08-14 | Amazon Technologies, Inc. | Message-based computation request scheduling |
US9678773B1 (en) | 2014-09-30 | 2017-06-13 | Amazon Technologies, Inc. | Low latency computational capacity provisioning |
US9146764B1 (en) | 2014-09-30 | 2015-09-29 | Amazon Technologies, Inc. | Processing event messages for user requests to execute program code |
US9715402B2 (en) | 2014-09-30 | 2017-07-25 | Amazon Technologies, Inc. | Dynamic code deployment and versioning |
US9830193B1 (en) | 2014-09-30 | 2017-11-28 | Amazon Technologies, Inc. | Automatic management of low latency computational capacity |
US9600312B2 (en) | 2014-09-30 | 2017-03-21 | Amazon Technologies, Inc. | Threading as a service |
US9323556B2 (en) | 2014-09-30 | 2016-04-26 | Amazon Technologies, Inc. | Programmatic event detection and message generation for requests to execute program code |
US9537788B2 (en) | 2014-12-05 | 2017-01-03 | Amazon Technologies, Inc. | Automatic determination of resource sizing |
US9733967B2 (en) | 2015-02-04 | 2017-08-15 | Amazon Technologies, Inc. | Security protocols for low latency execution of program code |
US9588790B1 (en) | 2015-02-04 | 2017-03-07 | Amazon Technologies, Inc. | Stateful virtual compute system |
US9785476B2 (en) | 2015-04-08 | 2017-10-10 | Amazon Technologies, Inc. | Endpoint management system and virtual compute system |
US9930103B2 (en) | 2015-04-08 | 2018-03-27 | Amazon Technologies, Inc. | Endpoint management system providing an application programming interface proxy service |
CN105094608A (en) * | 2015-07-17 | 2015-11-25 | 小米科技有限责任公司 | Task display method and device |
US10853077B2 (en) * | 2015-08-26 | 2020-12-01 | Huawei Technologies Co., Ltd. | Handling Instruction Data and Shared resources in a Processor Having an Architecture Including a Pre-Execution Pipeline and a Resource and a Resource Tracker Circuit Based on Credit Availability |
US11221853B2 (en) * | 2015-08-26 | 2022-01-11 | Huawei Technologies Co., Ltd. | Method of dispatching instruction data when a number of available resource credits meets a resource requirement |
US9928108B1 (en) * | 2015-09-29 | 2018-03-27 | Amazon Technologies, Inc. | Metaevent handling for on-demand code execution environments |
US10042660B2 (en) | 2015-09-30 | 2018-08-07 | Amazon Technologies, Inc. | Management of periodic requests for compute capacity |
US9811434B1 (en) | 2015-12-16 | 2017-11-07 | Amazon Technologies, Inc. | Predictive management of on-demand code execution |
US10754701B1 (en) | 2015-12-16 | 2020-08-25 | Amazon Technologies, Inc. | Executing user-defined code in response to determining that resources expected to be utilized comply with resource restrictions |
US10013267B1 (en) | 2015-12-16 | 2018-07-03 | Amazon Technologies, Inc. | Pre-triggers for code execution environments |
US10002026B1 (en) | 2015-12-21 | 2018-06-19 | Amazon Technologies, Inc. | Acquisition and maintenance of dedicated, reserved, and variable compute capacity |
US10067801B1 (en) | 2015-12-21 | 2018-09-04 | Amazon Technologies, Inc. | Acquisition and maintenance of compute capacity |
US9910713B2 (en) | 2015-12-21 | 2018-03-06 | Amazon Technologies, Inc. | Code execution request routing |
US10162672B2 (en) | 2016-03-30 | 2018-12-25 | Amazon Technologies, Inc. | Generating data streams from pre-existing data sets |
US10891145B2 (en) | 2016-03-30 | 2021-01-12 | Amazon Technologies, Inc. | Processing pre-existing data sets at an on demand code execution environment |
US11132213B1 (en) | 2016-03-30 | 2021-09-28 | Amazon Technologies, Inc. | Dependency-based process of pre-existing data sets at an on demand code execution environment |
US10282229B2 (en) | 2016-06-28 | 2019-05-07 | Amazon Technologies, Inc. | Asynchronous task management in an on-demand network code execution environment |
US10102040B2 (en) | 2016-06-29 | 2018-10-16 | Amazon Technologies, Inc | Adjusting variable limit on concurrent code executions |
US10203990B2 (en) | 2016-06-30 | 2019-02-12 | Amazon Technologies, Inc. | On-demand network code execution with cross-account aliases |
US10277708B2 (en) | 2016-06-30 | 2019-04-30 | Amazon Technologies, Inc. | On-demand network code execution with cross-account aliases |
US10884787B1 (en) | 2016-09-23 | 2021-01-05 | Amazon Technologies, Inc. | Execution guarantees in an on-demand network code execution system |
US10061613B1 (en) | 2016-09-23 | 2018-08-28 | Amazon Technologies, Inc. | Idempotent task execution in on-demand network code execution systems |
CN107871194B (en) * | 2016-09-28 | 2020-10-16 | 北京北方华创微电子装备有限公司 | Scheduling method and device for production line equipment |
US11119813B1 (en) | 2016-09-30 | 2021-09-14 | Amazon Technologies, Inc. | Mapreduce implementation using an on-demand network code execution system |
DE102016221526A1 (en) * | 2016-11-03 | 2018-05-03 | Robert Bosch Gmbh | Apparatus and method for processing a plurality of tasks |
US10521880B2 (en) * | 2017-04-17 | 2019-12-31 | Intel Corporation | Adaptive compute size per workload |
KR102527925B1 (en) * | 2017-11-29 | 2023-05-03 | 에스케이하이닉스 주식회사 | Memory system and operating method thereof |
US10303492B1 (en) | 2017-12-13 | 2019-05-28 | Amazon Technologies, Inc. | Managing custom runtimes in an on-demand code execution system |
US10564946B1 (en) | 2017-12-13 | 2020-02-18 | Amazon Technologies, Inc. | Dependency handling in an on-demand network code execution system |
US10733085B1 (en) | 2018-02-05 | 2020-08-04 | Amazon Technologies, Inc. | Detecting impedance mismatches due to cross-service calls |
US10572375B1 (en) | 2018-02-05 | 2020-02-25 | Amazon Technologies, Inc. | Detecting parameter validity in code including cross-service calls |
US10831898B1 (en) | 2018-02-05 | 2020-11-10 | Amazon Technologies, Inc. | Detecting privilege escalations in code including cross-service calls |
US10353678B1 (en) | 2018-02-05 | 2019-07-16 | Amazon Technologies, Inc. | Detecting code characteristic alterations due to cross-service calls |
US10725752B1 (en) | 2018-02-13 | 2020-07-28 | Amazon Technologies, Inc. | Dependency handling in an on-demand network code execution system |
US10776091B1 (en) | 2018-02-26 | 2020-09-15 | Amazon Technologies, Inc. | Logging endpoint in an on-demand code execution system |
US10853115B2 (en) | 2018-06-25 | 2020-12-01 | Amazon Technologies, Inc. | Execution of auxiliary functions in an on-demand network code execution system |
US10649749B1 (en) | 2018-06-26 | 2020-05-12 | Amazon Technologies, Inc. | Cross-environment application of tracing information for improved code execution |
US11146569B1 (en) | 2018-06-28 | 2021-10-12 | Amazon Technologies, Inc. | Escalation-resistant secure network services using request-scoped authentication information |
US10949237B2 (en) | 2018-06-29 | 2021-03-16 | Amazon Technologies, Inc. | Operating system customization in an on-demand network code execution system |
US11099870B1 (en) | 2018-07-25 | 2021-08-24 | Amazon Technologies, Inc. | Reducing execution times in an on-demand network code execution system using saved machine states |
US11243953B2 (en) | 2018-09-27 | 2022-02-08 | Amazon Technologies, Inc. | Mapreduce implementation in an on-demand network code execution system and stream data processing system |
US11099917B2 (en) | 2018-09-27 | 2021-08-24 | Amazon Technologies, Inc. | Efficient state maintenance for execution environments in an on-demand code execution system |
US11194620B2 (en) * | 2018-10-31 | 2021-12-07 | Nutanix, Inc. | Virtual machine migration task management |
US11188368B2 (en) | 2018-10-31 | 2021-11-30 | Nutanix, Inc. | Asynchronous workload migration control |
US11943093B1 (en) | 2018-11-20 | 2024-03-26 | Amazon Technologies, Inc. | Network connection recovery after virtual machine transition in an on-demand network code execution system |
US10884812B2 (en) | 2018-12-13 | 2021-01-05 | Amazon Technologies, Inc. | Performance-based hardware emulation in an on-demand network code execution system |
US11010188B1 (en) | 2019-02-05 | 2021-05-18 | Amazon Technologies, Inc. | Simulated data object storage using on-demand computation of data objects |
US11861386B1 (en) | 2019-03-22 | 2024-01-02 | Amazon Technologies, Inc. | Application gateways in an on-demand network code execution system |
US11119809B1 (en) | 2019-06-20 | 2021-09-14 | Amazon Technologies, Inc. | Virtualization-based transaction handling in an on-demand network code execution system |
US11159528B2 (en) | 2019-06-28 | 2021-10-26 | Amazon Technologies, Inc. | Authentication to network-services using hosted authentication information |
US11115404B2 (en) | 2019-06-28 | 2021-09-07 | Amazon Technologies, Inc. | Facilitating service connections in serverless code executions |
US11190609B2 (en) | 2019-06-28 | 2021-11-30 | Amazon Technologies, Inc. | Connection pooling for scalable network services |
US10996961B2 (en) | 2019-09-27 | 2021-05-04 | Amazon Technologies, Inc. | On-demand indexing of data in input path of object storage service |
US11106477B2 (en) | 2019-09-27 | 2021-08-31 | Amazon Technologies, Inc. | Execution of owner-specified code during input/output path to object storage service |
US10908927B1 (en) | 2019-09-27 | 2021-02-02 | Amazon Technologies, Inc. | On-demand execution of object filter code in output path of object storage service |
US11250007B1 (en) | 2019-09-27 | 2022-02-15 | Amazon Technologies, Inc. | On-demand execution of object combination code in output path of object storage service |
US11055112B2 (en) | 2019-09-27 | 2021-07-06 | Amazon Technologies, Inc. | Inserting executions of owner-specified code into input/output path of object storage service |
US11263220B2 (en) | 2019-09-27 | 2022-03-01 | Amazon Technologies, Inc. | On-demand execution of object transformation code in output path of object storage service |
US11656892B1 (en) | 2019-09-27 | 2023-05-23 | Amazon Technologies, Inc. | Sequential execution of user-submitted code and native functions |
US11550944B2 (en) | 2019-09-27 | 2023-01-10 | Amazon Technologies, Inc. | Code execution environment customization system for object storage service |
US11416628B2 (en) | 2019-09-27 | 2022-08-16 | Amazon Technologies, Inc. | User-specific data manipulation system for object storage service based on user-submitted code |
US11023311B2 (en) | 2019-09-27 | 2021-06-01 | Amazon Technologies, Inc. | On-demand code execution in input path of data uploaded to storage service in multiple data portions |
US11360948B2 (en) | 2019-09-27 | 2022-06-14 | Amazon Technologies, Inc. | Inserting owner-specified data processing pipelines into input/output path of object storage service |
US11386230B2 (en) | 2019-09-27 | 2022-07-12 | Amazon Technologies, Inc. | On-demand code obfuscation of data in input path of object storage service |
US11394761B1 (en) | 2019-09-27 | 2022-07-19 | Amazon Technologies, Inc. | Execution of user-submitted code on a stream of data |
US11023416B2 (en) | 2019-09-27 | 2021-06-01 | Amazon Technologies, Inc. | Data access control system for object storage service based on owner-defined code |
US10942795B1 (en) | 2019-11-27 | 2021-03-09 | Amazon Technologies, Inc. | Serverless call distribution to utilize reserved capacity without inhibiting scaling |
US11119826B2 (en) | 2019-11-27 | 2021-09-14 | Amazon Technologies, Inc. | Serverless call distribution to implement spillover while avoiding cold starts |
US11714682B1 (en) | 2020-03-03 | 2023-08-01 | Amazon Technologies, Inc. | Reclaiming computing resources in an on-demand code execution system |
US11188391B1 (en) | 2020-03-11 | 2021-11-30 | Amazon Technologies, Inc. | Allocating resources to on-demand code executions under scarcity conditions |
US11775640B1 (en) | 2020-03-30 | 2023-10-03 | Amazon Technologies, Inc. | Resource utilization-based malicious task detection in an on-demand code execution system |
US11593270B1 (en) | 2020-11-25 | 2023-02-28 | Amazon Technologies, Inc. | Fast distributed caching using erasure coded object parts |
US11550713B1 (en) | 2020-11-25 | 2023-01-10 | Amazon Technologies, Inc. | Garbage collection in distributed systems using life cycled storage roots |
WO2022218510A1 (en) | 2021-04-13 | 2022-10-20 | Cariad Se | Method for scheduling software tasks on at least one heterogeneous processing system using a backend computer system, wherein each processing system is situated in a respective vehicle of a vehicle fleet, and control framework for at least one vehicle |
US11388210B1 (en) | 2021-06-30 | 2022-07-12 | Amazon Technologies, Inc. | Streaming analytics using a serverless compute system |
US11968280B1 (en) | 2021-11-24 | 2024-04-23 | Amazon Technologies, Inc. | Controlling ingestion of streaming data to serverless function executions |
US12015603B2 (en) | 2021-12-10 | 2024-06-18 | Amazon Technologies, Inc. | Multi-tenant mode for serverless code execution |
CN117421098A (en) * | 2022-07-11 | 2024-01-19 | 中科寒武纪科技股份有限公司 | Method, apparatus, board card and computer readable storage medium for task scheduling |
US11934673B2 (en) | 2022-08-11 | 2024-03-19 | Seagate Technology Llc | Workload amplification metering and management |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4980857A (en) * | 1987-04-15 | 1990-12-25 | Allied-Signal Inc. | Operations controller for a fault tolerant multiple node processing system |
US20020073129A1 (en) * | 2000-12-04 | 2002-06-13 | Yu-Chung Wang | Integrated multi-component scheduler for operating systems |
US20020188691A1 (en) * | 1997-10-30 | 2002-12-12 | Paul Ignatius | Pipelined high speed data transfer mechanism |
US20040073905A1 (en) * | 1999-10-01 | 2004-04-15 | Emer Joel S. | Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit |
US20040244000A1 (en) * | 2003-05-30 | 2004-12-02 | Steven Frank | General purpose embedded processor |
US20050240752A1 (en) * | 2004-04-21 | 2005-10-27 | Fujitsu Limited | Thread changeover control apparatus |
US20070074207A1 (en) * | 2005-09-27 | 2007-03-29 | Sony Computer Entertainment Inc. | SPU task manager for cell processor |
US20070094661A1 (en) * | 2005-10-22 | 2007-04-26 | Cisco Technology, Inc. | Techniques for task management using presence |
US20070110094A1 (en) * | 2005-11-15 | 2007-05-17 | Sony Computer Entertainment Inc. | Task Allocation Method And Task Allocation Apparatus |
US7228546B1 (en) * | 2000-01-28 | 2007-06-05 | Hewlett-Packard Development Company, L.P. | Dynamic management of computer workloads through service level optimization |
US7386586B1 (en) * | 1998-12-22 | 2008-06-10 | Computer Associates Think, Inc. | System for scheduling and monitoring computer processes |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07253893A (en) | 1994-03-15 | 1995-10-03 | Toshiba Corp | System for managing task priority order |
US6671762B1 (en) * | 1997-12-29 | 2003-12-30 | Stmicroelectronics, Inc. | System and method of saving and restoring registers in a data processing system |
US7035932B1 (en) * | 2000-10-27 | 2006-04-25 | Eric Morgan Dowling | Federated multiprotocol communication |
US6845456B1 (en) * | 2001-05-01 | 2005-01-18 | Advanced Micro Devices, Inc. | CPU utilization measurement techniques for use in power management |
US7082610B2 (en) * | 2001-06-02 | 2006-07-25 | Redback Networks, Inc. | Method and apparatus for exception handling in a multi-processing environment |
JP2003131892A (en) * | 2001-10-25 | 2003-05-09 | Matsushita Electric Ind Co Ltd | Task execution control device and method therefor |
US7539994B2 (en) * | 2003-01-03 | 2009-05-26 | Intel Corporation | Dynamic performance and resource management in a processing system |
JP3920818B2 (en) * | 2003-07-22 | 2007-05-30 | 株式会社東芝 | Scheduling method and information processing system |
US7281145B2 (en) * | 2004-06-24 | 2007-10-09 | International Business Machiness Corporation | Method for managing resources in a CPU by allocating a specified percentage of CPU resources to high priority applications |
US8122448B2 (en) * | 2007-06-29 | 2012-02-21 | International Business Machines Corporation | Estimation method and system |
-
2008
- 2008-08-22 WO PCT/US2008/074122 patent/WO2009029549A2/en active Application Filing
- 2008-08-22 US US12/197,165 patent/US8397236B2/en not_active Expired - Fee Related
-
2013
- 2013-03-12 US US13/797,796 patent/US20130191841A1/en not_active Abandoned
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4980857A (en) * | 1987-04-15 | 1990-12-25 | Allied-Signal Inc. | Operations controller for a fault tolerant multiple node processing system |
US20020188691A1 (en) * | 1997-10-30 | 2002-12-12 | Paul Ignatius | Pipelined high speed data transfer mechanism |
US7386586B1 (en) * | 1998-12-22 | 2008-06-10 | Computer Associates Think, Inc. | System for scheduling and monitoring computer processes |
US20040073905A1 (en) * | 1999-10-01 | 2004-04-15 | Emer Joel S. | Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit |
US7228546B1 (en) * | 2000-01-28 | 2007-06-05 | Hewlett-Packard Development Company, L.P. | Dynamic management of computer workloads through service level optimization |
US20020073129A1 (en) * | 2000-12-04 | 2002-06-13 | Yu-Chung Wang | Integrated multi-component scheduler for operating systems |
US20040244000A1 (en) * | 2003-05-30 | 2004-12-02 | Steven Frank | General purpose embedded processor |
US20050240752A1 (en) * | 2004-04-21 | 2005-10-27 | Fujitsu Limited | Thread changeover control apparatus |
US20070074207A1 (en) * | 2005-09-27 | 2007-03-29 | Sony Computer Entertainment Inc. | SPU task manager for cell processor |
US20070094661A1 (en) * | 2005-10-22 | 2007-04-26 | Cisco Technology, Inc. | Techniques for task management using presence |
US20070110094A1 (en) * | 2005-11-15 | 2007-05-17 | Sony Computer Entertainment Inc. | Task Allocation Method And Task Allocation Apparatus |
Non-Patent Citations (1)
Title |
---|
Bensaou ( "Credit-based fair queuing (CBFQ): A simple service-scheduling Algorithm for packet-switched Networks", IEEE, 2001, pages 591-604). * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10007440B2 (en) * | 2015-11-22 | 2018-06-26 | Cisco Technology, Inc. | Method of reordering a queue of write requests |
US10289312B2 (en) * | 2015-11-22 | 2019-05-14 | Synamedia Limited | Method of reordering a queue of write requests |
Also Published As
Publication number | Publication date |
---|---|
WO2009029549A3 (en) | 2009-04-16 |
WO2009029549A2 (en) | 2009-03-05 |
US8397236B2 (en) | 2013-03-12 |
US20090055829A1 (en) | 2009-02-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8397236B2 (en) | Credit based performance managment of computer systems | |
US8782653B2 (en) | Fine grain performance resource management of computer systems | |
US8612986B2 (en) | Computer program product for scheduling ready threads in a multiprocessor computer based on an interrupt mask flag value associated with a thread and a current processor priority register value | |
US8302098B2 (en) | Hardware utilization-aware thread management in multithreaded computer systems | |
US8069444B2 (en) | Method and apparatus for achieving fair cache sharing on multi-threaded chip multiprocessors | |
KR20210056430A (en) | Commitment-aware scheduler | |
US9436464B2 (en) | Instruction-issuance controlling device and instruction-issuance controlling method | |
US10545892B2 (en) | Multi-thread processor and its interrupt processing method | |
EP2553573A2 (en) | Fine grain performance resource management of computer systems | |
US20060253675A1 (en) | Method and apparatus for scheduling real-time and non-real-time access to a shared resource | |
KR101519891B1 (en) | Thread de-emphasis instruction for multithreaded processor | |
US20120297216A1 (en) | Dynamically selecting active polling or timed waits | |
US10271326B2 (en) | Scheduling function calls | |
CN111597044A (en) | Task scheduling method and device, storage medium and electronic equipment | |
CN102193828B (en) | Decoupling the number of logical threads from the number of simultaneous physical threads in a processor | |
US20080276045A1 (en) | Apparatus and Method for Dynamic Cache Management | |
US11113101B2 (en) | Method and apparatus for scheduling arbitration among a plurality of service requestors | |
JP2022549333A (en) | Throttling while managing upstream resources | |
US20240160364A1 (en) | Allocation of resources when processing at memory level through memory request scheduling | |
US11294724B2 (en) | Shared resource allocation in a multi-threaded microprocessor | |
CN110968418A (en) | Signal-slot-based large-scale constrained concurrent task scheduling method and device | |
JPH08180007A (en) | Input/output processing system | |
CN117806768A (en) | Resource management method and device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: VIRTUALMETRIX, INC., CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:GIBSON, GARY A.;REEL/FRAME:030775/0607 Effective date: 20081024 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |