JPH07191050A - Speed detecting device - Google Patents

Abstract

PURPOSE:To provide a speed detecting device which is not deteriorated in controlling characteristic, does not generate much noise when an object to be controlled is stopped, and can control the object to be controlled by accurately detecting the speed of the object. CONSTITUTION:A pulse signal generating section 10 generates pulse signals corresponding to the speed of an object (motor) to be controlled and an integrator 13 integrates the pulse signals. A sample hold circuit 24 holds the integrated value of the signals. Since the integrated value of sample-hold values is set to '0' when the change of the moving direction of the object is detected, no large ripple is generated when the polarity is switched following the change of the moving direction of the object to be controlled. Since the ripple is made smaller in such a way at the time of switching the polarity, the followup ability of this speed detecting device is improved when the moving direction is changed and, at the same time, the noise generated when the object is stopped is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a speed detecting device, and more particularly to a speed detecting device for detecting a speed compared with a speed command signal during speed control of a controlled object such as a motor.

[0002]

2. Description of the Related Art Conventionally, when performing position control of a controlled object, a speed command signal is generated according to an actual position and a target position, and the controlled object is controlled according to a deviation between the speed command and the speed signal detected by a speed detection device. Is being carried out. Such a general configuration is shown in FIG. 1, in which 1 is a speed command input unit, 2 is a speed deviation processing unit, 3 is a speed control unit, 4 is a control target such as a motor,
Reference numeral 5 is a pulse generator (encoder), and 6 is a speed detection device.

In such a configuration, when a predetermined analog voltage is input from the speed command input unit 1, a deviation between the speed command and the detected speed signal is formed in the speed deviation processing unit 2, and the deviation signal is the speed control unit. Input to 3. The speed control unit drives the controlled object 4 with an operation amount according to the deviation. When the controlled object 4 is driven, the pulse generator 5 attached to the controlled object 4 generates a two-phase pulse signal having a phase difference of 90 ° electrically having a frequency proportional to the moving speed of the controlled object 4. The speed detection device 6 receives the pulse signal from the pulse generator 5, converts it into a voltage value proportional to its frequency, and outputs it to the speed deviation processing unit 2, and the speed deviation processing unit 2 compares the speed command and the speed detection signal. , The speed of the controlled object 4 is controlled to the command speed.

FIG. 2 is a block diagram showing an example of the structure of a conventional speed detecting device used for such control. 10 is a pulse signal generator (corresponding to the pulse generator 5 in FIG. 1), and 12 is a pulse signal. The processing circuit 13 is an integrator, which includes a resistor 14, a capacitor 15, and an operational amplifier 16. The sample signal circuit 17 is the pulse processing circuit 12
The analog switch 18 is operated according to the signal from.
The analog switch 18, the resistor 19 and the capacitor 20 constitute a sample hold circuit 24.
21 is a moving direction detection circuit, 22 is a polarity switching circuit, 2
Reference numeral 3 is a speed detection signal output unit.

FIG. 3 shows a part of the output signal in the speed detecting device having the configuration shown in FIG. 2. FIG. 3A shows the output signal of the pulse signal processing circuit 12, in which the pulse interval gradually increases, Since the moving direction changes at time t, it can be seen that the pulse interval gradually decreases thereafter. (B)
Is an output signal of the moving direction detection circuit 21 and is “0” before t,
After that, it is “1”. , (C) are output signals of the integrator 13, and the integrated value gradually decreases and takes the minimum value ΔV1 at a time point delayed by one pulse from t. (D) is an output signal of the sample hold circuit 24, which becomes a signal corresponding to the integrated value. In the sample hold circuit 24, the sample signal is created by the signal synchronized with the rising edge of the output signal of the pulse signal processing circuit 12 shown in (a), and the signal held in the capacitor 20 is the output of the integrator 13. The signal is one pulse behind the signal. (E) is an output signal of the speed detection signal output unit 23, and the signal changes from positive to negative at the boundary of t.

FIG. 3 shows changes in each output signal when the moving direction changes, and FIG. 4 shows similar signal waveforms when the motor is stopped. Since the generated pulse signals are at regular intervals (a), the sample hold value (d) is constant, and the integrated value (c), the moving direction signal (b) and the detected speed signal (e) are in a predetermined cycle. Understand that it is fluctuating.

[0007]

As described above, the conventional speed detecting device converts the pulse signal output from the pulse generator or the like attached to the speed detection target into the voltage value proportional to the frequency by the integrator, The sample-and-hold circuit reduces the ripple voltage generated in the low frequency region.

However, since the conventional speed detecting device integrates the pulse and converts it into a voltage value proportional to the frequency, when the frequency of the pulse suddenly changes, such as when the moving direction of the controlled object changes, Even if the capacitor 15 is not sufficiently charged and discharged, and the actual speed of the controlled object is 0, the output voltage of the integrator may not be 0 V as shown by ΔV1 in FIG. 3 (c). In addition, when a slight vibration that changes the moving direction occurs at the time of stop, electric charge is stored in the capacitor 15, and the output voltage of the integrator generates a certain level of voltage as shown in FIG. 4 (c). become. These phenomena also affect the output waveform of the sample hold circuit 24, as indicated by ΔV2 in FIGS. 3D and 4D.

Due to the above phenomenon, when the polarities of the sample hold signals shown in FIGS. 3D and 4D are switched according to the moving direction of the controlled object, the polarities shown in FIGS.
As shown in (e), when the polarity is switched, a large ripple Δ
V is generated. This ripple causes problems of deterioration of control performance and noise at the time of stop. In particular, when the speed loop gain is increased and the responsiveness is increased, the noise at the time of stop is also increased, and the problem becomes remarkable.

Therefore, the present invention has been made in order to solve such a problem, and makes it possible to accurately detect the speed of a controlled object and perform control with less deterioration of control characteristics and generation of noise during stoppage. It is an object of the present invention to provide a speed detecting device that does this.

[0011]

In order to solve such a problem, the present invention provides a speed detection device for detecting a speed to be compared with a speed command signal when controlling the speed of the control object. A means for generating a pulse signal corresponding to the speed, an integrator for forming an integrated value according to the pulse signal, a means for outputting a speed detection signal according to the output value of the integrator, and a change in the moving direction of the controlled object. A configuration is provided in which a means for detecting and a means for making the output value of the integrator substantially 0 when the change in the moving direction is detected are adopted.

Further, according to the present invention, in the speed detecting device for detecting the speed to be compared with the speed command signal when controlling the speed of the controlled object, means for generating a pulse signal corresponding to the speed of the controlled object, and the pulse signal. An integrator that forms an integrated value according to the above, a sample hold circuit that samples and holds the integrated value, a means that outputs a speed detection signal according to the sample hold value of the sample hold circuit, and a change in the moving direction of the controlled object. And a means for setting the integrated value or the sample hold value to substantially 0 when the change in the moving direction is detected.

[0013]

In such a structure, when the moving direction of the controlled object changes, the integral value or the sample hold value is set to 0, so that a large ripple does not occur when the polarity is changed due to the changing moving direction. As described above, the ripple at the time of switching the polarity is reduced, so that the followability at the time when the moving direction is changed is improved and the noise generated at the time of stopping can be reduced.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below based on the embodiments shown in the drawings.

FIG. 5 shows a speed detecting device according to an embodiment of the present invention. In the figure, the same parts in FIG. 2 are designated by the same reference numerals, and detailed description thereof will be omitted.
In the configuration of FIG. 5, a capacitor discharge circuit 30 that discharges the capacitor 15 of the integrator 13 and the capacitor 20 of the sample hold circuit 24 is provided. The capacitor discharge circuit 30 includes an analog switch 31 connected in parallel with the capacitor 15 and an analog switch connected in parallel with the capacitor 20 when the moving direction of the controlled object changes in response to a signal from the moving direction detecting circuit 21. Switch 3
Turn 2 on and off.

Next, the operation of the speed detecting device of the present invention thus constructed will be described with reference to FIGS. 6 and 7. 6 and 7 show waveforms of the main part of the speed detecting device when the controlled object is driven and when it is stopped.

The two-phase pulse signal of the pulse generator generated from the pulse signal generator 10 is converted into the one-phase pulse signal shown in FIGS. 6 (a) and 7 (a) in the pulse processing circuit 12. The pulse signal converted by the pulse processing circuit 12 is input to the integrator 13 including the operational amplifier 16, the resistor 14, and the capacitor 15, and the pulse signal shown in FIG.
It is converted into a voltage value that changes in proportion to the pulse frequency shown in (c). The voltage value output from the integrator 13 is composed of the sample signal obtained from the one-phase pulse signal converted by the pulse processing circuit 12 through the sample signal circuit 17, the analog switch 18, the resistor 19, and the capacitor 20. The sample hold circuit 24 shown in FIG.
(D), the signal is sampled and held as shown in FIG. 7 (d).

The moving direction of the controlled object is t, t1, t2, t
3 and t4 ... If it changes at the time, the moving direction detection circuit 2 that responds to the two-phase pulse signal of the pulse generator 2
6 outputs the polarity switching signal shown in FIGS. 6B and 7B, and the polarity switching circuit 22 outputs the polarity switching signal shown in FIG.
(D), the polarity of the sample hold output signal is switched as shown in FIG. 7 (d).

On the other hand, the capacitor discharge signal circuit 30 outputs a capacitor discharge signal synchronized with the rising edge and the falling edge of the polarity switching signal from the polarity switching signal output from the moving direction detection circuit 21 (in FIG. 6, at t, In FIG. 7, it occurs at times t1, t2, t3, t4 ...), and the analog switch 3 is synchronized with this signal.
1, the analog switch 32 is turned on, and the charges accumulated in the capacitor 15 of the integrator 13 and the capacitor 20 of the sample hold circuit 24 are discharged.

Therefore, each time t, t when the moving direction changes
At 1, t2 ..., The capacitors 15 and 20 are discharged, so that the integrated value (c) of the integrator 13 and the output value (d) of the sample hold circuit 24 become zero. As a result,
As shown in (e) and FIG. 7 (e), the ripple voltage of the speed detection signal generated at the time when the moving direction of the controlled object changes is ΔV3, and since the ripple voltage is reduced in this way, the moving direction changes. The trackability at the time of change is improved, and the noise generated at the time of stop is reduced.

In the embodiment described above, the integrator 1
The capacitor 15 of 3 and the capacitor 20 of the sample-hold circuit 24 are discharged to set the integrated value and the sample-hold value to 0, respectively. However, the same effect can be obtained by discharging only one of them. Of course.

Further, in the above-described embodiment, the sample hold circuit is provided to sample and hold the integrated value, but the present invention is not limited to such an embodiment, and as shown in FIGS. 8 to 10. Can be configured. That is,
The embodiment of FIG. 8 is similar to that of FIG. 5, but the sample hold circuit is omitted, and the output of the integrator 13 is directly input to the polarity switching circuit 22 without being sampled.

FIG. 9 and FIG. 10 show signal waveform diagrams at the time of changing direction and at the time of stopping, respectively. As shown in the lowermost stage, the integrated value is at each time point t (FIG. 9). , T1, t2, t3, t4 (FIG. 10), the capacitor 15 discharges, so that the integrated value of the integrator 13 becomes substantially zero. As a result, similarly to the embodiment of FIG. 5, the ripple voltage of the speed detection signal becomes ΔV3, and since the ripple voltage is reduced in this way, the followability at the time when the moving direction changes is improved, and it occurs at the time of stop. Noise is reduced.

[0024]

As is apparent from the above description, according to the present invention, the integrated value or the sample hold value is set to 0 when the moving direction of the controlled object changes, so that it occurs when the direction changes. It is possible to reduce the ripple of the speed detection signal, which improves the followability at the time when the moving direction changes, and to reduce the noise generated when the vehicle stops. Since the velocity loop gain can be increased in this way, the response can be accelerated.

[Brief description of drawings]

FIG. 1 is a block diagram showing a general configuration when a speed of a controlled object is controlled.

FIG. 2 is a block diagram showing a configuration of a conventional speed detection device.

FIG. 3 is a signal waveform diagram showing signals appearing in respective parts when the moving direction of the controlled object changes in the speed detection device of FIG.

FIG. 4 is a signal waveform diagram showing signals appearing at various portions when the controlled object is stopped in the speed detection device of FIG.

FIG. 5 is a block diagram showing a configuration of a speed detection device according to the present invention.

FIG. 6 is a signal waveform diagram showing signals appearing at various parts when the moving direction of the controlled object changes in the speed detection device of FIG.

FIG. 7 is a signal waveform diagram showing signals that appear in each part when the controlled object is stopped in the speed detection device of FIG.

FIG. 8 is a block diagram showing the configuration of another embodiment of the speed detecting device according to the present invention.

9 is a signal waveform diagram showing signals appearing in respective portions when the moving direction of the controlled object changes in the speed detection device of FIG.

10 is a signal waveform diagram showing signals that appear in various parts of the speed detection device of FIG. 8 when the controlled object is stopped.

[Explanation of symbols]

 10 pulse signal generation unit 12 pulse processing circuit 13 integrator 17 sample signal circuit 21 moving direction detection circuit 22 polarity switching circuit 23 speed detection signal output unit 24 sample hold circuit

Claims (3)

[Claims] 1. A speed detecting device for detecting a speed to be compared with a speed command signal when controlling a speed of a controlled object, a means for generating a pulse signal corresponding to the speed of the controlled object, and the pulse signal according to the pulse signal. An integrator that forms an integrated value, a means that outputs a speed detection signal according to the output value of the integrator, a means that detects a change in the moving direction of the controlled object, and an integrator when the change in the moving direction is detected. And a means for setting an output value to substantially zero. 2. A speed detecting device for detecting a speed to be compared with a speed command signal when controlling a speed of a controlled object, wherein: a means for generating a pulse signal corresponding to the speed of the controlled object; An integrator that forms an integrated value, a sample hold circuit that samples and holds the integrated value, a unit that outputs a speed detection signal according to the sample hold value of the sample hold circuit, and a unit that detects a change in the moving direction of the controlled object. And a means for setting an integral value or a sample hold value to substantially zero when a change in the moving direction is detected. 3. The speed detecting device according to claim 1, wherein the integrated value and the sample-hold value are made substantially zero by discharging the capacitors provided in the integrator and the sample-hold circuit. .