JPH07184372A - Resonance type power supply apparatus - Google Patents

Resonance type power supply apparatus

Info

Publication number
JPH07184372A
JPH07184372A JP5328578A JP32857893A JPH07184372A JP H07184372 A JPH07184372 A JP H07184372A JP 5328578 A JP5328578 A JP 5328578A JP 32857893 A JP32857893 A JP 32857893A JP H07184372 A JPH07184372 A JP H07184372A
Authority
JP
Japan
Prior art keywords
voltage
capacitor
resonance
winding
transformer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5328578A
Other languages
Japanese (ja)
Inventor
Yoshikiyo Futagawa
良清 二川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP5328578A priority Critical patent/JPH07184372A/en
Publication of JPH07184372A publication Critical patent/JPH07184372A/en
Pending legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Landscapes

  • Rectifiers (AREA)
  • Dc-Dc Converters (AREA)

Abstract

PURPOSE:To improve conversion efficiency and response characeristic and lower electromagnetic radiation by energizing a transformer in both directions at a constant frequency by self-oscillation, switching a main switch with zero- cross voltage and continuously generating a resonance current depending on a load by providing an intermediate capacitor in the output side. CONSTITUTION:FETs, Tr2a, Tr2b form a half-bridge together with a primary coil Lp, a resonance capacitor Cp, +Vp of DC power supply, GND1 and -Vp to energize a transformer 12 in both directions. Timers 11a, 11b are provided with a delay ON timer for delaying a feedback voltage from feeback wirings Lfa, Lfb and an OFF timer for short-circuiting the feedback voltage after the predetermined time. The OFF timer determines an oscillation frequency, the delay ON timer generates a dead time for FETs Tr2a, Tr2b and causes these transistors to execute zero cross switching. An intermediate capacitor Cm is provided in the output side to make an oscillating circuit composed of a primary winding Lp and a resosnce capacitor Cp self-oscillate to send a resonance current corresponding to a load to the secondary side.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はスイッチング電源に係
り、特に共振方式で負荷に応じた大きさの共振電流を連
続的に発生させるようにしたスイッチング電源の構成に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching power supply, and more particularly to a structure of a switching power supply which continuously generates a resonance current having a magnitude corresponding to a load by a resonance system.

【0002】[0002]

【従来の技術】スイッチング電源は1970前後からの電子
機器の発展にともなって、変換効率が良いことから小型
化と熱発生を解消する方式として盛に研究・開発され応
用されている。ところが、高速に電流・電圧を遮断する
為に、高調波成分が多く電磁放射が問題となり、当初か
ら高周波数成分が少ない共振方式のスイッチング電源が
提案された。
2. Description of the Related Art Switching power supplies have been extensively researched, developed, and applied as a method for reducing the size and eliminating heat generation because of their good conversion efficiency with the development of electronic equipment around 1970. However, since the current and voltage are cut off at high speed, there are many harmonic components and electromagnetic radiation becomes a problem. From the beginning, a resonance type switching power supply with few high frequency components was proposed.

【0003】例えば、米国特許3,529,228号(Sept.,197
0)及び米国特許4,415,959号(Nov.,1983)明細書が見られ
る。しかし、出力電力に対して共振電流比が大きく構成
要素に負担がかかることから、まだ特定分野のみで一般
応用には至ってない。
For example, US Pat. No. 3,529,228 (Sept., 197)
0) and U.S. Pat. No. 4,415,959 (Nov., 1983). However, since the resonance current ratio is large with respect to the output power and the component is burdened, it has not yet been applied to general use only in a specific field.

【0004】これら2つの米国特許は原理的に同じであ
るので、従来技術の実施例として米国特許4,415,959号
明細書を取り上げて図1と図2で説明する。尚、図は説
明の都合上多少変形した。
Since these two US patents are the same in principle, US Pat. No. 4,415,959 is taken as an example of the prior art and will be described with reference to FIGS. 1 and 2. The figure is slightly modified for convenience of explanation.

【0005】図1(a)は基本回路で図1(b)共振回路の等
価回路を示す。1aは一次側の入力電源で電圧Vpを表し、
1bはトランス2の二次側換算電源で電圧Vsを表す。3は
スイッチで一定幅でトランス2を励起する。Drは整流ダ
イオ−ド、Crは共振コンデンサである。Lcはチョ−ク・
コイル、Csは平滑コンデンサ、Dfはダイオ−ドでチョ−
ク・コイルの蓄積エネルギを還流させる。Voutは出力電
圧を表し、このVoutの基準値よりの誤差信号で図示して
ないが、スイッチ3のON-OFFの周波数変調で出力安定化
する。
FIG. 1A is a basic circuit and shows an equivalent circuit of the resonance circuit of FIG. 1B. 1a is the input power supply on the primary side and represents the voltage Vp,
1b is a secondary side conversion power source of the transformer 2 and represents the voltage Vs. A switch 3 excites the transformer 2 with a constant width. Dr is a rectifying diode and Cr is a resonance capacitor. Lc is a choke
Coil, Cs is smoothing capacitor, Df is diode and cho
The energy stored in the coil is recirculated. Vout represents an output voltage and is an error signal from the reference value of Vout, which is not shown, but the output is stabilized by ON-OFF frequency modulation of the switch 3.

【0006】図1(b)の等価回路で、Lrはトランス2の
一次側と二次側とのリ−ク・インダクタンスを表し、共
振コンデンサCrと共振する。スイッチ3が図2(a)のよ
うにON-OFFすると、図2(b)のような共振電流i1=Vs/Z
・SIN(ωt)が流れる。ここに、Zは特性インピダンスでZ
=√(Lr/Cr)、ωは共振角周波数でω=1/√(LrCr)、tは
時間である。この共振角周波数ωは共振がスイッチ3の
ON幅以内に終了するように設定する。
In the equivalent circuit of FIG. 1B, Lr represents the leakage inductance between the primary side and the secondary side of the transformer 2, and resonates with the resonance capacitor Cr. When the switch 3 is turned on and off as shown in Fig. 2 (a), the resonance current i1 = Vs / Z as shown in Fig. 2 (b).
・ SIN (ωt) flows. Where Z is the characteristic impedance Z
= √ (Lr / Cr), ω is the resonance angular frequency ω = 1 / √ (LrCr), and t is time. This resonance angular frequency ω is the resonance of the switch 3
Set to finish within the ON width.

【0007】共振コンデンサCrの電圧VcはVc=Vs(1−CO
S(ωt))で変化して、共振終了時に最大のVc=2Vsとな
る。これ以後、図2(c)のようにほぼ直線的に下降しな
がらチョ−ク・コイルLcと平滑コンデンサCsを充電す
る。
The voltage Vc of the resonance capacitor Cr is Vc = Vs (1-CO
It changes with S (ωt)) and becomes maximum Vc = 2Vs at the end of resonance. Thereafter, the choke coil Lc and the smoothing capacitor Cs are charged while descending substantially linearly as shown in FIG. 2 (c).

【0008】図1の従来技術による共振型のスイッチン
グ電源は、負荷に応じて共振発生周期を変化させ定電圧
の出力を放出する。即ち、1サイクルのエネルギは一定
で周波数変調で出力を制御するものである。ところが、
無負荷又は軽負荷時は変調周波数が可聴音までに達し、
トランス3又はチョ−ク・コイルLcが磁気ストレスによ
り音ノイズを発生する欠陥を有する。これを解決するに
ダミ負荷を設けて、変調周波数を可聴音以上にする。こ
れは、無駄な電力消費になることから入出力変換効率が
低下することになる。
The resonance type switching power supply according to the prior art of FIG. 1 changes the resonance generation period according to the load and discharges a constant voltage output. That is, the energy of one cycle is constant and the output is controlled by frequency modulation. However,
When no load or light load, the modulation frequency reaches audible sound,
The transformer 3 or the choke coil Lc has a defect that causes acoustic noise due to magnetic stress. To solve this, a dummy load is provided to make the modulation frequency higher than the audible sound. This results in wasteful power consumption and thus a reduction in input / output conversion efficiency.

【0009】重負荷時には図2に示す基本原理から、共
振電流を離散的にしか発生出来ないから、通常のスイッ
チング電源に比較して平均電流とピ−ク電流比が2.5 倍
以上になる。これから、いわゆる零クロス・スイッチン
グは実現しているが、スイッチ素子のON抵抗による損失
がかえって増加し変換効率が悪化する欠陥を有する。更
には、入力電源電圧Vpが商用電源の場合は変動率を±1
5%想定する必要があり益々ピ−ク電流が大きくなり、
大きな許容電流の構成要素を選定する必要から高価にな
る欠陥を有する。更に、米国特許3,529,228号 では、ス
イッチの作動は他励方式なので、回路が複雑となりこれ
からも高価になる欠陥を有する。
At the time of heavy load, since the resonance current can be generated only discretely according to the basic principle shown in FIG. 2, the average current to the peak current ratio becomes 2.5 times or more as compared with the normal switching power supply. From this, so-called zero-cross switching has been realized, but there is a defect that the loss due to the ON resistance of the switch element rather increases and the conversion efficiency deteriorates. Furthermore, if the input power supply voltage Vp is a commercial power supply, the fluctuation rate is ± 1.
It is necessary to assume 5%, and the peak current will increase,
It has the drawback that it is expensive due to the need to select components with high permissible currents. Further, in U.S. Pat. No. 3,529,228, the operation of the switch is a separately excited method, so that there is a defect that the circuit becomes complicated and the cost becomes high.

【0010】又、先述の両米国特許共にスイッチは負荷
電流に対しては零電流クロスを実現しているが、スイッ
チの寄生容量との電圧共振は周波数変調制御から実行出
来ず強制スイッチングによる電力損失とスパイク電流に
よる電磁放射が大きくなる欠陥も有する。
Further, in both of the above-mentioned US patents, the switch realizes a zero current cross with respect to the load current, but the voltage resonance with the parasitic capacitance of the switch cannot be executed by the frequency modulation control and the power loss due to the forced switching. There is also a defect that the electromagnetic radiation due to the spike current increases.

【0011】以上のことから、従来技術による共振型の
スイッチング電源は、ほぼ一定の負荷と入力電源電圧変
動の小さい特殊な場合しか応用されてなく、本来の特徴
を生してない。
From the above, the resonance type switching power supply according to the prior art is applied only in a special case in which the load and the input power supply voltage fluctuation are substantially constant, and the original characteristics are not produced.

【0012】[0012]

【発明が解決しようとする課題】本発明はこの様な問題
に鑑みてなされたもので、その目的とするところはトラ
ンスを両方向に励磁するに、自励振型でほぼ一定周波数
で実行することにより主スイッチ手段対が零クロス電圧
スイッチングと、共振電流を負荷に応じた大きさのもを
連続的に発生させることにより、入力変動によらず高効
率変換特性と出力高速応答特性を得て、かつ構成要素の
負担の軽減による安価にして電磁放射を低減した共振方
式電源装置の提供にある。更に他の目的はトランスを常
時励磁することにより、多電源構成を容易にした共振方
式電源装置の提供にある。
SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to excite a transformer in both directions by using a self-excited type at a substantially constant frequency. By the main switch means pair continuously generating the zero cross voltage switching and the resonance current having a magnitude corresponding to the load, a high efficiency conversion characteristic and an output high speed response characteristic are obtained regardless of the input fluctuation, and It is an object of the present invention to provide a resonance type power supply device that reduces the electromagnetic radiation by reducing the burden on the components. Still another object is to provide a resonance type power supply device which facilitates a multi-power supply configuration by constantly exciting a transformer.

【0013】[0013]

【課題を解決する為の手段】本発明は、所定の一次巻
線、帰還巻線、及び二次巻線を有するトランスで一次側
と二次側を絶縁し、一次側でほぼ一定周波数で発振する
ル−プを構成し、二次側で安定化出力電圧を得るように
した共振方式電源装置に於て、トランスを両方向に励磁
する正負の2入力電源と一次巻線とでハ−フ・ブリッジ
構成、又は単一入力電源と一次巻線とでプッシュプル構
成する主スイッチ手段対と、帰還巻線の誘起電圧を正帰
還ル−プを形成するように与えて、主スイッチ手段対を
交互にONさせる遅延ONタイマと所定時間後にOFFさせるO
FFタイマよりなるほぼ一定の発振周波数を設定するタイ
マ対と、より一次側の基本構成となし、主スイッチ手段
対が零電圧・電流クロス・スイッチングすることを特徴
とし、ハ−フ・ブリッジ構成では一次巻線と、プッシュ
プル構成では二次巻線と直列接続し、トランスのリ−ク
・インダクタンスと共振する共振コンデンサを挿入し、
二次巻線に所定方式で接続した整流手段の出力端間に接
続し二次巻線の開放誘起電圧まで充電する中間コンデン
サを設けることにより、等価的に直列接続されたリ−ク
・インダクタンスと共振コンデンサの両端に印加される
印加電圧を二次巻線の開放誘起電圧と中間コンデンサの
充電電圧との差電圧としたことを特徴する。
According to the present invention, a transformer having a predetermined primary winding, a feedback winding, and a secondary winding insulates the primary side from the secondary side and oscillates at a substantially constant frequency on the primary side. In a resonance type power supply device in which a stabilized output voltage is obtained on the secondary side, a half-input power supply for exciting a transformer in both directions and a primary winding are provided. The main switch means pair, which is configured in a bridge configuration or a push-pull configuration with a single input power source and a primary winding, and the induced voltage in the feedback winding are applied so as to form a positive feedback loop, and the main switch means pair is alternated. Delay ON timer to turn on and O to turn off after a predetermined time
A pair of timers consisting of FF timers that set an almost constant oscillation frequency, and a basic configuration on the more primary side, characterized by the main switch means pair performing zero voltage / current cross switching, and a half bridge configuration. In the primary winding and in the push-pull configuration, it is connected in series with the secondary winding, and the resonance capacitor that resonates with the leak inductance of the transformer is inserted,
By providing an intermediate capacitor connected between the output terminals of the rectifying means connected to the secondary winding in a predetermined manner to charge up to the open-circuit induced voltage of the secondary winding, the leakage inductance equivalently connected in series can be obtained. It is characterized in that the applied voltage applied to both ends of the resonance capacitor is the difference voltage between the open induction voltage of the secondary winding and the charging voltage of the intermediate capacitor.

【0014】この差電圧は負荷の大きさに対応すること
から共振電流も対応してしかも連続的に発生するから平
均とピ−ク比が小さくなる故、構成要素の負担が軽減さ
れ安価になる特徴を有することになる。、中間コンデン
サ端を入力とし、パルス幅制御されるPWMスイッチ手段
と、チョ−ク・コイルと、ダイオ−ドと、及び出力端に
なる平滑コンデンサとの配置・組合せで正負の昇降圧の
安定化出力を得る出力手段と、出力手段の基準値よりの
誤差に対応したパルス幅信号をPWMスイッチ手段に与
え、出力手段の出力電圧を安定化させるPWM制御手段
と、前記二次巻線とは異なる他の二次巻線より生成する
クロック発生器と補助電源を含む補助手段と、より安定
化出力電圧を得るもので、中間コンデンサの値を共振コ
ンデンサより大きく平滑コンデンサより小さい関係にす
ることにより、所定の差電圧になり適当な共振電流が直
ちに発生して出力高速応答特性を得る特徴を有するもの
である。 又、零電圧・電流クロススイッチングが可能
になったことにより電磁放射が相当低減されるのも大き
な特徴である。更に又、トランスは常時励磁されている
から二次側で多電源化も容易な特徴を有する。
Since this differential voltage corresponds to the size of the load, the resonance current also corresponds to it and is continuously generated, so that the average and peak ratios are small, and the burden on the components is reduced and the cost is reduced. Will have characteristics. Stabilization of positive and negative buck-boost by arrangement and combination of PWM switch means with input of intermediate capacitor end, pulse width controlled, choke coil, diode, and smoothing capacitor as output end The output means for obtaining the output, the PWM control means for stabilizing the output voltage of the output means by giving a pulse width signal corresponding to the error from the reference value of the output means to the PWM switch means, and the secondary winding are different. A clock generator generated from another secondary winding, auxiliary means including an auxiliary power supply, and a means for obtaining a more stabilized output voltage, and by making the value of the intermediate capacitor larger than the resonance capacitor and smaller than the smoothing capacitor, It has a feature that a predetermined differential voltage is generated and an appropriate resonance current is immediately generated to obtain an output fast response characteristic. In addition, the fact that the zero voltage / current cross-switching is possible also significantly reduces the electromagnetic radiation. Further, since the transformer is always excited, it has a feature that it is easy to increase the number of power sources on the secondary side.

【0015】[0015]

【実施例】図3は本発明の実施例の具体的な回路構成を
示す図である。入力回路10はAC(商用電源)入力を
倍圧整流して直流の+Vpと−Vp電源を得るもので、GN
D1はその中間電位で一次側の接地でもある。尚、Vpは日
本では変動率±15%とすると、Vp=110〜160ボルトであ
る。
FIG. 3 is a diagram showing a concrete circuit configuration of an embodiment of the present invention. The input circuit 10 is a circuit that double-rectifies an AC (commercial power supply) input to obtain DC + Vp and -Vp power supplies.
D1 is the intermediate potential and is also the ground of the primary side. Note that Vp is 110 to 160 volts, where Vp is a fluctuation rate of ± 15% in Japan.

【0016】図3はトランスの一次側でほぼ一定周波数
の自己発振型の発振回路を形成し、一次巻線に直列接続
した共振コンデンサとトランスのリ−ク・インダクタン
スと共振させて、負荷に対応した正弦弧波形の電流・電
圧を二次側に送出して零電圧・電流スイッチングを実行
することにより変換効率の向上と電磁放射の低減を図る
ものである。
FIG. 3 shows a self-oscillation type oscillation circuit having a substantially constant frequency formed on the primary side of the transformer, and the resonance capacitor connected in series with the primary winding and the leakage inductance of the transformer are caused to resonate to respond to a load. It is intended to improve the conversion efficiency and reduce the electromagnetic radiation by sending the current / voltage of the sine arc waveform to the secondary side and executing the zero voltage / current switching.

【0017】12はトランスで一次巻線Lp、帰還巻線Lf
aとLfb、二次巻線Ls1、LsaとLsbを有する。巻線名は自
己インダクタンスも表すものとする。尚、巻線の黒丸点
は極性を表す。
Reference numeral 12 is a transformer, which is a primary winding Lp and a feedback winding Lf.
a and Lfb, secondary windings Ls1, Lsa and Lsb. The winding name shall also indicate the self-inductance. The black dots on the winding indicate the polarity.

【0018】Tr2aとTr2bはFET(電界効果トランジスタ
であるが、バイポ−ラ・トランジスタでも構わない)
で、一次巻線Lpと直列接続のコンデンサCp、+Vp、GND
1、−Vpとでハ−フ・ブリッジを構成してトランス12
を両方向に励磁する。DbaとDbbはFETのボデイ・ダイオ
−ドである。CgaとCgbはFETのゲ−ト・ソ−ス間寄生容
量で、数アンペア級のFETでは数千pFである。
Tr2a and Tr2b are FETs (field effect transistors, but bipolar transistors may be used)
, Capacitor Cp, + Vp, GND connected in series with primary winding Lp
1 and -Vp to form a half bridge and transformer 12
Is excited in both directions. Dba and Dbb are FET body diodes. Cga and Cgb are the gate-source parasitic capacitance of the FET, which is several thousand pF in the FET of several ampere class.

【0019】図示してないが、ソ−ス・ドレイン間とド
レイン・ゲ−ト間にも同程度の寄生容量が存在する。
Although not shown, the same degree of parasitic capacitance exists between the source and drain and between the drain and gate.

【0020】DzaとDzbはゼ−ナ・ダイオ−ドで、抵抗Rb
1aとRb1bとでバイアス電圧を形成して抵抗Rb2aとRb2bを
介してFETTr2aとTr2bのゲ−トにバイアス電圧を与えて
電源投入時の自起動性を確保する。自起動後に発振周波
数に影響を与えないことと、消費電力が無視出来るよう
なそれぞれの抵抗値を選択する。
Dza and Dzb are zener diodes, and resistance Rb
A bias voltage is formed by 1a and Rb1b, and a bias voltage is applied to the gates of the FET Tr2a and Tr2b via the resistors Rb2a and Rb2b to ensure self-startability when the power is turned on. Select each resistance value that does not affect the oscillation frequency after self-starting and that power consumption can be ignored.

【0021】11aと11bはタイマ対でTr2aとTr2bを交互に
ON-OFFさせるもので、帰還巻線LfaとLfbからの帰
還電圧を遅らせる遅延ONタイマと、所定時間後に帰還電
圧を短絡するOFFタイマよりなる。OFFタイマが発振周波
数を決める。
11a and 11b are timer pairs, and Tr2a and Tr2b are alternately arranged.
It is turned on and off, and includes a delay ON timer that delays the feedback voltage from the feedback windings Lfa and Lfb, and an OFF timer that short-circuits the feedback voltage after a predetermined time. The OFF timer determines the oscillation frequency.

【0022】遅延ONタイマはFETのONゲ−ト閾値電圧とC
gを利用する。Cga又はCgbはR1a又はR1bを介して帰還電
圧で零から帰還電圧まで充電される。ダイオ−ドD1aとD
1bは帰還巻線Lfでバイアス電圧を短絡するのを防止す
る。ここで、帰還電圧をVf、ONゲ−ト閾値電圧をVh、遅
延ONタイマの遅延量τonとすれば、τon=CgR1・ln(Vf/
(Vf-Vh))となる。尚、Cgは実際はバラツクので精度を高
める場合は外付けの容量を付加する。このτonを設ける
のはTr2aとTr2bが貫通しないようにいわゆるデット・タ
イムを作る為と、巻線Lpのリ−ク・インダクタンスとFE
Tのドレイン・ソ−ス間容量Cdsと電圧共振させてFETの
ソ−ス・ドレイン間電圧が零になった時にFETをONさせ
るいわゆる零電圧クロス・スイッチングを実行する為で
ある。
The delay ON timer is a FET ON gate threshold voltage and C
Use g. Cga or Cgb is charged from zero to the feedback voltage with the feedback voltage via R1a or R1b. Diodes D1a and D
1b prevents shorting the bias voltage in the feedback winding Lf. Here, if the feedback voltage is Vf, the ON gate threshold voltage is Vh, and the delay amount τon of the delay ON timer is τon = CgR1 · ln (Vf /
(Vf-Vh)). Since Cg actually varies, an external capacitance is added to improve accuracy. This τon is provided to create a so-called dead time so that Tr2a and Tr2b do not penetrate, and the leakage inductance of the winding Lp and the FE
This is because so-called zero voltage cross switching is performed in which the FET is turned on when the source-drain voltage of the FET becomes zero due to voltage resonance with the drain-source capacitance Cds of T.

【0023】この零電圧クロス・スイッチングは数ワッ
ト(発振周波数と入力電圧Vpの自乗に比例するが)にお
よぶドレイン・ソ−ス間寄生容量Cdsによる消費を防止
するから変換効率が向上する。又、スイッチング素子は
ON抵抗又はON飽和電圧によるスイッチング損失のみとな
るので熱設計が容易になる。
This zero-voltage cross switching prevents the consumption due to the drain-source parasitic capacitance Cds which extends over several watts (although it is proportional to the square of the oscillation frequency and the input voltage Vp), so that the conversion efficiency is improved. Also, the switching element
Thermal switching becomes easy because there is only switching loss due to ON resistance or ON saturation voltage.

【0024】OFFタイマはaとbの添字を削除して説明す
ると、抵抗R2とコンデンサC1による時定数によってダイ
オ−ドD3を介してトランジスタTr1をONさせてFETのゲ−
ト・ソ−ス間を短絡してFETをOFFさせる。OFFしたFETに
対応する帰還巻線Lfには−Vfが反対側は+Vfの帰還電圧
が発生して次の発振半サイクルが始まる。
The OFF timer will be explained by deleting the subscripts of a and b. The transistor Tr1 is turned on via the diode D3 by the time constant of the resistor R2 and the capacitor C1 to turn on the FET gate.
The FET is turned off by short-circuiting the source and source. A feedback voltage of −Vf is generated in the feedback winding Lf corresponding to the turned off FET, and a feedback voltage of + Vf is generated on the opposite side, and the next oscillation half cycle starts.

【0025】ダイオ−ドD2はコンデンサC1の充電電圧を
Vfから−Vfに速やかに移行させるものである。ダイオ−
ドD3は直ちにOFFしないようにトランジスタTr2のON時間
を所定なものにする為に、蓄積効果を助長すると同時に
ベ−ス・エミッタ間逆耐圧を確保するものである。
The diode D2 controls the charging voltage of the capacitor C1.
It is intended to quickly shift from Vf to −Vf. Dio
In order to set the ON time of the transistor Tr2 to a predetermined value so that the transistor D2 is not turned off immediately, the storage effect is promoted and at the same time, the reverse breakdown voltage between the base and the emitter is secured.

【0026】OFFタイマの時間τoffは、コンデンサC1の
電圧が−VfからVfに向かう途中でダイオ−ドD3の順方向
電圧とTr1のベ−ス・エミッタ間飽和電圧との和電圧(2
Vdとする)でトラップされるから、τoff=C1R2・ln(2V
f/(Vf−2Vd))となる。VfはFETが完全ONするには6ボル
ト以上必要で、2Vd≒2×.5=1ボルトであるからVf>2
Vdとなり、τoff≒.693C1R2の帰還電圧によらないもの
になる。従って、入力電圧の変動によらず安定な発振周
波数Fo=1/(2τoff)が得られる特徴がある。
The time τoff of the OFF timer is the sum of the forward voltage of the diode D3 and the base-emitter saturation voltage of Tr1 (2 when the voltage of the capacitor C1 goes from −Vf to Vf).
Since it is trapped by Vd), τoff = C1R2 ・ ln (2V
f / (Vf-2Vd)). Vf requires 6V or more for the FET to be fully turned ON, and 2Vd≈2 × .5 = 1V, so Vf> 2
It becomes Vd, which does not depend on the feedback voltage of τoff ≈ 0.693C1R2. Therefore, there is a feature that a stable oscillation frequency Fo = 1 / (2τoff) can be obtained regardless of the fluctuation of the input voltage.

【0027】これらの各部の様子を示すのが図4であ
る。(a)がTr2aとTr2bが交互にデッド・タイムをもってO
Nするタイミングを示す。これに従って、Tr2aとTr2bと
の接続点PとGND1間の電位差を示すのが(g)である。過渡
時には共振弧を描き零スイッチング動作していることに
なる。(b)がFET対のONしている側のC1の充電電圧を示
す。(c)はTr1対の一方のONタイミングを示す。(d)は帰
還巻線Lfの一方の帰還電圧を示す。(e)は巻線Lpに流れ
る励磁電流で、半サイクルの前半はボデイ・ダイオ−ド
Dbの一方に流れて蓄積電磁エネルギを入力電源に帰還し
後半はONしているFETより電磁エネルギとして蓄積し、
差引エネルギ損失はない。(f)は後述するが、正弦弧に
近い負荷電流の一次側換算電流である。この一次側換算
電流と上記の励磁電流との和電流が一次巻線に流れる。
FIG. 4 shows the state of each of these parts. (a) Tr2a and Tr2b alternate with dead time O
Indicates the timing for N. Accordingly, (g) shows the potential difference between the connection point P between Tr2a and Tr2b and GND1. In the transient state, the resonance arc is drawn and the zero switching operation is performed. (b) shows the charging voltage of C1 on the side where the FET pair is ON. (c) shows the ON timing of one of the Tr1 pairs. (d) shows one feedback voltage of the feedback winding Lf. (e) is the exciting current that flows in the winding Lp, and the first half of the half cycle is the body diode.
It flows to one side of Db and the stored electromagnetic energy is returned to the input power source, and in the latter half it is stored as electromagnetic energy from the FET that is turned on,
There is no subtraction energy loss. As will be described later, (f) is the primary-side converted current of the load current that is close to a sine arc. A sum current of the primary-side converted current and the exciting current flows in the primary winding.

【0028】FET対Tr2は零電圧・電流スイッチング動作
してスイッチング損失を低減出来る特徴を本発明は有す
ることになる。但し、励磁電流に対してはピ−ク時のト
ランジスタからボデイ・ダイオ−ドに切替わりは零電圧
スイッチングのみである。励磁電流ie=−ie0+Vp/Lp・
t又はie=ie0−Vp/Lp・tと表せるので、比較的大きなイ
ンダクタンスのLpにし、負荷電流に対して相対値を下げ
る。但し、巻数増による銅損と後述の共振周波数との関
係を配慮する。
The present invention has a feature that the FET pair Tr2 can perform a zero voltage / current switching operation to reduce switching loss. However, with respect to the exciting current, the zero-voltage switching is the only switching from the transistor during the peak to the body diode. Excitation current ie = -ie0 + Vp / Lp ・
Since it can be expressed as t or ie = ie0−Vp / Lp · t, Lp with a relatively large inductance is set and the relative value is lowered with respect to the load current. However, consider the relationship between the copper loss due to the increased number of turns and the resonance frequency described later.

【0029】以上がハ−フ・ブリッジ構成でほぼ一定の
発振周波数で自励振する本発明の一次側の実施例である
が、遅延ONタイマをより正確にする実施例を図5で説明
する。
The above is the embodiment of the primary side of the present invention which self-excites at a substantially constant oscillation frequency in the half bridge structure, but an embodiment for making the delay ON timer more accurate will be described with reference to FIG.

【0030】図5は対回路の一方を表し、図3と同じ番
号と符号は以下も同様に同じ意味をもつものとする。
FIG. 5 shows one of the pair circuits, and the same numbers and reference numerals as in FIG. 3 have the same meanings below.

【0031】図5で、前述のOFFタイマの動作と同様に
帰還巻線LfにVfが発生すると、τon=.693C2R3でトラン
ジスタTr3がONし、抵抗Rb4に電流が流れ電圧降下してP
型のFETTr4も導通する。先述の抵抗R1より小さい抵抗R5
を介して急速にゲ−ト容量を充電しトランジスタTr2をO
Nさせる。ダイオ−ドD4とD5は逆耐圧の補償である。Tr1
を構成要素とするOFFタイマは、τoff=.693C1R2後にダ
イオ−ドD6でTr3とTr4をOFFさせダイオ−ドD7によってT
r2をOFFさせる。抵抗Rb3はトランジスタTr3が蓄積効果
による遅延が発生しないように小さい値を選ぶ。
In FIG. 5, when Vf is generated in the feedback winding Lf similarly to the operation of the OFF timer described above, the transistor Tr3 is turned on at τon = .693C2R3, the current flows through the resistor Rb4, and the voltage drops to P.
Type FET Tr4 also conducts. Resistance R5 smaller than resistance R1
The gate capacitance is rapidly charged via the
Let N. Diodes D4 and D5 are reverse breakdown voltage compensation. Tr1
The OFF timer, which has a component of, turns off Tr3 and Tr4 with diode D6 after τoff = .693C1R2 and turns off T3 with diode D7.
Turn off r2. The resistor Rb3 has a small value so that the transistor Tr3 does not cause a delay due to the storage effect.

【0032】動作波形を示すのが図6である。(a)が帰
還巻線Lfの誘起電圧を、(b)がコンデンサC2の充電電圧
を、(c)が遅延ONタイマのONタイミングをそれぞれ示
す。
FIG. 6 shows operation waveforms. (a) shows the induced voltage of the feedback winding Lf, (b) shows the charging voltage of the capacitor C2, and (c) shows the ON timing of the delay ON timer.

【0033】次にトランスのリ−ク・インダクタンスと
共振コンデンサによる共振回路を図7で説明する。図7
(a)は一次側と二次側を含めた等価回路であり、図7(b)
は二次側変換等価回路を示すものである。一次巻線Lpと
二次巻線Lsa又はLsb(自己インダクタンスはLsとする)
との結合係数k、巻数比をn:1とすればトランス12の等
価回路は20のように書けることは衆知である。21は
励磁電流の不要な理想トランスで変圧比nk:1/kとなる。
コンデンサCpを無視すると、二次側の開放電圧はVs=kV
p/nとなる。この電圧が中間コンデンサCmの充電電圧Vm
の最大となる。これらから、図7の等価回路を二次側よ
り見た図7(b)の等価回路になる。共振コンデンサCr=C
p/(nk)^2、共振インダクタンスとなるリ−ク・インダ
クタンスはLr=(1−k^2)Ls=(1−k^2)Lp/(nk)^2と
なる。
Next, a resonance circuit composed of a transformer leakage inductance and a resonance capacitor will be described with reference to FIG. Figure 7
(a) is an equivalent circuit including the primary side and the secondary side.
Shows a secondary side conversion equivalent circuit. Primary winding Lp and secondary winding Lsa or Lsb (self-inductance is Ls)
It is well known that the equivalent circuit of the transformer 12 can be written as 20 if the coupling coefficient k with and the turn ratio is n: 1. Reference numeral 21 is an ideal transformer that does not require an exciting current and has a transformation ratio nk: 1 / k.
Ignoring the capacitor Cp, the open circuit voltage on the secondary side is Vs = kV
p / n. This voltage is the charging voltage Vm of the intermediate capacitor Cm
Will be the maximum of. From these, the equivalent circuit of FIG. 7 (b) is obtained by viewing the equivalent circuit of FIG. 7 from the secondary side. Resonance capacitor Cr = C
p / (nk) ^ 2, and the leak inductance which is the resonance inductance is Lr = (1-k ^ 2) Ls = (1-k ^ 2) Lp / (nk) ^ 2.

【0034】ここで、電圧Vm換算の等価負荷抵抗をRe、
Vs−Vmが発生したと仮定して共振電流irと共振コンデン
サCrの充電電圧Vcを求めると、 ir≒2(Vs−Vm)/Zj・exp(-αt)・SIN(ωt) Vc≒(Vs−Vm)(1+2exp(-αt)・COS(ωt)) となり、負荷によるVmが降下した差電圧Vd=Vs−Vmに比
例し且つ連続的に共振電流と共振電圧が発生するからピ
−クと平均電流比(1.4〜1.7:1)が従来方式に比較し
て小さくなるから、構成要素に負担がかからず安価にな
る。
Here, the equivalent load resistance in terms of voltage Vm is Re,
Assuming that Vs−Vm has occurred, the resonance current ir and the charging voltage Vc of the resonance capacitor Cr are calculated as ir≈2 (Vs−Vm) / Zj ・ exp (-αt) ・ SIN (ωt) Vc≈ (Vs −Vm) (1 + 2exp (-αt) ・ COS (ωt)), and Vm due to the load is proportional to the difference voltage Vd = Vs−Vm and the resonance current and resonance voltage are continuously generated, so the peak Since the average current ratio (1.4 to 1.7: 1) is smaller than that of the conventional method, the components are not burdened and the cost is low.

【0035】ここに、ω=ωr√((Re/2Z)^2−1)、ωr
=1/√(CrLr)、Zj=ωLr、α=Lr/2Reである。
Where ω = ωr√ ((Re / 2Z) ^ 2-1), ωr
= 1 / √ (CrLr), Zj = ωLr, α = Lr / 2Re.

【0036】ここで、図3に戻って出力回路14とPWM
制御回路16を説明する。図では降下型のスイッチング
による出力Voutを安定化する例を示している。PWMスイ
ッチ15は出力Voutの基準値からの誤差に対応したパル
ス幅でPWM制御回路16により制御される。Lcはチョ−
ク・コイル、Csは平滑コンデンサである。ダイオ−ドDf
はチョ−ク・コイルLcに蓄積したエネルギを平滑コンデ
ンサCsにかえすル−プを作る。このスイッチングによる
出力安定化は公知なもので、本発明はこの出力回路の適
用に限るものでなく、上記構成要素の配置・組合の変更
による正負の昇降圧型の安定化出力回路でも構わない。
Now, returning to FIG. 3, the output circuit 14 and the PWM
The control circuit 16 will be described. The figure shows an example of stabilizing the output Vout by step-down switching. The PWM switch 15 is controlled by the PWM control circuit 16 with a pulse width corresponding to the error from the reference value of the output Vout. Lc is cho
C coil and Cs are smoothing capacitors. Diode Df
Creates a loop that returns the energy stored in the choke coil Lc to the smoothing capacitor Cs. This output stabilization by switching is publicly known, and the present invention is not limited to the application of this output circuit, and may be a positive / negative step-up / down stabilized output circuit by changing the arrangement / combination of the above components.

【0037】補助回路13は発振周波数の半サイクル毎
にクロックCKを発生するクロック発生器と電源電圧Vbの
補助電源を含むものである。この補助回路はPWM制御回
路等の電力供給と動作タイミングのクロックを与える。
The auxiliary circuit 13 includes a clock generator that generates a clock CK every half cycle of the oscillation frequency and an auxiliary power supply of the power supply voltage Vb. This auxiliary circuit supplies power to the PWM control circuit and clocks for operation timing.

【0038】以上の各部の動作状態を示すのが図8であ
る。(a)が補助回路13のクロックCKであり、系の発振
周波数の半サイクル毎に発生させてる。(b)〜(g)は軽負
荷時の状態を、(h)〜(l)は重負荷時の状態を示す。(b)
と(h)は差電圧Vd=Vs-Vmを、(c)と(i)は共振コンデンサ
Crの充放電電圧を、(d)と(j)は整流した共振電流を、
(e)と(k)はPWMスイッチ15のスイッチ時間幅を、(g)と
(l)はチョ−ク・コイルLcに流れる電流iLcをそれぞれ示
す。尚、当然ながらirとiLcの平均は同じであり、これ
が出力電流Ioutである。
FIG. 8 shows the operating state of each of the above parts. (a) is the clock CK of the auxiliary circuit 13, which is generated every half cycle of the oscillation frequency of the system. (b) to (g) show the state under light load, and (h) to (l) show the state under heavy load. (b)
And (h) are the difference voltage Vd = Vs-Vm, and (c) and (i) are the resonance capacitors.
The charging / discharging voltage of Cr, (d) and (j) are the rectified resonance current,
(e) and (k) are the switching time width of the PWM switch 15, and (g) is
(l) shows the current iLc flowing through the choke coil Lc. Of course, the average of ir and iLc is the same, and this is the output current Iout.

【0039】以上のように、Tr2a、Tr2b、Dra、Drbは零
電圧・電流でスイッチングするので無駄な電力消費がな
いから変換効率が向上する。従来技術では80%が精々で
あるのに対して、90%前後も得られる特徴がある。電流
は、減衰項が乗ぜられて正確でないが正弦弧に近いこ
と、及び零スイッチングによる余計なスパイクが発生し
ないことから高調波が低減出来る故、電磁放射も相当に
低減できる特徴もある。但し、出力回路14のPWMスイ
ッチ15とダイオ−ドDfとの電流スイッチは大きな値な
ので電磁放射対策が必要である。
As described above, since Tr2a, Tr2b, Dra, and Drb switch at zero voltage / current, there is no wasted power consumption, and the conversion efficiency is improved. In the conventional technology, 80% is fine, whereas around 90% is obtained. The current also has a characteristic that electromagnetic radiation can be considerably reduced because harmonics can be reduced because the current is close to a sine arc although it is not accurate because it is multiplied by a damping term, and an unnecessary spike due to zero switching does not occur. However, since the PWM switch 15 of the output circuit 14 and the current switch of the diode Df have large values, a countermeasure against electromagnetic radiation is necessary.

【0040】尚、出力の誤差信号を一次側に帰還する方
式の一般のスイッチング電源はトランスが周期的に励磁
されていないから、基本的には単一電源しか構成出来な
い。これに対して本発明は、トランスはほぼ一定周波数
で常時励磁されているから、上述の方法で二次巻線を増
やして実行すればそれぞれの二次巻線に誘起電圧が発生
する故、充分な容量の複数電源が容易に構成出来る特徴
を有する。
Incidentally, in a general switching power supply of the type in which an output error signal is fed back to the primary side, since the transformer is not periodically excited, basically only a single power supply can be constructed. On the other hand, in the present invention, since the transformer is always excited at a substantially constant frequency, an induced voltage is generated in each secondary winding if the number of secondary windings is increased by the above-described method. It has the feature that a plurality of power supplies with different capacities can be easily constructed.

【0041】尚又、図8でPWM動作タイミングを系の発
振周波数のクロックに同期させて示しているが、本質的
には別でも構わない。しかし、異なる周波数の場合は差
周波数のビ−トが可聴音になる恐れがある。
Although the PWM operation timing is shown in FIG. 8 in synchronization with the clock of the oscillation frequency of the system, it may be essentially different. However, if the frequencies are different, the difference frequency beat may be audible.

【0042】次に、上述の本発明の説明はトランスを励
磁するに、ハ−フ・ブリッジ構成でしたが、図9でプッ
シュプル構成で実施する場合を説明する。
Next, in the above description of the present invention, a half-bridge structure was used to excite the transformer, but a case of implementing the push-pull structure in FIG. 9 will be described.

【0043】この場合は、入力回路20はVpのみであ
る。タイマ対21aと21bは図3と図5で説明したものと同
じであり、正帰還ル−プを構成する。FETTr2aとTr2bは
前述と同じもので、ドレイン・ソ−ス間電圧はON状態で
はほぼ零にOFF状態では2Vpになる。 自起動性を確保す
るバイアス電圧を得る構成が図3とは異なる。バイアス
電圧はゼ−ナ・ダイオ−ドDzと抵抗Rb5で作り、Rb6aとR
b6bとでそれぞれのゲ−トに与える。トランス22は一
次巻線をLpaとLpbに、二次巻線を単巻のLsにしたのがト
ランス12と異なる。
In this case, the input circuit 20 is only Vp. The pair of timers 21a and 21b are the same as those described with reference to FIGS. 3 and 5, and form a positive feedback loop. The FET Tr2a and Tr2b are the same as above, and the drain-source voltage is almost zero in the ON state and 2Vp in the OFF state. The configuration for obtaining a bias voltage for ensuring self-starting property is different from that in FIG. Bias voltage is made by Zener diode Dz and resistor Rb5, and Rb6a and Rb6a
b6b and give to each gate. The transformer 22 is different from the transformer 12 in that the primary winding is Lpa and Lpb and the secondary winding is single winding Ls.

【0044】これで、図3と同じくデッド・タイムをも
ってTr2aとTr2bは交互にONして、ほぼ一定周波数でトラ
ンス22を両方向に励磁する。共振コンデンサCrは一次
側には原理的に挿入出来ないので単線巻のLsに接続し、
等価回路は図7と同じになる。共振コンデンサCrは両方
向に電流を流す必要からブリッジ整流器22でブリッジ
整流して中間コンデンサCmに送る。以下図示しないが、
図3と同様な動作をして、高い変換効率特性と電磁放射
を低減した良好なスイッチング電源が得られる。
With this, Tr2a and Tr2b are alternately turned on with a dead time as in FIG. 3, and the transformer 22 is excited in both directions at a substantially constant frequency. Since the resonance capacitor Cr cannot be inserted on the primary side in principle, connect it to the single wire winding Ls,
The equivalent circuit is the same as in FIG. Since the resonance capacitor Cr needs to flow current in both directions, it is bridge-rectified by the bridge rectifier 22 and sent to the intermediate capacitor Cm. Although not shown below,
By performing the same operation as in FIG. 3, a good switching power supply with high conversion efficiency characteristics and reduced electromagnetic radiation can be obtained.

【0045】尚、述べ遅れたがトランスを両方行に励磁
する方式は、従来技術では他励方式が多く回路が複雑と
なり、高価になる欠陥を有する。又、本発明の様に自励
方式では角型特性のコアを用いたRoyer回路、Jensen回
路のようなものがあるが、入力電源電圧の変動によって
発振周波数が変化し、本発明のような特徴が得られない
欠陥がある。
Incidentally, although delayed from the description, the method of exciting the transformers in both rows has many defects in the prior art, because the circuit is often complicated and the circuit is complicated. Further, in the self-exciting method like the present invention, there are such as a Royer circuit and a Jensen circuit using a core having a square characteristic, but the oscillation frequency changes due to the fluctuation of the input power supply voltage, and the characteristics of the present invention There is a defect that cannot be obtained.

【0046】[0046]

【発明の効果】以上の本発明の構成によれば、主スイッ
チ対を交互にデット・タイムもってスイッチさせる自励
型に構成したことと、等価共振回路に中間コンデンサを
設けたことにより負荷に応じた共振電流が得られること
により、安価にして入出力変換効率の向上と出力高速応
答特性が得られ、零クロス・スイッチング動作により電
磁放射の低減したスイッチング電源を提供出来る貢献は
極めて大きい。
According to the configuration of the present invention described above, the main switch pair is alternately switched with a dead time, and a self-excited type is provided. Since the resonance current is obtained, the input / output conversion efficiency can be improved and the output high-speed response characteristic can be obtained at a low cost, and the contribution of being able to provide the switching power supply with reduced electromagnetic radiation by the zero-cross switching operation is extremely large.

【図面の簡単な説明】[Brief description of drawings]

【図1】従来技術による簡略化した共振方式電源の実施
例を示す図。
FIG. 1 is a diagram showing an example of a simplified resonance type power supply according to a conventional technique.

【図2】図1の動作波形を示す図。FIG. 2 is a diagram showing operation waveforms in FIG.

【図3】本発明の実施例の具体的回路構成を示す図。FIG. 3 is a diagram showing a specific circuit configuration according to an embodiment of the present invention.

【図4】図3の主に一次側の動作波形とタイミング関係
を示す図。
FIG. 4 is a diagram mainly showing operation waveforms and timing relationships on the primary side of FIG. 3;

【図5】本発明の実施例のタイマの他の構成を示す図。FIG. 5 is a diagram showing another configuration of the timer according to the embodiment of the present invention.

【図6】図5の動作波形を示す図。FIG. 6 is a diagram showing operation waveforms in FIG.

【図7】本発明の実施例の共振回路周辺の等価回路を示
す図。
FIG. 7 is a diagram showing an equivalent circuit around a resonance circuit according to an embodiment of the present invention.

【図8】図3の主に二次側の動作波形とタイミング関係
を示す図。
FIG. 8 is a diagram mainly showing operation waveforms and timing relationships on the secondary side of FIG. 3;

【図9】本発明のトランスを励磁する方式を変えた他の
実施例を示す図。
FIG. 9 is a diagram showing another embodiment in which the method of exciting the transformer of the present invention is changed.

【符号の説明】[Explanation of symbols]

2、12、22…トランス 10、20…直流±Vp又はVpを作る入力回路 11a、11b、21a、21b…タイマ 13…補助電源とクロックを形成する補助回路 14…出力回路 16…PWM制御回路 GND1、GND2…一次側と二次側の接地 Tr2a、Tr2b…電界効果トランジスタ Lr…等価共振インダクタンス Cr、Cm…等価共振コンデンサと中間コンデンサ 2, 12, 22 ... Transformer 10, 20 ... Input circuit 11a, 11b, 21a, 21b ... Timer 13 ... Auxiliary circuit forming auxiliary power and clock 14 ... Output circuit 16 ... PWM control circuit GND1 , GND2 ... Grounding of primary side and secondary side Tr2a, Tr2b ... Field effect transistor Lr ... Equivalent resonance inductance Cr, Cm ... Equivalent resonance capacitor and intermediate capacitor

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 所定の一次巻線、帰還巻線、及び二次巻
線を有するトランスで一次側と二次側を絶縁し、一次側
でほぼ一定周波数で発振するル−プを構成し、二次側で
安定化出力電圧を得るようにした共振方式電源装置に於
て、 a)前記トランスを両方向に励磁する正負の入力電源対
と前記一次巻線とでハ−フ・ブリッジ構成、又は単一入
力電源と前記一次巻線とでプッシュプル構成する主スイ
ッチ手段対 b)前記帰還巻線の誘起電圧を正帰還ル−プを形成する
ように与えて、前記主スイッチ手段対を交互にONさせる
遅延ONタイマと所定時間後にOFFさせるOFFタイマよりな
るほぼ一定の発振周波数を設定するタイマ対 c)前記ハ−フ・ブリッジ構成では一次巻線と、前記プ
ッシュプル構成では二次巻線と直列接続し、前記トラン
スのリ−ク・インダクタンスと共振する共振コンデンサ d)前記二次巻線に所定方式で接続した整流手段の出力
端間に接続し、前記二次巻線の開放誘起電圧まで充電す
る中間コンデンサ e)前記中間コンデンサ端を入力とし、パルス幅制御さ
れるPWMスイッチ手段と、チョ−ク・コイルと、ダイオ
−ド、及び出力端になる平滑コンデンサとの配置・組合
せで正負の昇降圧の安定化出力を得る出力手段 f)該出力手段の基準値よりの誤差に対応したパルス幅
信号を前記PWMスイッチ手段に与え、前記出力手段の出
力電圧を安定化させるPWM制御手段 g)前記二次巻線とは異なる他の二次巻線より生成する
クロック発生器と補助電源を含む補助手段 より構成し、前記中間コンデンサの容量が前記共振コン
デンサより大きく前記平滑コンデンサより小さい関係で
あり、前記共振コンデンサと直列共振する前記トランス
のリ−ク・インダクタンス間に印加される印加電圧が前
記出力手段の負荷の大きさに対応させた大きさであっ
て、連続共振電流を発生させる共振方式電源装置。
1. A transformer having a predetermined primary winding, a feedback winding, and a secondary winding insulates the primary side and the secondary side to form a loop that oscillates at a substantially constant frequency on the primary side, In a resonance type power supply device that obtains a stabilized output voltage on the secondary side, a) a half-bridge configuration with a positive and negative input power supply pair that excites the transformer in both directions and the primary winding, or Main switch means pair formed by push-pull construction with a single input power source and the primary winding b) The induced voltage of the feedback winding is applied so as to form a positive feedback loop, and the main switch means pair is alternately arranged. A timer pair consisting of a delay ON timer that turns ON and an OFF timer that turns OFF after a predetermined time. A pair of timers that set a substantially constant oscillation frequency. C) A primary winding in the half bridge configuration, and a secondary winding in the push-pull configuration. Series-connected, leak-inducer of the transformer Resonance capacitor that resonates with the closet d) An intermediate capacitor that is connected between the output terminals of the rectifying means that is connected to the secondary winding in a prescribed manner and charges to the open induced voltage of the secondary winding. Output means for obtaining a stabilized output of positive and negative buck-boost by arranging and combining the PWM switch means for controlling the pulse width, the choke coil, the diode, and the smoothing capacitor that becomes the output terminal f ) PWM control means for applying a pulse width signal corresponding to the error from the reference value of the output means to the PWM switch means to stabilize the output voltage of the output means g) Another two different from the secondary winding The intermediate capacitor is composed of a clock generator generated from the next winding and auxiliary means including an auxiliary power supply, and the capacitance of the intermediate capacitor is larger than the resonance capacitor and smaller than the smoothing capacitor. A resonance type power supply device for generating a continuous resonance current, wherein an applied voltage applied between a leakage inductance of the transformer that resonates in series with a capacitor has a magnitude corresponding to a load of the output means.
JP5328578A 1993-12-24 1993-12-24 Resonance type power supply apparatus Pending JPH07184372A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5328578A JPH07184372A (en) 1993-12-24 1993-12-24 Resonance type power supply apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5328578A JPH07184372A (en) 1993-12-24 1993-12-24 Resonance type power supply apparatus

Publications (1)

Publication Number Publication Date
JPH07184372A true JPH07184372A (en) 1995-07-21

Family

ID=18211848

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5328578A Pending JPH07184372A (en) 1993-12-24 1993-12-24 Resonance type power supply apparatus

Country Status (1)

Country Link
JP (1) JPH07184372A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000041292A1 (en) * 1999-01-06 2000-07-13 Indigo Manufacturing Inc. Self oscillating power converter circuit
CN102291001A (en) * 2011-08-26 2011-12-21 广州金升阳科技有限公司 Self-excitation push-pull type converter

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000041292A1 (en) * 1999-01-06 2000-07-13 Indigo Manufacturing Inc. Self oscillating power converter circuit
GB2362043A (en) * 1999-01-06 2001-11-07 Indigo Mfg Inc Self oscillating power converter circuit
GB2362043B (en) * 1999-01-06 2003-06-18 Indigo Mfg Inc Self oscillating power converter circuit
CN102291001A (en) * 2011-08-26 2011-12-21 广州金升阳科技有限公司 Self-excitation push-pull type converter

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