JPH07183802A - Automatic phase controller - Google Patents

Abstract

PURPOSE:To obtain an automatic phase controller provided with a side lock prevention circuit which car release side lock phenomenon to occur in an APC loop circuit to output an input signal after converting its frequency into the prescribed frequency stably and quickly in accordance with the size of its frequency variation. CONSTITUTION:The APC loop circuit 100 is provided with the side lock prevention circuit 200 equipped with-a counter 5 to count the oscillation frequency of a VCO 4 it in the circuit 200 for a definite period, four or more decoders 61 to 6m, 71 to 7m one of which operates in accordance with the output count value of the counter, and current sources 81 to 8m, 91 to 9m which are connected to these one to one and output respectively the current of a different amout, and the current whose amount varies in accordance with the size of frequency deviation is given to an APC detector 3 to voltage-control the VCO 4 so that the oscillation frequency of the VCO 4 can be changed stepwise.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic phase control device, and more particularly to a device provided with a circuit for preventing side lock of an oscillation frequency.

[0002]

2. Description of the Related Art FIG. 6 (a) is a block diagram showing a conventional automatic phase control device in, for example, a magnetic recording / reproducing device (hereinafter referred to as VTR). In the figure, 100 is AP
The APC loop circuit 100 is a C loop circuit.
A frequency converter 1 for frequency-converting a VTR low-frequency conversion color signal which is the input signal and outputting a carrier color signal, and of the outputs of the frequency converter 1, only a carrier color signal in a predetermined frequency band is transmitted and output. A bandpass filter 2, an APC detector 3 for detecting the output carrier color signal transmitted by the bandpass filter 2 and outputting a signal of a required voltage for correcting the phase and frequency deviation, and a predetermined oscillation. With the VCO 4 which oscillates with the frequency as the center frequency and which gives the frequency converter 1 a signal whose oscillation frequency changes according to the voltage signal output from the APC detector 3, and the double time constant circuit 12 including the resistor and the capacitor. It is configured.

Reference numeral 190 denotes a side lock prevention circuit. The side lock prevention circuit 190 has a counter 5 for counting the oscillation frequency of the VCO 4 for a predetermined period, and the count value of the counter 5 is a predetermined value or less or a predetermined value or more. Then, the two decoders 6 and 7 which operate respectively, and the current signals + I and -I, which are respectively driven by the respective decoders 6 and 7 and have a predetermined current amount of opposite signs and the same absolute value, are supplied to the APC detector 3. It is composed of two current sources 8 and 9 to be applied, and a smoothing circuit composed of a capacitor 10 and a resistor 11 for smoothing a current signal applied to the APC detector 3 by the current sources 8 and 9.

Next, the operation will be described. First, the VTR low-frequency conversion color signal input to this automatic phase control device mainly has an APC loop circuit 100 having a VCO 4 oscillating at a center frequency fsc (normal lock point).
The carrier frequency signal is frequency-converted into a carrier color signal, and the oscillation frequency of the VCO 4 detects the output carrier color signal in order to follow the tape running of the VTR.
It is controlled so as to change upon receiving the voltage signal output from the C detector 3.

Further, in the APC loop circuit 100, the variable range of the oscillation frequency of the VCO 4 is set so as to be able to follow the jitter due to the unevenness of tape running, so that the oscillation frequency of the VCO 4 is the center frequency. When the frequency deviates greatly from fsc (frequency deviation = ± n · fh), the so-called side lock phenomenon occurs in which the APC loop circuit 100 erroneously fixes the frequency of the output carrier color signal to fsc ± n · fh. To do.

Therefore, a side lock prevention circuit 190 is provided in order to prevent this side lock phenomenon, and the side lock prevention circuit 190 causes the counter 5 to output the frequency output from the VCO 4 for n horizontal (n · H) periods. (For example, for 1H period) Counting is performed, and a current signal having a predetermined current amount is given to the APC detection circuit 3 according to the magnitude of the count value.

That is, as shown in FIG. 6B, when the frequency of the carrier color signal becomes fsc-nfh and the count value becomes less than the value set in the decoder 6, the decoder 6 drives the current source 8, and the current source 8 outputs a current signal + I having a predetermined positive current amount.
Is smoothed by the capacitor 10 and the resistor 11 and input to the APC detector 3. On the other hand, the frequency of the carrier color signal becomes fsc + nfh, and the above count value is obtained by the decoder 7
If the number exceeds the value set in, the decoder 7
Drives the current source 9, and the current source 9 outputs a current signal -I having a predetermined negative current amount. The current signal -I is smoothed by the capacitor 10 and the resistor 11 and the AP
It is input to the C detector 3.

In the APC loop circuit 100, when the current signal + I is input to the APC detector 3, the detection voltage rises, the oscillation frequency of the VCO 4 increases, and the oscillation frequency of the VCO 4 increases from the center frequency fsc. The frequency shift (−n · fh) is corrected, and when the current signal −I is input, the detection voltage decreases, the oscillation frequency of the VCO 4 decreases, and the frequency shift (+ n from the center frequency fsc)・ Fh) is corrected and the side lock state returns to the steady state.

Here, the impedance of the double time constant circuit 12 is Z, the output current of the side lock prevention circuit 190 is I, the time during which the current I is output is τ, and the above V is the V.
Assuming that the control sensitivity of CO4 is β, the frequency that changes in the APC loop circuit 100 by the one-time current signals + I and −I output from the side lock prevention circuit 190 is expressed as Z · I · τ · β. And this frequency Z
.I..tau..beta. Is set to be smaller than the synchronization pull-in range (PULL IN) of the APC loop circuit 100, and as shown in FIG.
When fh, + n · fh) is large, the current signal +
I and -I are output several times, and the frequency of the APC loop circuit 100 changes by Z · I · τ · β each time. Then, when the side lock state is restored, the operation becomes stable.

[0010]

Since the conventional automatic phase control device is configured as described above, the time required to return the APC loop circuit 190 from the side lock state to the steady state is the current source 8 described above. , 9 and the time constant determined by the capacitor 10, the resistor 11 and the double time constant circuit 12, and if the time constant is set small so as to shorten the recovery time, FIG. As shown, the frequency Z.I..tau..beta. That changes by the output of the current signal once becomes larger than the synchronization pull-in range (PULL IN) of the APC loop circuit 190, and the side lock prevention circuit 190 causes the The APC detection circuit 3 generates a current more than necessary for a small frequency fluctuation of the VCO 4.
To cause an over-response phenomenon that causes unstable operation.
For this reason, it has been impossible to set the time constant to be a predetermined value or less. When the time constant is set so that the side lock prevention circuit 190 operates stably, it takes time for the operation of the APC loop circuit 100 to stabilize when the oscillation frequency of the VCO 4 largely deviates, and the VTR There was a problem that coloring on the monitor was slow.

The present invention has been made to solve the above problems, and does not cause an over-response phenomenon with respect to a small frequency fluctuation in the APC loop circuit, and is short when the frequency fluctuation is large. An object of the present invention is to obtain an automatic phase control device equipped with a side lock prevention circuit that can return from a side lock state to a steady state in time and that operates stably and at high speed.

[0012]

SUMMARY OF THE INVENTION An automatic phase control device according to the present invention comprises a frequency conversion means for converting the frequency of an input signal, a detection means for detecting an output signal of the frequency conversion means, and a detection means for the detection means. An APC loop having a variable oscillating means for oscillating at a frequency corresponding to the output signal and giving the oscillating frequency output to the frequency converting means; a frequency counting means for counting the frequency of the signal output by the variable oscillating means; A frequency for changing the output signal by giving a signal to the detecting means, the signal amount of which is varied in multiple stages or linearly according to the difference between the count value output by the frequency counting means and the numerical value corresponding to the center frequency of the APC loop. A differential signal supply means for preventing the oscillation frequency in the APC loop from being fixed at a frequency deviating from the center frequency. It is obtained by a preventing means.

The automatic phase control device according to the present invention further includes a frequency converter for converting the frequency of the input signal, an APC detector for detecting the output signal of the frequency converter, and an output voltage of the APC detector. Oscillates at a frequency corresponding to the frequency V and gives the oscillation frequency output to the frequency converter.
An APC loop circuit having a CO, a frequency counter for counting the frequency output by the VCO at regular intervals, a count value output by the frequency counter, and a numerical value corresponding to the center frequency of the APC loop circuit. Deviation is detected and each signal is output corresponding to the polarity and magnitude of this deviation. 4
One or more even number detectors, and a current for changing the output voltage by giving the APC detector a current signal in which the amount of current is varied in multiple stages according to the outputs of the four or more even number detectors. And a side lock prevention circuit for preventing the oscillation frequency in the APC loop circuit from being fixed at a frequency deviating from the center frequency.

Further, in the automatic phase control device according to the present invention, the side lock prevention circuit is provided with a frequency counter for counting the frequency output by the VCO at regular intervals, and a count value output by the frequency counter. Four or more even number detectors that detect a deviation from a numerical value corresponding to the center frequency of the APC loop circuit and output signals corresponding to the polarity and magnitude of the deviation, and the four or more even numbers Two constant current sources each driven by the outputs of the two detectors corresponding to the minimum deviation in each polarity of the four detectors;
Depending on the outputs of the two or more even number detectors other than the two detectors, the output current of either of the two constant current sources is stepwise converted into a current signal of a required current amount and output. The output of the variable current output circuit is provided to the APC detector to change its output voltage.

In the automatic phase control device according to the present invention, the side lock prevention circuit counts the frequency output by the VCO at regular intervals and outputs the count value, and the frequency counter. An arithmetic unit for calculating a deviation between a count value output by the calculator and a numerical value corresponding to the center frequency of the APC loop circuit, and a deviation corresponding to a frequency near the center frequency is removed from the deviation calculated by the calculator. It has a deviation eliminator and a digital / analog converter which linearly converts the output of the deviation eliminator into a current signal and outputs the current signal, and gives this output to the APC detector to change its output voltage. It is intended.

[0016]

According to the present invention, the above-mentioned variable oscillation is added to the APC loop having the variable oscillation means whose oscillation frequency changes in accordance with the output signal of the detection means for detecting the output signal created by frequency-converting the frequency of the input signal. A signal having its signal amount varied in multiple stages or linearly in accordance with the difference between the count value obtained by counting the oscillation frequency of the means and the numerical value corresponding to the center frequency of the APC loop is given to the detection means to change its output signal. Since the side lock prevention means having the frequency difference signal supply means is provided, when the side lock state occurs in the APC loop, the side lock prevention means causes the side lock prevention means to generate an amount corresponding to the magnitude of the frequency deviation at regular intervals. By outputting a signal to the detection means, when the frequency deviation is small, the signal given to the variable oscillation means by the detection means. To change the oscillation frequency to a small value, and when the frequency deviation is large, a large amount of signals cause the detection means to greatly change the signal amount given to the variable oscillation means, thereby increasing the oscillation frequency. After approaching the center frequency, when the frequency becomes close to the center frequency, the signal amount is reduced to reduce the output signal of the detection means, and the oscillation frequency is changed to a small value. As a result, an automatic phase control device equipped with a side-lock preventing means that does not cause an over-response phenomenon to a small frequency fluctuation in the APC loop and returns from a side-lock state to a steady state in a short time when the frequency fluctuation is large. Can be

In the present invention, the variable oscillating means is a VCO, the detecting means is an APC detector, and the APC loop circuit counts the frequency output by the VCO at regular intervals and the above-mentioned count value. The amount of current is detected according to the output of an even number of four or more detectors that detect a deviation from the numerical value corresponding to the center frequency of the APC loop circuit and output signals corresponding to the polarity and magnitude of this deviation. Since a side lock prevention circuit having a current supply circuit for applying a current signal which is varied in multiple stages to the APC detector to change its output voltage is provided, when the side lock state occurs in the APC loop circuit, the side lock prevention is performed. The circuit outputs a current signal having a current amount according to the magnitude of the frequency deviation in the side lock state to the APC detector at regular intervals. The output voltage of the APC detector is changed stepwise according to the magnitude of the frequency shift to change the oscillation frequency of the VCO, which causes an overresponse to a small frequency fluctuation in the APC loop circuit. When the phenomenon does not occur and the frequency fluctuation is large, the automatic phase control device can be provided with a side lock prevention circuit that returns the side lock state to the steady state in a short time.

Further, in the present invention, the side lock prevention circuit is driven by two constants driven by the outputs of the two detectors corresponding to the minimum deviation in the polarities of the even number of the four or more detectors. Depending on the outputs of the current source and the four or more detectors other than the two detectors, the output current of one of the two constant current sources is changed stepwise into a current signal of a required current amount. Since the variable current output circuit for outputting to the APC detector is provided,
According to the magnitude of the frequency deviation in the side lock state generated in the PC loop circuit, the current signals output by the two constant current sources are changed to a required current amount by the variable current output circuit, and this is set in the APC detector. When the oscillation frequency of the VCO is changed, the VCO oscillation frequency is also changed. This also prevents an over-response phenomenon from a small frequency fluctuation in the APC loop circuit, and when the frequency fluctuation is large, the side lock state is released in a short time. It is possible to provide an automatic phase control device provided with a side lock prevention circuit for returning to a steady state, and it is not necessary to increase the number of current sources when increasing the number of switching stages of the current signal given to the APC detector. A simple circuit configuration can be achieved.

Further, in the present invention, in the side lock prevention circuit, the deviation between the count value obtained by counting the frequency output by the VCO at every constant period and the numerical value corresponding to the center frequency of the APC loop circuit is calculated. The value obtained by removing the deviation corresponding to the frequency in the vicinity of the center frequency from the deviation calculated by the deviation remover is converted into a required current signal with linearity by the digital / analog converter, and the current Since a signal is applied to the APC detector to change its output voltage, oscillation of the VCO is caused by a current signal that changes in proportion to the magnitude of frequency deviation in the side lock state generated in the APC loop circuit. The frequency is changed linearly, which causes an over-response phenomenon with respect to a small frequency fluctuation in the APC loop circuit. It caused not, and when the frequency variation is large, it can be an automatic phase control apparatus provided with a side lock preventing circuit for smoothly return from the side locked state to the steady state in a short time.

[0020]

【Example】

Example 1. Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 (a) is a block diagram showing an automatic phase control apparatus according to the first embodiment of the present invention. In the figure, 100
Is an APC loop circuit, and this APC loop circuit 10
0 is a frequency converter 1 for converting the frequency of the input signal to a predetermined frequency and outputting the same, a bandpass filter 2 for transmitting only a signal in a predetermined frequency band in the output of the frequency converter 1, An APC detector 3 that detects the output signal transmitted by the bandpass filter 2 and outputs a signal of a required voltage for correcting the phase and frequency shifts.
And oscillates around the predetermined oscillation frequency as the center frequency,
The VCO 4 which gives the frequency converter 1 an output signal whose oscillation frequency changes according to the voltage signal output by the C detector 3.
And a double time constant circuit 12 including a resistor and a capacitor. And 200 is a side lock prevention circuit, and this side lock prevention circuit 200 is
A counter 5 that counts the oscillation frequency of the VCO 4 at regular intervals and outputs the count value, and two or more decoders 61 to 6 that operate when the count value output by the counter 5 falls below the set value.
6m (m is a positive integer, the required number determined by the magnitude of the frequency shift and the number of switching stages of the current for correcting it), and the same number as these, and when the count value exceeds the set value Two or more decoders 71 to 7m that operate,
Each of the decoders 61 to 6m and 71 to 7m is connected in a one-to-one manner and driven by their outputs, and the APC detector 3 is supplied with a current signal + I1 to + Im, -I1 of a positive and negative predetermined current amount.
It is composed of current sources 81 to 8m and 91 to 9m for supplying .about.-Im and a smoothing circuit composed of a capacitor 10 and a resistor 11 for smoothing a current signal supplied to the APC detector 3.

The decoders 61 to 6m and 71 to 7
As for m, only one decoder having the set value closest to the count value of the counter 5 operates at one time point, and the values set in these are the normal lock points in the APC loop circuit 100. Assuming that the value for the center frequency f0 is N0-a,
N0-b, ..., N0-x, N0 + a, N0 + b, ..., N
It is 0 + x (however, a <b <... <x).

Next, the operation will be described. First, APC
In the loop circuit 100, the VCO 4 whose oscillation frequency changes in response to the voltage signal output from the APC detector 3 which constantly detects the output signal is oscillating mainly at the center frequency f0, and the output of this VCO 4 is Upon reception, the frequency converter 1 frequency-converts the input signal and outputs it, and only the signal in the predetermined frequency band of the output signal is output from the bandpass filter 2 as an output signal.

Here, for example, this automatic phase control device is
When used in a reproducing circuit of a TR color signal processing device, the input signal is a VTR low-pass conversion color signal, and the VTR low-pass conversion color signal is frequency-converted into a carrier color signal by the APC loop circuit 100. The oscillating frequency of the VCO 4 detects the output carrier color signal in order to follow the tape running of the VTR.
The C detector 3 is configured to change in response to the voltage signal output from the C detector 3, and the variable range of the oscillation frequency is widely set so as to be able to follow the jitter and the like due to uneven running of the tape. When the oscillation frequency of the VCO 4 deviates from the center frequency f0 to f0 ± n · fh, the APC loop circuit 100 erroneously fixes the frequency of the output signal to f0 ± n · fh. Occurs.

At this time, in the side lock prevention circuit 200, the counter 5 counts the oscillation frequency of the VCO 4 at regular intervals, and when the counting time of the counter 5 is T, the count value at the regular lock point is f0 ・ T = N
It becomes 0, for example, this side lock state,
The oscillation frequency is shifted by -nfh to be low and side locked, and the count value (f0-nfh) T output from the counter 5 at that time is the value set in the decoder 61 N0. When it is less than -a, the decoder 61 drives the current source 81 to output a signal + I1 of a predetermined positive current amount as shown in FIG. 1 (b).

Further, the above-mentioned count value (f0-n.fh) .T
Is smaller than the set value N0-a of the decoder 61 and is smaller than the value N0-b set in the decoder 62, the decoder 62 drives the current source 82 and the current larger than + I1. When the count value (f0-nfh) T becomes N0-x, which is smaller than N0-b, the decoder 6m drives the current source 8m to output the quantity signal + I2. A signal + Im having a larger current amount than + I2 is output.

The current signal + I1 or + I2 or + Im output as described above is smoothed by the capacitor 10 and the resistor 11 and input to the APC detector 3. Then, the detection voltage output from the APC detector 3 is equal to one of the input current signals + I1
, + I2, + Im, and the oscillation frequency of the VCO 4 increases by a predetermined frequency in accordance with the change in the detected voltage.

Further, when the side-lock state is still not returned to the steady state by this, the above-described operations from counting the oscillation frequency to increasing the frequency by the predetermined frequency are repeated until the side-lock state is restored. That is, the impedance of the double time constant circuit 12 is Z, the output current of the side lock prevention circuit 200 is I, the time during which the current I is output is τ, and the VCO 4 is
, The frequency of the APC loop circuit 100 that changes with one current signal output from the side lock prevention circuit 200 is Z.I..tau..multidot. Since it can be represented by β, the current signal + I1
The frequency that changes due to is Z · I1 · τ · β, and the frequency that changes according to the current signal + I2 is Z · I2 · τ · β, and the relationship between the current signals + I1 and + I2 is + I1 <+
Since it is I2, the frequency Z.I1..tau..beta.
The relationship with I2 · τ · β is Z · I1 · τ · β <Z · I2 ·
τ ・ β. Then, for example, the above APC loop circuit 1
The oscillation frequency of 00 is shifted by -n.fh to f0-n.fh, and the count value of the result of counting the frequency f0-n.fh by the counter 5 is the set value N0- of the decoder 62.
If it is less than b, first, the current signal + I2 is output, so that the oscillation frequency of the VCO 4 changes from the frequency f0-n.fh to the frequency Z.I2 as shown in FIG.・ Major shift to higher frequency by τ ・ β. However, because it is still in the side lock state,
Furthermore, the frequency Z · I 2 · τ · β is shifted again by a large amount. After that, such a shift is repeated until the oscillation frequency of the VCO 4 approaches the center frequency f0, and the counting result of the frequency becomes the set value N0-a of the decoder 61 and the set value N0-b of the decoder 62. If the count value becomes, the current signal applied to the APC detector 3 is switched to + I1, and the variation of the oscillation frequency of the VCO 4 is smaller than the frequency Z · I2 · τ · β.・ Be β. The frequency Z · I1 · τ · β is set to be smaller than the synchronization pull-in range (PULL IN) of the APC detector 3, whereby the oscillation frequency of the VCO 4 near the center frequency f0. Since the shift is made small, the frequency becomes the center frequency f0, and the operation of the APC loop circuit 100 becomes stable when the side lock state is restored.

Contrary to the side lock phenomenon described above,
The side-locked state of the APC loop circuit 100 is side-locked when the oscillation frequency of the VCO 4 increases by + nfh, and the count value (f0 + nfh) output by the counter 5 at that time is reached. Assuming that T exceeds the value set in the decoder 71, N0 + a, as shown in FIG. 1 (b), the decoder 71 drives the current source 91 to supply a predetermined negative current amount. Signal -I1 is output, and the output current signal -I1
Is smoothed by the capacitor 10 and the resistor 11 and input to the APC detector 3. Then, the detection voltage of the APC detector 3 is lowered according to the current signal -I1,
As a result, the oscillation frequency of the VCO 4 is lowered by the predetermined frequency Z.I1..tau..beta. Due to the detection voltage corresponding to the magnitude of the frequency deviation + n.fh. If the frequency deviation + nfh is large and the count value of the counter 5 exceeds the set value N0 + b of the decoder 72, the operation when the oscillation frequency is shifted by -nfh using FIG. As described above, first, the current signal −I
Output current signal -I2 larger than 1 several times,
The oscillation frequency of CO4 is largely shifted, and when it approaches the center frequency f0, it is switched to the current signal -I1, and the oscillation frequency is shifted a few times to recover from the side lock state.

The current sources 81 to 8m and 91 to 9m
, Only one of the current sources operates at one time point and outputs different currents. However, as shown in FIG. 3 (a), each current source 81 ', 82 '
Are each an inverter 21, resistors 22 to 24, PN
Each of the current sources 91 'and 92' includes an inverter 31 and a resistor 3 respectively.
2 to 34 and NPN transistors 35 to 37, all current sources 81 ', 82', 91 ', 92'.
To output a current with the same absolute value, and
As shown in the state of each decoder when the VCO 4 is oscillating at the center frequency f0 in FIG.
1, 62 or decoders 71, 72 as the counter 5
It may be set so that two of them can operate at the same time according to the output of. In this case, when the deviation of the oscillation frequency in the side lock state is small, the current source 81 'or 9
1'is operated to input a current signal having a small current value to the APC detector 3, and when the frequency deviation is large, the current source 81 'and the current source 82', or the current source 91 'and The two current sources of the current source 92 ′ are simultaneously operated to add the two output currents into a current signal having a large current value, which is input to the APC detector 3.

As described above, according to the first embodiment of the present invention, the frequency converter 1 for converting and outputting the frequency of the input signal, the VCO 4 oscillating at the predetermined center frequency, and the frequency conversion described above. The output frequency of the VCO 4 is detected by the counter 5 in the APC loop circuit 100 having the APC detector 3 which detects the output signal of the VCO 4 and outputs the voltage signal to the VCO 4, and the counter 5 counts the oscillation frequency at regular intervals. Since the side lock prevention circuit 200 that provides a current signal having a current value corresponding to the magnitude to the APC detector 3 is provided, when the oscillation frequency of the VCO 4 largely deviates from the center frequency and a side lock phenomenon occurs, the frequency When the deviation is small, the APC detector 3 is operated by a current signal having a small current value.
Change the oscillation frequency of the VCO 4 small via
When the frequency deviation is large, first, the oscillation frequency of the VCO 4 is greatly changed via the APC detector 3 by a current signal having a large current value, and thereafter,
When the oscillation frequency approaches the central frequency and the frequency deviation becomes small, the oscillation frequency of the VCO 4 is changed to a small value by switching to a current signal having a small current value, so that a small frequency fluctuation in the APC loop circuit 100. Does not cause an over-response phenomenon to
Further, when the frequency fluctuation is large, it is possible to obtain an automatic phase control device including a side lock prevention circuit that can return from the side lock state to the steady state in a short time and that operates stably and at high speed.

Example 2. FIG. 4 (a) is a block diagram showing an automatic phase control device according to the second embodiment of the present invention. In the figure, the same reference numerals as those in FIG. 1 (a) showing the first embodiment indicate the same or corresponding parts, and 210 is a side lock prevention circuit provided in the APC loop circuit 100, which is the oscillation frequency of the VCO 4. A counter 5 that counts every 5 seconds and outputs the count value, a decoder 61 that always operates when the count value output by the counter 5 falls below a set value, and two of which one of them operates. The above decoders 62 to 6m and the decoders 7 which are the same in number and always operate when the count value exceeds the set value.
1, and two or more decoders 72 to 7m in which any one of them operates, a decoder 61, a current source 81 that outputs a current signal of a positive predetermined current amount, and a decoder 71. A current source 91 for outputting a current signal of a predetermined current amount, and a variable current amplifier 13 for varying the current amount of the current signals output by the current sources 81, 91 based on the outputs of the decoders 62-6m, 72-7m. , A capacitor 1 for smoothing the current signal output by the variable current amplifier 13
It is composed of 0 and a resistor 11.

The decoders 61 to 6m and 71 to 7
The value set in m is the same as the set value of each decoder in the first embodiment, and the decoders 62 to 6m and 72 to 7m in which any one of the above operates operates at the value counted by the counter 5 at that time. Only the decoder with the closest setting will work.

Next, the operation will be described. Similar to the first embodiment, the APC loop circuit 100 uses the frequency converter 1 to convert the frequency of the input signal into the oscillation frequency of the VCO 4 that is oscillating mainly at the center frequency f0, and converts the converted signal. , Is output to the outside through the bandpass filter 2 that transmits only signals in a predetermined frequency band. Above V
CO4 is an APC detector 3 that constantly detects the output signal.
The oscillating frequency changes in response to the voltage signal output by the AP. When the oscillating frequency greatly deviates from the center frequency f0 and becomes f0 ± n · fh, the AP
The C loop circuit 100 changes the frequency of the output signal to f0 ± nf
A side lock phenomenon occurs that is fixed to h.

When the side lock phenomenon occurs, the side lock prevention circuit 210 controls the frequency-shifted oscillation frequency of the VCO 4 to approach the center frequency f0 from f0 ± nfh. For example, in this side lock state, the oscillation frequency is −n · f.
In the side lock prevention circuit 210, the count value (f0-n.fh) output from the counter 5 that counts the oscillation frequency of the VCO 4 for a certain period (T) is output. When T is below the value N0-b set in the decoder 62, this count value (f0-n.fh) .T is below the set value N0-a of the decoder 61, so the decoder 61 Is activated, and this activates the constant current source 81 to output a current signal + I1, which is input to the variable current amplifier 13.

Further, as shown in FIG. 4 (b), the decoder 62 also operates and its output is the variable current amplifier 1 described above.
3, the amplification factor of the variable current amplifier 13 is increased, the current signal + I1 is amplified K times (K> 1),
The variable current amplifier 13 outputs a current signal + K · I1.

The current signal + K · I1 is smoothed by the capacitor 10 and the resistor 11 and input to the APC detector 3, the detection voltage of the APC detector 3 rises, and the oscillation frequency of the VCO 4 becomes f0 −. The center frequency f0 increases from n ・ fh by the frequency Z ・ K ・ I1 ・ τ ・ β.
Will approach.

At this time, this frequency Z · K · I1 · τ ·
The result of the counter 5 counting the oscillation frequency of the VCO 4 increased by β is the set value N0 of the decoder 61.
When the count value between -a and the set value N0 -b of the decoder 62 is reached, only the decoder 61 is activated and the current signal supplied to the APC detector 3 is switched to + I1, and the VCO 4 The variation of the oscillation frequency is smaller than the above frequency Z · K · I1 · τ · β.
・ Be β. And this frequency Z · I1 · τ · β is
The synchronization pull-in range of the APC detector 3 (PULL I
N), the oscillation frequency of the VCO 4 is shifted to a small value in the vicinity of the center frequency f0, so that the frequency becomes the center frequency f0 and the APC is restored when the side lock state is restored. The operation of the loop circuit 100 becomes stable.

Further, the side lock phenomenon is + nfh
When the oscillation frequency becomes high due to the deviation or when the frequency deviation ± n · fh in the side lock state is very large, the decoder 61 or the decoder 62 operates to operate the current source 81 or the current source as described above. The current signal output to 82 is amplified by the variable current amplifier 13 by the output of the required decoder and input to the APC detector 3, whereby the oscillation frequency of the VCO 4 is gradually increased to the center frequency. The side lock state is returned to a steady state by approaching f0.

As described above, according to the automatic phase control apparatus according to the second embodiment of the present invention, the side lock prevention circuit for detecting the side lock state in the APC loop circuit 100 and returning it to the steady state is provided in the VCO 4. A counter 5 that counts the oscillation frequency at regular intervals and outputs the count value.
And decoders 62 to 6m and 72 to 7m that selectively operate according to the magnitude of the count value, and decoders 61 and 71 that always operate when the count value exceeds its own set value.
A current source 81, 91 connected to each of the decoders 61, 71 for outputting a current signal of a predetermined current value, and a current value of a predetermined current value depending on the outputs of the decoders 62-6m, 72-7m. Since the side lock prevention circuit 210 is provided with the variable current amplifier 13 that amplifies it to the APC detector 3 and supplies it to the APC detector 3, when the oscillation frequency of the VCO 4 deviates from the center frequency and a side lock phenomenon occurs, The current signal output from the current source 81 or the current source 91 is amplified to a required current value according to the frequency deviation and the AP
It is input to the C detector 3, and thereby the detection voltage of the APC detector 3 is changed to gradually bring the oscillation frequency of the VCO 4 closer to the center frequency. In addition to being able to obtain a stable and high-speed side lock prevention circuit that can return from a side lock state to a steady state in a short time when the frequency fluctuation is large, without causing an over-response phenomenon. Even if the number of switching stages of the current value of the current signal is increased, it is not necessary to increase the number of current sources that generate the current signal, and the circuit configuration can be simplified.

In the second embodiment, the variable current amplifier is used to change the current value according to the output of each decoder. However, the present invention is not limited to this. For example, a switching element is used to output the output current of the current source. It goes without saying that the value may be changed by switching the output of the decoder.

Example 3. FIG. 5 (a) is a diagram showing an automatic phase control device according to a third embodiment of the present invention. In the figure, the same symbols as those in FIG. 1 (a) showing the first embodiment have the same or corresponding parts. 220 indicates the APC loop circuit 10
This is a side lock prevention circuit for detecting and correcting the side lock state of 0. This is a counter 5 which has an oscillation frequency f0 ± nf of the VCO 4 which the APC loop circuit 100 has.
h is counted for a certain period (T), and this count value (f0 ± nf
h) · T, a subtracter 14 subtracts a count value N0 corresponding to the center frequency f0 of the VCO 4, and the required value is subtracted from the count value ± n · fh · T by the coring 15
The output of the core ring 15 is converted into a current signal of a predetermined current value by the current output type D / A converter 16 by removing the output of The signal is smoothed by the capacitor 10 and the resistor 11 and input to the APC detector 3 of the APC loop circuit 100.

That is, the side lock prevention circuit 20 provided in the automatic phase control device according to the first and second embodiments.
In Nos. 0 and 210, in order to correct the deviation of the oscillation frequency of the VCO 4 whose voltage is controlled by the APC detector 3, the current value of the current signal input to the APC detector 3 is the frequency from the center frequency f0. Although it changes stepwise according to the deviation, the side lock prevention circuit 2 provided in the automatic phase control apparatus according to the third embodiment described above.
As shown in FIG. 5 (b), reference numeral 20 indicates the current value of the current signal for correcting the deviation of the oscillation frequency of the VCO 4 in proportion to the frequency deviation from the center frequency f0 in the APC loop circuit 100. It is designed to change linearly.

As described above, according to the third embodiment,
The APC loop circuit 1 has a simplified circuit configuration.
00 does not cause an over-response phenomenon with respect to small frequency fluctuations in 00, and when the frequency fluctuations are large, it is possible to smoothly return from a side lock state to a steady state in a short time, and to perform stable and high-speed side lock. It is possible to obtain an automatic phase control device equipped with a prevention circuit.

[0044]

As described above, according to the automatic phase control device of the present invention, the oscillation frequency is changed by the output signal of the detecting means for detecting the output signal created by frequency-converting the frequency of the input signal. APC having variable oscillation means
A signal, whose signal amount is varied in multiple stages or linearly according to the difference between the count value obtained by counting the oscillation frequency of the variable oscillation means and the numerical value corresponding to the center frequency of the APC loop, is sent to the detection means in the loop. Since the side lock prevention means having the frequency difference signal supply means for giving and changing the output signal is provided, a stable operation which does not cause an over-response phenomenon with respect to a small frequency fluctuation in the APC loop is performed, and the frequency fluctuation. When is large, there is an effect that it is possible to obtain an automatic phase control device equipped with a side lock prevention unit that performs a high-speed operation for returning from a side lock state to a steady state in a short time.

According to the present invention, the variable oscillating means is a VCO and the detecting means is an APC detector.
The PC loop circuit detects a deviation between the count value obtained by counting the frequency output by the VCO at regular intervals and a numerical value corresponding to the center frequency of the APC loop circuit, and detects the deviation and corresponds to the polarity and magnitude of the deviation. A current supply circuit that changes the output voltage by giving a current signal, which has a variable amount of current in multiple stages, to the APC detector according to the output of an even number of four or more detectors that respectively output signals. Since the side lock prevention circuit is provided, the output voltage of the APC detector is changed stepwise according to the magnitude of the frequency shift,
There is an effect that the oscillation frequency of the VCO can be changed, and an automatic phase control device equipped with a side lock prevention circuit that operates stably and at high speed can be obtained.

Further, according to the present invention, the side lock prevention circuit is driven by two outputs of the two detectors corresponding to the minimum deviation in each polarity of the four or more even number detectors. Depending on the outputs of the constant current source and the two detectors out of the four or more even number detectors, the output current of one of the two constant current sources is required in a stepwise manner. Since a variable current output circuit for outputting to the APC detector is provided instead of the current signal of No. 2, the two constants are output according to the magnitude of the frequency deviation in the side lock state generated in the APC loop circuit. The current signal output from the current source is made into a required amount of current by the variable current output circuit, and this can be given to the APC detector to change the oscillation frequency of the VCO stepwise, thereby achieving stable and high-speed operation. Done, Serial even by increasing the switching stages of the current signal supplied to APC detector, there is an effect that it is possible to obtain an automatic phase control apparatus provided with a side lock preventing circuit is not necessary simple circuit configuration to increase the current source.

Further, according to the present invention, the deviation of the count value obtained by counting the frequency output by the VCO at regular intervals in the side lock prevention circuit and the numerical value corresponding to the center frequency of the APC loop circuit. Calculated by an arithmetic unit, the deviation obtained by removing the deviation corresponding to the frequency near the center frequency from the deviation calculated by the deviation remover is converted into a required current signal with linearity by a digital / analog converter, Since the current signal is applied to the APC detector to change its output voltage, an overresponse phenomenon does not occur with respect to a small frequency fluctuation in the APC loop circuit, and when the frequency fluctuation is large, a short time is required. Automatic phase control with a side lock prevention circuit that can smoothly return from a side lock state to a steady state with linearity There is an effect that can be obtained location.

[Brief description of drawings]

FIG. 1 is a block diagram showing an automatic phase control device according to a first embodiment of the present invention, and a diagram showing a relationship between a frequency change and a current value.

FIG. 2 is a diagram showing the amount of change in the VCO oscillation frequency in the automatic phase control device according to the first embodiment of the present invention.

FIG. 3 is a circuit diagram of a current source in the automatic phase control device according to the first embodiment of the present invention, and a diagram showing operating states of the decoder and the current source.

FIG. 4 is a block diagram showing an automatic phase control device according to a second embodiment of the present invention and a diagram showing the relationship between frequency change and current value.

FIG. 5 is a block diagram showing an automatic phase control device according to a third embodiment of the present invention and a diagram showing the relationship between frequency change and current value.

FIG. 6 is a block diagram showing a conventional automatic phase control device and a diagram showing the relationship between frequency change and current value.

FIG. 7 is a diagram showing the amount of change in the oscillation frequency of the VCO when the time constant is increased in the conventional automatic phase control device.

FIG. 8 is a diagram showing the amount of change in the oscillation frequency of the VCO when the time constant is reduced in the conventional automatic phase control device.

[Explanation of symbols]

 1 Frequency Converter 2 Band Pass Filter 3 APC Detector 4 VCO 5 Counter 8, 9 Current Source 10 Capacitor 11 Resistor 12 Double Time Constant Circuit 13 Variable Current Amplifier 14 Subtractor 15 Coring 16 D / A Converter 21, 31 Inverter 22-24, 32-34 Resistance 25-27 PNP transistor 35-37 NPN transistor 61-6m, 71-7m Decoder 81-8m, 91-9m Current source 81 ', 82' Current source 91 ', 92' Current source 100 APC loop circuit 190 Side lock prevention circuit 200 Side lock prevention circuit 210 Side lock prevention circuit 220 Side lock prevention circuit

Claims (4)

[Claims] 1. A frequency conversion means for converting the frequency of an input signal, a detection means for detecting an output signal of the frequency conversion means, and an oscillation frequency output that oscillates at a frequency according to the output signal of the detection means. And an automatic phase control (hereinafter referred to as APC)
Loop), frequency counting means for counting the frequency of the signal output by the variable oscillating means, and a difference between the count value output by the frequency counting means and the numerical value corresponding to the center frequency of the APC loop. And a frequency difference signal supply means for changing the output signal by giving a signal in which the signal amount is changed in multiple stages or linearly to the detection means, and the oscillation frequency of the APC loop is fixed at a frequency deviating from the center frequency. An automatic phase control device, comprising: 2. A frequency converter for converting the frequency of an input signal, and an AP for detecting an output signal of the frequency converter.
An APC loop circuit having a C detector and a voltage controlled oscillator (hereinafter, referred to as VCO) which oscillates at a frequency according to an output voltage of the APC detector and gives the oscillation frequency output to the frequency converter; A frequency counter that counts the frequency of the signal output by the VCO at regular intervals, and a deviation between the count value output by the frequency counter and the numerical value corresponding to the center frequency of the APC loop circuit is detected. An even number of four or more detectors, each of which outputs a signal corresponding to polarity and magnitude, and a current signal whose current amount is varied in multiple stages according to the outputs of the even number of four or more detectors. A current supply circuit for changing the output voltage of the APC detector.
An automatic phase control device, comprising: a side lock prevention circuit for preventing the oscillation frequency of the PC loop circuit from being fixed at a frequency outside the center frequency. 3. A frequency converter for converting the frequency of an input signal, and an AP for detecting the output signal of the frequency converter.
An APC loop circuit having a C detector and a VCO that oscillates at a frequency according to the output voltage of the APC detector and supplies the oscillation frequency output to the frequency converter, and the frequency of the signal output by the VCO is constant. A frequency counter that counts each period, and a deviation between the count value output by the frequency counter and the numerical value corresponding to the center frequency of the APC loop circuit is detected, and the deviation is detected according to the polarity and the magnitude of the deviation. An even number of four or more detectors that output signals and two constants each driven by the outputs of the two detectors corresponding to the smallest deviation in each polarity of the four or more even number detectors. Depending on the outputs of the current source and the two or more detectors of the four or more even number detectors, the output current of one of the two constant current sources is stepwise converted into a required current signal. Change the output and output Side lock prevention for preventing the oscillation frequency of the APC loop circuit from being fixed at a frequency deviating from the center frequency. And an automatic phase control device. 4. A frequency converter for converting the frequency of an input signal, and an AP for detecting an output signal of the frequency converter.
An APC loop circuit having a C detector and a VCO that oscillates at a frequency according to the output voltage of the APC detector and supplies the oscillation frequency output to the frequency converter, and the frequency of the signal output by the VCO is constant. A frequency counter that counts for each period, an arithmetic unit that calculates the deviation between the count value output by the frequency counter and the numerical value corresponding to the center frequency of the APC loop circuit, and the above-mentioned from the deviation calculated by the arithmetic unit. A deviation remover for removing a deviation corresponding to a frequency in the vicinity of the center frequency, an output of the deviation remover having a linear characteristic is converted into a current signal, and the converted output is given to the APC detector to output its output voltage. And a digital / analog converter for changing the frequency of the APC loop circuit to prevent the oscillation frequency in the APC loop circuit from being fixed at a frequency outside the center frequency. An automatic phase control device, comprising: