JPH07183545A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent a Zener diode from varying in Zener breakdown voltage by a method wherein an N-type or first conductivity-type cathode diffusion region is positioned in a region on the lateral side of a P-type or second conductivity-type anode diffusion region when a Zener diode is put in a breakdown state to use. CONSTITUTION:An end f of a first conductivity-type cathode region 21 is positioned in a second conductivity-type lateral diffusion region 17 of a second conductivity-type anode region 15, the end f of the first conductivity-type cathode region 21 correspondent to the surface of a junction is set lower in impurity concentration than a spot j near a bulk junction under a window. By this setup, a spot highest in impurity concentration in the second conductivity-type anode region 15 adjacent to a junction of a Zener diode is located under the region forming window, and a Zener current Iz beings to flow from a semiconductor substrate as the Zener diode is put in a breakdown state making the above spot a starting point, so that hot carriers are restrained from being injected into an insulating film 12 through a surface adjacent to a PN junction. Therefore, a semiconductor device of this constitution is restrained from varying in Zener voltage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a diode formed on a semiconductor substrate, and is particularly suitable for using a breakdown voltage value as a reference.

[0002]

2. Description of the Related Art A diode using a breakdown voltage as a reference.
The most common Zener diode will be described as an example. As shown in FIG. 1, the basic structure of a Zener diode incorporated in an integrated circuit device is a P-type sub substrate 1
A low-concentration N-type epitaxial layer 2 is deposited on (hereinafter abbreviated as "sub substrate"), and a Zener diode is formed there.
In order to form a plurality of elements in an integrated circuit, the elements are surrounded by a P-type impurity layer 3 to function as GND and the N-type epitaxial layer 2 as a power supply voltage, and the elements are separated from each other.

In order to place the Zener diode in the N-type epitaxial layer 2, the P-type anode region 4 is diffused, and the N ⁺ -type cathode region 5 is further formed in the N-type epitaxial layer 2 and P-type. It is provided so as to partially extend over the anode region 4. In the portion of the insulating film 6 corresponding to the P-type anode region 4 and the N ⁺ -type cathode region 5, a conductive material such as Al or Al alloy (Al-Si, Al-S) after opening is used for contact.
i-Cu) is deposited by a sputtering method or a vacuum evaporation method to form an anode electrode 7 and a cathode electrode 8 to obtain a Zener diode.

[0004]

This Zener-dio-
The structure of the NPN transistor is the emitter / back (VEB
O) is utilized, and as shown in FIG. 2, the point of breaking down is a P type or second conductivity type anode located near the junction with the N ⁺ type or first conductivity type cathode region 5. The surface a of the drain region 4 has the highest impurity concentration, and the break-down current I _Z flows on the surface starting from this.
As a result, hot carriers are injected into the surface of the insulating film 6 in the vicinity of the cathode and anode junctions, and the positive charge in the insulating film 6 causes the depletion layer on the surface of the P-type anode region 4 to spread. , The path of the break-down current I _Z moves from the surface to the deep inside. Therefore there is a problem such as internal resistance is FIG. 3 to reveal V _Z waveforms adopted a V _Z to I _Z horizontal axis is tilted on the vertical axis increases.

The present invention has been made in view of the above circumstances, and in particular, a Zener diode incorporated in an integrated circuit device.
The Zener breakdown voltage is prevented from fluctuating due to the surface breakdown phenomenon depending on the structure of the gate.

[0006]

An insulating film that selectively covers a surface of a semiconductor layer of a first conductivity type, a first region of a second conductivity type that faces inward from an exposed surface portion of the semiconductor layer, and a second region of the second area.
A first-conductivity-type region located in the first-conductivity-type region and exposing a surface; a PN junction located between the second-conductivity-type first region and the second-conductivity-type semiconductor layer; And the PN protected by the insulating film.
A junction end, the other end of the PN junction continuous to the flat portion, and a curved portion between the PN junction ends continuous to the other end,
A lateral region of a second conductivity type defined by the other end of the curved portion and a line segment connecting between exposed surfaces of the first region of the second conductivity type that is perpendicular to the other region, and a lateral region of the second conductivity type The semiconductor element according to the present invention is characterized by the edge of the first conductivity type region located inside.

Furthermore, an insulating film that selectively covers the surface of the first conductive type semiconductor layer, and a second region of the second conductive type that faces inward from the exposed semiconductor layer surface portion and is adjacent to the insulating film, There is also a feature in the insulating film end located at the end of the first region of the second conductivity type and the distance between both insulating film ends that is within twice the depth of the first region of the second conductivity type. , A low concentration second conductivity type second region surrounding the second conductivity type first diffusion region, and an exposed surface of the second conductivity type diffusion region, and from this surface portion. It is also characterized by a second region of the second conductivity type having a high concentration facing inward.

[0008]

When the zener diode formed in the integrated circuit device is used after being broken down, it is in the lateral region of the P type or second conductivity type anodic diffusion region (see FIG. 7, etc. 17). In this structure, the impurity concentration of the bulk anodic region is higher than that of the surface anodic region in the vicinity of the junction, and the bulk concentration of the bulk anodic region is higher than that of the surface anodic region near the junction. Even if a zener breakdown occurs with the origin as a starting point and a zener current flows, hot carriers are not injected into the insulating layer and the fluctuation of the zener voltage is prevented.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment according to the present invention is shown in FIGS. 4 to 10, and FIGS.
Will be described.

For example, in an IC for power supply, an N ⁻ first conductivity type epitaxial layer 11 having a phosphorus content of about 10 ¹⁵ atoms / cm ^{3 is formed on} a second conductivity type silicon semiconductor substrate 10 having a ρ _{s of} about 0.001 Ω. After depositing, the insulating film 12 covering the entire surface is selectively removed by a known photolithography technique using a resist 13. After the boron-based second conductivity type impurity is implanted through the window 14 (see FIG. 4) formed by this step by the ion implantation step (see the arrow in FIG. 4), the surface concentration is increased to 10 ¹⁸ atoms / after the activation step.
A second conductivity type anodic region 15 of about ³ cm ³ is formed (see FIG. 5). In this ion implantation process, the resist 13 remaining in the photolithography process is used as an ion implantation mask.

The diffusion state of the second conductivity type impurities at this step is diffused not only in the thickness direction of the silicon semiconductor substrate 10 but also in the lateral direction at the same time by about 80% as shown in FIG. 5 (see FIG. 5). . Specifically, as shown in FIG. 5, the resist 1
3, the PN junction 16 end c formed by the impurities contained in the epitaxial layer 11 is diffused in the lateral direction from the dotted line b starting from the end of the insulating film 12 continuous under 3 and is protected by the insulating film 12. To do. Further, in the PN junction 16, a curved portion e is formed between the positions d and c intersecting the dotted line b.

In the present invention, the region surrounded by the curved portion e and the dotted line b is defined as the lateral region 17 of the diffusion region of the second conductivity type in the anodic region 15 portion.

Next, a window is formed in the insulating film 12 by a known photolithography technique to form a first conductivity type cathode region. However, the second conductivity type anode region 15
The insulating film 18 grows in the portion of the window 14 when it is formed as shown in FIG. 5, so that it is necessary to open the insulating film 18. The window 19 is removed by a known photolithography technique using a resist. To do. The insulating film 18 is formed by forming an insulating film having a thickness of about 500 angstroms during the ion implantation process to prevent volatilization of implanted ions.

At this time, the window 19 is formed at a position smaller than the diffusion depth (Xj) of the second conductivity type anodic region 15 and outside the end of the window 18, that is, near the curved portion e of the PN junction 16. A resist 20 used for forming a new window 19 (see FIG. 6) is used as an implantation mask, As or P is ion-implanted, and then activation treatment is performed to obtain a surface concentration of about 10 ²⁰ atoms / cm ^3. The first conductivity type cathode region 21 is formed and its cross section is shown in FIG.

As a result, the edge f of the first conductivity type cathode region 21 is located in the second conductivity type diffusion region lateral region 17 in the second conductivity type anode region 15 and the conventional Zener. The impurity concentration at the edge f of the cathode region 21 corresponding to the surface portion of the junction that determines the breakdown of the diode is
The impurity concentration is higher near the bulk junction g (see FIG. 7) immediately below the window 19. In addition, in FIGS. 6 and 7 and FIGS. 8 to 10 which will be described later, the semiconductor substrate 10 of the second conductivity type is used.
Was omitted.

FIG. 8 shows a second embodiment of the present invention.
The feature is the window 1 for forming the second conductivity type anode region 15
8 is divided into two and opened to diffuse. The division interval is not more than twice the diffusion depth (Xj) of the second-conductivity type anodic region 15, and the second-conductivity type anodic region 15 divided by the lateral diffusion is electrically connected. If this value is exceeded, the margin for mask alignment cannot be removed, and this is the measure taken.

By the way, the diffusion depth Xj of the second conductivity type anodic region 15 varies depending on the model, but is generally 0.5 μm.
It is within 2.5 μm.

Also shown in this drawing are electrodes 22 and 2 for the second conductivity type anode region 15 and the first conductivity type cathode region 21.
3 is described. This is a conductive material such as Al or Al
An alloy (Al-Si, Al-Si-Cu) is deposited and provided by a sputtering method or a vacuum evaporation method. Further, the end f of the first conductivity type cathode region 21 is located in the lateral region 17 of the second conductivity type diffusion region in the second conductivity type anode region 15.

[0019] Figure 9 is a third embodiment, which is a partial modification of the structure of the first embodiment revealed in Figure 7, deep concentration is less P ^- epitaxial of the second conductivity type region 22 a first conductivity type It is formed on the layer 11 and has an anode region 1 of the second conductivity type.
5 is provided. As a result, the drawbacks due to the expansion of the depletion layer described in the section of the related art are eliminated.

Furthermore, in the fourth embodiment, as is apparent from FIG. 10, a second conductivity type high concentration region 24 is formed immediately below the electrode 22 for the second conductivity type anode region 15 and the contact resistance of the electrode 22 is formed. And reduce diffusion resistance.

[0021]

As described above, in the integrated circuit device according to the present invention, the highest impurity concentration point in the second conductivity type anodic region near the junction of the Zener diode is directly under the window for forming this region. Therefore, the Zener current Iz flows from the semiconductor substrate side due to the breakdown from this, and hot carriers are not injected into the insulating film from the surface near the PN junction. Therefore, a highly reliable integrated circuit device in which the Zener voltage does not fluctuate can be obtained.

[Brief description of drawings]

FIG. 1 is a sectional view of a conventional Zener diode.

FIG. 2 is an explanatory diagram of zener breakdown that occurs in a conventional zener diode.

FIG. 3 is a waveform diagram of a Zener voltage generated in a conventional Zener diode.

FIG. 4 is a diagram showing a manufacturing process of the Zener diode of the present invention.

FIG. 5 is a diagram showing a manufacturing process of the Zener diode following FIG. 4;

FIG. 6 is a diagram showing a manufacturing process of the Zener diode following that of FIG. 5;

FIG. 7 is a diagram showing a manufacturing process of the Zener diode following FIG. 6;

FIG. 8 is a cross-sectional view showing the operation of the Zener diode of the present invention.

FIG. 9 is a sectional view showing a Zener current path of a Zener diode according to the present invention.

FIG. 10 is another zener diode of the present invention.
It is sectional drawing which clarifies the path | route of an electric current.

[Explanation of symbols]

 1, 10: Semiconductor substrate, 2, 11: Epitaxial layer, 3: Separation layer, 4, 15: Second conductive type anode region, 5, 21: First conductive type cathode region, 6, 12, 18: insulating film, 7, 22: second conductivity type anode region electrode, 8, 23: first conductivity type cathode region electrode, 14, 19: window, 16: PN junction, 17: Lateral region of the second conductivity type diffusion region.

Claims (4)

[Claims] 1. An insulating film that selectively covers a surface of a semiconductor layer of a first conductivity type, a first region of a second conductivity type that faces inward from an exposed surface portion of the semiconductor layer, and a second region of the second conductivity type. A first conductivity type region located in the first region and exposing the surface; a PN junction located between the second region of the first conductivity type and the second conductivity type semiconductor layer; and a flat surface forming the PN junction. Section, the PN junction end protected by the insulating film, the other end of the PN junction continuous to the flat portion, a curved portion between the PN junction ends continuous to the other end, and the other curved portion. A lateral region of a second conductivity type defined by an edge and a line segment connecting between exposed surfaces of the first region of the second conductivity type in the vertical direction, and located in the lateral region of the second conductivity type A semiconductor element having a first conductivity type region edge 2. An insulating film selectively covering the surface of the semiconductor layer of the first conductivity type, and a first region of the second conductivity type facing inward from the exposed surface portion of the semiconductor layer and adjoining the insulating film.
The insulating film edge located at the end of the first region of the second conductivity type and the distance between the insulating film ends that is within twice the depth of the first region of the second conductivity type. The semiconductor device according to claim 1, characterized in that 3. A semiconductor device according to claim 1, further comprising a second region of a low concentration second conductivity type surrounding the first diffusion region of the second conductivity type. 4. An exposed surface of the diffusion region of the second conductivity type, and a second region of the second conductivity type having a high concentration which is inwardly directed from the surface portion. The semiconductor device according to claim 2 or claim 3.