JPH071830B2 - Connection method of multilayer printed wiring board - Google Patents
Connection method of multilayer printed wiring boardInfo
- Publication number
- JPH071830B2 JPH071830B2 JP1237478A JP23747889A JPH071830B2 JP H071830 B2 JPH071830 B2 JP H071830B2 JP 1237478 A JP1237478 A JP 1237478A JP 23747889 A JP23747889 A JP 23747889A JP H071830 B2 JPH071830 B2 JP H071830B2
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- solder
- wiring boards
- wiring board
- conductive resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Combinations Of Printed Boards (AREA)
Description
【発明の詳細な説明】 （産業上の利用分野） 本発明は多層プリント配線基板の層間導通接続方法に関
する。Description: TECHNICAL FIELD The present invention relates to an interlayer conductive connection method for a multilayer printed wiring board.
（従来の技術） 第３図（ａ），（ｂ）に従来技術による４層プリント配
線基板の一例についての製作工程断面図を示す。図中の
１は両面プリント配線基板、2,3は両面プリント配線基
板１上のパターン化された銅箔層、４は両面プリント配
線基板１上の両面パターンを導通接続するためのスルー
ホール、５は両面プリント配線基板、6,7は両面プリン
ト配線基板５上のパターン化された銅箔層、８は両面プ
リント配線基板５上の両面パターンを導通接続するため
のスルーホール、９は半田バンプ、10は半田バンプ９の
融点より低い硬化温度を持つ絶縁接着樹脂、11は半田バ
ンプ融合部、12は絶縁接着層を示す。(Prior Art) FIGS. 3 (a) and 3 (b) show cross-sectional views of a manufacturing process of an example of a four-layer printed wiring board according to the prior art. In the figure, 1 is a double-sided printed wiring board, 2 and 3 are patterned copper foil layers on the double-sided printed wiring board 1, 4 is through holes for conductively connecting double-sided patterns on the double-sided printed wiring board 1, 5 Is a double-sided printed wiring board, 6 and 7 are patterned copper foil layers on the double-sided printed wiring board 5, 8 is a through hole for electrically connecting the double-sided pattern on the double-sided printed wiring board 5, 9 is a solder bump, 10 is an insulating adhesive resin having a curing temperature lower than the melting point of the solder bump 9, 11 is a solder bump fusion portion, and 12 is an insulating adhesive layer.
第３図（ａ）において、両面プリント配線基板1,5はど
ちらもスルーホール4,8や両面パターン2,3,6,7を形成し
た通常の両面プリント基板である。この両面プリント配
線基板1,5の対応する面の銅箔層3,6上の導通接続箇所に
半田バンプ９をクリーム半田の印刷、半田リフローによ
り形成する。半田は、一般的な共晶半田を用いる。次に
同じ対抗する面の半田バンプ以外の箇所全面にスクリー
ン印刷で絶縁接着樹脂10を形成し、バインダーを飛ばし
た前硬化状態としておく。こうして得られた基板を第３
図（ａ）に示すようにバンプ同士向い合わせて上下を平
らなステンレス板（図示せず）で挟み、加圧しながら加
熱する。条件は第一段階として半田融点を越えた温度22
0℃で２分程度のペーパフェーズソルダフローを行う。
第３図（ｂ）に示すように、この時に対向した半田バン
プ９の加圧のため押しつぶされながら融合し半田バンプ
融合部11が得られる。また、ポリマー絶縁層は温度上昇
による粘度の低下と加圧により互いに密着する。第二段
階は引き続き温度150℃に保ち約１時間のポリマーの硬
化を行わせ、絶縁接着層10を得て上下基板の接着を完了
する。以上の工程にて多層基板の貼り合わせが行われ、
多層基板が得られる。In FIG. 3A, the double-sided printed wiring boards 1 and 5 are both normal double-sided printed boards having through holes 4 and 8 and double-sided patterns 2, 3, 6 and 7. Solder bumps 9 are formed on the copper foil layers 3 and 6 on the corresponding surfaces of the double-sided printed wiring boards 1 and 5 by printing of solder paste and reflow soldering. As the solder, a general eutectic solder is used. Next, an insulating adhesive resin 10 is formed by screen printing on the entire surface of the same opposing surface other than the solder bumps, and is left in a pre-cured state without the binder. The substrate thus obtained is the third
As shown in FIG. 3A, the bumps are faced to each other and sandwiched between flat stainless plates (not shown) and heated while being pressurized. The first condition is the temperature above the melting point of the solder 22
Perform a paper phase solder flow for about 2 minutes at 0 ° C.
As shown in FIG. 3B, at this time, the solder bumps 9 facing each other are fused while being pressed and pressed to obtain the solder bump fused portion 11. Further, the polymer insulating layers are brought into close contact with each other due to the decrease in viscosity due to the temperature rise and the pressure. In the second step, the temperature is kept at 150 ° C. and the polymer is cured for about 1 hour to obtain the insulating adhesive layer 10 to complete the adhesion of the upper and lower substrates. In the above process, the multi-layer substrate is bonded,
A multilayer substrate is obtained.
（発明が解決しようとする課題） 本方法においては半田バンプ９の融合により対向する導
体間接続が行われるが、貼り合わせる時の加圧、加熱に
より対向している半田バンプが融合すると当時に、両面
プリント配線基板間の隙間はほとんど無くなり、その結
果半田バンプを構成している半田は、隙間に薄く広が
り、隣接パターンへの接触が起こる。従って、隣接パタ
ーン配線に対して間隔を広く取る必要があり、配線の密
度を上げる必要のある場合には障害となり、本方法の欠
点である。(Problems to be Solved by the Invention) In the present method, the opposing conductors are connected by fusing the solder bumps 9. However, when the opposing solder bumps are fused by the pressure and heating during bonding, at that time, The gap between the double-sided printed wiring boards is almost eliminated, and as a result, the solder that constitutes the solder bump spreads thinly in the gap and contacts with the adjacent pattern. Therefore, it is a drawback of this method because it is necessary to make a large space between adjacent pattern wirings, which becomes an obstacle when it is necessary to increase the wiring density.
以上の欠点を解決するために、本発明の貼り合わせ時の
導通接続部分のはみ出しを無くし、隣接パターンとの不
要な接触の起きない構成、で余分な場所を必要としない
多層プリント配線基板の製造方法を提供するものであ
る。In order to solve the above-mentioned drawbacks, the production of a multilayer printed wiring board according to the present invention, which eliminates the protrusion of a conductive connection portion at the time of bonding and does not cause unnecessary contact with an adjacent pattern, and does not require an extra space It provides a method.
（課題を解決するための手段） 本発明は、複数のプリント配線基板上の貼り合わせ面双
方の任意の対向する導体パターン間の導通接続を、半田
又は導電性樹脂で得るようにした多層プリント配線基板
において、加圧加熱して前記半田を溶融した時前記プリ
ント配線基板間に所定の隙間を保持する大きさを有し前
記半田の融点以上の融点を持つ銅のボールあるいは小片
を前記半田内に混合させ、又は加圧加熱して前記導電性
樹脂を溶融した時前記プリント配線基板間に所定の隙間
を保持する大きさを有し前記導電性樹脂の硬化温度以上
の軟化温度を持つ金属又は非金属の球あるいは小片を前
記導電性樹脂内に混合させ、前記複数のプリント配線基
板を接続するようした多層プリント配線基板の接続方法
である。(Means for Solving the Problems) The present invention provides a multilayer printed wiring in which conductive connection between arbitrary opposing conductor patterns on both bonding surfaces of a plurality of printed wiring boards is obtained by solder or conductive resin. In the board, a copper ball or small piece having a size that holds a predetermined gap between the printed wiring boards when the solder is melted by pressurizing and heating and having a melting point equal to or higher than the melting point of the solder is put in the solder. A metal or non-metal having a size that maintains a predetermined gap between the printed wiring boards when the conductive resin is melted by mixing or heating under pressure, and having a softening temperature higher than the curing temperature of the conductive resin. A method for connecting a multilayer printed wiring board, wherein metal balls or small pieces are mixed in the conductive resin to connect the plurality of printed wiring boards.
（実施例） 第１図及び第２図に本発明の実施例を断面図で示す。図
中の13,14はプリント配線基板、15,16はプリント配線基
板上のパターンニングされた銅箔層、17,18は半田クリ
ーム、19,20は半田クリーム内に混在する銅ボール、21
はハンダバンプ融合部、22は接続用導電性樹脂、23は接
続用導電性樹脂22内に混在する金属又は非金属のボー
ル、24は接続用導電性樹脂22を硬化した接続部を示す。(Embodiment) FIG. 1 and FIG. 2 are sectional views showing an embodiment of the present invention. In the figure, 13 and 14 are printed wiring boards, 15 and 16 are patterned copper foil layers on the printed wiring boards, 17 and 18 are solder creams, 19 and 20 are copper balls mixed in the solder cream, 21
Is a solder bump fusion portion, 22 is a conductive resin for connection, 23 is a metal or non-metal ball mixed in the conductive resin 22 for connection, and 24 is a connection portion obtained by curing the conductive resin 22 for connection.
先ず第一の実施例について説明する。第１図（ａ）にお
いて貼り合わせるプリント配線基板13,14はそれぞれの
銅箔層15,16のパターンニングが終わっている。導通を
必要とする対向箇所にはクリーム半田17,18を印刷ある
いはディスペンサーで塗布形成し、フローして半田バン
プを形成する。使用する半田は共晶半田であるが、半田
内にプリント配線基板間に所定の隙間をつくる大きさの
銅ボール19,20を混入しておく。銅ボール19,20は半田メ
ッキあるいは半田コートしておくと半田との濡れが良く
なる。半田バンプの形成を終えた後、上下をステンレス
板等（図示せず）の平らな板で挟み、加圧しながら半田
融点以上に加熱し半田バンプ17,18を融合させ第１図
（ｂ）で示す半田バンプ融合部21を得る。この際、上下
のプリント基板間は半田バンプ17,18内に銅ボール19,20
の大きさで決まる隙間に保たれる。クリーム半田はリフ
ロー後には体積が半分程度になるので、銅ボール19,20
の混入量を選び半田量を調整する。こうして得られた導
通接続箇所はプリント配線基板間の隙間を一定に保つこ
とが出来、半田の不要なはみ出しを抑えることが可能と
なる。First, the first embodiment will be described. In FIG. 1 (a), the printed wiring boards 13 and 14 to be bonded have the respective copper foil layers 15 and 16 patterned. The cream solders 17 and 18 are printed or applied and formed by a dispenser on the facing portions that require continuity, and flow to form solder bumps. The solder used is eutectic solder, but copper balls 19 and 20 of a size that forms a predetermined gap between the printed wiring boards are mixed in the solder. If the copper balls 19, 20 are solder-plated or solder-coated, the wettability with the solder will be improved. After the formation of the solder bumps, the upper and lower parts are sandwiched by flat plates such as stainless steel plates (not shown), and the solder bumps 17 and 18 are fused by heating above the solder melting point while applying pressure, as shown in FIG. 1 (b). The solder bump fusion portion 21 shown is obtained. At this time, between the upper and lower printed circuit boards, copper balls 19,20 should be placed in the solder bumps 17,18.
It is kept in the gap determined by the size of. Since the volume of cream solder becomes about half after reflow, copper balls 19,20
Select the mixed amount of and adjust the solder amount. At the conductive connection points thus obtained, the gap between the printed wiring boards can be kept constant, and unnecessary squeeze-out of solder can be suppressed.
本実施例において、銅ボールを銅以外の材料で構成した
場合も同様の結果が得られるが、半田の塗れが悪い場合
には、ボールの量を少な目にして半田での上下プリント
配線基板間の導通を確実に得る必要がある。また、銅ボ
ールはクリーム半田に混入させずにクリーム半田を塗布
形成後に載せる、あるいは潜らせることでも同じ効果が
得られる。銅ボールは球とは限らず、小片での実施も全
く同様であり、材質については使用する半田の融点より
高い融点を持っていれば良い。In the present embodiment, similar results can be obtained when the copper balls are made of a material other than copper, but if the solder coating is poor, reduce the amount of balls and use a solder between the upper and lower printed wiring boards. It is necessary to surely obtain continuity. Also, the same effect can be obtained by placing the copper balls after coating and forming them or dipping them without mixing them in the cream solder. The copper ball is not limited to a sphere, and the same applies to the case of using a small piece, and the material may have a melting point higher than that of the solder used.
次に第二の実施例について説明する。第２図（ａ）でプ
リント配線基板13,14は第一の実施例と同様に、パター
ンニングを終えているものである。本実施例では接続用
導電性樹脂22をスクリーン印刷あるいはポッティングで
形成する。導電性樹脂とは熱硬化性樹脂と良導電性の金
属粉を分散剤で混合したものである。接続用導電性樹脂
22は対向面の両側に形成しても良いが、ここでは片側だ
けで説明する。接続用導電性樹脂22内にはボール23が混
在させてある。ボールは金属（例えば、銅、鉄等）ある
いは非金属（例えば、セラミック、耐熱性樹脂等）いず
れでも良いが、接続用導電性樹脂22の硬化温度で形が崩
れない必要がある。接続用導電性樹脂22を形成した後、
プリント配線基板13,14を重ね上下をステンレス板等
（図示せず）の平らな板で挟み、加圧しながら加熱して
接続用導電性樹脂22を硬化させ、第２図（ｂ）に示す接
続部24を形成し、上下間の導通接続を得る。得られた構
成では接続用導電性樹脂のはみ出しがないことがわか
る。本実施例においても、ボールの形状は特に定めな
く、また接続用導電性樹脂22に混在でなく、後で載せる
か或いは潜らせることでも可能である。Next, a second embodiment will be described. In FIG. 2 (a), the printed wiring boards 13 and 14 have completed the patterning as in the first embodiment. In this embodiment, the conductive resin 22 for connection is formed by screen printing or potting. The conductive resin is a mixture of a thermosetting resin and a metal powder having good conductivity with a dispersant. Conductive resin for connection
22 may be formed on both sides of the facing surface, but here, only one side will be described. Balls 23 are mixed in the conductive resin 22 for connection. The ball may be either a metal (eg, copper, iron, etc.) or a non-metal (eg, ceramic, heat-resistant resin, etc.), but it is required that the shape of the ball does not collapse at the curing temperature of the conductive resin 22 for connection. After forming the conductive resin 22 for connection,
The printed wiring boards 13 and 14 are stacked and sandwiched between flat plates such as stainless steel plates (not shown) at the top and bottom, and the conductive resin 22 for connection is cured by heating while applying pressure, and the connection shown in FIG. Form part 24 to obtain a conductive connection between the top and bottom. It can be seen that in the obtained structure, the conductive resin for connection does not protrude. Also in this embodiment, the shape of the ball is not particularly limited, and it is also possible that the ball is not mixed with the conductive resin for connection 22 but placed or dipped later.
以上簡単な構成例で説明したが、多数の層を貼り合わせ
る場合も同様に行えることは勿論である。Although a simple configuration example has been described above, it goes without saying that the same can be done when a number of layers are bonded together.
（発明の効果） 以上述べてきた本発明の方法によれば、導通接続を得る
貼り合わせにおいて、導通接続箇所からの半田又は導電
性樹脂のはみ出しをなくすことが出来、隣接パターン配
線間の距離も他の所と同じで良いことから、配線密度が
上げられる。即ち、高密度化が図れる利点がある。(Effect of the Invention) According to the method of the present invention described above, it is possible to prevent the solder or the conductive resin from squeezing out from the conductive connection portion in the bonding for obtaining the conductive connection, and also to reduce the distance between the adjacent pattern wirings. The wiring density can be increased because it is the same as elsewhere. That is, there is an advantage that the density can be increased.
第１図（ａ），（ｂ）及び第２図（ａ），（ｂ）は本発
明による実施例の断面図、第３図は従来技術による例の
断面図を示す。 1,5……両面プリント配線基板、2,3,6,7,15,16……銅箔
層、4,8……スルーホール、９……半田バンプ、10……
絶縁接着樹脂、11……半田バンプ融合部、12……絶縁接
着層、13,14……プリント配線基板、17,18……半田クリ
ーム、19,20……銅ボール、21……半田バンプ融合部、2
2……接続用導電性樹脂、23……ボール、24……接続
部。1 (a) and (b) and FIGS. 2 (a) and (b) are sectional views of an embodiment according to the present invention, and FIG. 3 is a sectional view of an example according to the prior art. 1,5 …… Double-sided printed wiring board, 2,3,6,7,15,16 …… Copper foil layer, 4,8 …… Through hole, 9 …… Solder bump, 10 ……
Insulating adhesive resin, 11 …… Solder bump fusion part, 12 …… Insulating adhesive layer, 13,14 …… Printed wiring board, 17,18 …… Solder cream, 19,20 …… Copper ball, 21 …… Solder bump fusion Part, 2
2 …… Conductive resin for connection, 23 …… Ball, 24 …… Connecting part.
Claims (2)
双方の任意の対向する導体パターン間の導通接続を、半
田で得るようにした多層プリント配線基板において、加
圧加熱して前記半田を溶融した時前記プリント配線基板
間に所定の隙間を保持する大きさを有し前記半田の融点
以上の融点を持つ銅のボールあるいは小片を前記半田内
に混合させ、前記複数のプリント配線基板を接続したこ
とを特徴とする多層プリント配線基板の接続方法。1. A multi-layered printed wiring board, wherein conductive connection between arbitrary opposing conductor patterns on both bonding surfaces of a plurality of printed wiring boards is obtained by soldering, by heating under pressure to melt the solder. Then, copper balls or small pieces having a size that maintains a predetermined gap between the printed wiring boards and having a melting point equal to or higher than the melting point of the solder are mixed in the solder to connect the plurality of printed wiring boards. A method for connecting a multilayer printed wiring board, comprising:
双方の任意の対向する導体パターン間の導通接続を、導
電性樹脂で得るようにした多層プリント配線基板におい
て、加圧加熱して前記導電性樹脂を溶融した時前記プリ
ント配線基板間に所定の隙間を保持する大きさを有し前
記導電性樹脂の硬化温度以上の軟化温度を持つ金属又は
非金属の球あるいは小片を前記導電性樹脂内に混合さ
せ、前記複数のプリント配線基板を接続したことを特徴
とする多層プリント配線基板の接続方法。2. A multi-layer printed wiring board, wherein conductive connections between arbitrary opposing conductor patterns on both bonding surfaces of a plurality of printed wiring boards are obtained by using a conductive resin, by applying pressure and heating to the conductive material. A metal or non-metal sphere or small piece having a size that holds a predetermined gap between the printed wiring boards when the conductive resin is melted and having a softening temperature equal to or higher than the curing temperature of the conductive resin in the conductive resin. And a method for connecting a plurality of printed wiring boards, wherein the plurality of printed wiring boards are connected to each other.
Priority Applications (13)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1237478A JPH071830B2 (en) | 1989-09-13 | 1989-09-13 | Connection method of multilayer printed wiring board |
| US07/456,946 US5031308A (en) | 1988-12-29 | 1989-12-26 | Method of manufacturing multilayered printed-wiring-board |
| EP89124088A EP0379736B1 (en) | 1988-12-29 | 1989-12-28 | Method of manufacturing multilayered printed-wiring-board |
| DE68921732T DE68921732T2 (en) | 1988-12-29 | 1989-12-28 | Process for the production of printed multilayer printed circuit boards. |
| DE68928150T DE68928150T2 (en) | 1988-12-29 | 1989-12-28 | Manufacturing process of a multilayer printed circuit board |
| EP93118917A EP0607532B1 (en) | 1988-12-29 | 1989-12-28 | Method of manufacturing multilayered printed-wiring-board |
| ES93118943T ES2104023T3 (en) | 1988-12-29 | 1989-12-28 | MANUFACTURING PROCEDURE OF MULTILAYER PRINTED WIRING PLATE. |
| EP93118943A EP0607534B1 (en) | 1988-12-29 | 1989-12-28 | Method of manufacturing multilayered printed-wiring-board |
| ES93118917T ES2085098T3 (en) | 1988-12-29 | 1989-12-28 | MANUFACTURING PROCEDURE OF A MULTILAYER PRINTED CIRCUIT. |
| ES89124088T ES2069570T3 (en) | 1988-12-29 | 1989-12-28 | MANUFACTURING PROCEDURE OF A PRINTED CONNECTION PLATE WITH MULTIPLE LAYERS. |
| CA002006776A CA2006776C (en) | 1988-12-29 | 1989-12-28 | Method of manufacturing multilayered printed-wiring-board |
| DE68926055T DE68926055T2 (en) | 1988-12-29 | 1989-12-28 | Manufacturing process of a multilayer printed circuit board |
| KR1019890020640A KR940009175B1 (en) | 1988-12-29 | 1989-12-29 | Multi-printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1237478A JPH071830B2 (en) | 1989-09-13 | 1989-09-13 | Connection method of multilayer printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03101195A JPH03101195A (en) | 1991-04-25 |
| JPH071830B2 true JPH071830B2 (en) | 1995-01-11 |
Family
ID=17015923
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1237478A Expired - Fee Related JPH071830B2 (en) | 1988-12-29 | 1989-09-13 | Connection method of multilayer printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH071830B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3724262B2 (en) * | 1999-06-25 | 2005-12-07 | 松下電工株式会社 | Thermoelectric module |
| CN106663674B (en) * | 2014-04-30 | 2019-09-17 | 英特尔公司 | Integrated circuit package with mold compound |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57115894A (en) * | 1981-01-08 | 1982-07-19 | Matsushita Electric Ind Co Ltd | Printed circuit board |
| JPS618996A (en) * | 1984-06-25 | 1986-01-16 | 株式会社日立製作所 | Multilayer circuit board and method of producing same |
| JPS61269396A (en) * | 1985-05-24 | 1986-11-28 | 株式会社日立製作所 | Multilayer wiring board and manufacture thereof |
| JPS6318691A (en) * | 1986-07-11 | 1988-01-26 | 古河電気工業株式会社 | Method of mettalizing surface of conductive paste circuit |
-
1989
- 1989-09-13 JP JP1237478A patent/JPH071830B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03101195A (en) | 1991-04-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR940009175B1 (en) | Multi-printed wiring board | |
| US5435732A (en) | Flexible circuit member | |
| US5133495A (en) | Method of bonding flexible circuit to circuitized substrate to provide electrical connection therebetween | |
| US6977441B2 (en) | Interconnect substrate and method of manufacture thereof, electronic component and method of manufacturing thereof, circuit board and electronic instrument | |
| US8152953B2 (en) | Method of making printed wiring board and method of making printed circuit board unit | |
| JPH06103703B2 (en) | Soldering method | |
| US6243946B1 (en) | Method of forming an interlayer connection structure | |
| JPH0888470A (en) | Ceramic multilayer substrate for mounting electronic parts and its manufacturing method | |
| JPS58132941A (en) | Lead-connecting method for part-mounting substrate | |
| JPH06120671A (en) | Multilayer wiring board embedded with component | |
| JP3930222B2 (en) | Manufacturing method of semiconductor device | |
| JP2005026573A (en) | Manufacturing method of module with built-in component | |
| JPH071830B2 (en) | Connection method of multilayer printed wiring board | |
| JP2542794B2 (en) | Wiring board manufacturing method | |
| JPS60140790A (en) | Coupling sheet | |
| JP5587804B2 (en) | Manufacturing method of wiring board for mounting electronic component, wiring board for mounting electronic component, and manufacturing method of wiring board with electronic component | |
| JPH03101194A (en) | Method of connecting multilayer printed interconnection board | |
| JPS60140896A (en) | Circuit board | |
| JPH0360097A (en) | Manufacture of multilayer printed circuit board | |
| JPH0614598B2 (en) | Method for manufacturing multilayer printed circuit board | |
| JPS60140791A (en) | Circuit board | |
| JPS6149499A (en) | Flexible multilayer circuit board | |
| JP2001176921A (en) | Wiring circuit board with bump and its manufacturing method | |
| CN115551190A (en) | Circuit board assembly and manufacturing method thereof | |
| JP2699000B2 (en) | Electrode connection method for multilayer printed circuit board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |