JPH07182249A - Memory card - Google Patents

Abstract

PURPOSE:To provide a memory card capable of transferring continuous data to a memory at a high speed in respect to a memory card for storing continuous data. CONSTITUTION:The memory card includes a memory constituted of a reference memory area having a prescribed memory capacity and a stand-by memory area having a stand-by memory capacity and having normal memory elements capable of normally storing data and defective memory elements disabled to normally store data, an address counter for receiving an address in the reference memory area and then increasing the address in order to store required continuous data in the memory and an address table 3 for inputting an address in the reference memory area which is counted by the counter 2 and specifying a memory element corresponding to the address so as to specify the address concerned when the corresponding memory element is a normal one or specify an address for a memory element in the stand-by memory area substituted for a defective memory element.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory card, and more particularly to a memory card for storing continuous data.

[0002]

2. Description of the Related Art Currently, memory cards having a large capacity memory are provided. In an electronic camera using a semiconductor image pickup device, a memory card is used to store image information. Such an electronic camera has a certain number of pixels (vertical pixel number × horizontal pixel number). The data of such an image has a constant size and is continuous. When the image information is stored in the memory of the memory card, the automatic address increment function is used.

The address auto-increment function is a function of automatically incrementing the address after receiving the designation of the head address of the memory, and is used for sequentially storing a predetermined amount of continuous data.

The memory in the memory card is identified by a physical address. However, not all memory elements are normal, and there are many cases where partially defective memory elements are generated at the time of manufacturing a memory. The presence of a defective memory element causes the continuity of the physical address space of the memory to be lost. That is, it has a discontinuous physical address space in which defective memory elements are skipped.

When continuous data is stored using the automatic address increment function, continuity of physical addresses is a prerequisite. When the physical addresses are discontinuous, it is necessary to specify a new physical address.

For example, there is a method of using a computer for managing defect information of a memory device. The physical address of the defective memory area is stored in another memory, and the computer monitors whether or not the physical address currently being accessed corresponds to the physical address of the defective memory. Then, in order to skip the defective portion at the boundary of the discontinuous address, the data transfer to the memory is once stopped, the address is reset before and after the defective memory element, and the address is designated again. Then, the address is incremented again from there, and the data is transferred.

[0007]

In the conventional memory card, when a defective memory element is present, the defective memory element is skipped by using a computer, so that it is necessary to reset the address. Therefore, the speed of transferring the continuous data to the memory becomes slow.

An object of the present invention is to provide a memory card which can transfer continuous data to a memory at high speed.

[0009]

The memory card of the present invention comprises a standard memory area having a predetermined memory capacity and a spare memory area having a spare memory capacity, and can store data normally. A memory having a memory element and a defective memory element that cannot normally store data, and an address counter that receives an address in the standard memory area and then increments the address in order to store desired continuous data in the memory And the address of the standard memory area counted by the address counter to specify the corresponding memory element. If the corresponding memory element is a normal memory element, the address is specified and the defective memory element is specified. In this case, specify the address of the memory element in the spare memory area that replaces that memory element. And an address table.

[0010]

If the memory element at the address of the standard memory area counted by the address counter is normal, the address is designated, and if it is defective, the address of the memory element in the spare memory area is designated. As a result, the address of a normal memory element can be specified without determining whether the memory element in the standard memory area is normal or defective.

[0011]

1 shows an example of the structure of a memory card according to an embodiment of the present invention. Addressing when storing data in the memory is performed by supplying an address signal to the address register 1. The address signal is supplied to the address register 1 as an 8-bit parallel signal. When the address is designated by the number of bits larger than 8 bits, the 8-bit address signal is supplied to the address register 1 in plural times.

When the 8-bit address signal is supplied to the address register 1, the supplied address signal is stored in the address register 1. Then, 8 bits of the next address signal is supplied to the address register 1, and the address signal is also stored in the address register 1. The address register 1 can store an address signal in units of 1 byte and store an address signal of a plurality of bytes.

When a predetermined number of bytes are stored in the address register 1, the stored address signal is loaded into the address counter 2. This address signal designates the start address in the memory area for storing data.
The start address is a 24-bit address signal A0-23
The address counter 2 outputs three sets of signal lines A0-7, A8-15, A16-23 in byte units. The address signal output from the address counter 2 is represented by 24 bits of A0 to A23, A0 is the least significant bit of the address, and A23 is the most significant bit.

The address signals A8-15 and A16-23 output from the address counter 2 are supplied to the substitution table 3. If the input address signal A8-23 indicates a normal memory area, the substitution table 3 has the same address signal D0 as the address signal A8-23.
Output -15. On the other hand, the input address signal A8
If -23 indicates a defective memory area, the address signal D0-15 of the normal memory area used as a substitute is output to this defective memory area. The substitution table 3 stores the substitution correspondence by using, for example, an EEPROM.

The substitution table 3 is input to O / E (O
Address signal D0-1 according to the DD / EVEN) signal.
5 is output byte by byte. When the O / E signal is set to the high level, the lower address signal D0-7 is output, and the O / E signal is output.
If the signal is set to low level, the upper address signal D8-
15 is output.

From the above, A0-7 and D are sequentially arranged from the lower order.
3 byte address of 0-7 and D8-15 is output,
The address of the memory to be stored is specified. After the address signals A0-7, D0-7, D8-15 are output,
A write signal is supplied to the memory at that address, and the data supplied to the data bus is written in byte units.

After the data is written, the address counter 2 increments the previous address and outputs a new address signal A0-23. The substitution table 3 substitutes an address signal as necessary and writes data in the memory. Thereafter, similar processing is repeated, and the next data is supplied to the data bus and the write signal is supplied until a predetermined number of data is transferred to the memory.

As described above, after the first address is first designated from the address register 1, the address counter 2 increments the address and designates the address for storing the next data. Then, the address signal A0-23 output from the address counter 2 substitutes the address signal in the substitution table 3 if the memory area is defective, and outputs it without substituting the address signal if it is defective. .

FIG. 2 is a timing chart of the address signals D0-15 output from the substitution table. The substitution table outputs a 1-byte address signal D0-7 / D8-15 in synchronization with the O / E signal. High level and low level appear alternately in the O / E signal. The address signals D0-15 are the lower signal D0-7 and the upper signal D.
It is divided into 8-15 and is output one byte at a time. The low-order address signal D0-7 is output in synchronization with the high level of the O / E signal at the first byte of the address signal, and the high-order address signal is synchronized with the low level of the O / E signal in the second byte. D8-15 outputs.

The address signal is output in 2 clocks. If necessary, an address register may be separately provided to store the address signal like the address register 1.

FIG. 3 shows a memory map of the memory card. The addresses in the memory are the address signals A0-7, D
It is specified by 3 bytes of 0-7 and D8-15. Therefore, the maximum address space is 000000h to FFFF.
It has FFh. Here, h indicates hexadecimal display. This address space is divided into blocks and has a memory area of a valid block and a memory area of a reserve block. For example, the address space of the effective block memory is allocated to the lower memory areas 000000h to FFF0FFh, and the address space of the reserved block memory is allocated to the upper memory areas FFF100h to FFFFFFh.

The address signal A0-23 output from the address counter 2 shown in FIG.
It represents the address of the effective block memory of F0FFh. If there is no defective memory element in the memory card,
Since the address signals A0-23 are not replaced, only the memory in the valid block is used.

If a part of the effective block memory is defective, only the address signal A8-23 of the upper 2 bytes of the address signal A0-23 is replaced. Therefore, the addresses A0-7 form one block, and the address signal is replaced in block units. In this embodiment, since a byte write type memory is used, one block has a memory capacity of 256 bytes.

Therefore, the address signal A8-23 is a signal for designating the block number, and the address signal A0-23.
-7 is a signal designating 1 byte out of 256 bytes existing in 1 block.

On the other hand, when the memory element in the effective block is defective, the memory of the reserve block is used instead of the block including the defective element. The substitution table has a function of converting a signal (A8-23) indicating a defective effective block into a signal (D0-15) indicating a normal reserve block.

The memory capacity of the memory card corresponds to the memory capacity of the effective block. The memory of the reserved block is a spare memory area when a valid block has a defect.

FIG. 4 is a chart showing the concept of the substitution table. The substitution table outputs signals D0-15 in response to the input of signal A8-23. In the figure, the input signal A8-23 is divided into the signal A8-15 and the signal A16-23 for displaying the signal in byte units, and the output signal D0-15 is shown.
Are divided into signals D0-7 and D8-15 and displayed.

Input signal A8-23 and output signal D0-15
Is a signal for specifying a block of 256-byte units, and the input signal A15-23 of the substitution table is block numbers 0000h to FFF0h indicating the valid block in FIG.
It is limited to the range of.

FIG. 4A shows an alternative table at the time of initialization. When the alternative table is initialized, the input signal A8-23
Output signal D0-
15 is set. 000 as the input signal A8-23
0h to FFF0h are provided, and output signals D0-15 corresponding thereto are the same as 0000h to FFF0 as the input.
h is set. If 0000h is input to the substitution table, 0000h is output, and if 0001h is input, 0001h is output.

FIG. 4B shows an alternative table when a defective memory exists in the memory card. Input signal A8-
23 is from 0000h to FFF0h. The memory is inspected, and the output signal of the substitution table at the time of initialization shown in FIG. 4A is rewritten if necessary.

First, it is checked whether or not each memory element of the memory of the target memory card is defective. If a defective memory element is found, the block including the defective memory element is determined to be a defective block and the block is not used thereafter.

For example, block number 0001h and number 0
If it is determined that two 003h are defective blocks, the output signals corresponding to these two input signals are rewritten to the block numbers of the reserve blocks. Since the reserved blocks are from block number FFF1h to number FFFFh, they are allocated in order from the smallest block number, for example. Set FFF1h to the output block number corresponding to the input block number 0001h, and input block number 000
Set FFF2h to the output block number corresponding to 3h.

As described above, if the block having the input block number is normal, the substitution table outputs the signal of the designated effective block as it is, and if the block having the input block number is defective, Converts to a normal reserve block signal and outputs it. Therefore, the output signal D0-15 is represented within the range of block numbers 0000h to FFFFh of the effective block and the reserve block.

FIG. 5 shows an example of actually storing the substitution table in the memory. The memory card has an effective block and a reserve block as described above. The effective block is
It has block numbers 0 to XXX, and the rest are reserved blocks.

The substitute table is from 0000h to ZZZZ.
The address is set up to + 1h. Address 00
Correspondence between input and output blocks is set from 00h to YYYY + 1h, and addresses YYYY + 2h to ZZZ
The usage status of the reserve block is set to Z + 1.

The substitute block number of block number 0 is
It is stored at addresses 0000h to 0001h. if,
If the block with the block number 0 is normal, 0000h indicating the block number 0 is stored.

Since the memory is a byte write type, the data 00h is written at the address 0000h and the data 00h is written at the address 0001h. A 2-byte address is used for setting one block.

Similarly, the substitution destination block number of the block number 1 is stored in the addresses 0002h to 0003h, the substitution destination block number of the block number 2 is stored in the addresses 0004h to 0005h, and the final effective block number XXXX is stored. The alternative block number is the address YY
It is stored in YYh to YYYY + 1h.

The alternative block number is stored in an address having a value twice the original block number. For example, the replacement destination block number of block number 1 is stored at address 0002h, and the replacement destination block number of block number 2 is stored at address 0004h. If the target block number is doubled, the alternative block number can be retrieved.

As the alternative block number, the same block number is stored if the block of the target block number is normal, and the block number of the reserved block is stored if it is defective. The block numbers stored at this time are designated in order from the smallest block number of the reserved blocks. The usage status is stored in an address starting from the address YYYY + 2h. If the reserved block is unused, unused data “FFFFh” is recorded in the address indicating the block number of the reserved block, and if the block is replaced, the replaced data “CCCCh” is stored in the replacement destination block number. Is recorded.

In the memory of the substitution table, the addresses 0000h to YYYY + 1h representing the input signal correspond to the block number of the effective block, and the block number of the substitution destination block is set as the output signal. Address Y
YYY + 2h to ZZZZ + 1h correspond to the block numbers of the reserve blocks, and the usage status of each reserve block is recorded.

FIG. 6 shows an example of setting an alternative table in the memory. Address 0 in alternate table memory
Correspondence between input and output block numbers of the alternative table is set in 00h to 7DFh, and addresses 7E0h to 7
The usage status of the reserve block is recorded in FFh.

FIG. 6A shows the memory contents of the substitution table at the time of initialization. A method of creating a table at initialization will be described. The substitution table is set so that the same block number is output with respect to the input block number. For example, the alternative block number data “0000h” is written to the address 000h indicating the block number 0, and the alternative block number data “0001h” is written to the address 002h indicating the block number 1. The address 7 indicating the last valid block number 1007 (3EFh)
The alternative block number data “03EFh” is written in DEh.

Addresses 7E0h to 7FFh correspond to the block numbers of the reserved blocks, and the usage status of each block is recorded. The block number of the reserved block starts from 3F0h (1008). For example, the usage status of block number 1008 (3F0h) is
Stored in E0h, block number 1009 (3F1h)
The use status of is stored in the address 7E2h. Similarly, the subsequent block number usage status is
It is stored in each of 4h to 7FEh.

At the time of initialization, all the reserved blocks are unused data "F" indicating that they are unused.
FFFh "is recorded. Therefore, the address 7E0 is recorded.
Unused data “FFFFh” is written in all of h to 7FEh.

After initializing the alternative table as described above, it is inspected whether or not there is a defect in the memory element in the memory card. FIG. 6 shows a method of setting an alternative table when a defect of the first memory element is found by inspection.
FIG. 6C shows a method of setting the substitution table shown in FIG. 6B and then when a defect in the second memory element is found.

FIG. 6B shows a block replacement setting method by finding the first defective memory element. An example will be described in which a defect is found in the memory element in the block of block number 3 as a result of the inspection. The block including the defective memory element is replaced with the smallest block number of the unused reserved blocks in the reserved block.

That is, the block number 3 in which the defect is found
At the address 006h indicating
Write F0h (1008). By this setting, the block number 0003h is replaced with the block number 03F0h.

Subsequent block replaced (03F0h)
Change the usage status of. The substitute data “CCCCh” is written in the address 7E0h indicating the block number 03F0h.

FIG. 6C shows a block replacement setting method by finding the second defective memory element. FIG. 6 (B)
As an example, a case will be described in which a defective memory element in the block of block number 1006 (3EEh) is found as a result of the inspection after the replacement table is set as shown in FIG. The block containing the defective memory element is replaced with the smallest block number of the unused reserved blocks.

The usage status is checked in order from the smallest block number in the reserved block. At the address 7E0h indicating the block number 3F0h, the replaced data “CCCC
Since h ”is stored, the next lowest block number is checked. Unused data“ FF ”is stored in block number 3F1h.
Since FFh ″ is stored, this block is replaced.

That is, the block number 3 in which the defect is found
The block number “03” is assigned to the address 7DCh indicating EEh.
Write F1h, which means that the block number "03EEh" was replaced with the block number "03F1h".

Next, the usage status of the replaced block (3F1h) is changed. The substitute data “CCCCh” is written in the address 7E2h indicating the block number 3F1h.

Further, it is inspected whether or not there are any defective memory elements, and all defective memory elements are replaced. However, when the usage statuses of all the reserve blocks have been replaced, the memory card is disabled.

After setting the alternative table, the memory card shown in FIG. 1 is constructed by using the already set alternative table. Since the alternative block for the defective block is set in the alternative table, continuous data such as image information can be transferred to the memory card even if the memory card has a defective memory element. Further, since the alternative table can output the output signals D0-15 in 2 clocks after the address signal is input, continuous data can be transferred to the memory card at high speed.

In the present embodiment, the memory card having the configuration in which the alternative table is set at the time of manufacturing the memory card and is not changed thereafter has been described. However, by providing a device for rewriting the alternative table, a defect is always caused by user's designation. It is also possible to inspect the memory element and rewrite the alternative table.

Further, one block for substitution is a unit of 256 bytes shown by the address signal A0-7,
A memory capacity of less than or more than that may be set as one block unit.

The present invention has been described above with reference to the embodiments.
The present invention is not limited to these. For example, it will be apparent to those skilled in the art that various changes, improvements, combinations, and the like can be made.

[0059]

The defective memory element is replaced with the memory element in the spare memory area without judging whether the memory element at the address of the standard memory area counted by the address counter is normal or defective. Since the address can be specified by using the address, continuous data can be transferred to the memory card at high speed.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration example of a memory card according to an embodiment of the present invention.

FIG. 2 is a timing chart of address signals output from a substitution table.

FIG. 3 is a memory map of a memory card.

FIG. 4 is a chart showing a concept of an alternative table. Figure 4
(A) is a diagram of an alternative table at the time of initialization, and FIG.
(B) is a diagram of a substitute table when a defective memory exists in the memory card.

FIG. 5 is a memory map of a memory that stores an alternative table.

FIG. 6 shows an example of setting an alternative table in a memory. 6A is a chart showing the memory contents of the substitution table at the time of initialization, and FIG. 6B is a chart showing a block substitution setting method by finding the first defective memory element. (C) is a chart showing a block replacement setting method by finding a second defective memory element.

[Explanation of symbols]

 1 Address register 2 Address counter 3 Alternative table

Claims (1)

[Claims] 1. A standard memory area having a predetermined memory capacity and a spare memory area having a spare memory capacity are configured, and a normal memory element capable of storing data normally and a data storing area can be stored normally. A memory having a defective memory element that cannot be stored; an address counter (2) that receives an address in the standard memory area and then increments the address in order to store desired continuous data in the memory; A table for inputting an address of the standard memory area and designating a corresponding memory element, wherein the address is designated when the corresponding memory element is a normal memory element, and the memory is designated when the memory element is a defective memory element. Address table that specifies the address of the memory device in the spare memory area that replaces the device (3) and a memory card with.