JPH07176185A - Control device for refreshing - Google Patents

Abstract

PURPOSE:To guarantee normal memory access and to reduce power consumption by referring to stored parameters of temperature characteristic to a standard value in accordance with measured ambient temperature and correcting and adjusting a refreshing interval time of a DRAM. CONSTITUTION:A sensor 15 and a temperature measuring circuit 16 measure ambient temperature of a D-RAM3, parameters of a temperature characteristic to a standard value of a refreshing interval time (Rt) are stored in a storage element 20. First, Rt corresponding to the present temperature measured by the circuit 16 is set to a variable timer 21 referring to the characteristic stored in the element 20, a memory test of the RAM 3 is performed by a CPU1. Consequently, when operation is normal, it is judged that an actual value is longer than the present Rt, the present Rt+alpha is set to the timer 21 again, and test is performed again. When operation becomes abnormal during repeating of this operation, the present value -2alpha of the timer 21 is set again. Thereby, Rt is corrected in accordance with ambient temperature, normal memory access is guaranteed, and power consumption can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dynamic random access memory (D-RAM) for a portable computer or the like.
And a refresh control device for a D-RAM in a device driven by a power supply from a battery.

[0002]

2. Description of the Related Art FIG. 5 is a block diagram for explaining the configuration of a computer system including a D-RAM refresh control device of this type, in which a CPU 1 accesses a D-RAM 3 via a D-RAM controller 2. Corresponding to. The configuration and operation will be described below.

The CPU 1 supplies an address that the D-RAM controller 2 wants to access to the address bus 5,
Further, a command signal 7 for instructing write or read is output, and as a result, target data is exchanged via the bidirectional data bus 6.

On the other hand, the D-RAM controller 2 to which such a request is issued from the CPU 1 is its constituent element, D
-In the RAM access control device 4, the address supplied from the CPU 1 is converted into a ROW / COLUMN address and output to the address bus 8 of the D-RAM 3, and C
The command signal 7 output from the PU 1 is converted into a command signal 10 in a format that the D-RAM 3 can accept, and further, the data bus 9 of the D-RAM 3 is buffered and the direction is controlled. Control data exchange.

The D-RAM controller 2 is the above-mentioned C
In parallel with the control of data exchange between PU1 and D-RAM3, the D-RAM3 is refreshed to the CPU1 at the timing specified by the built-in timer 12 etc. in the D-RAM refresh control device 11 which is its constituent element. During execution, the HOLD (bus release request) signal 13 is output to prohibit access to the D-RAM 3,
The CPU 1 accepts it and outputs the refresh command signal 14 to the D-RAM 3.

As a standard for refreshing a D-RAM to which the present invention is applied, there is a definition of a refresh interval time under the worst use condition of the D-RAM, and the D-RA within the refresh interval time is defined.
More refresh cycles than the number of M LOW addresses must be performed.

Therefore, in the conventional D-RAM refresh control device 11, the D-R is controlled so that the simplest control can be performed.
It has a timer 12 for generating a timeout more than the number of LOW addresses within the refresh interval time defined by the standard relating to the refresh of AM3, and at the timing of the timeout of this timer 12, the CPU1 is held.
A HOLD signal 13 indicating a request is issued, the CPU 1 accepts the request, and the D-RAM 3 receives the CAS.
BEFORE RAS refresh command signal 1
A method in which 4 is output and a refresh cycle is executed was common.

[0008]

However, it has become necessary to further reduce the power consumption of the D-RAM in the recent battery-operated devices which are required to be miniaturized.
In particular, in the suspend state of the device having the suspend-resume function, the power for holding the contents of the D-RAM has come to account for 50% or more of the whole. In addition, D-RA in this suspended state
Most of the power for holding the contents of M is the power consumed in the refresh cycle when refreshing is performed.

Therefore, if the number of refresh cycles per unit time can be reduced, that is, the refresh interval time can be lengthened, the power consumption of the device can be reduced.

However, as described above, the refresh interval time is defined by the D-RAM standard, and conventionally, refresh is performed at an interval equal to or less than the interval defined by the standard.

Further, in recent electronic devices, since the D-RAM is modularized and has a replaceable structure, various types (temperature characteristics and standard values of refresh interval time) of the D-RAM are mounted. Because the possibility came out,
There are problems such as a situation in which such standards cannot be flexibly dealt with.

The present invention has been made to solve the above problems, and measures the operating environment temperature of the dynamic RAM and variably adjusts the refresh timing with reference to the standard refresh interval time. An object of the present invention is to provide a refresh control device capable of significantly saving power consumption and guaranteeing normal memory access.

[0013]

A refresh control device according to the present invention stores ambient temperature measuring means for measuring an ambient temperature of a dynamic RAM, and parameters and standard values of temperature characteristics of refresh interval time of the dynamic RAM. Storage means and refresh interval adjusting means for correcting and adjusting the refresh interval time of the dynamic RAM by referring to the temperature characteristic parameter with respect to the standard value according to the ambient temperature measured by the ambient temperature measuring means Is.

The refresh interval adjusting means is CP
It is configured such that the fresh interval time corrected by executing command access with U can be adjusted.

[0015]

In the present invention, the refresh controller is
According to the ambient temperature measured by the ambient temperature measuring means, the refresh interval adjusting means refers to the temperature characteristic parameter with respect to the stored standard value to correct and adjust the refresh interval time of the dynamic RAM to correspond to the ambient temperature. Even if the refresh interval of the dynamic RAM is varied, normal memory access is guaranteed and power consumption is significantly reduced.

The refresh interval adjusting means is CP
Exchangeable dynamic R with adjustable fresh interval time by executing command access with U
The refresh interval time is flexibly adjusted and adjusted according to AM.

[0017]

【Example】

[First Embodiment] FIG. 1 is a block diagram showing the configuration of a refresh control device according to a first embodiment of the present invention. The same parts as those in FIG. 5 are designated by the same reference numerals.

In the figure, 15 is a sensor arranged around the D-RAM 3 to obtain information on the ambient temperature of the D-RAM 3, and 16 is information which can be understood by a refresh interval adjusting means 12 which will be described later. A temperature measuring circuit for converting into temperature information, and 17 is an ambient temperature measuring means composed of the sensor 15 and the temperature measuring circuit 16.

Reference numeral 12 is a refresh interval adjusting means, which is a storage element 20 for storing temperature characteristic parameters and standard values of the refresh interval time of the D-RAM 3 and a variable timer 2.
1, the temperature information 18 from the ambient temperature measuring means 17 can be used to correct the temperature of the refresh interval time, and the number of LOW addresses of the D-RAM 3 can be corrected within the corrected refresh interval time. Output a HOLD (bus release request) signal 13 to the CPU 1 at time-out, and the CPU 1 accepts it and D-RA
The CAS BEFORE RAS refresh command signal 14 is output to M3.

FIG. 2 shows the ambient temperature Ta of this type of D-RAM.
FIG. 6 is a characteristic diagram showing a relationship between (° C.) and refresh interval time t _REF (mS).

As shown in this figure, temperature characteristics C1 to C3
The fact that there are three types of characteristics as described above indicates variations among IC chips of the D-RAM.

In contrast to such characteristics, the refresh interval time defined by the D-RAM standard shows characteristics such as the standard value C4. This is the temperature characteristics C1 to C described above.
This is because it is determined by giving the margin to the worst use condition (70 ° C. is generally used for the ambient temperature), that is, the value at 70 ° C. for the characteristics of the D-RAM as shown in FIG. Considering the temperature characteristic of the D-RAM as described above, the characteristic may be defined by the virtual characteristic C5.

Therefore, when the refresh is performed at the refresh interval time defined by the D-RAM standard as in the conventional D-RAM refresh control device, at the room temperature (20 ° C.), the actually required interval is maintained. This means that refresh is performed at intervals of 1/10 or less.

That is, it means that 10 times or more the electric power actually used is used. At low temperature (0 ° C.), it means that the electric power used is almost 100 times higher.

Therefore, the refresh control device according to the present invention has the ambient temperature measuring means 17 for measuring the ambient temperature of the D-RAM 3, and stores the parameter and standard value of the temperature characteristic of the refresh interval time of the D-RAM 3. 2, the refresh interval adjusting unit 12 corrects the temperature by referring to the temperature characteristic parameter with respect to the standard value according to the ambient temperature measured by the ambient temperature measuring unit 17, and thus the virtual temperature in FIG. It is possible to create a characteristic as shown in the characteristic C5, and to satisfy the value, the above D
By adjusting the refresh interval time of the RAM 3, it is possible to perform refresh at an optimum interval according to the ambient temperature of the D-RAM 3.

Further, the temperature specifying parameter, standard value, etc. are set to R
When the D-RAM module is replaced, the storage element or the contents thereof, or a table address indicating one of the plurality of contents is also replaced at the same time when the D-RAM module is replaced. Thus, various types of D-RAM can be supported.

Specifically, the refresh interval adjusting means 1
2, the parameters of the temperature characteristics C1 to C3 (see FIG. 2) of the refresh interval time of the D-RAM 3 and the standard value C4 or the refresh interval time t ₁ can be stored. Temperature correction is performed using a temperature characteristic parameter with respect to the standard value according to the measured ambient temperature, for example, the characteristic C2 in FIG. 2 is set to the standard value at the temperature Ta = 70 ° C. in the direction in which the axis value of the refresh interval time t _REF becomes smaller. It is possible to perform a calculation such that the parallel movement is performed until it intersects with C4.

That is, the virtual characteristic C5 shown in FIG. 2, or if it is difficult, the approximate virtual characteristic C6 at intervals of 10 ° C. can be created.

The virtual characteristic C at the temperature at that time
Set a variable timer with a built-in refresh interval time that conforms to 5. This variable timer controls the D-RAM 3 which is controlled within the set refresh interval time.
Generate a timeout for the number of LOW addresses.

Then, at the timing of the time-out, the CPU 1 receives the D-RAM 3 during the refresh cycle.
A HOLD (bus release request) signal 13 is output to prohibit access to the CPU, and the CPU 1 accepts it and the CAS BEFORE R to the D-RAM.
AS refresh command signal 14 is output and DR
Make AM3 perform a refresh cycle.

By repeating the above operation, this DR
The AM refresh control device can perform the required refresh of the D-RAM 3 at variable intervals optimal for the measured temperature environment, and can continue to hold the content (data) of the D-RAM.

According to the first embodiment, the power consumption associated with refreshing can be reduced to about 1/10 at the temperature (20 to 25 ° C.) at which the device using the D-RAM is normally used. Particularly, in the conventional portable electronic device having the suspend-resume function, considering that more than half of the power consumption at the time of suspend is used for holding the contents of the D-RAM, the present invention is adopted. Then, the power consumption during suspension can be reduced to about half.

D-RA during suspend at low temperature
Since the power consumption can be reduced to a negligible level because the content of M is retained, the drawback of the Ni-Cd battery, which is often used as a power source for portable electronic devices, at the time of low temperature is considerably reduced. It is possible to expect such a device to have a great effect.

In addition, the D-RAM is a D-RAM module in which the temperature characteristic and the standard value of the refresh interval time of the D-RAM are different when the D-RAM is modularized and is replaced or added to repair or add memory. Also, this can be dealt with only by changing the parameter stored in the refresh interval adjusting means. [Second Embodiment] D-RA shipped from the manufacturer
M3 is the actual required refresh interval time,
There are considerable variations as shown by the temperature characteristics C1 to C3 in FIG. The refresh interval time specified by the D-RAM standard is specified with a margin of about 10 times or more with respect to the lower limit of the variation.

Further, D- near the upper limit of the variation
There is a margin of about 100 times that for RAM.

Therefore, it will be considered to effectively utilize the actual value of the D-RAM. Therefore, the refresh interval adjusting means 12 described in the first embodiment is used to read the value at each temperature of the virtual characteristic C5 created by the refresh interval adjusting means 12, to read an arbitrary value to the variable timer, and to use the variable timer. CPU that can set any value to
The function is expanded so that access from 1 can be accepted.

FIG. 3 is a block diagram showing the structure of a refresh control device according to the second embodiment of the present invention. The same parts as those in FIG. 1 are designated by the same reference numerals.

In the figure, reference numeral 12A is a refresh interval adjusting means whose function is expanded, and 19 is an I / O for the CPU 1 to access the refresh interval adjusting means 12A.
It is a command signal. Other than that, it is exactly the same as that of FIG. 1, and since it has been described in the first embodiment, the description thereof is omitted.

In the refresh controller thus constructed, the CPU 1 is a ROM (which can execute a program even if the D-RAM is not normally accessed) at the time of factory initialization or system initialization at power-on. A determination process of the ability value of the ability refresh interval time, that is, the ability refresh interval time as shown in the flowchart of FIG.

FIG. 4 is a flow chart showing an example of the procedure of the ability refresh interval time determination processing in the refresh control device according to the present invention. Note that (1) to (5) indicate each step.

In order to make the explanation easy to understand, it is assumed that the current ambient temperature of the D-RAM is 20 ° C.
It is assumed that a D-RAM having the same characteristics as those described in the embodiment is used.

First, in step (1), a basic refresh interval time, that is, a virtual characteristic diagram (see FIG. 2).
The value (t _{6 in} FIG. 2) corresponding to 20 ° C. of C5) is set in the variable timer 21. Next, in step (2), a memory test is performed to confirm whether this D-RAM can operate normally within the currently set refresh interval time. If the result is normal in step (3), it can be determined that the ability value is longer than the currently set refresh interval time, so step (4)
Go to. In step (4), the value currently set in the variable timer is read in order to set a refresh interval time slightly longer than the value currently set in the variable timer, and then an appropriate increment value α is added to it. Write things back to the variable timer. After that, the process returns to step (2), the memory test is performed again, and the result is judged in step (3).

When the above steps (2) to (4) are repeated and an abnormal result is obtained in step (3),
Since it can be determined that the value of the variable timer at that time (refresh interval time t _{9 in} FIG. 2) exceeds the actual value, in step (5), 2α (execution value) is taken into consideration from the value of the variable timer at that time. The value obtained by subtracting (-α) is set in the variable timer as the actual refresh interval time value (refresh interval time t _{8 in} FIG. 2). Then, the ability refresh interval time determination program is ended.

In this way, the D-
The refresh interval adjusting means 12A in which the current temperature of the RAM 3, that is, the actual refresh interval time of 20 ° C. (t _{8 in} FIG. 2) is set, is the same as the refresh interval adjusting means 12 described in the first embodiment. Temperature measuring means 1
Based on the temperature information from 7, it is possible to perform temperature correction at each other temperature for the actual refresh interval time of 20 ° C. Therefore, it is possible to create an actual characteristic as shown by an actual characteristic C7 shown in FIG. Therefore, the D-RAM 3 can be refreshed at the refresh interval time corresponding to the ability characteristic. In this way, the refresh interval adjusting means 12A can variably adjust the fresh interval time corrected by executing the command access with the CPU 1, and flexibly adjust and adjust the refresh interval time corresponding to the replaceable dynamic RAM. can do.

Therefore, it is possible to variably set the refresh interval time which is 10 times or more longer than the effect of the first embodiment.

According to the second embodiment, the power consumption can be further reduced as compared with the first embodiment. Therefore, the contents are held by a small backup battery such as a C-MOS RAM. It is very convenient because you can do it.

Even if it is necessary to replace the storage element such as the ROM in order to change the parameters or the like stored in the refresh interval adjusting means, the data can be exchanged with the CPU. Since an electrically rewritable storage element (EEPROM) can be used to change the contents (parameters and the like described above) from the CPU, an effect that replacement work is unnecessary can be expected.

[0048]

As described above, according to the present invention,
The refresh interval adjusting unit corrects and adjusts the refresh interval time of the dynamic RAM with reference to the temperature characteristic parameter with respect to the stored standard value according to the ambient temperature measured by the ambient temperature measuring unit. Even if the refresh interval of the dynamic RAM is changed, it is possible to significantly reduce power consumption while ensuring normal memory access.

The refresh interval adjusting means is CP
Exchangeable dynamic R with adjustable fresh interval time by executing command access with U
The refresh interval time can be flexibly adjusted and adjusted according to AM.

Therefore, there is an excellent effect that power consumption is greatly saved and normal memory access can be guaranteed.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a refresh control device showing a first embodiment of the present invention.

FIG. 2 is a characteristic diagram showing the relationship between the ambient temperature and the refresh interval time of this type of D-RAM.

FIG. 3 is a block diagram showing a configuration of a refresh control device showing a second embodiment of the present invention.

FIG. 4 is a flow chart showing an example of an ability refresh interval time determination processing procedure in the refresh control device according to the present invention.

FIG. 5 is a block diagram illustrating a configuration of a computer system including a D-RAM refresh control device of this type.

[Explanation of symbols]

 1 CPU 2 D-RAM controller 3 D-RAM 4 D-RAM access control device 11 D-RAM refresh control device 12 refresh interval adjusting means 15 sensor 16 temperature measuring circuit 17 ambient temperature measuring means 20 storage element 21 variable timer

Claims (2)

[Claims] 1. An ambient temperature measuring means for measuring an ambient temperature of a dynamic RAM, a storage means for storing a temperature characteristic parameter and a standard value of a refresh interval time of the dynamic RAM, and an ambient temperature measuring means. A refresh control device comprising: refresh interval adjusting means for correcting and adjusting a refresh interval time of the dynamic RAM by referring to the temperature characteristic parameter with respect to the standard value according to an ambient temperature. 2. The refresh interval adjusting means is configured to adjust the fresh interval time corrected by executing command access with the CPU.
The refresh control device described.