JPH07163154A - Snubber energy regenerating circuit - Google Patents

Snubber energy regenerating circuit

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Publication number
JPH07163154A
JPH07163154A JP5301490A JP30149093A JPH07163154A JP H07163154 A JPH07163154 A JP H07163154A JP 5301490 A JP5301490 A JP 5301490A JP 30149093 A JP30149093 A JP 30149093A JP H07163154 A JPH07163154 A JP H07163154A
Authority
JP
Japan
Prior art keywords
terminal
diode
unit circuit
snubber
stack
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5301490A
Other languages
Japanese (ja)
Other versions
JP3181453B2 (en
Inventor
Yukinori Tsuruta
幸憲 弦田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP30149093A priority Critical patent/JP3181453B2/en
Publication of JPH07163154A publication Critical patent/JPH07163154A/en
Application granted granted Critical
Publication of JP3181453B2 publication Critical patent/JP3181453B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Inverter Devices (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To reduce power loss due to switching while enhancing the efficiency by turning an auxiliary switch in a regenerative chopper circuit ON to transfer the snubber energy collectively to a reactor and then turning the auxiliary switch OFF to collect the snubber energy to a main circuit. CONSTITUTION:One phase of snubber energy regenerative circuit in an inverter comprises main switches 1U, 1X, feedback diodes 2U, 2X, snubber diodes 3U, 3X, snubber capacitor 4U, 4X, a reactor 5, auxiliary switches 6U, 6X, and diodes 7U, 7X. The auxiliary switches 6U, 6X are turned ON with a short time lag behind the moment of time when the main switch 1U is turned ON to transfer charges from the snubber capacitor 4U to the reactor 5 and then the auxiliary switches 6U, 6X are turned off. The snubber energy stored in the reactor 5 is subsequently returned back to the power supply through the diodes 7U, 7X.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、自己消弧形素子例え
ば、ゲ―トタ―ンオフサイリスタ（ＧＴＯ）を用いた電
力変換器のスナバエネルギー回生回路に関し、特に自己
消弧形素子を少なくとも１個以上直列接続して構成した
電力変換器のスナバエネルギーを主回路へ回生する場合
のスナバエネルギー回生回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a self-extinguishing element, for example, a snubber energy regenerating circuit for a power converter using a gate turn-off thyristor (GTO), and more particularly to at least one self-extinguishing element. The present invention relates to a snubber energy regenerating circuit for regenerating the snubber energy of a power converter configured by connecting more than one in series to a main circuit.

【０００２】[0002]

【従来の技術】ＧＴＯを使用する変換装置においては、
装置が高耐圧化した場合、ＧＴＯ素子を複数個直列接続
して構成する。ここでは、一例としてＧＴＯを４個直列
接続した場合の従来回路を例にあげて説明する。2. Description of the Related Art In a conversion device using GTO,
When the device has a high breakdown voltage, it is configured by connecting a plurality of GTO elements in series. Here, as an example, a conventional circuit in which four GTOs are connected in series will be described as an example.

【０００３】図１４に従来より用いられているＧＴＯを
直列接続して構成した電力変換装置の一例を示すもので
ある。説明の都合上、ＧＴＯ素子の両端に設けられる分
圧抵抗、ゲ―ト回路、ゲ―ト電源トランス等の付属回路
は省略している。図には３相ブリッジ結線として使用さ
れる電力変換装置の正側ア―ムと負側の一部の構成を示
しており、例えばＧＴＯスタック３０はＵ相、ＧＴＯス
タック４０はＸ相に相当する。FIG. 14 shows an example of a power conversion device configured by connecting GTOs that have been conventionally used in series. For convenience of explanation, auxiliary circuits such as a voltage dividing resistor, a gate circuit, and a gate power transformer provided at both ends of the GTO element are omitted. The figure shows a part of the positive side arm and negative side of the power converter used as a three-phase bridge connection. For example, the GTO stack 30 corresponds to the U phase and the GTO stack 40 corresponds to the X phase. .

【０００４】Ｐは直流主回路の正極端子、Ｎは直流負極
端子であり、ＡＣは交流出力を導出する交流端子であ
る。３１Ｌ，４１Ｌはアノ―ドリアクトルである。ＧＴ
Ｏスタック３０はＧＴＯ３１〜３４，フィ―ドバックダ
イオ―ド３１Ｆ〜３４Ｆ，スナバ回路より構成される。P is a positive electrode terminal of the DC main circuit, N is a DC negative electrode terminal, and AC is an AC terminal for deriving an AC output. 31L and 41L are anodriactors. GT
The O stack 30 is composed of GTOs 31 to 34, feedback diodes 31F to 34F, and a snubber circuit.

【０００５】同様に、ＧＴＯスタック４０はＧＴＯ４１
〜４４、フィ―ドバックダイオ―ド４１Ｆ〜４４Ｆ，ス
ナバ回路より構成される。ＧＴＯ素子を使用する際は、
ＧＴＯ素子の両端に加わる過電圧を防止するために、ス
ナバ回路を設ける。スナバ回路は、スナバコンデンサ３
１Ｃ〜３４Ｃ、４１Ｃ〜４４Ｃ，スナバダイオ―ド３１
Ｄ〜３４Ｄ，４１Ｄ〜４４Ｄ、抵抗３１Ｒ〜３４Ｒ，４
１Ｒ〜４４Ｒから成り立っており、各々のＧＴＯ３１〜
３４、ＧＴＯ４１〜４４、に順方向の急峻な電圧（ｄｖ
／ｄｔ）が印加されると、スナバコンデンサ３１Ｃ〜３
４Ｃとスナバダイオ―ド３１Ｄ〜３４Ｄおよびスナバコ
ンデンサ４１Ｃ〜４４Ｃとスナバダイオ―ド４１Ｄ〜４
４Ｄからなる直列回路で緩和する。抵抗３１Ｒ〜３４
Ｒ，４１Ｒ〜４４ＲはＧＴＯ３１〜３４およびＧＴＯ４
１〜４４がオンする瞬間にスナバコンデンサ３１Ｃ〜３
４Ｃおよびスナバコンデンサ４１Ｃ〜４４Ｃからの放電
電流を抑制するために設けられている。Similarly, the GTO stack 40 is a GTO 41
.About.44, feedback back diodes 41F to 44F, and a snubber circuit. When using the GTO element,
A snubber circuit is provided to prevent overvoltage applied to both ends of the GTO element. The snubber circuit is a snubber capacitor 3.
1C to 34C, 41C to 44C, snubber diode 31
D to 34D, 41D to 44D, resistors 31R to 34R, 4
1R to 44R, and each GTO 31 to
34, GTO 41-44, a steep forward voltage (dv
/ Dt) is applied, snubber capacitors 31C-3C
4C and snubber diodes 31D to 34D, snubber capacitors 41C to 44C and snubber diodes 41D to 4D
Relax with a 4D series circuit. Resistance 31R-34
R, 41R to 44R are GTO31 to 34 and GTO4
Snubber capacitors 31C to 3 at the moment when 1 to 44 turn on
4C and snubber capacitors 41C to 44C are provided to suppress discharge current.

【０００６】このように構成された従来例において、近
年、スナバエネルギー回生回路の必要性が論じられてき
ているのは、下記の理由に基づいている。ＧＴＯ素子は
通電電流をオンオフする度にスイッチングによる電力損
失が発生し同時にスナバ回路に電力損失が発生する。こ
れらの電力損失はＰＷＭ制御の変調周波数が高くなると
大きな電力損失となって、運転効率を低下させる。The reason why the necessity of the snubber energy regenerating circuit has been recently discussed in the conventional example configured as described above is based on the following reason. The GTO element causes power loss due to switching each time the energization current is turned on and off, and at the same time, power loss occurs in the snubber circuit. These power losses become large when the modulation frequency of the PWM control becomes high, and the operating efficiency is reduced.

【０００７】さらに、ＧＴＯ素子も大容量化の方向にあ
り、タ―ンオフ時の遮断耐量を確保する上で、大容量の
スナバコンデンサが必要となり、スナバ損失が増加して
しまう。例えば、１４００Ａ級ＧＴＯではスナバコンデ
ンサＣＳ＝２μＦ、１５００Ａ級ではＣＳ＝３μＦ、２
０００Ａ級ＧＴＯではＣＳ＝６μＦが標準的に使用され
ている。このような必然性からスナバの熱損失が生じな
いスナバエネルギー回生回路の研究開発が行われてきて
いる。Further, since the GTO element is also in the direction of increasing the capacity, a large capacity snubber capacitor is required in order to secure the breaking resistance during turn-off, and snubber loss increases. For example, snubber capacitor CS = 2μF in 1400A class GTO, CS = 3μF in 1500A class, 2
CS = 6 μF is normally used in the 000A class GTO. Due to such inevitability, research and development of a snubber energy regenerative circuit that does not cause heat loss of the snubber has been conducted.

【０００８】例えば、図１５のようなスナバエネルギー
回生回路（特願昭６３−２５５２０２号公報）が従来よ
り提案されている。整流器２２、リアクトル２３、フィ
ルタコンデンサ２４，２４ａは直流主回路を構成し、イ
ンバ―タ部はＧＴＯ２７ａ、２７、ダイオ―ド２８ａ、
２８、スナバコンデンサ２９ａ、２９、スナバダイオ―
ド２０ａ、２０より構成され、スナバエネルギー回生部
はリアクトル２５ａ、２５、サイリスタ２６ａ、２６よ
り構成されている。For example, a snubber energy regenerating circuit as shown in FIG. 15 (Japanese Patent Application No. 63-255202) has been conventionally proposed. The rectifier 22, the reactor 23, and the filter capacitors 24 and 24a constitute a DC main circuit, and the inverter section includes the GTOs 27a and 27, the diode 28a,
28, snubber capacitors 29a, 29, snubber diode
The snubber energy regenerating unit is composed of reactors 25a and 25 and thyristors 26a and 26.

【０００９】図１５の従来例では、スナバコンデンサ２
９ａのエネルギーはコンデンサ２４ａへリアクトル２５
ａ、ＧＴＯ２７ａと同期し付勢されるサイリスタ２６ａ
を介し回生される。同様に、スナバコンデンサ２９のエ
ネルギーはコンデンサ２４へリアクトル２５、ＧＴＯ２
７と同期し付勢されるサイリスタ２６を介し回生され
る。各スナバコンデンサ２９，２９ａの電圧は、直流電
圧の１／２の電圧源に対し、共振現象により完全に放電
するので、スナバエネルギーは完全に電源へ回生され、
大幅にスナバ損失が低減することは明かである。In the conventional example of FIG. 15, the snubber capacitor 2
The energy of 9a is transferred to the condenser 24a and the reactor 25.
a, a thyristor 26a energized in synchronization with the GTO 27a
Is regenerated through. Similarly, the energy of the snubber capacitor 29 is transferred to the capacitor 24, reactor 25, GTO2.
It is regenerated through a thyristor 26 which is energized in synchronism with 7. Since the voltage of each snubber capacitor 29, 29a is completely discharged to the voltage source of 1/2 of the DC voltage by the resonance phenomenon, the snubber energy is completely regenerated to the power source,
It is clear that snubber loss is significantly reduced.

【００１０】[0010]

【発明が解決しようとする課題】しかし、このように構
成した従来のスナバエネルギー回生回路においてもまだ
下記のような問題点があった。 （１）図１５に示す従来例はＧＴＯ素子１個のスナバエ
ネルギーを回生する１段構成であり、ＧＴＯ素子が複数
個直列接続となった場合の多段スナバエネルギー回生回
路についてはまだ製品開発がされていない。However, the conventional snubber energy regenerative circuit thus constructed still has the following problems. (1) The conventional example shown in FIG. 15 has a one-stage configuration that regenerates the snubber energy of one GTO element, and a product development has not yet been made for a multi-stage snubber energy regeneration circuit when a plurality of GTO elements are connected in series. Not not.

【００１１】（２）直列接続したコンデンサ２４、２４
ａ各々を１／２電圧源として回生しているので、主回路
の変動等によるスナバコンデンサ２９、２９ａの電圧が
アンバランスになった場合、コンデンサ２４と２４ａの
接続点の電位である中点電位か変動してしまうおそれが
あり、この変動を抑えるには、コンデンサ容量を大きく
する必要があり、装置を小型化する上で妨げとなる。(2) Series-connected capacitors 24, 24
Since each a is regenerated as a 1/2 voltage source, when the voltages of the snubber capacitors 29, 29a become unbalanced due to fluctuations in the main circuit, etc., the midpoint potential which is the potential at the connection point between the capacitors 24 and 24a. There is a possibility that the fluctuation may occur, and in order to suppress this fluctuation, it is necessary to increase the capacitor capacity, which hinders the miniaturization of the device.

【００１２】本発明の目的は、自己消弧形素子が少なく
とも１個以上直列接続した電力変換装置において、スナ
バエネルギーを主回路へ回生し、スイッチングに伴う電
力損失を低減するとともに、装置効率の向上を可能とす
る有効なスナバエネルギー回生回路を提供することにあ
る。It is an object of the present invention to regenerate snubber energy to a main circuit in a power converter in which at least one self-extinguishing element is connected in series to reduce power loss accompanying switching and improve device efficiency. It is to provide an effective snubber energy regeneration circuit that enables the above.

【００１３】[0013]

【課題を解決するための手段】前記目的を達成するため
に、請求項１に対応する発明は、各スナバ回路の放電回
路を構成し、回生チョッパ回路の補助スイッチをオン
し、リアクトルにスナバエネルギーを一括して移した上
で、前記補助スイッチをオフし、直流コンデンサに前記
リアクトルのエネルギーを移すことによりスナバエネル
ギーを主回路へ回生するよう作用するスナバエネルギー
回生回路を構成したものである。In order to achieve the above object, the invention according to claim 1 constitutes a discharge circuit of each snubber circuit, turns on an auxiliary switch of a regenerative chopper circuit, and snubber energy to a reactor. After collectively transferring the energy, the auxiliary switch is turned off, and the energy of the reactor is transferred to the DC capacitor, thereby forming a snubber energy regeneration circuit that acts to regenerate the snubber energy to the main circuit.

【００１４】[0014]

【作用】請求項１に対応する発明によれば、少なくとも
１個以上の自己消弧形素子のスナバエネルギーを一括し
て主回路への完全回生が可能となり、変換装置の効率向
上が期待でき、さらに、回生チョッパは簡便な回路で構
成でき、主自己消弧形素子と同期して付勢すればよいの
で複雑な制御を必要とせず、スナバ回生回路部の信頼性
も向上する。According to the invention corresponding to claim 1, the snubber energy of at least one self-arc-extinguishing element can be collectively regenerated into the main circuit, and the efficiency of the converter can be expected to be improved. Further, since the regenerative chopper can be configured by a simple circuit, and it suffices to energize in synchronization with the main self-extinguishing type element, complicated control is not required and the reliability of the snubber regenerative circuit section is improved.

【００１５】[0015]

【実施例】以下、本発明のスナバエネルギー回生回路の
実施例について図面を参照して説明する。図１は、本発
明の第１実施例を示す回路図であり、図１ではインバ―
タの１相分を図示している。これは主スイッチ（ここで
はゲートターンオフサイリスタＧＴＯであるが、これに
限らず何でもよい）１Ｕ，１Ｘ、フィ―ドバックダイオ
―ド２Ｕ，２Ｘ、スナバダイオ―ド３Ｕ，３Ｘ、スナバ
コンデンサ４Ｕ，４Ｘ、リアクトル５、補助スイッチ
（ここではトランジスタであるが、これに限らず何でも
よい）６Ｕ，６Ｘ、ダイオ―ド７Ｕ，７Ｘから構成され
ている。Embodiments of the snubber energy regenerating circuit of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing a first embodiment of the present invention. In FIG.
One phase of the data is shown. This is a main switch (here, it is a gate turn-off thyristor GTO, but it is not limited to this), 1U, 1X, feedback diodes 2U, 2X, snubber diodes 3U, 3X, snubber capacitors 4U, 4X, reactors. 5, an auxiliary switch (a transistor in this case, but not limited to this) 6U, 6X, and a diode 7U, 7X.

【００１６】以下これについて具体的に説明する。第１
の自己消弧形素子１Ｕの陽極に第１のフィ―ドバックダ
イオ―ド２Ｕの陰極と第１のスナバコンデンサ４Ｕの一
端と第１のダイオ―ド７Ｕの陰極を接続した第１の接続
点より直流正極端子Ｐを導出し、第１の自己消弧形素子
１Ｕの陰極に第１のフィ―ドバックダイオ―ド２Ｕの陽
極と第１のスナバダイオ―ド３Ｕの陰極と第２の自己消
弧形素子１Ｘの陽極と第２のフィ―ドバックダイオ―ド
２Ｘの陰極と第２のスナバダイオ―ド３Ｘの陽極を接続
した第２の接続点より、交流端子ＡＣを導出し、第２の
自己消弧形素子１Ｘの陰極に第２のフィ―ドバックダイ
オ―ド２Ｘの陽極と第２のスナバコンデンサ４Ｕの一端
と第２のダイオ―ド７Ｘの陽極を接続した第３の接続点
より直流負極端子Ｎを導出し、第１のスナバコンデンサ
４Ｕの他端と第１のスナバダイオ―ド３Ｕの陽極の第４
の接続点に第１の補助スイッチ６Ｕのエミッタを接続
し、第１のダイオ―ドの陽極に第１のリアクトルの一端
と第１の補助スイッチ６Ｕのコレクタを接続し、第２の
スナバダイオ―ドの陰極と第２のスナバコンデンサの他
端の第５の接続点に第２の補助スイッチ６Ｘのコレクタ
を接続し、第２の補助スイッチ６Ｘのエミッタに第２の
ダイオ―ド７Ｘの陰極と第１のリアクトル５の他端を接
続した構成となっている。This will be specifically described below. First
From the first connection point where the cathode of the first feedback diode 2U, one end of the first snubber capacitor 4U and the cathode of the first diode 7U are connected to the anode of the self-extinguishing element 1U of The DC positive terminal P is led out, and the cathode of the first feedback diode 2U and the cathode of the first snubber diode 3U are connected to the cathode of the first self-arcing type element 1U and the second self-arcing type. AC terminal AC is derived from the second connection point connecting the anode of the element 1X, the cathode of the second feedback diode 2X and the anode of the second snubber diode 3X, and the second self-extinction From the third connection point in which the cathode of the second feedback diode 2X, the one end of the second snubber capacitor 4U and the anode of the second diode 7X are connected to the cathode of the element 1X, the DC negative terminal N From the other end of the first snubber capacitor 4U and the first snubber capacitor 4U Snubber diode - fourth anode de 3U
The emitter of the first auxiliary switch 6U is connected to the connection point of, and one end of the first reactor and the collector of the first auxiliary switch 6U are connected to the anode of the first diode, and the second snubber diode is connected. Of the second auxiliary switch 6X is connected to the fifth connection point of the other end of the second snubber capacitor and the cathode of the second snubber capacitor, and the cathode of the second diode 7X and the cathode of the second auxiliary switch 6X are connected to the emitter of the second auxiliary switch 6X. The other end of the reactor 5 of No. 1 is connected.

【００１７】以下、図２に示した図１の各部動作波形図
を参照しながら、第１実施例の作用効果を説明する。図
２（ａ）は、主スイッチ（ＧＴＯ）１Ｕのゲ―ト電圧
を、（ｂ）は補助スイッチであるトランジスタ６Ｕのベ
―ス信号を、主スイッチ（ｃ）はＧＴＯ１Ｘのゲ―ト電
圧を、（ｄ）は補助スイッチであるトランジスタ６Ｘの
ベ―ス信号を、（ｅ）はスナバコンデンサ４Ｕの電圧
を、（ｆ）はリアクトル５の電流を、（ｇ）は各モ―ド
をそれぞれ示している。The operation and effect of the first embodiment will be described below with reference to the operation waveform charts of the respective parts of FIG. 1 shown in FIG. FIG. 2 (a) shows the gate voltage of the main switch (GTO) 1U, (b) shows the base signal of the transistor 6U which is an auxiliary switch, and the main switch (c) shows the gate voltage of GTO1X. , (D) shows the base signal of the transistor 6X which is an auxiliary switch, (e) shows the voltage of the snubber capacitor 4U, (f) shows the current of the reactor 5, and (g) shows each mode. ing.

【００１８】主スイッチ１Ｕがオンするある時点をｔ0
とする。この時点ではスナバコンデンサ４Ｕはフルに充
電されているものとする。時点ｔ0 よりわずかな時間を
おいて、時点ｔ1 に補助スイッチ６Ｕ，６Ｘをオンさせ
ると、スナバコンデンサ４Ｕの電荷は４Ｕー１Ｕー３Ｘ
ー６Ｘー５ー６Ｕという経路で放電する放電モ―ド
（１）となる。At a certain point of time when the main switch 1U is turned on, t 0
And At this point, the snubber capacitor 4U is assumed to be fully charged. When the auxiliary switches 6U and 6X are turned on at time t 1 after a short time from time t 0, the electric charge of the snubber capacitor 4U is 4U-1U-3X.
It becomes the discharge mode (1) which discharges through the route of -6X-5-6U.

【００１９】スナバコンデンサ４Ｕの電圧が放電完了
し、スナバダイオ―ド３Ｕの順方向電圧の値と等しいわ
ずかな負電圧になる時点ｔ2 より、スナバダイオ―ド３
Ｕがオンし、６Ｕー３Ｕー３Ｘー６Ｘー５ー６Ｕという
経路で還流する還流モ―ド（２）となる。From the time t 2 when the voltage of the snubber capacitor 4U is completely discharged and becomes a slight negative voltage equal to the forward voltage of the snubber diode 3U, the snubber diode 3 is discharged.
When U is turned on, it becomes a reflux mode (2) in which reflux is performed by a route of 6U-3U-3X-6X-5-6U.

【００２０】時点ｔ3 で補助スイッチ６Ｕ，６Ｘをオフ
すると、リアクトル５に蓄えられていたスナバエネルギ
ーは、７ー５ー７Ｕの経路で電源へ回生される回生モー
ド（３）となる。When the auxiliary switches 6U and 6X are turned off at the time point t 3 , the snubber energy stored in the reactor 5 enters the regeneration mode (3) in which the snubber energy is regenerated to the power source through the route 7-5-7U.

【００２１】以上述べた第１実施例は、主スイッチであ
るＧＴＯ素子１個のスナバエネルギーを回生する１段構
成の場合であり、次に、主スイッチであるＧＴＯ素子が
複数個直列接続となった場合の多段スナバエネルギー回
生回路に対する本発明の第２第３の実施例について以下
説明する。The first embodiment described above is a case of a one-stage configuration in which the snubber energy of one GTO element that is the main switch is regenerated, and then a plurality of GTO elements that are the main switch are connected in series. The second and third embodiments of the present invention for the multi-stage snubber energy regenerating circuit in the case of the following are described below.

【００２２】図３は本発明のスナバエネルギー回生回路
の第２実施例を示す回路図であり、これは多段スナバエ
ネルギー回生回路の構成を示している。ここでは、図１
４と同一部分あるいは同相当部分には同一符号を付して
ある。FIG. 3 is a circuit diagram showing a second embodiment of the snubber energy regenerating circuit of the present invention, which shows the configuration of a multi-stage snubber energy regenerating circuit. Here, FIG.
The same reference numerals are given to the same portions as or the same portions as 4.

【００２３】すなわち、複数の自己消弧形素子例えばゲ
ートターンオフサイリスタＧＴＯ３１，３２，３３，３
４、４１，４２，４３，４４を含む第１および第２のス
タック３０、４０と、第１および第２のダイオードスタ
ック７０、８０と、第１および第２のＧＴＯチョッパ５
０、６０からなっている。That is, a plurality of self-extinguishing elements such as gate turn-off thyristors GTO 31, 32, 33, 3
First and second stacks 30, 40 including 4, 41, 42, 43, 44, first and second diode stacks 70, 80, and first and second GTO choppers 5.
It consists of 0 and 60.

【００２４】具体的には、第１のスタック３０は、第１
の自己消弧形素子３１の陽極に第１のフィ―ドバックダ
イオ―ド３１Ｆの陰極および第１のスナバコンデンサ３
１Ｃの一端を接続した接続点を第１の端子Ｔ１とし、第
１の自己消弧形素子３１の陰極に第１のフィ―ドバック
ダイオ―ド３１Ｆの陰極と第１のスナバダイオ―ド３１
Ｄの陰極を接続した接続点を第２の端子Ｔ２とし、第１
のスナバコンデンサ３１Ｃの他端と第１のスナバダイオ
―ド３１Ｄの陽極と第１のダイオ―ド３１Ｓの陰極を接
続し、第１のダイオ―ド３１Ｓの陽極を第３の端子Ｔ３
とした回路を第１の単位回路とし、この第１の単位回路
を少なくとも１個以上ｎ個（ｎは整数であり、ここでは
４）設け、このうち１番目の第１の単位回路の第２の端
子Ｔ２を２番目の第１の単位回路の第１の端子Ｔ１に接
続し、１番目の単位回路の第３の端子Ｔ３に２番目の単
位回路の第３の端子Ｔ３を接続し、２番目の単位回路の
第２の端子Ｔ２を３番目の単位回路の第１の端子Ｔ１に
接続し、２番目の単位回路の第３の端子Ｔ３に第２のダ
イオ―ド３２Ｓの陰極を接続し、３番目の単位回路の第
３の端子Ｔ３に第２のダイオ―ド３２Ｓの陽極を接続
し、以下同様に４番目の第１の単位回路の第１の端子Ｔ
１を（ｎ−１）番目の単位回路の第２の端子Ｔ２に接続
し、ｎ番目の単位回路の第３の端子Ｔ３に前記（ｎ−
１）番目の単位回路の第３の端子Ｔ３に第２のダイオー
ドを接続し、１番目の単位回路の第１の端子Ｔ１を第１
のスタック３０の第１の端子ＳＴ１とし、ｎ番目の単位
回路の第２の端子Ｔ２を第１のスタック３０の第２の端
子ＳＴ２とし、ｎ番目の単位回路の第３の端子を第１の
スタック３０の第３の端子ＳＴ３としている。Specifically, the first stack 30 is
To the anode of the self-extinguishing element 31 and the cathode of the first feedback diode 31F and the first snubber capacitor 3
The connection point to which one end of 1C is connected is the first terminal T1, and the cathode of the first self-extinguishing element 31 is the cathode of the first feedback diode 31F and the first snubber diode 31.
The connection point connecting the cathode of D is the second terminal T2, and the first
The other end of the snubber capacitor 31C, the anode of the first snubber diode 31D, and the cathode of the first diode 31S are connected, and the anode of the first diode 31S is connected to the third terminal T3.
Is used as a first unit circuit, and at least one (n is an integer; here, 4) of this first unit circuit is provided, and the second unit of the first unit circuit is provided. The terminal T2 of the second unit circuit is connected to the first terminal T1 of the second unit circuit, and the third terminal T3 of the second unit circuit is connected to the third terminal T3 of the first unit circuit. The second terminal T2 of the second unit circuit is connected to the first terminal T1 of the third unit circuit, and the cathode of the second diode 32S is connected to the third terminal T3 of the second unit circuit. The anode of the second diode 32S is connected to the third terminal T3 of the third unit circuit, and the same applies to the first terminal T of the fourth first unit circuit.
1 is connected to the second terminal T2 of the (n-1) th unit circuit, and the (n-) is connected to the third terminal T3 of the nth unit circuit.
1) A second diode is connected to the third terminal T3 of the first unit circuit, and the first terminal T1 of the first unit circuit is connected to the first terminal T3.
The first terminal ST1 of the stack 30, the second terminal T2 of the n-th unit circuit is the second terminal ST2 of the first stack 30, and the third terminal of the n-th unit circuit is the first terminal ST1. It is used as the third terminal ST3 of the stack 30.

【００２５】また、第１のスタック３０の第１の端子Ｓ
Ｔ１に第１のアノードリアクトル３１Ｌの一端と第１の
一括スナバコンデンサ３５Ｃの一端を接続し、アノード
リアクトル３１Ｌの他端に直流正極端子Ｐを接続し、第
１の一括スナバコンデンサ３５Ｃの他端を第１のスタッ
クの第３の端子ＳＴ３に接続してある。Also, the first terminal S of the first stack 30 is
One end of the first anode reactor 31L and one end of the first collective snubber capacitor 35C are connected to T1, the DC positive electrode terminal P is connected to the other end of the anode reactor 31L, and the other end of the first collective snubber capacitor 35C is connected. It is connected to the third terminal ST3 of the first stack.

【００２６】第２のスタック４０は、第２の自己消弧形
素子４１の陽極に第２のフィ―ドバックダイオ―ド４１
Ｆの陰極および第２のスナバダイオード４１Ｄの陽極に
接続した接続点を第４の端子Ｔ４とし、第２の自己消弧
形素子４１の陰極に第２のフィ―ドバックダイオ―ド４
１Ｆの陽極と第２のスナバコンデンサ４１Ｃの一端を接
続した接続点を第５の端子Ｔ５とし、第２のスナバコン
デンサ４１Ｃの他端と第２のスナバダイオ―ド４１Ｄの
陰極と第２のダイオ―ド４４Ｓの陽極を接続し、第２の
ダイオ―ド４４Ｓの陽極を第６の端子とした回路を第２
の単位回路としている。The second stack 40 has a second feedback diode 41 on the anode of the second self-extinguishing element 41.
The connection point connected to the cathode of F and the anode of the second snubber diode 41D is designated as the fourth terminal T4, and the cathode of the second self-arc-extinguishing element 41 is provided with the second feedback diode 4
The connection point connecting the anode of 1F and one end of the second snubber capacitor 41C is defined as a fifth terminal T5, and the other end of the second snubber capacitor 41C, the cathode of the second snubber diode 41D and the second diode are connected. A circuit in which the anode of the second diode 44S is connected and the anode of the second diode 44S is the sixth terminal.
And the unit circuit.

【００２７】この第２の単位回路を少なくとも１個以上
ｎ個（ｎは整数であり、ここでは４）設け、このうち１
番目の第２の単位回路の第５の端子Ｔ５を２番目の単位
回路の第４の端子Ｔ４に接続し、１番目の第２の単位回
路の第６の端子Ｔ６に前記２番目の第２の単位回路の第
６の端子Ｔ６を接続し、２番目の第２の単位回路の第５
の端子Ｔ５を３番目の第２の単位回路の第４の端子Ｔ４
に接続し、１番目の第２の単位回路の第６の端子Ｔ６に
第２のダイオ―ド４１Ｓの陰極を接続し、３番目の第２
の単位回路の第６の端子に第２のダイオ―ド４２Ｓの陽
極を接続してある。At least one or more n (n is an integer, here, 4) of the second unit circuits are provided, and one of them is provided.
The fifth terminal T5 of the second unit circuit is connected to the fourth terminal T4 of the second unit circuit, and the second terminal of the second unit circuit is connected to the sixth terminal T6 of the second unit circuit. Connected to the sixth terminal T6 of the unit circuit of
Terminal T5 of the third second unit circuit of the fourth terminal T4
And the cathode of the second diode 41S is connected to the sixth terminal T6 of the first second unit circuit.
The anode of the second diode 42S is connected to the sixth terminal of the unit circuit of FIG.

【００２８】４番目の第２の単位回路の第４の端子Ｔ４
を３番目の第２の単位回路の第５の端子Ｔ５に接続し、
前記４番目の第２の単位回路の第６の端子Ｔ６と３番目
の第２の単位回路の第６の端子Ｔ６の第２のダイオード
４３Ｓの陰極を接続し、１番目の第２の単位回路の第４
の端子Ｔ４を第２のスタック４０の第４の端子ＳＴ４と
し、４番目の第２の単位回路の第５の端子Ｔ５を第２の
スタック４０の第５の端子ＳＴ５とし、１番目の第２の
単位回路の第６の端子Ｔ６を第２のスタック４０の第６
の端子ＳＴ６とし、第１のスタックの第２の端子ＳＴ２
と第２のスタック４０の第４の端子ＳＴ４とを接続し、
この接続点から交流端子ＡＣを導出している。The fourth terminal T4 of the fourth second unit circuit
Is connected to the fifth terminal T5 of the third second unit circuit,
The sixth terminal T6 of the fourth second unit circuit is connected to the cathode of the second diode 43S of the sixth terminal T6 of the third second unit circuit, and the first second unit circuit is connected. The fourth
The terminal T4 of the second stack 40 as the fourth terminal ST4 of the second stack 40 and the fifth terminal T5 of the fourth second unit circuit as the fifth terminal ST5 of the second stack 40. The sixth terminal T6 of the unit circuit of the
Terminal ST6 of the first stack and the second terminal ST2 of the first stack
Is connected to the fourth terminal ST4 of the second stack 40,
The AC terminal AC is derived from this connection point.

【００２９】第２のスタック４０の第５の端子ＳＴ５に
第２のアノ―ドリアクトル４１Ｌの一端と第２の一括ス
ナバコンデンサ４５Ｃの一端を接続し、第２のアノ―ド
リアクトル４１Ｌの他端から直流負極端子Ｎを導出して
いる。One end of the second anode reactor 41L and one end of the second collective snubber capacitor 45C are connected to the fifth terminal ST5 of the second stack 40, and the other end of the second anode reactor 41L is connected. The DC negative electrode terminal N is derived from.

【００３０】第２の一括スナバコンデンサ４５Ｃの他端
を第２のスタックの第６の端子ＳＴ６に、ゲートターン
オフサイリスタ６１〜６８、スナバ６０Ｓ、スナバダイ
オード６１Ｄ、スナバ抵抗６１Ｒ、スナバコンデンサ６
１Ｃからなる第２のＧＴＯチョッパ６０の陽極を接続し
ている。The other end of the second collective snubber capacitor 45C is connected to the sixth terminal ST6 of the second stack, the gate turn-off thyristors 61 to 68, the snubber 60S, the snubber diode 61D, the snubber resistor 61R and the snubber capacitor 6 are connected.
The anode of the second GTO chopper 60 made of 1C is connected.

【００３１】この第２のＧＴＯチョッパ６０の陰極をリ
アクトル９０の一端に接続し、このリアクトル９０の他
端を、ゲートターンオフサイリスタ５１〜５８、スナバ
５０Ｓ、スナバダイオード５１Ｄ、スナバ抵抗５１Ｒ、
スナバコンデンサ５１Ｃからなる第１のＧＴＯチョッパ
５０の陽極に接続している。The cathode of the second GTO chopper 60 is connected to one end of a reactor 90, and the other end of the reactor 90 is connected to the gate turn-off thyristors 51 to 58, snubber 50S, snubber diode 51D, snubber resistor 51R,
It is connected to the anode of the first GTO chopper 50 composed of the snubber capacitor 51C.

【００３２】この第１のＧＴＯチョッパ５０の陰極を第
１のスタックの第３の端子ＳＴ３に接続し、第２のＧＴ
Ｏチョッパ６０の陽極に複数のダイオード７１〜７４、
スナバ７０Ｓ、スナバ抵抗７１Ｒ、スナバコンデンサ７
１Ｃからなる第１のダイオ―ドスタック７０の陽極を接
続し、第２のＧＴＯチョッパ６０の陰極に、複数のダイ
オード８１〜８４、スナバ８０Ｓ、スナバ抵抗８１Ｒ、
スナバコンデンサ８１Ｃからなる第２のダイオ―ドスタ
ック８０の陰極を接続し、第１のダイオ―ドスタック７
０の陰極を前記直流正極端子Ｐに接続し、第２のダイオ
―ドスタック８０の陽極を直流負極端子Ｎに接続してあ
る。The cathode of this first GTO chopper 50 is connected to the third terminal ST3 of the first stack and the second GT is connected.
A plurality of diodes 71 to 74 are attached to the anode of the O chopper 60,
Snubber 70S, snubber resistor 71R, snubber capacitor 7
The anode of the first diode stack 70 composed of 1C is connected, and the plurality of diodes 81 to 84, the snubber 80S, the snubber resistor 81R, and the cathode of the second GTO chopper 60 are connected.
The cathode of the second diode stack 80 composed of the snubber capacitor 81C is connected to the first diode stack 7
The cathode of No. 0 is connected to the DC positive electrode terminal P, and the anode of the second diode stack 80 is connected to the DC negative electrode terminal N.

【００３３】前述のダイオ―ド３１Ｓ〜３６Ｓ、４１Ｓ
〜４６Ｓは、スナバエネルギーを一括して主回路ヘ回生
するため設けられ、またＧＴＯチョッパ５０、６０、リ
アクトル９０、ダイオ―ドスタック７０、８０により回
生チョッパ回路を構成している。さらに、コンデンサ３
５Ｃ、４５Ｃは一括スナバとして作用し、おのおのアノ
―ドリアクトル３１Ｌ、４１Ｌのエネルギーを吸収す
る。The above-mentioned diodes 31S to 36S, 41S
46S are provided in order to regenerate the snubber energy to the main circuit collectively, and the GTO choppers 50 and 60, the reactor 90, and the diode stacks 70 and 80 form a regenerative chopper circuit. In addition, capacitor 3
5C and 45C act as a collective snubber, and absorb the energy of the anodic reactors 31L and 41L, respectively.

【００３４】このように、ＧＴＯチョッパ５０、６０が
ＧＴＯを８個直列接続し、ダイオ―ドスタックがダイオ
―ド７０、８０を４個直列接続しているのは、回生チョ
ッパ回路作動時に、ＧＴＯチョッパ５０、６０には主回
路直流電圧が印加され、ダイオ―ドスタック７０、８０
にはおのおの主回路直流電圧の１／２が印加されるとい
う理由に基づいている。As described above, the GTO choppers 50 and 60 serially connect eight GTOs, and the diode stack serially connects four diodes 70 and 80 in series. This is because the GTO chopper circuit is in operation. Main circuit DC voltage is applied to 50 and 60, and diode stacks 70 and 80
Is based on the reason that 1/2 of the DC voltage of the main circuit is applied to each.

【００３５】また、リアクトル９０にスナバエネルギー
を一括して移し、直流主回路全体へ回生しているのは、
通常、高電圧のため直列接続構成となってＰ端子、Ｎ端
子間に接続される直流主回路用品の電圧分担を安定化さ
せることが必要であるという理由に基づいている。The snubber energy is collectively transferred to the reactor 90 and regenerated to the entire DC main circuit.
It is usually based on the reason that it is necessary to stabilize the voltage sharing of the DC main circuit article connected between the P terminal and the N terminal due to the high voltage in the series connection configuration.

【００３６】このように構成された本発明の第２実施例
の具体的動作の詳細を、図４、図５を用いて説明する。
図４において、（ａ）は主スイッチスタックであるＧＴ
Ｏスタック３０のＧＴＯ３１〜３４のゲ―ト信号、
（ｂ）は主スイッチスタックであるＧＴＯスタック４０
のＧＴＯ４１〜４４のゲ―ト信号、（ｃ）はＧＴＯチョ
ッパ５０のＧＴＯ５１〜５８のゲ―ト信号、（ｄ）はＧ
ＴＯチョッパ６０のＧＴＯ６１〜６８のゲ―ト信号、
（ｅ）は一括スナバコンデンサ３５Ｃの電圧、（ｆ）は
スナバコンデンサ３１Ｃ〜３４Ｃの電圧、（ｇ）は一括
スナバコンデンサ４５Ｃの電圧、（ｈ）はスナバコンデ
ンサ４１Ｃ〜４４Ｃの電圧、（ｉ）はリアクトル９０の
電流波形を示している。（ｊ）は１周期が時刻ｔ0 〜ｔ
10まで動作モ―ド（１）〜（１０）で構成されることを
示している。The details of the specific operation of the second embodiment of the present invention thus constructed will be described with reference to FIGS. 4 and 5.
In FIG. 4, (a) is a GT that is a main switch stack.
Gate signal of GTO 31-34 of O-stack 30,
(B) is a GTO stack 40 which is a main switch stack
GTO 41 to 44 gate signals, (c) GTO chopper 50 GTO 51 to 58 gate signals, (d) G
Gate signals of GTO 61 to 68 of the TO chopper 60,
(E) is the voltage of the collective snubber capacitor 35C, (f) is the voltage of the snubber capacitors 31C to 34C, (g) is the voltage of the collective snubber capacitor 45C, (h) is the voltage of the snubber capacitors 41C to 44C, and (i) is The current waveform of the reactor 90 is shown. (J) has one cycle from time t 0 to t
Operation up to 10 mode - indicates that it is composed of a de (1) to (10).

【００３７】図５は図４で示した動作モ―ド（１）〜
（１０）に対するおのおのの等価回路を示している。図
５において、作用している回路を実線で、不作用の回路
を破線で示している。時刻ｔ0 以前には以前までの周期
動作により、一括スナバコンデンサ３５Ｃには図示の極
性で初期電圧が存在している。FIG. 5 shows the operation modes (1) to (4) shown in FIG.
Each equivalent circuit to (10) is shown. In FIG. 5, operating circuits are shown by solid lines and inactive circuits are shown by broken lines. Before the time t 0 , the initial voltage exists in the collective snubber capacitor 35C with the polarity shown in the figure due to the periodic operation up to that point.

【００３８】時刻ｔ0 に、図４（ａ）と図４（ｃ）と図
４（ｄ）に示すようにＧＴＯスタック３０、ＧＴＯチョ
ッパ５０、６０にオンゲ―ト信号が与えられることによ
りオンし、図５の動作モ―ド（１）に示す等価回路、す
なわち一括スナバコンデンサ３５Ｃの蓄積電荷はＧＴＯ
スタック３０、ダイオ―ド４１Ｄ、４４Ｓ、ＧＴＯチョ
ッパ６０、リアクトル９０、ＧＴＯチョッパ５０の閉回
路で放電し、リアクトル９０のエネルギーに移行させ
る。At time t 0 , as shown in FIGS. 4 (a), 4 (c) and 4 (d), the GTO stack 30 and the GTO choppers 50, 60 are turned on by being supplied with an on-gate signal. , The equivalent circuit shown in the operation mode (1) of FIG. 5, that is, the accumulated charge of the collective snubber capacitor 35C is GTO.
The stack 30, the diodes 41D and 44S, the GTO chopper 60, the reactor 90, and the GTO chopper 50 are discharged in the closed circuit and transferred to the energy of the reactor 90.

【００３９】この間ＧＴＯスタック３０のＧＴＯ３１〜
３４の各々のスナバコンデンサ３１Ｃ〜３４Ｃが放電し
ないのは、一括スナバコンデンサ３５Ｃの充電電圧がス
ナバコンデンサ３１Ｃ〜３４Ｃの充電電圧より高く、ダ
イオ―ド３１Ｓ〜３３Ｓに逆電圧となり阻止されオンし
ないからという理由に基づいている。During this time, the GTO 31 of the GTO stack 30
The reason why each of the snubber capacitors 31C to 34C of 34 does not discharge is that the charging voltage of the collective snubber capacitor 35C is higher than the charging voltage of the snubber capacitors 31C to 34C and becomes a reverse voltage to the diodes 31S to 33S so that they are not turned on. It is based on the reason.

【００４０】一括スナバコンデンサ３５Ｃの電圧が時刻
ｔ1 にスナバコンデンサ３１Ｃ〜３４Ｃの充電電圧より
ダイオ―ドドロップと配線ドロップによるわずかに高い
値までに低下すると、ダイオ―ド３１Ｓ〜３３Ｓがオン
と、図５の動作モ―ド（２）となる。When the voltage of the collective snubber capacitor 35C drops to a value slightly higher than the charging voltage of the snubber capacitors 31C to 34C at time t 1 due to diode drop and wiring drop, the diodes 31S to 33S are turned on. The operation mode (2) shown in FIG. 5 is obtained.

【００４１】一括スナバコンデンサ３５Ｃとスナバコン
デンサ３１Ｃ〜３４Ｃの蓄積電荷がリアクトル９０にす
べて移行すると、図５の動作モ―ド（３）となり、リア
クトル９０、ＧＴＯチョッパ５０、ダイオ―ド３６Ｓ、
３４Ｄ、４１Ｄ、４４Ｓ、ＧＴＯチョッパ６０の閉回路
で還流し、図４（ｉ）のリアクトル９０の電流波形とな
る。スナバエネルギーがリアクトル９０に移行後、わず
かな時間をおいて時刻ｔ3 に図４（ｃ）、（ｄ）に示す
ように、ＧＴＯチョッパ５０、６０にオフゲ―ト信号が
与えられ、オフすると図５に示す動作モ―ド（４）とな
り、リアクトル９０に移行したエネルギーダイオ―ドス
タック７０と８０を介し直流主回路へ回生されていく。When the accumulated charges of the collective snubber capacitor 35C and the snubber capacitors 31C to 34C are all transferred to the reactor 90, the operation mode (3) shown in FIG. 5 is reached, and the reactor 90, the GTO chopper 50, the diode 36S,
34D, 41D, 44S and the GTO chopper 60 are circulated in the closed circuit to form the current waveform of the reactor 90 in FIG. After the snubber energy is transferred to the reactor 90, a short time is passed, and then at time t 3 , the GTO choppers 50 and 60 are supplied with an off-gate signal as shown in FIGS. The operation mode (4) shown in FIG. 5 is established, and is regenerated into the DC main circuit through the energy diode stacks 70 and 80 transferred to the reactor 90.

【００４２】ＧＴＯチョッパ６０が必要な理由はＧＴＯ
チョッパ５０のみでは、リアクトル９０のエネルギー
は、リアクトル９０、ダイオ―ドスタック７０、ＧＴＯ
スタック３０、ダイオ―ド４１Ｄ、４４Ｓ、リアクトル
９０の閉回路で還流してしまい、直流主回路へ回生され
ないという理由に基づいている。リアクトル９０のエネ
ルギーが全て回生すると時刻ｔ4 〜ｔ5 は、図５の動作
モ―ド（５）に示すようにリアクトルのエネルギーが完
全に回収され、回生チョッパは作用しない。時刻ｔ5 以
降は同様に負のア―ム側のスナバエネルギー回生チョッ
パが作用する。時刻ｔ5 に図４（ｂ）、（ｃ）、（ｄ）
に示すようにＧＴＯスタック４０、ＧＴＯチョッパ５
０、６０にオンゲ―ト信号があたえられることによりオ
ンし、図５の動作モ―ド（６）に示す等価回路、すなわ
ち一括スナバコンデンサ４５Ｃの蓄積電荷はＧＴＯチョ
ッパ６０、リアクトル９０、ＧＴＯチョッパ５０、ダイ
オ―ド３６Ｓ、３４Ｄ、ＧＴＯスタック４０の閉回路で
リアクトル９０のエネルギーに移行させる。The reason why the GTO chopper 60 is necessary is the GTO
With only the chopper 50, the energy of the reactor 90 is the reactor 90, the diode stack 70, and the GTO.
This is because the closed circuit of the stack 30, the diodes 41D and 44S, and the reactor 90 causes the current to flow back and is not regenerated to the DC main circuit. Time t 4 ~t 5 When energy is regenerated every reactor 90, the operation of FIG. 5 mode - the energy of the reactor as shown in de (5) is completely recovered, regenerative chopper does not act. After time t 5 , the snubber energy regenerative chopper on the negative arm side similarly acts. 4B, 4C, and 4D at time t 5 .
GTO stack 40 and GTO chopper 5 as shown in
It is turned on when an on-gate signal is given to 0 and 60, and an equivalent circuit shown in the operation mode (6) of FIG. 5, that is, the accumulated charge of the collective snubber capacitor 45C is the GTO chopper 60, the reactor 90, and the GTO chopper 50. , The diodes 36S, 34D and the closed circuit of the GTO stack 40 are transferred to the energy of the reactor 90.

【００４３】前述の動作モ―ド（１）、（２）と同様の
理由により、時刻ｔ6 〜ｔ7 は、図５の動作モ―ド
（７）となり、一括スナバコンデンサ４５Ｃとスナバコ
ンデンサ４１Ｃ〜４４Ｃの蓄積電荷がリアクトル９０へ
移行する。蓄積電荷がリアクトルへ全て移行する時刻ｔ
7 〜ｔ8 は図５の動作モ―ド（８）の還流モ―ドとな
る。時刻ｔ8 に図４（ｃ）、（ｄ）に示すようにＧＴＯ
チョッパ５０、６０にオフゲ―ト信号が与えられるとリ
アクトル９０のエネルギーはダイオ―ドスタック７０、
８０を介し直流主回路へ回生される。時刻ｔ9 〜ｔ10の
間はリアクトル９０のエネルギーが完全に回収され回生
チョッパは作用しない。The above-described operation mode - de (1), for the same reason as (2), the time t 6 ~t 7, the operation of FIG. 5 mode - de (7), and the bulk snubber capacitor 45C and snubber capacitor 41C The accumulated charges of ~ 44C are transferred to the reactor 90. Time t when all the accumulated charges transfer to the reactor
7 ~t 8 the operation of FIG. 5 mode - the de - reflux mode de (8). At time t 8 , as shown in FIGS. 4 (c) and 4 (d), the GTO
When the off gate signal is given to the choppers 50 and 60, the energy of the reactor 90 is changed to the diode stack 70,
It is regenerated to the DC main circuit via 80. During time t 9 to t 10 , the energy of the reactor 90 is completely recovered and the regenerative chopper does not work.

【００４４】図４（ｂ）に示すようにＧＴＯスタック４
０にオフゲ―ト信号があたえられる時刻ｔ10までで負の
ア―ム側の動作が完了し、時刻ｔ0 〜ｔ10が１周期の動
作となる。以後同様に１周期内にモ―ド（４）と（９）
を繰り返すことにより複数個のＧＴＯに使用したスナバ
のエネルギーの直流主回路へ回生が可能になる。As shown in FIG. 4B, the GTO stack 4
The operation on the negative arm side is completed by time t 10 when the off gate signal is given to 0, and the operation from time t 0 to t 10 is one cycle. After that, the modes (4) and (9) are similarly repeated within one cycle.
By repeating the above, it becomes possible to regenerate the snubber energy used for a plurality of GTOs to the DC main circuit.

【００４５】また、直流主回路全体への回生なので、高
圧直流コンデンサを含め直列接続となっている他の主回
路用品等の電圧分担も安定化できる。図６は、本発明の
第３実施例を示す構成図である。図３と同一部には同一
符号を付してその説明を省略する。図３のスナバエネル
ギー回生回路に対し、ＧＴＯスタック３０，４０毎に、
スナバエネルギーを新たに加えたコンデンサ３５Ｃ，４
５Ｃへ移し、ＧＴＯチョッパ５０，６０でリアクトル９
０，９１に移した上で、主回路へ回生するように構成し
たものである。Further, since the entire DC main circuit is regenerated, it is possible to stabilize the voltage sharing of other main circuit products connected in series including the high voltage DC capacitor. FIG. 6 is a configuration diagram showing a third embodiment of the present invention. The same parts as those in FIG. 3 are designated by the same reference numerals and the description thereof will be omitted. For the snubber energy regeneration circuit of FIG. 3, for each GTO stack 30, 40,
Capacitors 35C and 4 with newly added snubber energy
Move to 5C, reactor 9 with GTO chopper 50, 60
It is configured to be regenerated to the main circuit after being moved to 0, 91.

【００４６】図６は、後述するＧＴＯスタックが多重化
した場合のスナバエネルギー回生回路の多段化に対応で
きる構成といえる。コンデンサ３５Ｃは、ＧＴＯスタッ
ク３０のスナバコンデンサ３１Ｃ〜３４Ｃのエネルギー
を一括に移すためのものである。同様にコンデンサ４５
Ｃは、ＧＴＯスタック４０のスナバコンデンサ４１Ｃ〜
４４Ｃのエネルギーを一括して移すためのものである。It can be said that FIG. 6 can cope with the multistage of the snubber energy regenerating circuit when the GTO stacks described later are multiplexed. The capacitor 35C is for collectively transferring the energy of the snubber capacitors 31C to 34C of the GTO stack 30. Similarly, the capacitor 45
C is a snubber capacitor 41C of the GTO stack 40.
This is for collectively transferring the energy of 44C.

【００４７】コンデンサ３５ＣのエネルギーはＧＴＯチ
ョッパ５０を介しリアクトル９０に移した上で、ＧＴＯ
チョッパ５０をオフしリアクトル９０のエネルギーはダ
イオ―ドスタック７０を介し直流主回路へ回生するよう
構成している。The energy of the condenser 35C is transferred to the reactor 90 via the GTO chopper 50, and then the GTO.
The chopper 50 is turned off and the energy of the reactor 90 is regenerated to the DC main circuit via the diode stack 70.

【００４８】コンデンサ４５ＣのエネルギーはＧＴＯチ
ョッパ６０を介しリアクトル９１に移した上で、ＧＴＯ
チョッパ６０をオフし、リアクトル９１のエネルギーは
ダイオ―ドスタック８０を介し直流主回路へ回生するよ
う構成している。The energy of the condenser 45C is transferred to the reactor 91 via the GTO chopper 60 and then to the GTO.
The chopper 60 is turned off, and the energy of the reactor 91 is regenerated to the DC main circuit via the diode stack 80.

【００４９】次に、図６のさらに詳細な具体的動作を図
７、図８を参照し説明する。図７は、図８の動作を説明
するタイムチャ―ト、図８は図７の動作モ―ドを示して
いる。図７において（ａ）〜（ｊ）は、図４と同一部の
波形を示している。１周期内のスナバエネルギー回生の
動作モ―ドが（１）〜（８）の８通りとなる点が図４と
異なっている。図８において作用している回路を実線
で、不作用の回路を破線で示している。Next, a more detailed specific operation of FIG. 6 will be described with reference to FIGS. 7 and 8. FIG. 7 shows a time chart for explaining the operation of FIG. 8, and FIG. 8 shows an operation mode of FIG. In FIG. 7, (a) to (j) show waveforms of the same portion as in FIG. It differs from FIG. 4 in that there are eight operation modes (1) to (8) for regenerating the snubber energy within one cycle. In FIG. 8, the circuit that is operating is shown by a solid line, and the circuit that is not operating is shown by a broken line.

【００５０】時刻ｔ0 に図７（ａ）に示すようにＧＴＯ
スタック３０のＧＴＯ３１〜３４にオンゲ―ト信号があ
たえられると、図８の動作モ―ド（１）に示すように、
スナバコンデンサ３１Ｃ〜３４Ｃの充電電荷はおのおの
ダイオ―ド３１Ｓ〜３６Ｓを介しコンデンサ３５Ｃへ図
示の極性でリアクトル３１Ｌを介して放電する。At time t 0 , as shown in FIG.
When an on-gate signal is given to the GTOs 31 to 34 of the stack 30, as shown in the operation mode (1) of FIG.
The charges of the snubber capacitors 31C to 34C are discharged to the capacitor 35C via the diodes 31S to 36S with the polarity shown in the figure via the reactor 31L.

【００５１】これからわずかな時間をおいて、時刻ｔ1
に図７（ｃ）に示すようにＧＴＯチョッパ５０にゲ―ト
信号が与えられオン状態となると、図８の動作モ―ド
（２）に示すようにコンデンサ３５ＣのエネルギーはＧ
ＴＯチョッパ５０を介し、リアクトル９０へ移行する。After a short time, time t 1
When the gate signal is applied to the GTO chopper 50 as shown in FIG. 7 (c) to turn it on, the energy of the capacitor 35C becomes G as shown in the operation mode (2) of FIG.
Transfer to the reactor 90 via the TO chopper 50.

【００５２】時刻ｔ1 後わずかな時間をおいて時刻ｔ2
に図７（ｃ）に示すようにオフゲ―ト信号が与えられ、
ＧＴＯチョッパ５０がオフすると、図８の動作モ―ド
（３）に示すようにリアクトル９０のエネルギーはダイ
オ―ドスタック７０を介し直流主回路へ回生する。この
動作モ―ド（２）〜（３）におけるリアクトル９０の電
流波形を図７の（ｉ）に実線で示す。A short time after time t 1 , time t 2
Is supplied with an off-gate signal as shown in FIG.
When the GTO chopper 50 is turned off, the energy of the reactor 90 is regenerated to the DC main circuit via the diode stack 70 as shown in the operation mode (3) of FIG. The current waveform of the reactor 90 in the operation modes (2) to (3) is shown by a solid line in (i) of FIG.

【００５３】リアクトル９０のエネルギーが完全に直流
主回路へ回生されると、図７の時刻ｔ3 〜ｔ4 の動作モ
―ド（４）および図８の動作モ―ド（４）に示すように
スナバエネルギー回生回路は作用しない。時刻ｔ4 以降
は同様に負のア―ム側のスナバエネルギー回生チョッパ
が作用する。時刻ｔ4 に図７（ｂ）に示すようにＧＴＯ
スタック４０にオンゲ―ト信号が与えられ、ＧＴＯスタ
ック４０がオンすると図８の動作モ―ド（５）に示すよ
うに、スナバコンデンサ４１Ｃ〜４４Ｃの充電電荷はダ
イオ―ド４１Ｓ〜４６Ｓ、ＧＴＯスタック４０、リアク
トル４１Ｌを介し、コンデンサ４５Ｃへ図示の極性で移
る。When the energy of the reactor 90 is completely regenerated into the DC main circuit, as shown in the operation mode (4) at times t 3 to t 4 in FIG. 7 and the operation mode (4) in FIG. The snubber energy regeneration circuit does not work. Time t 4 and subsequent similarly negative A - snubber energy recovery chopper arm side acts. At time t 4 , as shown in FIG.
When an on-gate signal is given to the stack 40 and the GTO stack 40 is turned on, the charge of the snubber capacitors 41C to 44C is charged to the diodes 41S to 46S and the GTO stack 40 as shown in the operation mode (5) of FIG. 40, and via the reactor 41L to the capacitor 45C with the polarity shown.

【００５４】時刻ｔ4 の後、わずかな時間をおいて時刻
ｔ5 に図７の（ｄ）に示すようにＧＴＯチョッパ６０に
オンゲ―ト信号が与えられると、図８の動作モ―ド
（６）に示すようにコンデンサ４５ＣのエネルギーはＧ
ＴＯチョッパ６０を介しリアクトル９１へ移る。When an on-gate signal is applied to the GTO chopper 60 as shown in FIG. 7D at time t 5 after a short time after time t 4 , the operation mode ( As shown in 6), the energy of the capacitor 45C is G
Move to the reactor 91 via the TO chopper 60.

【００５５】時刻ｔ5 の後わずかな時間をおいて時刻ｔ
6 に図７（ｄ）に示すように、ＧＴＯチョッパ６０にオ
フゲ―ト信号が与えられると、ＧＴＯチョッパ６０はオ
フし、図８の動作モ―ド（７）に示すようにリアクトル
９１のエネルギーはダイオ―ドスタック８０を介し、直
流主回路へ回生する。この動作モ―ド（６）におけるリ
アクトル９１の電流波形を図７（ｉ）に一点鎖線で示
す。リアクトル９１のエネルギーが完全に直流主回路へ
回生されると、図７の時刻ｔ7 〜ｔ8 の動作モ―ド
（８）および図８の動作モ―ド（８）に示すようにスナ
バエネルギー回生回路は作用しない。A short time after time t 5 , time t
As shown in FIG. 7 (d) in FIG. 6 , when an off gate signal is given to the GTO chopper 60, the GTO chopper 60 is turned off, and the energy of the reactor 91 is reduced as shown in the operation mode (7) of FIG. Is regenerated to the DC main circuit via the diode stack 80. The current waveform of the reactor 91 in this operation mode (6) is shown by the alternate long and short dash line in FIG. 7 (i). When energy of the reactor 91 is regenerated to complete the DC main circuit, the operation of the time t 7 ~t 8 7 mode - operation of de (8) and 8 mode - snubber energy as shown in de (8) The regenerative circuit does not work.

【００５６】時刻ｔ8 で図７（ｂ）に示すようにＧＴＯ
スタック４０にオフゲ―ト信号が与えられると、ＧＴＯ
スタック４０はオフし、ｔ0 〜ｔ8 で１周期の動作とな
る。以後、同様に１周期内にモ―ド（３）と（７）を繰
り返すことにより、複数個のＧＴＯに使用したスナバエ
ネルギーが直流主回路へ回生されていく。この回路で
は、ＧＴＯチョッパ５０、６０は交互にオンオフするの
で、図３の実施例に較べてスイッチング損失は減少す
る。At time t 8 , as shown in FIG. 7B, the GTO
When an off gate signal is given to the stack 40, the GTO
The stack 40 is turned off, and one cycle of operation is performed from t 0 to t 8 . After that, by repeating the modes (3) and (7) within one cycle, the snubber energy used for a plurality of GTOs is regenerated to the DC main circuit. In this circuit, since the GTO choppers 50 and 60 are alternately turned on and off, the switching loss is reduced as compared with the embodiment of FIG.

【００５７】図９は、本発明の第４の実施例を示す構成
図である。ＧＴＯが複数個直列接続したＧＴＯスタック
が複数個直列に多重構成となった場合の多段スナバエネ
ルギー回生回路の構成を示している。ここでは、４個直
列のＧＴＯスタックが１０モジュ―ルで正ア―ムを構成
した一例を示している。図中、一点鎖線で囲ったブロッ
クの数字はＧＴＯの直列数やＧＴＯスタックの直列数を
しめている。たとえば、４ＳはＧＴＯが４個直列接続、
１０Ｍは、ＧＴＯモジュ―ルが１０個直列となっている
ことを意味している。ＧＴＯ４個直列構成のモジュ―ル
１００〜１０９、リアクトル１０１Ｌ〜１０９Ｌで正の
ア―ムを構成し、各々のダイオ―ド１００Ｄ〜１０９Ｄ
を介し各モジュ―ルのスナバエネルギーをコンデンサ１
００Ｃ〜１０９Ｃ、に集中的に集め、ＧＴＯチョッパ１
００Ｇ１、１０１Ｇ１〜１０９Ｇ１、１０１Ｇ２、１０
２Ｇ２〜１０９Ｇ２をオンし、リアクトル１０１Ｌ１〜
１０９Ｌ１に移した上で、ＧＴＯチョッパ１００Ｇ１〜
１０９Ｇ１、１０１Ｇ２〜１０９Ｇ２をオフし、リアク
トルのエネルギーを直流主回路へダイオ―ド４個直列の
ダイオ―ドスタック１００Ｄ１〜１０９Ｄ１、ダイオ―
ド４０個直列のダイオ―ドモジュ―ル１０９Ｄ１を介し
直流主回路へ回生する。負ア―ム側も同様で１０個直列
構成したＧＴＯモジュ―ルア―ム２００のスナバエネル
ギーをＧＴＯチョッパ２００Ｇ１を介しリアクトル２０
０Ｌ１〜２０９Ｌ１に移した上でダイオ―ドスタック２
００Ｄ１〜２０９Ｄ１を介し直流主回路へ回生する。動
作は図８とほぼ同様なので省略する。FIG. 9 is a block diagram showing the fourth embodiment of the present invention. It shows a configuration of a multi-stage snubber energy regenerative circuit in the case where a plurality of GTO stacks in which a plurality of GTOs are connected in series have a multiplex configuration. Here, an example is shown in which four GTO stacks in series form a positive arm with 10 modules. In the figure, the numbers in the blocks surrounded by the one-dot chain line indicate the number of GTOs in series and the number of GTO stacks in series. For example, 4S has 4 GTOs connected in series,
10M means that 10 GTO modules are in series. Modules 100 to 109 and reactors 101L to 109L each having four GTOs in series constitute a positive arm, and each diode 100D to 109D.
The snubber energy of each module via the condenser 1
GTO chopper 1 concentrated on 00C-109C
00G1, 101G1 to 109G1, 101G2, 10
2G2-109G2 is turned on, and reactor 101L1-
After moving to 109L1, GTO chopper 100G1-
109G1, 101G2 to 109G2 are turned off, and the energy of the reactor is fed to the DC main circuit by four diode stacks in series 100D1 to 109D1, diode stacks.
It is regenerated to the DC main circuit through a diode module 109D1 of 40 units in series. Similarly on the negative arm side, the snubber energy of ten GTO module arms 200 configured in series is transferred to the reactor 20 via the GTO chopper 200G1.
After transferring to 0L1 to 209L1, diode stack 2
Regenerates to the DC main circuit via 00D1 to 209D1. The operation is almost the same as in FIG.

【００５８】このような構成とするのは、超高圧回路と
なった場合、スナバエネルギーはさらに増大し、スナバ
エネルギーの熱損失の冷却だけでも百数十ＫＷにも達
し、装置を小型化する上で妨げとなるからである。たと
えば、ｆ＝１００ＨＺ、直流電圧１０００Ｖ、スナバコ
ンデンサＣ＝６μＦ、４０Ｓ×１Ｐ×１２Ａでは少なく
見積もっても、スナバエネルギーの発生だけでも下式の
値になるからである。With such a structure, in the case of an ultra-high voltage circuit, the snubber energy further increases, and even if the cooling of the heat loss of the snubber energy reaches 100 tens KW, the device is downsized. This is an obstacle to. This is because, for example, if f = 100HZ, DC voltage 1000V, snubber capacitor C = 6 μF, and 40S × 1P × 12A, even if it is underestimated, the value of the following equation is obtained even if only snubber energy is generated.

【００５９】(1/2）・ 6μF ・10002 ・100HZ ・40S ・
12A ＝144KW 図１０は、本発明のＧＴＯ多重モジュ―ルのスナバエネ
ルギー回生回路の更に、他の実施例である。図９と同一
部分には同一符号を付して説明を省略する。ＧＴＯモジ
ュ―ル１００〜１０９および負ア―ム２００のスナバエ
ネルギーはＧＴＯチョッパ１０９Ｇ１、１０９Ｇ２を介
しリアクトル９０へ移した上で、ＧＴＯチョッパ１０９
Ｇ１、１０９Ｇ２をオフし、ダイオ―ドモジュ―ル３０
０、４００を介し、直流主回路へ回生する。動作は図５
とほぼ同様なので省略する。なお、以上の説明ではＧＴ
Ｏスタック内のスナバコンデンサのエネルギーの回生回
路を中心にして説明したが、例えば、図１１、図１２に
示すようにＧＴＯスタック内に容量の大きな一括スナバ
コンデンサ３９Ｃ１、３９Ｃ２、４０Ｃ１、４０Ｃ２を
設けて、このスナバコンデンサのエネルギーも同様にＧ
ＴＯチョッパ５０、６０を介しリアクトル９０へ移し直
流主回路へ回生するよう構成することもできる。(1/2) ・ 6μF ・ 1000 2・ 100HZ ・ 40S ・
12A = 144KW FIG. 10 shows still another embodiment of the snubber energy regeneration circuit of the GTO multiplex module of the present invention. The same parts as those in FIG. 9 are designated by the same reference numerals and the description thereof will be omitted. The snubber energies of the GTO modules 100 to 109 and the negative arm 200 are transferred to the reactor 90 via the GTO choppers 109G1 and 109G2, and then the GTO chopper 109.
G1 and 109G2 are turned off, and diode module 30
Regenerative to the DC main circuit via 0, 400. Operation is Figure 5
Since it is almost the same as In the above explanation, GT
Although the description has centered on the energy regeneration circuit of the snubber capacitor in the O stack, for example, as shown in FIGS. 11 and 12, by providing the large-capacity collective snubber capacitors 39C1, 39C2, 40C1, and 40C2 in the GTO stack. , The energy of this snubber capacitor is also G
It can also be configured to be transferred to the reactor 90 via the TO choppers 50 and 60 and regenerated to the DC main circuit.

【００６０】さらに、図１３に示すように、ＧＴＯモジ
ュ―ル毎に一括スナバコンデンサ１００ＴＣ、１０１Ｔ
Ｃを設けてこのスナバエネルギーも同時にＧＴＯチョッ
パを介し直流主回路へ回生するよう構成することができ
る。以上、２、３の変形例を含めて述べた本発明は一例
にすぎない。例えば、ＧＴＯ以外の自己消弧形素子ＧＴ
ＲやＩＧＢＴにも適用できる。また、スナバエネルギー
回生チョッパ５０、６０や１００Ｇ１〜１０１Ｇ１、２
００Ｇ１〜２０９Ｇ１、１０９Ｇ２はＧＴＯを用いた例
で説明したがＧＴＯ以外のスイッチ素子を用いることも
可能である。Further, as shown in FIG. 13, collective snubber capacitors 100TC and 101T are provided for each GTO module.
By providing C, this snubber energy can be regenerated to the DC main circuit at the same time via the GTO chopper. The present invention described above, including a few modifications, is merely an example. For example, a self-extinguishing element GT other than GTO
It can also be applied to R and IGBT. In addition, snubber energy regeneration choppers 50, 60 and 100G1 to 101G1, 2
Although 00G1 to 209G1 and 109G2 are described as examples using GTO, it is possible to use switch elements other than GTO.

【００６１】[0061]

【発明の効果】本発明によれば、次のような効果が得ら
れる。 （１）ＧＴＯ等の自己消弧形素子を複数個直列接続した
変換装置のスナバエネルギー回生回路を多段化構成でき
る。 （２）スナバ損失が大幅に低減するので、スナバエネル
ギーによる発熱部分が減少し、冷却系が小型化できる。According to the present invention, the following effects can be obtained. (1) The snubber energy regenerative circuit of the converter in which a plurality of self-arc-extinguishing elements such as GTO are connected in series can be configured in multiple stages. (2) Since the snubber loss is significantly reduced, the heat generation portion due to the snubber energy is reduced and the cooling system can be downsized.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明によるスナバエネルギー回生回路の第１
実施例を示す回路図。FIG. 1 is a first example of a snubber energy regeneration circuit according to the present invention.
The circuit diagram which shows an Example.

【図２】図１の動作を説明するタイムチャ―ト。FIG. 2 is a time chart explaining the operation of FIG.

【図３】本発明によるスナバエネルギー回生回路の第２
実施例を示す回路図。FIG. 3 is a second snubber energy recovery circuit according to the present invention.
The circuit diagram which shows an Example.

【図４】図３の動作を説明するタイムチャ―ト。FIG. 4 is a time chart explaining the operation of FIG.

【図５】図４の各動作モードにおける図３の等価回路
図。5 is an equivalent circuit diagram of FIG. 3 in each operation mode of FIG.

【図６】本発明によるスナバエネルギー回生回路の第３
実施例を示す回路図。FIG. 6 is a third example of the snubber energy regeneration circuit according to the present invention.
The circuit diagram which shows an Example.

【図７】図６の動作を説明するタイムチャ―ト。FIG. 7 is a time chart explaining the operation of FIG.

【図８】図７の各動作モードにおける図６の等価回路
図。8 is an equivalent circuit diagram of FIG. 6 in each operation mode of FIG.

【図９】本発明によるスナバエネルギー回生回路の第４
実施例を示す回路図。FIG. 9 is a fourth example of the snubber energy regeneration circuit according to the present invention.
The circuit diagram which shows an Example.

【図１０】本発明の回路を多重化に適用した実施例を示
す回路図。図８の動作モ―ド。FIG. 10 is a circuit diagram showing an embodiment in which the circuit of the present invention is applied to multiplexing. Operation mode of FIG.

【図１１】本発明の回路の変形例を示す図。FIG. 11 is a diagram showing a modified example of the circuit of the present invention.

【図１２】本発明の回路の他の変形例を示す図。FIG. 12 is a diagram showing another modification of the circuit of the present invention.

【図１３】本発明の回路を多重化に適用した変形例を示
す図。FIG. 13 is a diagram showing a modified example in which the circuit of the present invention is applied to multiplexing.

【図１４】従来のＧＴＯを直列接続して構成した例を説
明するための図。FIG. 14 is a diagram for explaining an example in which conventional GTOs are connected in series.

【図１５】従来のスナバエネルギー回路の例を説明する
ための図。FIG. 15 is a diagram for explaining an example of a conventional snubber energy circuit.

【符号の説明】[Explanation of symbols]

２０、２０ａ、２８、２８ａ…ダイオ―ド、２６、２６
ａ、２７、２７ａ…サイリスタ、２４、２４ａ…コンデ
ンサ、２９、２９ａ…スナバコンデンサ、２１、２３、
２５、２５ａ…リアクトル、２２…整流器、３０、４０
…ＧＴＯスタック、３１〜３４、４１〜４４…ＧＴＯ、
３１Ｆ〜３４Ｆ、４１Ｆ〜４４Ｆ…フィ―ドバックダイ
オ―ド、３１Ｄ〜３４Ｄ、４１Ｄ〜４４Ｄ…スナバダイ
オ―ド、３１Ｃ〜３４Ｃ、４１Ｃ〜４４Ｃ…スナバコン
デンサ、３１Ｒ〜３４Ｒ、４１Ｒ〜４４Ｒ…スナバ抵
抗、３１Ｌ、４１Ｌ…アノ―ドリアクトル、３５Ｃ、４
５Ｃ…一括スナバコンデンサ、３１Ｓ〜３６Ｓ、４１Ｓ
〜４６Ｓ…ダイオ―ド、５０、６０…ＧＴＯチョッパ、
５１〜５８、６１〜６８…ＧＴＯ、５１Ｄ、６１Ｄ…ス
ナバダイオ―ド、５１Ｒ、６１Ｒ…スナバ抵抗、５１
Ｃ、６１Ｃ…スナバコンデンサ、５０Ｓ、６０Ｓ…スナ
バ回路、９０、９１…リアクトル、７０、８０…ダイオ
―ドスタック、７１〜７８、８１〜８８…ダイオ―ド、
７１Ｃ、８１Ｃ…スナバコンデンサ、７１Ｒ、８１Ｒ…
スナバ抵抗、７０Ｓ、８０Ｓ…スナバ回路、１００〜１
０９…ＧＴＯモジュ―ル、１００Ｌ〜１０９Ｌ、１００
Ｌ１〜１０９Ｌ１、２００Ｌ１〜２０１Ｌ１…リアクト
ル、１００Ｄ１〜１０９Ｄ１、２００Ｄ１〜２０９Ｄ
１、１００Ｄ〜１０９Ｄ…ダイオ―ド、１００Ｃ〜１０
９Ｃ…コンデンサ、１００Ｇ１〜１０９Ｇ１、１０１Ｇ
２〜１０９Ｇ２、２００Ｇ１…ＧＴＯチョッパ、３０
０、４００…ダイオ―ドモジュ―ル、２００…負ア―
ム、３９Ｃ１、３９Ｃ２、４０Ｃ１、４０Ｃ２、１００
ＴＣ、１０１ＴＣ…一括スナバコンデンサ、１Ｕ、１Ｘ
…主スイッチ（ＧＴＯ）、２Ｕ、２Ｘ…フィ―ドバック
ダイオ―ド、３Ｕ、３Ｘ…スナバダイオ―ド、４Ｕ、４
Ｘ…スナバコンデンサ、５、５Ｕ、５Ｘ…リアクトル、
６Ｕ、６Ｘ…補助スイッチ、７Ｕ、７Ｘ…ダイオ―ド20, 20a, 28, 28a ... Diodes, 26, 26
a, 27, 27a ... Thyristor, 24, 24a ... Capacitor, 29, 29a ... Snubber capacitor, 21, 23,
25, 25a ... Reactor, 22 ... Rectifier, 30, 40
... GTO stack, 31-34, 41-44 ... GTO,
31F to 34F, 41F to 44F ... feedback diode, 31D to 34D, 41D to 44D ... snubber diode, 31C to 34C, 41C to 44C ... snubber capacitor, 31R to 34R, 41R to 44R ... snubber resistance, 31L , 41L ... Anodriactor, 35C, 4
5C ... Collective snubber capacitor, 31S to 36S, 41S
~ 46S ... diode, 50,60 ... GTO chopper,
51-58, 61-68 ... GTO, 51D, 61D ... Snubber diode, 51R, 61R ... Snubber resistance, 51
C, 61C ... Snubber capacitor, 50S, 60S ... Snubber circuit, 90, 91 ... Reactor, 70, 80 ... Diode stack, 71-78, 81-88 ... Diode,
71C, 81C ... Snubber capacitors, 71R, 81R ...
Snubber resistance, 70S, 80S ... Snubber circuit, 100-1
09 ... GTO module, 100L to 109L, 100
L1 to 109L1, 200L1 to 201L1 ... Reactor, 100D1 to 109D1, 200D1 to 209D
1, 100D to 109D ... Diode, 100C to 10D
9C ... Capacitors, 100G1 to 109G1, 101G
2-109G2, 200G1 ... GTO chopper, 30
0,400 ... diode module, 200 ... negative aer
Mu, 39C1, 39C2, 40C1, 40C2, 100
TC, 101TC ... Collective snubber capacitors, 1U, 1X
... Main switch (GTO), 2U, 2X ... Feedback diode, 3U, 3X ... Snubber diode, 4U, 4
X ... Snubber capacitor, 5, 5U, 5X ... Reactor,
6U, 6X ... Auxiliary switch, 7U, 7X ... Diode

Claims (6)

【特許請求の範囲】[Claims] 【請求項１】 第１および第２の自己消弧形素子からな
る電力変換装置において、 前記第１の自己消弧形素子の陽極に第１のフィ―ドバッ
クダイオ―ドの陰極と第１のスナバコンデンサの一端と
第１のダイオ―ドの陰極を接続した第１の接続点より直
流正極端子を導出し、 前記第１の自己消弧形素子の陰極に前記第１のフィ―ド
バックダイオ―ドの陽極と第１のスナバダイオ―ドの陰
極と前記第２の自己消弧形素子の陽極と第２のフィ―ド
バックダイオ―ドの陰極と第２のスナバダイオ―ドの陽
極を接続した第２の接続点より交流端子を導出し、 前記第２の自己消弧形素子の陰極に前記第２のフィ―ド
バックダイオ―ドの陽極と第２のスナバコンデンサの一
端と第２のダイオ―ドの陽極を接続した第３の接続点よ
り直流負極端子を導出し、 前記第１のスナバコンデンサの他端と前記第１のスナバ
ダイオ―ドの陽極の第４の接続点に第１の補助スイッチ
の第２の端子を接続し、 第１のダイオ―ドの陽極に第１のリアクトルの一端と前
記第１の補助スイッチの第１の端子を接続し、第２のス
ナバダイオ―ドの陰極と第２のスナバコンデンサの他端
の第５の接続点に第２の補助スイッチの第１の端子を接
続し、第２の補助スイッチの第２の端子に第２のダイオ
―ドの陰極と第１のリアクトルの他端を接続して構成し
たスナバエネルギー回生回路。1. A power converter comprising first and second self-arc-extinguishing elements, wherein a cathode of a first feedback diode and a first feed-back diode are provided on an anode of the first self-extinguishing element. A direct current positive electrode terminal is led out from a first connection point where one end of the snubber capacitor and a cathode of the first diode are connected, and the first feedback diode is used as a cathode of the first self-arc-extinguishing element. Second anode connected to the cathode of the first snubber diode, the anode of the second self-extinguishing element, the cathode of the second feedback diode, and the anode of the second snubber diode. AC terminal is derived from the connection point of the second self-extinguishing element, the anode of the second feedback diode, the one end of the second snubber capacitor and the second diode of the second feedback diode. Derive the DC negative electrode terminal from the third connection point where the anode is connected, The second terminal of the first auxiliary switch is connected to the other end of the first snubber capacitor and the fourth connection point of the anode of the first snubber diode, and the second terminal of the first diode is connected to the anode of the first diode. One end of the first reactor and the first terminal of the first auxiliary switch are connected, and the second auxiliary switch is connected to the cathode of the second snubber diode and the other end of the second snubber capacitor at the fifth connection point. The snubber energy regenerative circuit configured by connecting the first terminal of the second auxiliary switch to the second terminal of the second auxiliary switch and connecting the cathode of the second diode and the other end of the first reactor. 【請求項２】 複数の自己消弧形素子を含む第１および
第２のスタックと、第１および第２のダイオードスタッ
クと、第１および第２のＧＴＯチョッパからなり、 前記第１のスタックは、第１の自己消弧形素子の陽極に
第１のフィ―ドバックダイオ―ドの陰極および第１のス
ナバコンデンサの一端を接続した接続点を第１の端子と
し、前記第１の自己消弧形素子の陰極に第１のフィ―ド
バックダイオ―ドの陽極と第１のスナバダイオ―ドの陰
極を接続した接続点を第２の端子とし、前記第１のスナ
バコンデンサの他端と第１のスナバダイオ―ドの陽極と
第１のダイオ―ドの陰極を接続し、第１のダイオ―ドの
陽極を第３の端子とした回路を第１の単位回路とし、こ
の第１の単位回路を少なくとも１個以上ｎ個（ｎは整
数）設け、このうち１番目の第１の単位回路の第２の端
子を２番目の第１の単位回路の第１の端子に接続し、前
記１番目の単位回路の第３の端子に前記２番目の単位回
路の前記第３の端子を接続し、前記２番目の単位回路の
第２の端子を３番目の単位回路の第１の端子に接続し、
前記２番目の単位回路の第３の端子に第２のダイオ―ド
の陰極を接続し、前記３番目の単位回路の第３の端子に
前記第２のダイオ―ドの陽極を接続し、ｎ番目の第１の
単位回路の第１の端子を（ｎ−１）番目の単位回路の第
２の端子に接続し、前記ｎ番目の単位回路の第３の端子
に前記（ｎ−１）番目の単位回路の第３の端子に第２の
ダイオードを接続し、前記１番目の単位回路の第１の端
子を第１のスタックの第１の端子とし、前記ｎ番目の単
位回路の第２の端子を第１のスタックの第２の端子と
し、前記ｎ番目の単位回路の第３の端子を第１のスタッ
クの第３の端子とし、 第１のスタックの第１の端子に第１のアノードリアクト
ルの一端と第１の一括スナバコンデンサの一端を接続
し、前記アノードリアクトルの他端に直流正極端子を接
続し、前記第１の一括スナバコンデンサの他端を前記第
１のスタックの第３の端子に接続し、 前記第２のスタックは、第２の自己消弧形素子の陽極に
第２のフィ―ドバックダイオ―ドの陰極および第２のス
ナバダイオードの陽極に接続した接続点を第４の端子と
し、前記第２の自己消弧形素子の陰極に第２のフィ―ド
バックダイオ―ドの陽極と第２のスナバコンデンサの一
端を接続した接続点を第５の端子とし、前記第２のスナ
バダイオードの陰極と第２のスナバコンデンサの他端と
第３のダイオ―ドの陰極を接続し、第３のダイオ―ドの
陰極を第６の端子とした回路を第２の単位回路とし、こ
の第２の単位回路を少なくとも１個以上ｎ個（ｎは整
数）設け、このうち１番目の第２の単位回路の第５の端
子を２番目の単位回路の第４の端子に接続し、前記１番
目の第２の単位回路の第６の端子に前記２番目の第２の
単位回路の前記第６の端子を接続し、前記２番目の第２
の単位回路の第５の端子を前記３番目の第２の単位回路
の第４の端子に接続し、前記２番目の第２の単位回路の
第６の端子に第２のダイオ―ドの陰極を接続し、前記２
番目の第２の単位回路の第６の端子に前記第４のダイオ
―ドの陽極を接続し、ｎ番目の第２の単位回路の第１の
端子を（ｎ−１）番目の第２の単位回路の第５の端子に
接続し、前記ｎ番目の第２の単位回路の第６の端子に前
記（ｎ−１）番目の第２の単位回路の第６の端子に第２
のダイオードを接続し、１番目の第２の単位回路の第４
の端子を第２のスタックの第４の端子とし、ｎ番目の第
２の単位回路の第５の端子を第２のスタックの第５の端
子とし、１番目の第２の単位回路の第６の端子を第２の
スタックの第６の端子とし、前記第１のスタックの第２
の端子と第２のスタックの第４の端子とを接続し、この
接続点から交流端子を導出し、 前記第２のスタックの第５の端子に第２のアノ―ドリア
クトルの一端と第２の一括スナバコンデンサの一端を接
続し、第２のアノ―ドリアクトルの他端から直流負極端
子を導出し、 前記第２の一括スナバコンデンサの他端を前記第２のス
タックの第６の端子にゲートターンオフサイリスタから
なる第２のＧＴＯチョッパの陽極を接続し、この第２の
ＧＴＯチョッパの陰極をリアクトルの一端に接続し、こ
のリアクトルの他端をゲートターンオフサイリスタから
なる第１のＧＴＯチョッパの陽極に接続し、この第１の
ＧＴＯチョッパの陰極を前記第１のスタックの第３の端
子に接続し、第２のＧＴＯチョッパの陽極に複数のダイ
オードからなる第１のダイオ―ドスタックの陽極を接続
し、前記第２のＧＴＯチョッパの陰極に第２のダイオ―
ドスタックの陰極を接続し、第１のダイオ―ドスタック
の陰極を前記直流正極端子に接続し、前記第２のダイオ
―ドスタックの陽極を直流負極端子に接続してなるスナ
バエネルギー回生回路。2. A first and a second stack including a plurality of self-arc-extinguishing elements, a first and a second diode stack, and a first and a second GTO chopper, said first stack comprising: The first self-extinguishing arc is a connection point where the cathode of the first feedback diode and one end of the first snubber capacitor are connected to the anode of the first self-extinguishing element as a first terminal. The connection point where the anode of the first feedback diode and the cathode of the first snubber diode are connected to the cathode of the shaped element is the second terminal, and the other end of the first snubber capacitor and the first A circuit in which the anode of the snubber diode and the cathode of the first diode are connected, and the anode of the first diode is the third terminal is a first unit circuit, and this first unit circuit is at least 1 or more n (n is an integer) provided, the first of these The second terminal of the first unit circuit is connected to the first terminal of the second unit circuit, and the third terminal of the first unit circuit is connected to the third terminal of the second unit circuit. 3 terminals are connected, the second terminal of the second unit circuit is connected to the first terminal of the third unit circuit,
The cathode of the second diode is connected to the third terminal of the second unit circuit, and the anode of the second diode is connected to the third terminal of the third unit circuit. The first terminal of the th-first unit circuit is connected to the second terminal of the (n-1) -th unit circuit, and the (n-1) -th terminal is connected to the third terminal of the n-th unit circuit. A second diode is connected to the third terminal of the unit circuit, the first terminal of the first unit circuit is the first terminal of the first stack, and the second diode of the nth unit circuit is The terminal is the second terminal of the first stack, the third terminal of the n-th unit circuit is the third terminal of the first stack, and the first terminal is the first anode. Connect one end of the reactor and one end of the first collective snubber capacitor, and connect the DC positive electrode terminal to the other end of the anode reactor. Then, the other end of the first collective snubber capacitor is connected to the third terminal of the first stack, and the second stack is connected to the anode of the second self-arc-extinguishing element with the second filter. The connection point connected to the cathode of the feedback diode and the anode of the second snubber diode is the fourth terminal, and the cathode of the second self-extinguishing element is the anode of the second feedback diode. And a connection point connecting one end of the second snubber capacitor to a fifth terminal, and connecting the cathode of the second snubber diode, the other end of the second snubber capacitor and the cathode of the third diode, A circuit in which the cathode of the third diode is used as the sixth terminal is used as a second unit circuit, and at least one second unit circuit (n is an integer) is provided. The 5th terminal of the 2nd unit circuit to the 4th terminal of the 2nd unit circuit And connecting the sixth terminal of the second second unit circuit to the sixth terminal of the first second unit circuit, and connecting the sixth terminal of the second second unit circuit to the second terminal of the second second unit circuit.
The fifth terminal of the second unit circuit is connected to the fourth terminal of the third second unit circuit, and the cathode of the second diode is connected to the sixth terminal of the second second unit circuit. And connect the above 2
The anode of the fourth diode is connected to the sixth terminal of the n-th second unit circuit, and the first terminal of the n-th second unit circuit is connected to the (n-1) -th second terminal. It is connected to the fifth terminal of the unit circuit and the second terminal is connected to the sixth terminal of the n-th second unit circuit and the sixth terminal of the (n-1) -th second unit circuit.
Connected to the diode of the 4th of the 1st 2nd unit circuit
As the fourth terminal of the second stack, the fifth terminal of the n-th second unit circuit as the fifth terminal of the second stack, and the sixth terminal of the first second unit circuit. The second terminal of the first stack as the sixth terminal of the second stack.
Is connected to the fourth terminal of the second stack, an AC terminal is derived from this connection point, and the fifth terminal of the second stack is connected to one end of the second anodic reactor and the second terminal. One end of the collective snubber capacitor is connected, the DC negative electrode terminal is led out from the other end of the second anodic reactor, and the other end of the second collective snubber capacitor is connected to the sixth terminal of the second stack. The anode of the second GTO chopper composed of the gate turn-off thyristor is connected, the cathode of this second GTO chopper is connected to one end of the reactor, and the other end of this reactor is the anode of the first GTO chopper composed of the gate turn-off thyristor. And a cathode of the first GTO chopper connected to a third terminal of the first stack, and an anode of the second GTO chopper having a first die comprising a plurality of diodes. - Connect the anode of Dosutakku, second diode to the cathode of the second GTO chopper -
A snubber energy regeneration circuit in which the cathode of the first diode stack is connected to the DC positive electrode terminal and the anode of the second diode stack is connected to the DC negative electrode terminal. 【請求項３】 複数の自己消弧形素子を含む第１および
第２のスタックと、第１および第２のダイオードスタッ
クと、第１および第２のＧＴＯチョッパからなり、 前記第１のスタックは、第１の自己消弧形素子の陽極に
第１のフィ―ドバックダイオ―ドの陰極および第１のス
ナバコンデンサの一端を接続した接続点を第１の端子と
し、前記第１の自己消弧形素子の陰極に第１のフィ―ド
バックダイオ―ドの陰極と第１のスナバダイオ―ドの陰
極を接続した接続点を第２の端子とし、前記第１のスナ
バコンデンサの他端と第１のスナバダイオ―ドの陽極と
第１のダイオ―ドの陰極を接続し、第１のダイオ―ドの
陽極を第３の端子とした回路を単位回路とし、この単位
回路を少なくとも１個以上ｎ個（ｎは整数）設け、この
うち１番目の単位回路の第２の端子を２番目の単位回路
の第１の端子に接続し、前記１番目の単位回路の第３の
端子に前記２番目の単位回路の前記第３の端子を接続
し、前記２番目の単位回路の第２の端子を前記３番目の
単位回路の第１の端子に接続し、前記２番目の単位回路
の第３の端子に第２のダイオ―ドの陰極を接続し、前記
３番目の単位回路の第３の端子に前記第２のダイオ―ド
の陽極を接続し、ｎ番目の単位回路の第１の端子を（ｎ
−１）番目の単位回路の第２の端子に接続し、前記ｎ番
目の単位回路の第３の端子に前記（ｎ−１）番目の単位
回路の第３の端子に第２のダイオードを接続してなり、 前記第２のスタックは、第２の自己消弧形素子の陽極に
第２のフィ―ドバックダイオ―ドの陰極および第２のス
ナバコンデンサの一端を接続した接続点を第４の端子と
し、前記第２の自己消弧形素子の陰極に第２のフィ―ド
バックダイオ―ドの陰極と第２のスナバダイオ―ドの陰
極を接続した接続点を第５の端子とし、前記第２のスナ
バコンデンサの他端と第２のスナバダイオ―ドの陽極と
第２のダイオ―ドの陰極を接続し、第２のダイオ―ドの
陽極を第６の端子とした回路を単位回路とし、この単位
回路を少なくとも１個以上ｎ個（ｎは整数）設け、この
うち１番目の単位回路の第５の端子を２番目の単位回路
の第４の端子に接続し、前記１番目の単位回路の第６の
端子に前記２番目の単位回路の前記第６の端子を接続
し、前記２番目の単位回路の第５の端子を前記３番目の
単位回路の第４の端子に接続し、前記２番目の単位回路
の第６の端子に第２のダイオ―ドの陰極を接続し、前記
３番目の単位回路の第６の端子に前記第２のダイオ―ド
の陽極を接続し、ｎ番目の単位回路の第１の端子を（ｎ
−１）番目の単位回路の第５の端子に接続し、前記ｎ番
目の単位回路の第６の端子に前記（ｎ−１）番目の単位
回路の第６の端子に第２のダイオードを接続してなり、 第２のスタックの第４端子に第１のアノ―ドリアクトル
の一端を接続し、この第１のアノ―ドリアクトルの他端
より直流正極端子を導出し、前記第２のスタックの第５
端子と前記第１のスタックの第１端子を接続点に交流端
子を導出し、前記第１のスタックの第２端子に第２のア
ノ―ドリアクトルの一端を接続し、この第２のアノ―ド
リアクトルの他端よりＮ端子を導出し、第２のスタック
の第６端子に第３のコンデンサの一端とゲートターンオ
フサイリスタからなる第１のＧＴＯチョッパの陽極を接
続し、この第１のＧＴＯチョッパの陰極を第１のリアク
トルの一端と複数のダイオードからなる第１のダイオ―
ドスタックの陰極に接続し、前記第１のコンデンサの他
端と前記第１のリアクトルの他端を前記直流正極端子に
接続し、前記第１のダイオ―ドスタックの陽極を直流負
極端子に接続し、前記第１のスタックの第３端子に第４
のコンデンサの一端とゲートターンオフサイリスタから
なる第２のＧＴＯチョッパの陰極を接続し、この第２の
ＧＴＯチョッパの陽極を第２のリアクトルの一端と第２
のダイオ―ドスタックの陽極に接続し前記第１のコンデ
ンサの他端と前記第２のリアクトルの他端を前記直流負
極端子に接続し、前記第２のダイオ―ドの陰極を前記直
流正極端子に接続してなるスナバエネルギー回生回路。3. A first and second stack comprising a plurality of self-arc-extinguishing elements, a first and a second diode stack, and a first and a second GTO chopper, said first stack comprising: The first self-extinguishing arc is a connection point where the cathode of the first feedback diode and one end of the first snubber capacitor are connected to the anode of the first self-extinguishing element as a first terminal. The connecting point where the cathode of the first feedback diode and the cathode of the first snubber diode are connected to the cathode of the shaped element is the second terminal, and the other end of the first snubber capacitor and the first A circuit in which the anode of the snubber diode and the cathode of the first diode are connected and the anode of the first diode is the third terminal is a unit circuit, and at least one or more unit circuits n ( (n is an integer), the first unit circuit among these The second terminal is connected to the first terminal of the second unit circuit, the third terminal of the first unit circuit is connected to the third terminal of the second unit circuit, and the second terminal is connected to the third terminal of the first unit circuit. The second terminal of the unit circuit is connected to the first terminal of the third unit circuit, and the cathode of the second diode is connected to the third terminal of the second unit circuit. The anode of the second diode is connected to the third terminal of the nth unit circuit, and the first terminal of the nth unit circuit is connected to (n
−1) connected to the second terminal of the unit circuit, and the third terminal of the nth unit circuit connected to the second terminal of the third terminal of the (n−1) th unit circuit. In the second stack, the connection point in which the cathode of the second feedback diode and one end of the second snubber capacitor are connected to the anode of the second self-arc-extinguishing element is connected to the fourth stack. And a connection point connecting the cathode of the second feedback diode and the cathode of the second snubber diode to the cathode of the second self-extinguishing element is the fifth terminal, and the second terminal The other end of the snubber capacitor is connected to the anode of the second snubber diode and the cathode of the second diode, and the circuit using the anode of the second diode as the sixth terminal is used as a unit circuit. At least one unit circuit (n is an integer) is provided, and the first unit among them is provided. Connecting a fifth terminal of the circuit to a fourth terminal of the second unit circuit, connecting a sixth terminal of the first unit circuit to the sixth terminal of the second unit circuit, The fifth terminal of the second unit circuit is connected to the fourth terminal of the third unit circuit, and the cathode of the second diode is connected to the sixth terminal of the second unit circuit. The sixth terminal of the third unit circuit is connected to the anode of the second diode, and the first terminal of the nth unit circuit is connected to (n
-1) is connected to the fifth terminal of the unit circuit, and the sixth terminal of the n-th unit circuit is connected to the sixth terminal of the (n-1) -th unit circuit with a second diode. The one end of the first anode reactor is connected to the fourth terminal of the second stack, and the DC positive electrode terminal is led out from the other end of the first anode reactor, and the second stack is formed. The fifth
An AC terminal is derived from the connection point between the terminal and the first terminal of the first stack, and one end of the second anodic reactor is connected to the second terminal of the first stack. The N terminal is led out from the other end of the reactor, and one end of the third capacitor and the anode of the first GTO chopper including the gate turn-off thyristor are connected to the sixth terminal of the second stack, and the first GTO chopper is connected. The cathode of the first reactor including one end of the first reactor and a plurality of diodes.
Connected to the cathode of the stack, the other end of the first capacitor and the other end of the first reactor are connected to the DC positive terminal, the anode of the first diode stack is connected to the DC negative terminal, A fourth terminal is provided on the third terminal of the first stack.
Of the second GTO chopper, which is composed of a gate turn-off thyristor, is connected to one end of the second reactor and one end of the second reactor.
Connected to the anode of the diode stack, the other end of the first capacitor and the other end of the second reactor are connected to the DC negative electrode terminal, and the cathode of the second diode is connected to the DC positive electrode terminal. Snubber energy regeneration circuit that is connected. 【請求項４】 請求項２または請求項３記載の回路を単
位モジュ―ルとし、複数個直列接続し、多重化したスナ
バエネルギー回生回路。4. A snubber energy regenerating circuit in which the circuit according to claim 2 or 3 is used as a unit module and a plurality of circuits are connected in series and multiplexed. 【請求項５】 請求項２記載の第１のスタックの１番目
の第１の単位回路の第１の端子と２番目の第１の単位回
路の第３端子間に一括スナバコンデンサを接続し以下同
様に一括スナバコンデンサを接続したスナバエネルギー
回生回路。5. A collective snubber capacitor is connected between the first terminal of the first unit circuit of the first stack according to claim 2 and the third terminal of the second unit circuit of the second, and Similarly, a snubber energy regeneration circuit with a collective snubber capacitor connected. 【請求項６】 請求項２記載の第２のスタックの１番目
の第２の単位回路の第６端子と２番目の第２単位回路の
第５端子間に一括スナバコンデンサを接続し以下同様に
一括スナバコンデンサを接続したスナバエネルギー回生
回路。6. A collective snubber capacitor is connected between the sixth terminal of the first second unit circuit and the fifth terminal of the second second unit circuit of the second stack according to claim 2, and so on. Snubber energy regeneration circuit with a collective snubber capacitor.
JP30149093A 1993-12-01 1993-12-01 Snubber energy regeneration circuit Expired - Fee Related JP3181453B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30149093A JP3181453B2 (en) 1993-12-01 1993-12-01 Snubber energy regeneration circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30149093A JP3181453B2 (en) 1993-12-01 1993-12-01 Snubber energy regeneration circuit

Publications (2)

Publication Number Publication Date
JPH07163154A true JPH07163154A (en) 1995-06-23
JP3181453B2 JP3181453B2 (en) 2001-07-03

Family

ID=17897543

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30149093A Expired - Fee Related JP3181453B2 (en) 1993-12-01 1993-12-01 Snubber energy regeneration circuit

Country Status (1)

Country Link
JP (1) JP3181453B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2484663B1 (en) * 2009-09-30 2019-07-17 Nippon Soda Co., Ltd. Phenolic compound and recording material

Also Published As

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