JPH07161584A - Chip-type noise filter - Google Patents

Chip-type noise filter

Info

Publication number
JPH07161584A
JPH07161584A JP30396993A JP30396993A JPH07161584A JP H07161584 A JPH07161584 A JP H07161584A JP 30396993 A JP30396993 A JP 30396993A JP 30396993 A JP30396993 A JP 30396993A JP H07161584 A JPH07161584 A JP H07161584A
Authority
JP
Japan
Prior art keywords
conductor
filter
dielectric
ground electrode
insulator substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30396993A
Other languages
Japanese (ja)
Inventor
Hiromichi Tokuda
博道 徳田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP30396993A priority Critical patent/JPH07161584A/en
Publication of JPH07161584A publication Critical patent/JPH07161584A/en
Pending legal-status Critical Current

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  • Coils Or Transformers For Communication (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Filters And Equalizers (AREA)

Abstract

PURPOSE:To obtain a filter, which has the high mechanical strength and can cope with high-density mounting, by forming a capacitor of a grounding electrode, a conductor and a dielectric substance, which are provided on an insulator substrate. CONSTITUTION:On the surface of an insulator substrate 1, input/output electrodes 2 and 3, a grounding electrode 5, a dielectric substance 7 and a conductor 9 are provided. The input/output electrodes 2 and 3 and the grounding electrode 5 are formed so as to form the thick films by applying paste such as Ag, Ag-Pa or the like on the insulator substrate l with the means of screen printing, and drying the paste. The dielectric substance 7 is formed on the grounding electrode 5. The conductor 9, which electrically connects the input/ output electrodes 2 and 3, are formed on the dielectric substance 7. Thus, the thickness of the insulator substrate does not become the parameter, which determines capacitance. Therefore, the thickness of the insulator substrate can be made sufficiently thick, and the mechanical strength of the filter can be secured.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、ノイズから各種高周波
機器を保護するチップ型ノイズ除去フィルタに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip type noise elimination filter for protecting various high frequency equipment from noise.

【0002】[0002]

【従来の技術と課題】従来のチップ型ノイズ除去フィル
タの一つに、実開平4−65428号公報記載のものが
ある。このフィルタは誘電体基板の表面に、この誘電体
基板を挟んで交差する抵抗体とグランド電極を設け、抵
抗体と誘電体基板とグランド電極とでコンデンサを形成
したものである。
2. Description of the Related Art One of conventional chip type noise removal filters is disclosed in Japanese Utility Model Laid-Open No. 4-65428. In this filter, a resistor and a ground electrode are provided on the surface of a dielectric substrate so as to intersect with each other across the dielectric substrate, and a capacitor is formed by the resistor, the dielectric substrate and the ground electrode.

【0003】ところで、フィルタに内蔵されたコンデン
サの静電容量Cは、以下の式にて決定される。 C=εS/d ε:誘電率 S:対向電極面積 d:対向電極間距離 ここに、誘電率εは使用する誘電体基板の材質によって
決定され、対向電極面積Sもフィルタのサイズによって
制限される。従って、フィルタの小形化を満足し、か
つ、大きな静電容量を得ようとすれば、対向電極間距離
dを小さく、すなわち、誘電体基板を薄くすることが通
常行われる。
By the way, the electrostatic capacity C of the capacitor built in the filter is determined by the following equation. C = εS / d ε: Dielectric constant S: Counter electrode area d: Counter electrode distance Here, the dielectric constant ε is determined by the material of the dielectric substrate used, and the counter electrode area S is also limited by the size of the filter. . Therefore, in order to satisfy the downsizing of the filter and obtain a large electrostatic capacity, it is usual to reduce the distance d between the counter electrodes, that is, to reduce the thickness of the dielectric substrate.

【0004】しかしながら、誘電体基板を薄くすると、
フィルタを回路基板等に自動実装する際に加わる機械的
荷重や実装後の回路基板等のたわみにより加わる機械的
荷重によって、フィルタが破壊され易くなるという問題
が発生する。また、従来のフィルタを回路基板等に実装
すると、誘電体基板の略裏面全面に設けられたグランド
電極が回路基板等に臨むことになる。ところが、近年の
電子機器の高密度実装によって、回路基板上の電子部品
実装領域に信号線路が配設されることが多いが、従来の
フィルタではグランド電極と信号線路が近接するため、
ショート等の心配から、回路基板上のフィルタ実装領域
に信号線路を配設することが難しかった。
However, if the dielectric substrate is made thin,
There arises a problem that the filter is easily broken by a mechanical load applied when the filter is automatically mounted on a circuit board or the like or a mechanical load applied by a deflection of the circuit board or the like after mounting. Further, when the conventional filter is mounted on a circuit board or the like, the ground electrode provided on substantially the entire back surface of the dielectric substrate faces the circuit board or the like. However, due to high-density mounting of electronic devices in recent years, a signal line is often arranged in an electronic component mounting area on a circuit board, but in a conventional filter, the ground electrode and the signal line are close to each other,
It was difficult to dispose the signal line in the filter mounting area on the circuit board because of concern about short circuit or the like.

【0005】そこで、本発明の課題は、機械的強度が強
く、かつ、高密度実装に対応できるチップ型ノイズ除去
フィルタを提供することにある。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a chip-type noise elimination filter which has high mechanical strength and can be used for high-density mounting.

【0006】[0006]

【課題を解決するための手段と作用】以上の課題を解決
するため、本発明に係るチップ型ノイズ除去フィルタ
は、(a)絶縁体基板の表面に、二つの入出力電極と、
グランド電極と、前記二つの入出力電極を電気的に接続
する導電体と、前記グランド電極と前記導電体に挟まれ
た誘電体とを設け、(b)前記グランド電極と前記導電
体と前記誘電体とでコンデンサを形成したこと、を特徴
とする。ここに、導電体は、その材料として導電性が優
れたAg,Ag−Pd,Cu等を使用した場合には導線
やインダクタとして機能し、カーボンやサーメット等を
使用した場合には抵抗体として機能する。
In order to solve the above problems, a chip type noise removal filter according to the present invention comprises: (a) two input / output electrodes on the surface of an insulating substrate;
A ground electrode, a conductor that electrically connects the two input / output electrodes, and a dielectric sandwiched between the ground electrode and the conductor are provided, and (b) the ground electrode, the conductor, and the dielectric. It is characterized by forming a capacitor with the body. Here, the conductor functions as a conductor or an inductor when Ag, Ag-Pd, Cu or the like having excellent conductivity is used as the material, and as a resistor when carbon or cermet is used. To do.

【0007】以上の構成により、絶縁体基板の表面に設
けたグランド電極と導電体と誘電体とで構成されるコン
デンサによって、その誘電体の厚みを調整することによ
り所望の静電容量が得られる。一方、絶縁体基板の厚み
は、コンデンサの静電容量を決定するパラメータではな
いため、任意の寸法に設定される。従って、フィルタの
機械的強度は絶縁体基板の厚みを厚くすることにより確
保される。
With the above structure, a desired capacitance can be obtained by adjusting the thickness of the dielectric by the capacitor composed of the ground electrode, the conductor and the dielectric provided on the surface of the insulator substrate. . On the other hand, the thickness of the insulator substrate is not a parameter that determines the capacitance of the capacitor, and is set to an arbitrary dimension. Therefore, the mechanical strength of the filter is ensured by increasing the thickness of the insulating substrate.

【0008】また、フィルタの実装面には、グランド電
極が設けられていない(あるいは、設けられていても縁
部に僅かな面積を占めるに過ぎない)ため、フィルタが
実装される回路基板等の領域にも信号線路が配設され
る。
Further, since the ground electrode is not provided on the mounting surface of the filter (or even if it is provided, it occupies only a small area at the edge portion), the circuit board or the like on which the filter is mounted is not provided. A signal line is also arranged in the area.

【0009】[0009]

【実施例】以下、本発明に係るチップ型ノイズ除去フィ
ルタの実施例を添付図面を参照して説明する。以下の実
施例において、同一部品及び同一部分には同じ符号を付
した。 [第1実施例、図1〜図3]図1及び図2に示すよう
に、絶縁体基板1の表面には、入出力電極2,3、グラ
ンド電極5、誘電体7、導電体9が設けられている。絶
縁体基板1には、機械的強度が強く、高耐熱性に優れた
材料、例えばアルミナ、ポリイミド樹脂、エポキシ樹脂
等が使用される。絶縁体基板1の厚みは、フィルタに要
求される機械的強度を確保するに充分な寸法とされる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a chip type noise removal filter according to the present invention will be described below with reference to the accompanying drawings. In the following embodiments, the same parts and the same parts are designated by the same reference numerals. [First Embodiment, FIGS. 1 to 3] As shown in FIGS. 1 and 2, input / output electrodes 2, 3, a ground electrode 5, a dielectric 7 and a conductor 9 are formed on the surface of an insulating substrate 1. It is provided. The insulator substrate 1 is made of a material having high mechanical strength and high heat resistance, such as alumina, polyimide resin, or epoxy resin. The thickness of the insulator substrate 1 is set to a size sufficient to secure the mechanical strength required for the filter.

【0010】入出力電極2,3及びグランド電極5は、
Ag,Ag−Pd等のペーストをスクリーン印刷の手段
にて絶縁体基板1に塗布、乾燥することにより厚膜形成
してもよいし、スパッタリングやイオンプレーティング
や蒸着等の手段にて薄膜形成してもよい。誘電体7は、
グランド電極5の上から形成されている。この誘電体7
は、PZTやBaTiO3のセラミックス材等のペース
トをスクリーン印刷の手段にて絶縁体基板1に塗布、乾
燥することにより形成したり、スパッタリングや蒸着等
の手段にて形成してもよい。
The input / output electrodes 2 and 3 and the ground electrode 5 are
A thick film may be formed by coating a paste such as Ag or Ag-Pd on the insulating substrate 1 by means of screen printing and drying, or forming a thin film by means such as sputtering, ion plating or vapor deposition. May be. The dielectric 7 is
It is formed from above the ground electrode 5. This dielectric 7
May be formed by applying a paste of a ceramic material such as PZT or BaTiO 3 to the insulator substrate 1 by means of screen printing and drying, or by means such as sputtering or vapor deposition.

【0011】誘電体7の上から、入出力電極2と3を電
気的に接続する導電体9が形成されている。導電体9の
材料に、導電性が優れたAg,Ag−Pd,Cu等を使
用した場合には導線やインダクタとして機能する。ま
た、導電体9の材料に、カーボンやサーメット等を使用
した場合には抵抗体として機能する。例えば導電体9を
抵抗体として機能させる場合には、カーボンペースト等
をスクリーン印刷の手段にて絶縁体基板1に塗布するこ
とにより厚膜形成してもよいし、W,Ni−Cr合金等
でスパッタリングや蒸着の手段にて絶縁体基板1に薄膜
形成してもよい。抵抗体の抵抗値は、通常、数10Ω〜
数10KΩの範囲内で設定される。絶縁体基板1は、そ
の表面に設けられた入出力電極2,3、グランド電極
5、誘電体7及び導電体9と共に一体的に焼成される。
A conductor 9 for electrically connecting the input / output electrodes 2 and 3 is formed on the dielectric 7. When Ag, Ag-Pd, Cu or the like having excellent conductivity is used as the material of the conductor 9, it functions as a conductor or an inductor. When carbon, cermet or the like is used as the material of the conductor 9, it functions as a resistor. For example, when the conductor 9 is made to function as a resistor, a thick film may be formed by applying carbon paste or the like to the insulating substrate 1 by means of screen printing, or may be formed of W, Ni-Cr alloy or the like. A thin film may be formed on the insulating substrate 1 by means of sputtering or vapor deposition. The resistance value of the resistor is usually several tens of Ω
It is set within the range of several 10 KΩ. The insulating substrate 1 is integrally fired together with the input / output electrodes 2 and 3, the ground electrode 5, the dielectric 7 and the conductor 9 provided on the surface thereof.

【0012】図3はこうして得られたチップ型ノイズ除
去フィルタの電気等価回路図である。(A)は導電体9
が導線として機能した場合、(B)は導電体9が抵抗体
として機能した場合、(C)は導電体9がインダクタと
して機能した場合を表したものである。グランド電極5
と誘電体7と導電体9とで静電容量Cのコンデンサを形
成している。絶縁体基板1の厚みは静電容量Cを決定す
るパラメータではないので、絶縁体基板1の厚みを充分
に厚くしてフィルタの機械的強度を確保することができ
る。
FIG. 3 is an electrical equivalent circuit diagram of the chip type noise elimination filter thus obtained. (A) is a conductor 9
Shows the case where the conductor 9 functions as a conducting wire, (B) shows the case where the conductor 9 functions as a resistor, and (C) shows the case where the conductor 9 functions as an inductor. Ground electrode 5
The dielectric 7 and the conductor 9 form a capacitor having a capacitance C. Since the thickness of the insulating substrate 1 is not a parameter that determines the capacitance C, the insulating substrate 1 can be made sufficiently thick to secure the mechanical strength of the filter.

【0013】また、得られたフィルタは絶縁体基板1の
下面、すなわち実装面にグランド電極5が設けられてい
ない(あるいは、設けられていても縁部に僅かな面積を
占めるに過ぎない)ので、回路基板上のフィルタ実装領
域にも信号線路を配設することができ、高密度実装に対
応することができる。 [第2実施例、図4及び図5]第2実施例のチップ型ノ
イズ除去フィルタは、第1実施例のフィルタと同様に、
絶縁体基板1の表面に入出力電極2,3、グランド電極
5、誘電体7、導電体9を設けたものである。ただし、
絶縁体基板1の上面に、導電体9、誘電体7、グランド
電極5を、この順に積み上げた構造をし、導電体9と誘
電体7とグランド電極5とでコンデンサを形成してい
る。このフィルタは第1実施例のフィルタと同様の作用
効果を奏する。 [第3実施例、図6及び図7]第3実施例のチップ型ノ
イズ除去フィルタは、絶縁体基板21の表面に入出力電
極22,23、グランド電極25、誘電体27、導電体
29を設けたものである。絶縁体基板21の厚みは、フ
ィルタに要求される機械的強度を確保するに充分な寸法
とされる。
Further, since the obtained filter does not have the ground electrode 5 provided on the lower surface of the insulating substrate 1, that is, the mounting surface (or, even if it is provided, it only occupies a small area at the edge portion). The signal line can be arranged in the filter mounting area on the circuit board, and high density mounting can be achieved. [Second Embodiment, FIGS. 4 and 5] The chip type noise removal filter of the second embodiment is similar to the filter of the first embodiment,
Input / output electrodes 2, 3, a ground electrode 5, a dielectric 7 and a conductor 9 are provided on the surface of an insulator substrate 1. However,
A conductor 9, a dielectric 7, and a ground electrode 5 are stacked in this order on the upper surface of the insulator substrate 1, and the conductor 9, the dielectric 7 and the ground electrode 5 form a capacitor. This filter has the same effects as the filter of the first embodiment. [Third Embodiment, FIGS. 6 and 7] The chip type noise removal filter of the third embodiment has input / output electrodes 22, 23, a ground electrode 25, a dielectric 27 and a conductor 29 on the surface of an insulator substrate 21. It is provided. The thickness of the insulator substrate 21 is set to a size sufficient to secure the mechanical strength required for the filter.

【0014】入出力電極22,23は絶縁体基板21の
左右の隅部に設けられ、電極22と23は導電体29を
介して電気的に接続している。グランド電極25は絶縁
体基板21の中央部に設けられている。このグランド電
極25の上に、誘電体27、導電体29を順に積み重ね
た構造をし、導電体29と誘電体27とグランド電極2
5とでコンデンサを形成している。このフィルタは第1
実施例のフィルタと同様の作用効果を奏する。 [他の実施例]本発明に係るチップ型ノイズ除去フィル
タは前記実施例に限定されるものではなく、その要旨の
範囲内で種々に変形することができる。
The input / output electrodes 22 and 23 are provided at the left and right corners of the insulating substrate 21, and the electrodes 22 and 23 are electrically connected via a conductor 29. The ground electrode 25 is provided at the center of the insulator substrate 21. A dielectric 27 and a conductor 29 are stacked in this order on the ground electrode 25, and the conductor 29, the dielectric 27, and the ground electrode 2 are formed.
And 5 form a capacitor. This filter is the first
The same effect as the filter of the embodiment is obtained. [Other Embodiments] The chip-type noise elimination filter according to the present invention is not limited to the above-mentioned embodiments, but can be variously modified within the scope of the gist thereof.

【0015】複数の導電体を一枚の絶縁体基板に設けて
チップ型ノイズフィルタアレイとしてもよい。また、前
記実施例は、絶縁体基板と誘電体と導電体と入出力電極
とグランド電極を一体的に焼成したものについて説明し
たが、必ずしもこれに限定されるものではなく、焼成済
み絶縁体基板に誘電体や導電体等を形成し焼成するもの
であってもよい。
A plurality of conductors may be provided on one insulating substrate to form a chip type noise filter array. Further, in the above-described embodiment, the insulating substrate, the dielectric, the conductor, the input / output electrode, and the ground electrode are integrally fired, but the present invention is not limited to this. Alternatively, a dielectric or a conductor may be formed and fired.

【0016】さらに、少なくとも導電体をポリイミド等
の絶縁膜にて被覆すれば、外部からの衝撃や湿度等の影
響から導電体を保護することができ、フィルタの信頼性
がアップする。
Further, if at least the conductor is covered with an insulating film such as polyimide, the conductor can be protected from the influence of external impact, humidity, etc., and the reliability of the filter is improved.

【0017】[0017]

【発明の効果】以上の説明で明らかなように、本発明に
よれば、絶縁体基板の表面にグランド電極と導電体と誘
電体とで構成される静電容量Cのコンデンサを形成した
ので、絶縁体基板の厚みは静電容量Cを決定するパラメ
ータではなくなる。従って、絶縁体基板の厚みを充分に
厚くして、フィルタの機械的強度を確保することができ
る。
As is apparent from the above description, according to the present invention, since the capacitor having the capacitance C composed of the ground electrode, the conductor and the dielectric is formed on the surface of the insulator substrate, The thickness of the insulating substrate is no longer a parameter that determines the capacitance C. Therefore, the mechanical strength of the filter can be ensured by sufficiently increasing the thickness of the insulating substrate.

【0018】また、得られたフィルタは絶縁体基板の下
面、すなわち実装面にグランド電極が設けられていない
(あるいは、設けられていても縁部に僅かな面積を占め
るに過ぎない)ので、回路基板上のフィルタ実装領域に
も信号線路を配設することができ、高密度実装に対応す
ることができる。
In addition, since the obtained filter has no ground electrode on the lower surface of the insulating substrate, that is, on the mounting surface (or even if it is provided, it occupies only a small area at the edge portion), the circuit is The signal line can also be arranged in the filter mounting area on the substrate, and high density mounting can be achieved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係るチップ型ノイズ除去フィルタの第
1実施例を示す斜視図。
FIG. 1 is a perspective view showing a first embodiment of a chip type noise removal filter according to the present invention.

【図2】図1のII−II断面図。FIG. 2 is a sectional view taken along line II-II of FIG.

【図3】図1に示したチップ型ノイズ除去フィルタの電
気等価回路図を示すもので、(A)は導電体が導線とし
て機能した場合、(B)は導電体が抵抗体として機能し
た場合、(C)は導電体がインダクタとして機能した場
合。
3A and 3B are electrical equivalent circuit diagrams of the chip-type noise elimination filter shown in FIG. 1, where FIG. 3A is a case where a conductor functions as a conductor, and FIG. 3B is a case where a conductor functions as a resistor. , (C) when the conductor functions as an inductor.

【図4】本発明に係るチップ型ノイズ除去フィルタの第
2実施例を示す斜視図。
FIG. 4 is a perspective view showing a second embodiment of the chip noise elimination filter according to the present invention.

【図5】図4のV−V断面図。5 is a sectional view taken along line VV of FIG.

【図6】本発明に係るチップ型ノイズ除去フィルタの第
3実施例を示す斜視図。
FIG. 6 is a perspective view showing a third embodiment of the chip type noise removal filter according to the present invention.

【図7】図6のVII-VII断面図。7 is a sectional view taken along line VII-VII of FIG.

【符号の説明】[Explanation of symbols]

1…絶縁体基板 2,3…入出力電極 5…グランド電極 7…誘電体 9…導電体 21…絶縁体基板 22,23…入出力電極 25…グランド電極 27…誘電体 29…導電体 1 ... Insulator substrate 2, 3 ... I / O electrode 5 ... Ground electrode 7 ... Dielectric 9 ... Conductor 21 ... Insulator substrate 22, 23 ... Input / output electrode 25 ... Ground electrode 27 ... Dielectric 29 ... Conductor

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 絶縁体基板の表面に、二つの入出力電極
と、グランド電極と、前記二つの入出力電極を電気的に
接続する導電体と、前記グランド電極と前記導電体に挟
まれた誘電体とを設け、 前記グランド電極と前記導電体と前記誘電体とでコンデ
ンサを形成したこと、 を特徴とするチップ型ノイズ除去フィルタ。
1. An insulator substrate is sandwiched between two input / output electrodes, a ground electrode, a conductor electrically connecting the two input / output electrodes, and the ground electrode and the conductor on a surface of the insulator substrate. A chip-type noise removal filter, comprising: a dielectric, and a capacitor formed of the ground electrode, the conductor, and the dielectric.
JP30396993A 1993-12-03 1993-12-03 Chip-type noise filter Pending JPH07161584A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30396993A JPH07161584A (en) 1993-12-03 1993-12-03 Chip-type noise filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30396993A JPH07161584A (en) 1993-12-03 1993-12-03 Chip-type noise filter

Publications (1)

Publication Number Publication Date
JPH07161584A true JPH07161584A (en) 1995-06-23

Family

ID=17927463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30396993A Pending JPH07161584A (en) 1993-12-03 1993-12-03 Chip-type noise filter

Country Status (1)

Country Link
JP (1) JPH07161584A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006032425A (en) * 2004-07-12 2006-02-02 Murata Mfg Co Ltd Multilayered coil array

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006032425A (en) * 2004-07-12 2006-02-02 Murata Mfg Co Ltd Multilayered coil array
JP4604580B2 (en) * 2004-07-12 2011-01-05 株式会社村田製作所 Multilayer coil array

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