JPH07154167A - Emitter follower output current limit circuit - Google Patents

Abstract

PURPOSE:To set a high level output voltage to a high level by detecting an output current with a voltage drop across a current sensing resistor and feeding back a current corresponding to the voltage drop to a load of a differential amplifier circuit. CONSTITUTION:Input signals V1, V2 are inputted to bases of differential transistors(TRs) Q1, Q2 having a current mirror circuit comprising active loads and TRs Q3, Q4 or the like. A collector voltage of the TRQ2 changes with a voltage between the input signals V1, V2 and the change is outputted from a TR Q5 as an output voltage V3. On the other hand, a collector of the TRQ5 is connected to a power supply Vcc via a current sensing resistor R3 and a resistor R5. Then a feedback circuit is formed by connecting a resistor R6 and a current limit TR Q6 across the resistor R3 and an emitter of the TR Q4. Thus, even when an output terminal is in short-circuit with a low power supply potential due to any fault, the current I5 is limited and a higher output voltage V3 is obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current limiting circuit for an electronic circuit, and more particularly to a current limiting circuit for an emitter follower circuit used in an output stage of a differential amplifier or the like.

[0002]

2. Description of the Related Art FIG. 3 shows a conventional emitter follower as an output stage.
An example of the circuit of the differential amplifier included in FIG. Conventional differential amplifier circuit
Is a transistor Q, as shown in FIG.₁~ Q_Four, Resistance R
₁, R₂And constant current circuit I_AA differential amplifier consisting of
Register Q_Five~ Q₇, Resistance R ₃, R_Four, And the constant current circuit I_B
It includes an output circuit consisting of.

In this conventional differential amplifier circuit, the collector voltage of the transistor Q ₂ changes according to the voltage difference between the input signals V ₁ and V ₂ input to the bases of the transistors Q ₁ and Q ₂ , respectively. The impedance-converted output voltage V ₃ appears at the emitter of the emitter follower transistor Q ₅ whose base is connected to this collector.

When the output voltage V ₃ is connected to the ground at a low potential such as a short circuit with a low impedance, a collector current I ₅ flowing through the transistor Q ₅ is h _FE times the base current I _b . In the configuration in which the collector of the transistor Q ₅ is directly connected to the power supply V _CC , the current I ₅ is not limited and the transistor Q ₅ may be destroyed. Therefore, in the conventional emitter follower output circuit, the transistors Q ₆ and Q ₇ ,
The collector current of the transistor Q ₅ is limited by the current limiting circuit composed of the resistors R ₃ and R ₄ . The current limit value I _{5LIM at} this time is represented by the equation (1).

[Number 1] _{I 5LIM ≒ V BEQ6 / R 3} ... (1) where, V _BEQ6 the base-emitter forward voltage of the transistor Q _6, R ₃ is a resistance of the resistor R _3.

[0005]

However, the circuit configuration of the conventional current limiting circuit described above has a problem that the output voltage V ₃ cannot be increased due to a considerable voltage drop in the current limiting circuit itself. That is, in the circuit configuration of FIG. 3, the high level V _3H of the output voltage V ₃ is given by the equation (2).

[Number 2] _{V 3H = V CC - (V} R4 + V BEQ6 + V BEQ7 + V CEQ5) ... (2)

Where V _R4 is the voltage drop across the resistor R ₄ and V
_BEQ6 and V _BEQ7 are base-emitter forward voltages of the transistors Q ₆ and Q ₇ , V _CEQ5 is a collector-emitter voltage of the transistor Q ₅ , and V _R4 = 0.
If 2V, V _BEQ6 = V _BEQ7 = 0.7V, V _CEQ5 = 0.2V, the maximum value of the output voltage V ₃ ; V _3Hmax becomes the formula (3),

[Number 3] _{V 3Hmax = V CC -1.8V ... (} 3) there is a problem to say that it is not possible to increase the high-level output voltage V _3H than this value.

In view of the above problems, an object of the present invention is to provide an output current limiting circuit capable of increasing the high level output voltage V _3H with less voltage drop of the current limiting circuit itself.

[0008]

In order to solve the above problems, the present invention has the following constitution. That is, according to the present invention, one end of each of the first and second resistors is connected to a common power source, and the other end of each of the resistors is connected to the emitters of the first and second transistors, respectively. A current mirror circuit in which the collector of the second transistor, the base of the first transistor, and the base of the second transistor are connected to each other; the third transistor of the emitter follower configuration in which the base is connected to the collector of the second transistor;
An emitter follower current limiting circuit, comprising: a third resistor for detecting the collector current of the transistor of 1); and a feedback circuit for returning from the collector of the third transistor to the emitter of the second transistor.

Further, in the present invention, the feedback circuit can be constituted by a transistor in which the voltage across the third resistor is connected to the base-emitter and the collector is connected to the emitter of the second transistor. . Further, in the present invention, the feedback circuit can be configured by a series connection circuit of the diode and the fourth resistor.

[0010]

The output current is detected by the voltage drop of the current detection resistor, and a circuit configuration is provided in which the amount corresponding to the voltage drop is fed back to the load section of the differential amplifier, whereby the high level voltage V ₃ of the output voltage V ₃ is obtained. _3H can get higher value.

[0011]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a circuit diagram showing a first embodiment of a differential amplifier circuit including an emitter follower output current limiting circuit according to the present invention, and the same circuit parts as those in the prior art are designated by the same reference numerals. In FIG. 1, a current source I having a common emitter
Differential input signals V ₁ and V ₂ are input to the respective bases of the differential transistors Q ₁ and Q ₂ connected to _A. The respective collectors of the transistors Q _1, Q _2, the transistor Q ₃ of the current mirror configuration of the active load, Q ₄ and the resistor R _1, R ₂ are connected. Then, the collector voltage of the transistor Q ₂ is changed, the collector voltage of the transistor Q ₂ and impedance-converted by the emitter follower transistor Q ₅ to obtain an output voltage V ₃ in accordance with the voltage difference between the input signal V _1, V _2.

The collector of the transistor Q ₅ is connected to the power supply V _CC via the current detection resistor R ₃ and the resistor R ₅ .
The emitter and the base of the output current limiting transistor Q ₆ are connected to both ends of the current detection resistor R ₃ via the series resistor R _6, and the collector of the transistor Q ₆ is connected to the emitter of the transistor Q ₄ . .

If the output terminal is short-circuited to a low potential due to some trouble and the emitter current of the transistor Q ₅ tries to flow excessively, a voltage drop occurs in the current detection resistor R ₃ connected to the collector of the transistor Q _5. It becomes larger and transistor Q ₆ begins to conduct. To flow through the collector current I ₆ resistor R ₂ from the power source V _CC at this time the transistor Q _6, a voltage drop at the resistor R ₂ increases, the current depending on the conditions of the following expressions (4) to Formula (7) I ₅ is limited.

[ _Equation 4] V _BEQ3 + R ₁ · I ₃ = V _BEQ4 + R ₂ · (I ₄ + I ₆ ) (4)

(5) I ₄ = I ₂ + I _b (5)

[Equation 6] I ₅ = h _FE · I _b (6)

[ _Equation 7] V _BEQ6 + R ₆ · I ₆ = R ₃ · I ₅ (7)

The high level voltage V _3H of the output voltage is limited by the equation (8) or the equation (9).

[Equation 8] _{V 3H = V CC - (V} CEQ5 + V R6 + V BEQ6 + V R5) ... (8)

[ _Formula 9] V _3H = V _CC − (V _BEQ5 + V _CEQ4 + VR ₂ ) ... (9) Now, V _CEQ5 = V _{CEQ4 ≈0.2} V, V _BEQ5 = V _{BEQ6 ≈0} .
_{7V, V R2 ≒ 0.2V, V} R5 ≒ 0.1V, V R6 = 0.1V
Then, V _3H = V _CC -1.1V, and the output voltage V ₃ can be obtained to a higher value.

Next, FIG. 2 shows a second embodiment of a differential amplifier circuit having an emitter follower output current limiting circuit according to the present invention. The same circuit components as those in the first embodiment are designated by the same reference numerals. In the circuit configuration of the first embodiment, when the potential at the point A greatly drops for some reason, a forward bias is applied between the base and collector of the transistor Q ₆ , and the output current cannot be stably limited. The second one is an improvement on this point.
This is an example.

The configuration of the current limiting circuit of the present embodiment is based on a modification of the configuration of the transistor Q ₆ and the resistors R ₃ , R ₅ and R ₆ of the first embodiment, and the transistor Q ₄ as a load of the differential amplifier. one end of an emitter and connected to a connection point of the resistors R ₂ and one end of resistor R _6, and connect the other end to the collector and base of the transistor Q _6, the emitter of the transistor Q ₆ is the collector and the resistance R ₃ of the transistor Q ₅ And the other end of the resistor R ₃ is connected to the power supply V _CC .

The collector current I ₅ of the transistor Q ₅ is limited by the conditions shown in the equations (10) to (13).

[ _Equation 10] V _BEQ3 + R ₁ · I ₃ = V _BEQ4 + R ₂ · (I ₄ + I ₆ ) (10)

[Equation 11] I ₄ = I ₂ + I _b (11)

[Equation 12] I ₅ = h _FE · I _b (12)

V _BEQ6 + I ₆ · R ₆ + R ₂ · (I ₄ + I ₆ ) = R ₃ · I ₅ (13) The high level voltage V _3H of the output voltage is limited by the equation (14).

[ _Formula 14] V _3H = V _CC − (V _CEQ5 + V _R6 + V _BEQ6 + V _R2 ) (14) Now, V _{CEQ5 ≈0.2} V, V _{BEQ6 ≈0.7} V, V _{R2 ≈0} .
If 2V and V _R1 ≈0.1V, then V _3H = V _CC -1.2V, and a high high-level output voltage can be obtained even with the circuit configuration of this embodiment.

[0018]

As described above, according to the present invention,
An emitter follower output current limiting circuit with a small voltage drop is realized, and a high level output voltage higher than before can be obtained even if the same power supply voltage is used. When applied to a differential amplifier, an amplifier with a wider dynamic range than before can be obtained. There is an effect that it can be provided.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an embodiment of a differential amplifier using an emitter follower output current limiting circuit according to the present invention.

FIG. 2 is a circuit diagram of another embodiment of the differential amplifier using the emitter follower output current limiting circuit according to the present invention.

FIG. 3 is a circuit diagram of a conventional differential amplifier.

[Explanation of symbols]

Q ₁ to Q ₆ transistor R ₁ to R ₆ resistor I _A, I _B constant-current source

Claims (3)

[Claims] 1. One end of each of the first and second resistors is connected to a common power source, and the other end of each of the resistors is connected to the emitters of the first and second transistors, respectively. A current mirror circuit in which the collector, the base of the first transistor, and the base of the second transistor are connected to each other; a third transistor of an emitter follower configuration in which the base is connected to the collector of the second transistor; An emitter follower current limiting circuit comprising: a third resistor for detecting a collector current of a transistor; and a feedback circuit for feeding back from a collector of the third transistor to an emitter of the second transistor. 2. The emitter follower current limiting circuit according to claim 1, wherein the voltage across the third resistor is connected to the base-emitter, and the collector is connected to the emitter of the second transistor. An emitter follower current limiting circuit characterized by comprising a feedback circuit. 3. The emitter follower current limiting circuit according to claim 1, wherein the feedback circuit is constituted by a series connection circuit of a diode and a fourth resistor.