JPH07153987A - Semiconductor light receiving element - Google Patents

Abstract

PURPOSE:To shorten running time of a carrier by electrically connecting a P element in which a first conductive buffer layer, light absorbing layer, and window layer are formed in order on a semiconductor substrate and an N element in which a second conductive buffer layer, light absorbing layer, and window layer are formed in order by the side of the P element thereon. CONSTITUTION:After an n-InP buffer layer 2 is grown on a semiconductor substrate 1 a selective mask 12 made of SiO2 film is formed thereon and a p-InP buffer layer 3 is selectively formed by a thermal diffusion method. Next, after removing the mask 12, an n-InGaAS light absorbing layer 4 is grown to form an n-InP window layer 5 thereon. Then a p-InP window layer 6 is selectively formed through thermal diffusion. Further, after growing an etching mask 12, a wafer is divided into two elements, P element and N element, and they are connected with each other in siries by a common electrode 7. Finally, a P-side electrode 8 is formed on the P element, and an N-side electrode 9 on the N element, respectively. Thus the running time of a carrier can be shortened, resulting in high-speed response.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light receiving element, and more particularly to a balanced type light receiving element for coherent optical communication.

[0002]

2. Description of the Related Art In optical communication, coherent optical communication technology for transmitting information by modulating the frequency and phase of light has been studied instead of optical communication for transmitting information by intensity modulation of light. In this way, by utilizing the characteristics of light waves, compared to the conventional intensity modulation method, it is possible to increase the transmission distance (super span) and increase the optical density by dividing and multiplexing the optical frequency. Considered as a capacity optical communication technology.

An example of a coherent optical communication system is shown in FIG.
Shown in. FIG. 5 shows an example of a heterodyne detection system, which is divided into a transmission section for extracting a signal and a reception section for performing heterodyne detection / polarization diversity reception. In order to compensate the polarization state of the single-mode optical fiber cable, which is the transmission line, the receiving unit splits the polarization beam splitter (PBS) into two orthogonal polarizations, and the local oscillation optical laser diode for heterodyne detection (local Oscillating light LD), a 3 dB optical coupler that mixes the signal light separated into the respective polarization states and the local oscillating light and splits the light into two lights that are out of phase by π, converts the mixed light into electricity, and generates a beat signal. A balanced type light receiving element (Dual-PIN-PD or Dual-PI) in which two PIN photodiodes are connected in series for extraction.
It is composed of a Quad-PIN-PD) in which two N-PDs are integrated, and a low-noise preamplifier and a detection circuit.

In such a structure of the receiving section, the output of the local oscillation light is increased, the output of the local oscillation light is increased by the balanced type light receiving element, and the local oscillation light LD is increased by the balanced type light receiving element. By canceling out the intensity noise from, the minimum receiving sensitivity reaches the quantum noise limit, and high sensitivity is achieved. Therefore, the characteristics required for the balanced type light receiving element for high sensitivity are two PIs connected in series.
N-PD is optically and electrically equivalent, characteristics of both devices (quantum efficiency, dark current, junction capacitance, response speed, S /
N) are required, and the dual-PI monolithically integrated to meet these requirements.
N-PD is under consideration.

FIG. 6 shows a conventional example of a Dual-PIN-PD which is an example of a balanced type light receiving element. Semi-insulating In
It has a configuration in which two light receiving elements provided at intervals on the P substrate 1 are integrated. Each light receiving element has a carrier concentration of 1 × 10 ¹⁵ cm ⁻³ , an n-InP buffer layer 2 having a layer thickness of 2 μm, and a carrier concentration of 3 × 10 ¹⁵ on the semi-insulating substrate 1.
cm ⁻³ , layer thickness 2 μm of n-InGaAS light absorption layer 4, finally carrier concentration 5 × 10 ¹⁵ cm ⁻³ , layer thickness 1.4 μm of n-InP window layer 5, and 1 formed in the window layer. × 10 ¹⁸ c
It is composed of m ⁻³ p-InP region 6. Of these two light receiving elements, the p-side electrode 8 drawn out from one p-InP light receiving region is used as the n-InP of the other light receiving element.
Dual by connecting to the n-side electrode 9 provided on the window layer 5
The common electrode 7 that is the output side of the -PIN-PD is formed. Here, the light receiving element composed of the n-side electrode 9 and the common electrode 7 is called an N element, and the light receiving element composed of the common electrode 7 and the p-side electrode 8 is called a P element.

In the balanced type light receiving element having such a structure,
The mixed light of the signal light and the local oscillation light whose phase is shifted by π is P
When incident on the element and the N element at the same time, the carriers photoelectrically converted by the respective elements flow to the common electrode 7, and as a result, a difference signal between the two is output to the output side of the balanced type light receiving element. Therefore, the intensity noise component of the light from the local oscillation light LD can be canceled out, and the quantum noise limit of the receiving sensitivity can be achieved. Here, in order to cancel the intensity noise of the local oscillation light LD, it is important that the outputs of the P element and the N element are equivalent as described above. Here, the two PIN-PDs are monolithically integrated, and the P element and the N element are symmetrically arranged around the common electrode that also serves as the n-side electrode of the P element and the p-side electrode of the N element. The variation in quantum efficiency and the variation in capacity due to variation are suppressed to 2% or less, and good balance characteristics are obtained.

However, the problem here is that in this conventional Dual-PIN-PD, the n-InGaAs light absorption layer 4 has a large thickness of 3 to 4 μm in order to obtain sufficient light receiving sensitivity and good balance characteristics. However, this is a factor that limits the response speed of the light receiving element.

Next, FIG. 7 shows a second conventional example (JP-A-4-20).
No. 7078). The second conventional example has a waveguide type Dual-PIN-PD structure in which two waveguide type PIN-PDs for dividing light absorption and carrier traveling directions are connected in series. The light incident from the end face of the n-InGaAs light absorption layer 4 absorbs the light in the longitudinal direction of the n-InGaAs light absorption layer 4, so that high photosensitivity can be obtained, and the generated carriers are at both ends of the light absorption layer. P-In
The electric field applied to the P region 6 and the n-InP region causes lateral travel.

[0009]

In the waveguide type balanced type light receiving device of the above-mentioned conventional example, the generated carriers are p-InP regions and n-type regions provided on both sides of the light absorption layer.
The electric field applied to the InP region causes lateral travel. However, the response speed is that the carrier is n-InGa.
Since the carrier travels laterally with respect to the As light absorption layer, there arises a problem that the response is deteriorated due to the carrier travel time limitation.

[0010]

A semiconductor light receiving element of the present invention comprises a first conductivity type buffer layer (E) on a semi-insulating substrate (Eg1).
g1), a first-conductivity-type light absorption layer (Eg2), and a second-conductivity-type window layer (Eg1), which are sequentially formed under the condition of Eg1> Eg2, and are composed of a heteroepitaxial layer, and the semi-insulating substrate. A second conductivity type buffer layer (Eg1), a first conductivity type light absorbing layer (Eg2), and a first conductivity type window layer (Eg1) are sequentially formed above and next to the first element under the condition of Eg1> Eg2. And a second element formed of a heteroepitaxial layer, a structure in which the first conductivity type buffer layer (Eg1) of the first element and the second conductivity type buffer layer (Eg1) of the second element are electrically connected. is doing.

Further, another semiconductor light receiving element of the present invention is a buffer layer (Eg1) of the first conductivity type on a semi-insulating substrate (Eg1).
And the first conductivity type cladding layer (Eg3), the first conductivity type light absorbing layer (Eg2), the second conductivity type cladding layer (Eg3), and the second conductivity type window layer (Eg1) satisfy the condition of Eg1>Eg3> Eg2. A first element composed of a heteroepitaxial layer sequentially formed by the above, a second conductivity type buffer layer (Eg1) and a second conductivity type clad layer (Eg3) on the semi-insulating substrate and beside the first element. A first-conductivity-type light absorption layer (Eg2), a first-conductivity-type cladding layer (Eg3), and a first-conductivity-type window layer (Eg1), which are heteroepitaxial layers sequentially formed under the condition of Eg1>Eg3>Eg2; It has a structure in which two elements are electrically connected to the first conductivity type buffer layer (Eg1) of the first element and the second conductivity type buffer layer (Eg1) of the second element.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 shows a semiconductor light receiving element showing a first embodiment of the present invention. 2A to 2F are cross-sectional views showing the manufacturing process of the semiconductor light receiving element of the present invention. Semi-insulating InP
Carrier concentration on the substrate 1 by vapor phase growth method 1 × 10 ¹⁵ 〜
2 × 10 ¹⁶ cm ⁻³ and a layer thickness of 1 to ³ μm are preferable, and in this example, a carrier concentration of 1 × 10 ¹⁵ cm ⁻³ and a layer thickness of 2 μm are n−.
A selective mask 12 of, for example, a SiO ₂ film is formed on the epitaxial wafer on which the InP buffer layer 2 is grown, and the p-InP buffer layer 3 is selectively formed by, for example, a thermal diffusion method of Zn (FIG. 2A). Next, on the epitaxial wafer from which the mask 12 has been removed, the carrier concentration is 1 × 10 ^{15 to} 5 × 10 ^15.
cm ⁻³ , layer thickness ³ to 4 μm is preferable, and in this example, n-InGaA having carrier concentration 3 × 10 ¹⁵ cm ⁻³ and layer thickness 2 μm.
After the S light absorption layer 4 is grown, the carrier concentration is preferably 2 × 10 ^{15 to} 6 × 10 ¹⁵ cm ⁻³ and the layer thickness is 1 to 2 μm as the window layer. In this example, the carrier concentration is 5 × 10 ¹⁵ cm ^−3. ,
The n-InP window layer 5 having a layer thickness of 1.4 μm is grown (FIG. 2).
(B)).

After forming the SiO ₂ film 12 as a diffusion mask on the above epitaxial wafer by, for example, the CVD method, the SiO ₂ film corresponding to the n-InP buffer layer 2 is perforated, and the p is formed by thermal diffusion of Zn, for example. -InP window layer 6 is selectively formed (FIG. 2C).

After the diffusion mask is removed, an etching mask 12 is grown by a CVD method so as to divide the epitaxial wafer into two parts for forming a waveguide type light receiving element and separating elements between the P element and the N element (see FIG. 2). After (d)), the window layer 5 side to the semi-insulating InP substrate 1 are subjected to, for example, RIE.
It is removed by the (Reactive Ion Etching) method (FIG. 2E).

Au is deposited by, for example, an electron beam method between the n-InP buffer layer 2 and the p-InP buffer layer 3 of the waveguide type light receiving element separated into the P element and the N element to form the common electrode 7. Two waveguide type light receiving elements are connected in series.

Next, AuZn, for example, is formed as a p-side electrode on the p-InP window layer 6 and AuGe, for example, as an n-side electrode on the n-InP window layer 5 by a vapor deposition method, and then alloyed by heat treatment. Finally, Au is vapor-deposited by, for example, an electron beam vapor deposition method as an electrode for bonding to form an n-side electrode 9 and a p-side electrode 8 (FIG. 2 (f)).

The waveguide type Dual-
In the PIN-PD, a forward bias is applied to the n-side electrode 9 and a reverse bias is applied to the p-side electrode 8, and a signal output is taken from the common electrode 7, and the n-InGaAS light of the two light-receiving elements connected in series is used. Light is made incident from the end face side of the absorption layer 4. Since the light incident from the end face is absorbed in the length direction of the waveguide, a high quantum efficiency of 95% or more is obtained, and the photocarriers generated by the absorbed light are applied in the thickness direction of the waveguide. It can shorten the travel time for traveling in the thickness direction of the respective waveguides by an electric field, thereby enabling high-speed response of more than 20GH _Z. Further, since the Dual-PIN-PD structure can be realized with a simple epitaxial structure and process, the characteristic variation of the two elements due to the above factors can be suppressed within 1%, and a good balance characteristic can be obtained.

In the above embodiment, the epitaxial wafer prepared by the vapor phase epitaxy method is explained.
Method, MOCVD method, MBE method, and ALE method, the same effect can be obtained.

FIG. 3 is a perspective view showing a semiconductor light receiving element according to the second embodiment of the present invention. 4A to 4F are cross-sectional views showing a method for manufacturing the semiconductor light receiving element. Carrier concentration of 1 × on the semi-insulating InP substrate 1 by vapor phase epitaxy
10 ^{15 to} 2 × 10 ¹⁶ cm ⁻³ and a layer thickness of 1 to ³ μm are preferable, and in this example, carrier concentration is 1 × 10 ¹⁵ cm ⁻³ and layer thickness 2
μm n-InP buffer layer 2 and carrier concentration 1 × 10 ¹⁵
It is preferably 5 × 10 ¹⁵ cm ⁻³ and a layer thickness of 0.3 to 0.6 μm. In this example, an epitaxial wafer on which an n-InGaAsP cladding layer 10 having a carrier concentration of 3 × 10 ¹⁵ cm ⁻³ and a layer thickness of 0.4 μm is grown. Then, a selective mask 12 of, for example, a SiO ² film is formed, and a p-InP buffer layer 3 and a p-InGaAsP cladding layer 11 are selectively formed by, for example, a thermal diffusion method of Zn (FIG. 4A). Then, on the epitaxial wafer, the carrier concentration is 1 × 10 ^{15 to} 5 × 10 ¹⁵ cm.
^-3 , a layer thickness of ³ to 4 μm is preferable. In this example, after the n-InGaAs light absorption layer 4 having a carrier concentration of 3 × 10 ¹⁵ cm ⁻³ and a layer thickness of 2 μm is grown, the carrier concentration is 1 × 10 ¹⁵ c again.
m ⁻³ , layer thickness 0.3 to 0.6 μm is preferable, and in this example, carrier concentration 3 × 10 ¹⁵ cm ⁻³ , layer thickness 0.4 μm n −
The InGaAsP clad layer 10 is grown, and finally, the window layer preferably has a carrier concentration of 2 × 10 ^{15 to} 6 × 10 ¹⁵ cm ⁻³ and a layer thickness of 1 to 2 μm. In this example, the carrier concentration is 5 × 1.
An n-InP window layer 5 having a thickness of 0 ¹⁵ cm ^-3 and a thickness of 1.4 μm is grown (FIG. 4B).

A diffusion mask 1 is formed on the epitaxial wafer.
2, a SiO ₂ film is formed by, for example, the CVD method, and then the SiO ₂ film corresponding to the n-InP buffer layer 2 is perforated, and the p-InP window layer 6 and the p-InGaAsP layer are formed by, for example, thermal diffusion of Zn. Selectively forming the clad layer 11 (FIG. 4C)> After removing the diffusion mask, the epitaxial layer is divided into two parts for forming a waveguide type light receiving element and separating elements between the P element and the N element. After the etching mask 12 is grown on the substrate by the CVD method (FIG. 4D), the window layer 5 side to the semi-insulating InP substrate 1 are subjected to, for example, RIE (Reactive).
Ion Etching) method (FIG. 4)
(E)).

Au is vapor-deposited between the n-InP buffer layer 2 and the p-InP buffer layer 3 of the waveguide type light receiving element separated into P element and N element by, for example, an electron beam method to form the common electrode 7. Two waveguide type light receiving elements are connected in series.

Next, AuZn, for example, is formed as a p-side electrode on the p-InP window layer 6, and AuGe, for example, is formed as an n-side electrode on the n-InP window layer 5 by a vapor deposition method, and then alloying is performed by heat treatment. Finally, Au is vapor-deposited by, for example, an electron beam vapor deposition method as an electrode for bonding to form the n-side electrode 9 and the p-side electrode 8 (FIG. 4 (f)).

The waveguide type Dual-
In the PIN-PD, a forward bias is applied to the n-side electrode 9 and a reverse bias is applied to the p-side electrode 8, and a signal output is taken from the common electrode 7, and the n-InGaAs light of the two light receiving elements connected in series is used. Light is made incident from the end face side of the absorption layer 4. The light incident from the end surface receives the n-InGaAsP cladding layer 10 and the p-InGa provided above and below.
While being confined in the InGaAs light absorption layer 4 by the AsP clad layer 11 and absorbed in the length direction of the waveguide, a high quantum efficiency of 95% or more is obtained, and the photocarriers generated by the absorbed light are guided. The electric field is applied in the thickness direction of the waveguide to travel in the thickness direction of the waveguide. At this time, the n-InGaAs light absorption layer 4 and the p-
The barrier of the hetero interface generated between the InP window layers 6 is p-InG.
Since the barrier of the hetero interface generated by the aAsP clad layer 11 and between the n-InGaAs light absorption layer 4 and the p-InP buffer layer 3 is the p-InGaAsP clad layer 11, the pile-up time for crossing the barrier is shortened. be able to. As a result, the running time can be shortened to 40 GH.
High-speed response of _Z or higher is possible. Also, Dual-PI
Since the N-PD structure can be realized by a simple epitaxial structure and process, the characteristic variation of the two elements due to the above factors can be suppressed within 1%, and a good balance characteristic can be obtained.

In the above embodiment, the epitaxial wafer prepared by the vapor phase growth method was explained.
Method, MOCVD method, MBE method, and ALE method, the same effect can be obtained.

[0025]

As described above, according to the present invention,
forming a p-n junction to n-InGaAs light absorbing layer in the vertical direction, by which the travel of the carrier in the thickness direction of the epitaxial layer, high-speed response of more than 40GH _Z to PN both elements co for can shorten the travel time Is obtained. Further, since light is absorbed in the longitudinal direction of the n-InGaAs light absorbing layer,
A high quantum efficiency of 95% or more is obtained in both devices. As a result, it is possible to obtain a high-speed balanced type light receiving element having a good balance in which the characteristic variation between both elements is within 1%.

[Brief description of drawings]

FIG. 1 is a perspective view of a semiconductor light receiving element according to a first embodiment of the present invention.

2A to 2F are cross-sectional views showing a manufacturing process of the semiconductor light receiving element of the first embodiment of the present invention.

FIG. 3 is a perspective view of a semiconductor light receiving element according to a second embodiment of the present invention.

FIGS. 4A to 4F are cross-sectional views showing a manufacturing process of a semiconductor light receiving element according to a second embodiment of the present invention.

FIG. 5 is a circuit diagram showing a conventional application example.

FIG. 6 is a sectional view of a conventional semiconductor light receiving element.

FIG. 7 is a perspective view of a semiconductor light receiving element of a second conventional example.

[Description of Reference Signs] 1 semi-insulating InP substrate 2 n-InP buffer layer 3 p-InP buffer layer 4 n-InGaAs light absorption layer 5 n-InP window layer 6 p-InP region 7 common electrode 8 p-side electrode 9 n Side electrode 10 n-InGaAsP clad layer 11 p-InGaAsp clad layer 12 Mask 13 Protective film

Claims (2)

[Claims] 1. A semi-insulating substrate (energy gap Eg
1) A heteroepitaxial structure in which a first conductivity type buffer layer (Eg1), a first conductivity type light absorption layer (energy gap Eg2), and a second conductivity type window layer (Eg1) are sequentially formed under the condition of Eg1> Eg2. A first element comprising a layer, a second conductivity type buffer layer (Eg1), a first conductivity type light absorbing layer (Eg2), and a first conductivity type window layer (on the semi-insulating substrate and beside the first element). Eg1) a second element composed of a heteroepitaxial layer sequentially formed under the condition of Eg1> Eg2, a first conductivity type buffer layer (Eg1) of the first element, and a second conductivity type buffer layer of the second element. A semiconductor light receiving element having a structure in which (Eg1) is electrically connected. 2. A semi-insulating substrate (energy gap Eg
1) a first conductivity type buffer layer (Eg1), a first conductivity type cladding layer (energy gap Eg3), a first conductivity type light absorption layer (energy gap Eg2), a second conductivity type cladding layer (Eg3), and Two-conductivity type window layer (Eg1) is Eg1>
A first element composed of a heteroepitaxial layer sequentially formed under the condition of Eg3> Eg2, a second conductivity type buffer layer (Eg1) and a second conductivity type clad on the semi-insulating substrate and beside the first element. The layer (Eg3), the first conductivity type light absorption layer (Eg2), the first conductivity type cladding layer (Eg3) and the first conductivity type window layer (Eg1) were sequentially formed under the condition of Eg1>Eg3> Eg2. A second element comprising a heteroepitaxial layer and a first conductivity type buffer layer (Eg1) of the first element
2. A semiconductor light receiving element having a structure in which the second conductivity type buffer layer (Eg1) of the second element is electrically connected.