JPH07153942A - Insulated gate bipolar transistor and manufacture thereof - Google Patents
Insulated gate bipolar transistor and manufacture thereofInfo
- Publication number
- JPH07153942A JPH07153942A JP30146493A JP30146493A JPH07153942A JP H07153942 A JPH07153942 A JP H07153942A JP 30146493 A JP30146493 A JP 30146493A JP 30146493 A JP30146493 A JP 30146493A JP H07153942 A JPH07153942 A JP H07153942A
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- Japan
- Prior art keywords
- region
- conductivity
- conductivity type
- collector
- type
- Prior art date
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明は、モータ駆動用半導体
デバイスとして用いられる絶縁ゲート型バイポーラトラ
ンジスタ（以下、本文では「ＩＧＢＴ」と略す）および
その製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulated gate bipolar transistor (hereinafter abbreviated as "IGBT" in the text) used as a semiconductor device for driving a motor and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】従来、モータ駆動用半導体デバイスとし
てバイポーラトランジスタやＭＯＳＦＥＴが用いられて
きた。また、最近ではＩＧＢＴが注目されている。従来
のＩＧＢＴの模式断面図を図３に示す。図３において、
１はコレクタ領域となるＰ+ シリコン基板、２はバッフ
ァ領域となるＮ+ 領域、３はＮ- 領域、４はゲート領域
となるＰ+ 領域、５はエミッタ領域となるＮ+ 領域、６
はゲート酸化膜となる二酸化珪素膜、７はポリシリコン
膜、８はアルミニウム膜からなる電極、１０は電極用の
金属膜である。2. Description of the Related Art Conventionally, bipolar transistors and MOSFETs have been used as semiconductor devices for driving motors. Further, recently, the IGBT has been drawing attention. A schematic sectional view of a conventional IGBT is shown in FIG. In FIG.
Reference numeral 1 denotes a P + silicon substrate serving as a collector region, 2 denotes an N + region serving as a buffer region, 3 denotes an N − region, 4 denotes a P + region serving as a gate region, 5 denotes an N + region serving as an emitter region, 6
Is a silicon dioxide film serving as a gate oxide film, 7 is a polysilicon film, 8 is an electrode made of an aluminum film, and 10 is a metal film for the electrode.
【０００３】この従来のＩＧＢＴは、エミッタ領域から
コレクタ領域まで、Ｎ+ 領域５，Ｐ + 領域４，Ｎ- 領域
３，Ｎ+ 領域２およびＰ+ シリコン基板１からなり、Ｎ
+ ／Ｐ+ ／Ｎ- ／Ｎ+ ／Ｐ+ 構造となっている。This conventional IGBT has a structure in which the emitter region is
N to the collector area+Area 5, P +Area 4, N-region
3, N+Region 2 and P+Made of silicon substrate 1, N
+/ P+/ N-/ N+/ P+It has a structure.
【０００４】[0004]
【発明が解決しようとする課題】上記従来のＩＧＢＴ
は、前述したようにエミッタ領域からコレクタ領域ま
で、Ｎ+ ／Ｐ+ ／Ｎ- ／Ｎ+ ／Ｐ+ 構造となっており、
コレクタ領域であるＰ+ シリコン基板１の存在によって
ダイオードを内蔵していない。そのため、ＩＧＢＴをモ
ータ駆動用として用いる際には、還流用ダイオードとし
て高速ダイオードをＩＧＢＴのコレクタ・エミッタ間に
外付けする必要がある。そのため、高速ダイオード代、
取り付けのための工数アップ、さらには、取り付け場所
の確保によるパッケージの小型化の制限などの課題を残
す。特に、３相モータ用インバータモジュールに用いる
ときには、１台当たりＩＧＢＴと高速ダイオードを６ケ
ずつ使用するので、モジュールの原価に大きく影響す
る。DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
Has an N + / P + / N − / N + / P + structure from the emitter region to the collector region as described above,
The diode is not built in due to the existence of the P + silicon substrate 1 which is the collector region. Therefore, when the IGBT is used for driving a motor, it is necessary to externally attach a high speed diode as a free wheeling diode between the collector and the emitter of the IGBT. Therefore, high-speed diode fee,
There are issues such as increased man-hours for mounting, and restrictions on miniaturization of the package by securing a mounting place. In particular, when used in a three-phase motor inverter module, one IGBT and six high-speed diodes are used per unit, which greatly affects the cost of the module.
【０００５】この発明の目的は、モータ駆動用として用
いる際に従来外付けしていた高速ダイオードを不要とす
るＩＧＢＴおよびその製造方法を提供することである。An object of the present invention is to provide an IGBT which does not require a high speed diode which is conventionally attached externally when used for driving a motor, and a method for manufacturing the same.
【０００６】[0006]
【課題を解決するための手段】請求項１記載のＩＧＢＴ
は、コレクタ領域となる一導電型基板と、この一導電型
基板の一主面上に形成したバッファ領域となる高濃度他
導電型の第１の領域と、この第１の領域上に形成した低
濃度他導電型の第２の領域と、この第２の領域内の表面
に形成したゲート領域となる高濃度一導電型の第３の領
域と、この第３の領域内の表面に形成したエミッタ領域
となる高濃度他導電型の第４の領域と、一導電型基板の
他主面から第１の領域の内部に達する領域に形成した他
導電型の第５の領域とを備えている。An IGBT according to claim 1, wherein:
Are formed on the first region, a one-conductivity-type substrate serving as a collector region, a high-concentration other-conductivity-type first region serving as a buffer region formed on one main surface of the one-conductivity-type substrate. A second region of low-concentration other conductivity type, a third region of high-concentration one conductivity type to be a gate region formed on the surface in the second region, and a third region formed on the surface in the third region A high-concentration other-conductivity-type fourth region to be an emitter region and a different-conductivity-type fifth region formed in a region reaching from the other main surface of the one-conductivity-type substrate to the inside of the first region. .
【０００７】請求項２記載のＩＧＢＴは、コレクタ領域
となる一導電型基板の一主面上にバッファ領域となる高
濃度他導電型の第１の領域を形成し、この第１の領域上
に低濃度他導電型の第２の領域を形成し、この第２の領
域内の表面にゲート領域となる高濃度一導電型の第３の
領域を形成し、この第３の領域内の表面にエミッタ領域
となる高濃度他導電型の第４の領域を形成する工程と、
一導電型基板の他主面から部分的にレーザ光線を照射し
て一導電型基板の他主面から第１の領域の内部に達する
まで部分的に溶解し、再結晶化させて他導電型の第５の
領域を形成する工程とを含むことを特徴とする。According to another aspect of the IGBT of the present invention, a first region of a high-concentration other conductivity type that serves as a buffer region is formed on one main surface of a one conductivity type substrate that serves as a collector region, and the first region is formed on the first region. A second region of low-concentration other conductivity type is formed, and a third region of high-concentration one-conductivity type to be a gate region is formed on the surface in the second region, and on the surface in the third region. A step of forming a high concentration other conductivity type fourth region to be an emitter region,
A laser beam is partially irradiated from the other main surface of the one-conductivity type substrate and partially dissolved from the other main surface of the one-conductivity type substrate until it reaches the inside of the first region, and recrystallized to cause another conductivity type. And forming a fifth region of.
【０００８】[0008]
【作用】この発明の構成によれば、一導電型基板（コレ
クタ領域）の他主面から第１の領域（バッファ領域）の
内部に達する領域に他導電型の第５の領域を設けている
ため、第５の領域（ドレイン），第１の領域，第２の領
域，第３の領域および第４の領域（ソース）からなるＭ
ＯＳＦＥＴが内蔵されている。すなわち、ＩＧＢＴおよ
びＭＯＳＦＥＴのゲートとエミッタ（ソース）を共通と
し、かつ、コレクタ（ドレイン）をも共通化した複合型
ＩＧＢＴを形成できる。したがって、ＭＯＳＦＥＴのド
レイン・ソース間に形成されているダイオードをＩＧＢ
Ｔのコレクタ・エミッタ間のダイオードとして用いるこ
とができる。According to the structure of the present invention, the other conductive type fifth region is provided in the region reaching from the other main surface of the one conductive type substrate (collector region) to the inside of the first region (buffer region). Therefore, M including the fifth region (drain), the first region, the second region, the third region, and the fourth region (source)
OSFET is built-in. That is, it is possible to form a composite IGBT in which the gate and emitter (source) of the IGBT and MOSFET are common and the collector (drain) is also common. Therefore, the diode formed between the drain and source of the MOSFET is
It can be used as a diode between the collector and emitter of T.
【０００９】また、他導電型の第５の領域は、拡散処理
が終了した一導電型基板の他主面から部分的にレーザ光
線を照射して一導電型基板の他主面から高濃度他導電型
の第１の領域の内部に達するまで部分的に溶解し、再結
晶化させることにより、容易に形成することができる。Further, the fifth region of the other conductivity type is partially irradiated with a laser beam from the other main surface of the one conductivity type substrate which has been subjected to the diffusion treatment, so that the other main surface of the one conductivity type substrate is exposed to a high concentration or the like. It can be easily formed by partially melting and recrystallizing until reaching the inside of the conductivity type first region.
【００１０】[0010]
【実施例】図１はこの発明の一実施例のＩＧＢＴの模式
断面図、図２はその等価回路図である。図１において、
１はコレクタ領域となるＰ+ シリコン基板（一導電型基
板）、２はバッファ領域となるＮ+ 領域（第１の領
域）、３はＮ- 領域（第２の領域）、４はゲート領域と
なるＰ+ 領域（第３の領域）、５はエミッタ領域となる
Ｎ+ 領域（第４の領域）、６はゲート酸化膜となる二酸
化珪素膜、７はポリシリコン膜、８はアルミニウム膜か
らなる電極、９はＮ型の多結晶領域（第５の領域）、１
０は電極用の金属膜である。1 is a schematic sectional view of an IGBT according to an embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram thereof. In FIG.
1 is a P + silicon substrate (one conductivity type substrate) which will be a collector region, 2 is an N + region (first region) which will be a buffer region, 3 is an N − region (second region), 4 is a gate region Is a P + region (third region), 5 is an N + region (fourth region) to be an emitter region, 6 is a silicon dioxide film to be a gate oxide film, 7 is a polysilicon film, and 8 is an aluminum film. Electrodes, 9 are N-type polycrystalline regions (fifth region), 1
Reference numeral 0 is a metal film for electrodes.
【００１１】この実施例のＩＧＢＴは、Ｐ+ シリコン基
板１からＮ+ 領域２の内部に達する領域にＮ型の多結晶
領域９を設けたことを特徴とする。このＩＧＢＴの製造
方法を説明する。ボロンを添加した比抵抗０．０１Ω・
ｃｍのＰ+ シリコン基板（コレクタ領域）１上に、アン
チモンを添加してＮ+ 比抵抗０．０５Ω・ｃｍのエピタ
キシャル層からなるＮ+ 領域２を１５μｍ形成する。そ
の後、リンを添加したＮ- 比抵抗４０Ω・ｃｍのエピタ
キシャル層からなるＮ- 領域３を５０μｍ形成する。そ
して、Ｎ- 領域３内に選択拡散によってＰ+ 領域４を形
成した後、リンを高濃度に拡散させてＮ+ 領域５を形成
する。その後、Ｐ+ 領域４上に、厚み８００Åの二酸化
珪素膜６、厚み０．５μｍのポリシリコン膜７、そして
厚み３μｍのアルミニウム膜８を順次形成する。The IGBT of this embodiment is characterized in that an N-type polycrystalline region 9 is provided in a region extending from the P + silicon substrate 1 to the inside of the N + region 2. A method of manufacturing this IGBT will be described. Specific resistance of 0.01 Ω with boron added
On a P + silicon substrate (collector region) 1 of cm, antimony is added to form an N + region 2 of 15 μm made of an epitaxial layer having an N + specific resistance of 0.05 Ω · cm. After that, an N − region 3 composed of an epitaxial layer having an N − specific resistance of 40 Ω · cm added with phosphorus is formed in a thickness of 50 μm. Then, after the P + region 4 is formed in the N − region 3 by selective diffusion, phosphorus is diffused at a high concentration to form the N + region 5. Then, a silicon dioxide film 6 having a thickness of 800 Å, a polysilicon film 7 having a thickness of 0.5 μm, and an aluminum film 8 having a thickness of 3 μm are sequentially formed on the P + region 4.
【００１２】つぎに、Ｐ+ シリコン基板１のコレクタ領
域側にレーザ光線を部分的に照射し、Ｎ+ 領域２の内部
までシリコン結晶を溶解させる。溶解した領域は、照射
を中止することで直ちに再結晶化（固化）し、Ｎ型の多
結晶領域９となる。これはＮ + 領域２が高濃度のＮ+ で
あること、また再結晶化速度が早いために、容易にＮ型
の多結晶となる。Next, P+Silicon substrate 1 collector area
Partially irradiate the laser beam on the area side, N+Inside area 2
Dissolve the silicon crystals until. Irradiate the melted area
By immediately stopping the re-crystallization, it will recrystallize (solidify) immediately, and
It becomes the crystal region 9. This is N +Region 2 has a high concentration of N+so
Since it is present and the recrystallization rate is fast, it is easily N-type
Becomes a polycrystal.
【００１３】その後、ＩＧＢＴのコレクタ面となるＰ+
シリコン基板１および多結晶領域９の露出面に電極用金
属膜１０を形成する。この実施例によれば、Ｎ型の多結
晶領域９を設けることにより、Ｎ型の多結晶領域９と、
Ｎ- 領域３と、Ｐ+ 領域４と、Ｎ+ 領域５とからなるＮ
チャネルＭＯＳＦＥＴが形成され、図２に示すように、
ＭＯＳＦＥＴのドレイン・ソース間に形成されているダ
イオード１１が、ＩＧＢＴのコレクタ・エミッタ間に形
成されることになる。このように、従来のＩＧＢＴの製
造工程にレーザ光線によるコレクタ領域とバッファ領域
の部分的溶解と再結晶化工程を追加するだけで、ダイオ
ード１１を内臓したＩＧＢＴを容易に得ることができ
る。そのため、モータ駆動用として用いる際に、別のダ
イオードを外付けする必要がない。その結果、従来ＩＧ
ＢＴデバイスをモータ駆動に用いる際に必要であった外
付け用高速ダイオードを不要とするばかりか、外付けの
工数全廃を可能にし、製造原価の低減に貢献できる。After that, P + which becomes the collector surface of the IGBT is formed.
An electrode metal film 10 is formed on the exposed surfaces of the silicon substrate 1 and the polycrystalline region 9. According to this embodiment, by providing the N-type polycrystalline region 9, the N-type polycrystalline region 9 and
N consisting of N − region 3, P + region 4, and N + region 5
A channel MOSFET is formed, and as shown in FIG.
The diode 11 formed between the drain and source of the MOSFET is formed between the collector and emitter of the IGBT. As described above, an IGBT including the diode 11 can be easily obtained only by adding the steps of partially melting and recrystallizing the collector region and the buffer region by the laser beam to the conventional IGBT manufacturing process. Therefore, when used for driving a motor, it is not necessary to attach another diode externally. As a result, conventional IG
Not only does the external high-speed diode required when using the BT device for driving a motor become unnecessary, but it also enables the total elimination of external man-hours and contributes to a reduction in manufacturing cost.
【００１４】また、Ｐ+ シリコン基板１のコレクタ領域
側にレーザ光線を部分的に照射し、溶解・再結晶化して
Ｎ型の多結晶領域９を形成して平坦面にしているため、
リードフレームへＩＧＢＴチップを半田付けしたとき、
ボイドの発生が少なく、その結果、放熱特性も良好にで
きる。なお、レーザ光線を照射して溶解させる領域は、
Ｐ+ シリコン基板１を貫通しＮ+ 領域２の一部とするこ
とが必要である。なぜならば、Ｎ+ 領域２を貫通させて
Ｎ- 領域３に到達すると耐圧が低下するからである。一
方、Ｐ+ シリコン基板１を貫通しないときはダイオード
１１は形成されない。また、部分的にレーザ光線を照射
するには、たくさんの小穴をあけた金属板を用いればよ
い。照射する領域としない領域の比は、ＩＧＢＴおよび
ダイオード１１の電流容量に関係するが約１：１でよ
い。Further, the collector region side of the P + silicon substrate 1 is partially irradiated with a laser beam to be melted and recrystallized to form an N-type polycrystalline region 9 to have a flat surface.
When the IGBT chip is soldered to the lead frame,
Generation of voids is small, and as a result, heat dissipation characteristics can be improved. In addition, the area irradiated with the laser beam and melted is
It is necessary to penetrate the P + silicon substrate 1 and be a part of the N + region 2. This is because the breakdown voltage decreases when it penetrates the N + region 2 and reaches the N − region 3. On the other hand, when the P + silicon substrate 1 is not penetrated, the diode 11 is not formed. To partially irradiate the laser beam, a metal plate with many small holes may be used. The ratio of the irradiated area to the non-irradiated area depends on the current capacity of the IGBT and the diode 11, but may be about 1: 1.
【００１５】また、上記実施例では、一導電型をＰ型と
し、他導電型をＮ型として説明したが、これに限られる
ものではない。In the above embodiment, one conductivity type is P type and the other conductivity type is N type. However, the present invention is not limited to this.
【００１６】[0016]
【発明の効果】この発明によれば、一導電型基板（コレ
クタ領域）の他主面から第１の領域（バッファ領域）の
内部に達する領域に他導電型の第５の領域を設けること
により、ＭＯＳＦＥＴが内蔵されたＩＧＢＴを得ること
ができる。したがって、ＭＯＳＦＥＴのドレイン・ソー
ス間に形成されているダイオードをＩＧＢＴのコレクタ
・エミッタ間のダイオードとして用いることができる。
その結果、従来ＩＧＢＴデバイスをモータ駆動に用いる
際に必要であった外付け用高速ダイオードを不要とする
ばかりか、外付けの工数全廃を可能にし、製造原価の低
減に貢献できる。According to the present invention, the fifth region of the other conductivity type is provided in the region reaching from the other main surface of the one conductivity type substrate (collector region) to the inside of the first region (buffer region). Thus, an IGBT having a built-in MOSFET can be obtained. Therefore, the diode formed between the drain and the source of the MOSFET can be used as the diode between the collector and the emitter of the IGBT.
As a result, not only the high-speed diode for external attachment, which was required when using the IGBT device for driving a motor in the related art, is not required, but also the man-hours for external attachment can be eliminated, which contributes to the reduction of manufacturing cost.
【００１７】また、他導電型の第５の領域は、拡散処理
が終了した一導電型基板の他主面から部分的にレーザ光
線を照射して一導電型基板の他主面から高濃度他導電型
の第１の領域の内部に達するまで部分的に溶解し、再結
晶化させることにより、容易に形成することができる。The other conductivity type fifth region is partially irradiated with a laser beam from the other main surface of the one conductivity type substrate for which the diffusion process has been completed, so that the other main surface of the one conductivity type substrate has a high concentration or the like. It can be easily formed by partially melting and recrystallizing until reaching the inside of the conductivity type first region.
【図１】この発明の一実施例のＩＧＢＴの断面図であ
る。FIG. 1 is a sectional view of an IGBT according to an embodiment of the present invention.
【図２】この発明の一実施例のＩＧＢＴの等価回路図で
ある。FIG. 2 is an equivalent circuit diagram of an IGBT according to an embodiment of the present invention.
【図３】従来のＩＧＢＴの断面図である。FIG. 3 is a sectional view of a conventional IGBT.
１ Ｐ+ シリコン基板（一導電型基板） ２ Ｎ+ 領域（第１の領域） ３ Ｎ- 領域（第２の領域） ４ Ｐ+ 領域（第３の領域） ５ Ｎ+ 領域（第４の領域） ９ Ｎ型の多結晶領域（第５の領域） １１ ダイオード1 P + Silicon substrate (one conductivity type substrate) 2 N + region (first region) 3 N − region (second region) 4 P + region (third region) 5 N + region (fourth region) ) 9 N-type polycrystalline region (fifth region) 11 Diode
Claims (2)
の一導電型基板の一主面上に形成したバッファ領域とな
る高濃度他導電型の第１の領域と、この第１の領域上に
形成した低濃度他導電型の第２の領域と、この第２の領
域内の表面に形成したゲート領域となる高濃度一導電型
の第３の領域と、この第３の領域内の表面に形成したエ
ミッタ領域となる高濃度他導電型の第４の領域と、前記
一導電型基板の他主面から前記第１の領域の内部に達す
る領域に形成した他導電型の第５の領域とを備えた絶縁
ゲート型バイポーラトランジスタ。1. A one-conductivity-type substrate to be a collector region, a high-concentration other-conductivity-type first region to be a buffer region formed on one main surface of the one-conductivity-type substrate, and a first region on the first region. A second region of a low-concentration other conductivity type formed on the second region, a third region of a high-concentration one conductivity type to be a gate region formed on the surface in the second region, and a surface in the third region A high-concentration other-conductivity-type fourth region to be an emitter region, and another-conductivity-type fifth region formed in a region extending from the other main surface of the one-conductivity-type substrate to the inside of the first region. And an insulated gate bipolar transistor having.
面上にバッファ領域となる高濃度他導電型の第１の領域
を形成し、この第１の領域上に低濃度他導電型の第２の
領域を形成し、この第２の領域内の表面にゲート領域と
なる高濃度一導電型の第３の領域を形成し、この第３の
領域内の表面にエミッタ領域となる高濃度他導電型の第
４の領域を形成する工程と、 前記一導電型基板の他主面から部分的にレーザ光線を照
射して前記一導電型基板の他主面から前記第１の領域の
内部に達するまで部分的に溶解し、再結晶化させて他導
電型の第５の領域を形成する工程とを含むことを特徴と
する絶縁ゲート型バイポーラトランジスタの製造方法。2. A high-concentration other-conductivity type first region serving as a buffer region is formed on one main surface of a one-conductivity type substrate serving as a collector region, and a low-concentration other-conductivity type region is formed on the first region. A second region is formed, a high-concentration one-conductivity-type third region serving as a gate region is formed on the surface in the second region, and a high-concentration region serving as an emitter region is formed on the surface in the third region. Forming a fourth region of another conductivity type; and irradiating a laser beam partially from the other main surface of the one conductivity type substrate to the inside of the first region from the other main surface of the one conductivity type substrate. To partially melt and recrystallize to form a fifth region of the other conductivity type until the temperature reaches the above temperature, the method for manufacturing an insulated gate bipolar transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30146493A JPH07153942A (en) | 1993-12-01 | 1993-12-01 | Insulated gate bipolar transistor and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30146493A JPH07153942A (en) | 1993-12-01 | 1993-12-01 | Insulated gate bipolar transistor and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH07153942A true JPH07153942A (en) | 1995-06-16 |
Family
ID=17897220
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30146493A Pending JPH07153942A (en) | 1993-12-01 | 1993-12-01 | Insulated gate bipolar transistor and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07153942A (en) |
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| US6734497B2 (en) | 2001-02-02 | 2004-05-11 | Mitsubishi Denki Kabushiki Kaisha | Insulated gate bipolar transistor, semiconductor device, method of manufacturing insulated-gate bipolar transistor, and method of manufacturing semiconductor device |
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-
1993
- 1993-12-01 JP JP30146493A patent/JPH07153942A/en active Pending
Cited By (16)
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|---|---|---|---|---|
| US6734497B2 (en) | 2001-02-02 | 2004-05-11 | Mitsubishi Denki Kabushiki Kaisha | Insulated gate bipolar transistor, semiconductor device, method of manufacturing insulated-gate bipolar transistor, and method of manufacturing semiconductor device |
| CN100336229C (en) * | 2003-07-24 | 2007-09-05 | 三菱电机株式会社 | Insulated gate bipolar transistor and its production method and current transformation circuit |
| US7750365B2 (en) | 2003-07-24 | 2010-07-06 | Mitsubishi Denki Kabushiki Kaisha | Insulated gate bipolar transistor with built-in freewheeling diode |
| US7154145B2 (en) | 2003-08-27 | 2006-12-26 | Mitsubishi Denki Kabushiki Kaisha | Insulated gate transistor incorporating diode |
| DE102004064116B4 (en) * | 2003-08-27 | 2011-03-03 | Mitsubishi Denki K.K. | Insulating layer transistor with built-in diode and inverter circuit |
| US8008711B2 (en) | 2003-08-27 | 2011-08-30 | Mitsubishi Denki Kabushiki Kaisha | Insulated gate transistor incorporating diode |
| JP2007266549A (en) * | 2006-03-30 | 2007-10-11 | Shindengen Electric Mfg Co Ltd | Igbt, and manufacturing method of igbt |
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| JP2008117881A (en) * | 2006-11-02 | 2008-05-22 | Sanyo Electric Co Ltd | Semiconductor device, and its manufacturing method |
| JP2012512538A (en) * | 2008-12-15 | 2012-05-31 | アーベーベー・テヒノロギー・アーゲー | Bipolar punch-through semiconductor device and method of manufacturing such a semiconductor device |
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| WO2015027961A1 (en) * | 2013-09-02 | 2015-03-05 | 无锡华润上华半导体有限公司 | Reverse conduction insulated gate bipolar transistor (igbt) manufacturing method |
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| US9666682B2 (en) | 2013-09-02 | 2017-05-30 | Csmc Technologies Fab1 Co., Ltd. | Reverse conduction insulated gate bipolar transistor (IGBT) manufacturing method |
| US9960165B2 (en) | 2013-11-05 | 2018-05-01 | Toyota Jidosha Kabushiki Kaisha | Semiconductor device having adjacent IGBT and diode regions with a shifted boundary plane between a collector region and a cathode region |
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