JPH07152824A - Printed circuit board designing method/system - Google Patents

Abstract

PURPOSE:To provide a method/system which can design a printed circuit board which excels in the electrical characteristics. CONSTITUTION:In a printed circuit board designing system, a circuit correcting pert 120 adds the countermeasure parts based on the printed circuit board information, etc., inputted from a design information input part 106. Then a design reference producing part 133 produces a design reference, and a layout part 132 performs an automatic layout job. A rated value changing part 124 decides the parts rated value according to the layout and outputs the board information through 8 board design information output part 106. Thus, the production of the design reference, the addition of the countermeasure parts and the decision of the rated value can be automatically attained to satisfy the electrical characteristics including the noises, etc. Then the interactive processings cen be decreased for the designing of the circuit board and this designing efficiency can also be improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board designing method and system for laying out a printed circuit board and a circuit board including a multi-chip module (MCM) using CAD.

[0002]

2. Description of the Related Art In recent years, printed circuit board CAD systems have been
It is widely used for board design of printed circuit boards including multi-chip modules. Here, the printed circuit board
This is a multi-chip module (MC) in which components are laid out on the board and wiring between components is printed.
M) refers to a module in which a plurality of components are mounted on a small board.

FIG. 13 is a flow chart showing the procedure for designing a printed circuit board using conventional CAD. First, the board designer designs an electric circuit that represents the electrical connection of each component to be mounted on the board using the circuit diagram CAD (step S2101). More specifically, the step S
2101 includes the following steps. That is, the board designer designs a basic electric circuit (step S2).
102), and then a countermeasure component is added as a countermeasure for preventing reflection, delay, and noise (step S210).
3).

Next, the board designer outputs the connection information (netlist) of the parts designed by the circuit diagram CAD to the printed board design CAD, and interactively arranges the layout of the parts on the board and the connection wiring by foil. (Step S2
104). Then, the board designer determines in step S2104.
Inspect the board for which the layout has been completed by the process of (1) to operate correctly as intended. The inspection may be performed by simulation or may be performed by actually making a prototype of the substrate and applying a probe. (Step S2
105, step S2106).

As a result, there are cases where it is determined that the substrate does not operate properly or that the intended performance cannot be achieved due to electrical characteristics such as delay, noise, and unnecessary radiation. In such a case, for each countermeasure component, the substrate designer changes the component rating value such as the resistance value or capacitance value of the countermeasure component (step S2108), and inspects whether the substrate operates as intended by simulation or the like. Is performed (step S2105, step S2106, step S2107).

If the board still does not operate properly or the intended performance cannot be achieved, the layout of the printed board such as the arrangement position of components, wiring length, and wiring pattern is changed (step S2104), and the simulation or the like is performed. It is inspected whether or not the board operates correctly as intended (steps S2105 and S21).
06, step S2107, step S2109).

Furthermore, if the board still does not operate properly or the intended performance cannot be achieved, a countermeasure component such as a resistor or a capacitor is newly added (step S
2103), and it is inspected by a simulation or the like whether the substrate operates correctly as intended (step S2).
104, step S2105, step S2106).

The board designer takes measures against the circuit so that the electric characteristics of the board reach a satisfactory level by the above-mentioned processing, but steps S2105 to S21 are performed.
08, step S2104 to step S2109
Processing and steps S2103 to S2106
Since the processing of (1) is performed interactively, it is not always necessary to perform in this order, and depending on the determination, the processing may return to step S2102 and the basic circuit design may be redone.

As described above, if the board designer can confirm that the board operates properly, the board designer passes the obtained board design information to the manufacturing process (step S2110). In addition,
Some CADs have a function of automatically performing layout work such as component placement and connection wiring shown in step S2104 (National Technical Report No. 3).
Volume 2 Issue 2 April 1993 Issued by Matsushita Electric Industrial Co., Ltd.
Magazine code 06813, "Knowledge-based high-density printed circuit board automatic design system", pp.84-89). However, in the knowledge-based high-density printed circuit board automatic design system,
No consideration is given to measures such as adding countermeasure components to the designed circuit, changing the layout, and changing the rated values of the components according to the electrical characteristics of the board after the automatic layout. Therefore, it is necessary for the board designer to interactively perform the inspection of the electrical characteristics of the board after the automatic layout and the countermeasure processing according to the inspection. In addition, "PLACEMENT OPTIMIZATION SYSTEM AI"
There is EDED BY CAD ”(US Patent 5,187,668), but this also does not consider the electrical characteristics of the board after the components are placed. Furthermore, as wiring that considers the electrical characteristics, ”WIRING DESING FOR SEMICONDUCTOR INTE
GRATED CIRCUIT ”(US Patent 5,046,017) exists, but this only considers wiring layout according to electrical characteristics, and does not consider changing the circuit according to electrical characteristics. I haven't.

As described above, in the conventional printed circuit board design, the board designer conducts a simulation or trial production by changing the layout or adding parts or changing the rated value of the parts so that the electrical characteristics of the board are at a satisfactory level. It had to be repeated interactively based on the results, and the task of taking measures against the circuit before confirming that the board was operating properly took a considerable amount of time until completion of the design.

Further, the usage of the conventional design standard will be described below. In general, the design standard refers to the content of restrictions to be followed when designing a printed circuit board in order to manufacture and operate the designed circuit board correctly. For example,
"Since parallel wirings that are close to each other are susceptible to crosstalk noise, the lengths that the wirings run in parallel should be within 10cm," or "When inserting parts using an insert machine during manufacturing, 1 to the left and right of
There must be a cm free space. "

[0012] These design criteria may vary slightly depending on the substrate to be designed, the manufacturing method, etc.
If the design criteria differ for each board, not only does it take time to create the design criteria, but also the board designer needs to design each board individually. It has been determined in advance for each area or for each type of substrate.

[0013]

However, since these design criteria are determined in advance by the greatest common divisor, that is, the board can be manufactured and operate without any trouble as long as the design criteria is adhered to. Therefore, it may be designed with a considerable margin depending on the board. For example, strictly speaking, the board that could have been designed and manufactured with 4 layers has become 6 layers because the design standard was adhered to faithfully, or the board size has increased. There was a case. In such a case, there is a problem in that the cost is high in that an extra substrate material is used, and there is a problem in downsizing a device using such a substrate.

On the other hand, even if the design standard is set with a margin, it is not possible to satisfy all the conditions of the board. Depending on the board, even if the design standard is satisfied, the actually created board does not operate correctly. There was also a case. An object of the present invention is to create a design standard most suitable for a circuit board to be designed, to design a circuit board having excellent electrical characteristics according to the design standard, and to reduce the workload of the circuit board designer. It is an object of the present invention to provide a printed circuit board designing method and system that can reduce the work efficiency and improve the work efficiency of the circuit board designing.

[0015]

To achieve the above object, the present invention according to claim 1 is a circuit board to be used for a circuit board to be designed, a circuit to be laid out on the circuit board, and a circuit related to components included in the circuit board. What is claimed is: 1. A circuit board design system for designing a circuit board from board information, noise countermeasure information on measures for preventing noise generated on the circuit board, and evaluation information on evaluation of electrical characteristics of the circuit board at a design stage, the circuit comprising: Input means for inputting the board information, the noise countermeasure information and the evaluation information,
Based on the information about the countermeasure component described in the input noise countermeasure information, the countermeasure component is added to the circuit shown in the circuit board information, and the circuit board information is described as the circuit after the countermeasure component is added. Based on the circuit board information corrected based on the circuit board information and the information indicating the layout limitation described in the noise countermeasure information. The layout of components and wiring is performed on the board to be described, the layout information is created using the positions of the laid-out components and wiring as coordinate values on the board, and the circuit board information is further used to describe the circuit after layout. Based on the layout information to be corrected so that the electrical characteristics of the circuit board at the design stage are evaluated. A test evaluating means for evaluating the quality of the electrical characteristics of the test evaluated in the circuit described by the layout information and the circuit board information at that time,
Regarding the countermeasure component added to the test evaluation target evaluated to have poor electrical characteristics by the test evaluating means, the countermeasure component having different rating values is measured based on the information about the countermeasure component in the noise countermeasure information. Rated value changing means for modifying the circuit board information so as to describe the circuit after changing the rated value while changing to parts, and activating the test evaluation means each time the layout means completes the layout, Control means for activating the test evaluation means each time the rated value changing means changes the rated value of the countermeasure component in the circuit, and the test evaluation target in the circuit described in the circuit board information and the layout information. Of the above, if the predetermined test evaluation target is evaluated by the test evaluation means to have good electrical characteristics, the circuit board information and And an output means for outputting and out information.

According to a second aspect of the present invention, in the printed circuit board design system according to the first aspect, the countermeasure component adding means is information in the noise countermeasure information, and is included in a circuit to which the countermeasure component is added. Countermeasure component added location recognition unit that collates information indicating a location with the input circuit board information and recognizes a location to which a countermeasure component is to be added in the circuit described in the input circuit board information. And a countermeasure component recognition unit that recognizes the countermeasure component already added to the countermeasure component addition portion recognized by the countermeasure component addition portion recognition unit,
The countermeasure component recognition is performed based on the information indicating the countermeasure component to be added and the information indicating the rated value when the countermeasure component is added, which is defined in the noise countermeasure information in correspondence with the countermeasure component adding position. The countermeasure component addition portion that adds a predetermined countermeasure component to the countermeasure component addition portion recognized by the section and the countermeasure component has not been added yet, and the countermeasure component recognized by the countermeasure component recognition unit and the countermeasure The priority setting unit that sets the priority to the newly added countermeasure component by the countermeasure component addition unit, and the countermeasure component in the circuit board information for each countermeasure component whose priority is set by the priority setting unit is described. When the countermeasure component adding unit newly adds a countermeasure component, the circuit after adding the countermeasure component is described by the countermeasure component adding unit. And a first circuit board information correction unit that corrects the input circuit board information, wherein the layout means is an area on the board described in the circuit board information, A layout area recognition unit that recognizes an area in which components included in the circuit described in the circuit board information corrected by the correction unit and wiring that connects the components may be laid out, and the layout area recognition unit recognizes the layout area recognition unit. A layout section that lays out components included in the circuit described in the circuit board information and wirings that connect the components to each other according to the layout restrictions described in the noise countermeasure information, In the area recognized by the layout area recognition unit, the layout unit layouts all the components to be laid out and the wiring. A layout determining unit that determines whether the layout can be completed, and the first circuit board information correcting unit corrects when the layout determining unit determines that the layout unit cannot complete the layout. A countermeasure component deletion unit that sequentially deletes countermeasure components that can be deleted in the circuit described in the circuit board information from the lowest priority set by the priority setting unit, and the layout. The layout information creating unit that creates layout information by using the positions of the parts and wirings that the parts have laid out as coordinate values on the board; and the information describing the parts included in the circuit in the circuit board information to the countermeasure parts. The circuit board information corrected by the first circuit board information correction section is further corrected by adding information indicating which countermeasure component is deleted by the deletion section. A corrective second circuit board information correction unit, and a layout control unit that activates the layout area recognition unit, the layout unit, and the layout determination unit every time the countermeasure component deletion unit deletes the countermeasure component. .

According to a third aspect of the present invention, in the printed circuit board design system according to the second aspect, the rated value changing means is information described in the noise countermeasure information, and measures of different rated values are taken. On the basis of the information indicating the countermeasure component that can be changed to the component and the information indicating the range of the changeable rated value of the countermeasure component, the test evaluation target evaluated to have poor electrical characteristics by the test evaluation means. Regarding the added countermeasure component that can be changed to the countermeasure component having a different rated value, the rated value changing unit that changes the countermeasure component to the countermeasure component having a different rated value, and the second circuit board information correction And a third circuit board information correction unit that corrects the circuit board information corrected by the unit so as to describe the circuit after the change of the rated value.

According to a fourth aspect of the present invention, in the printed circuit board design system according to the third aspect, even if the rated value changing unit changes the rated values of all the countermeasure parts whose rated values can be changed, If the test evaluation means does not evaluate the electrical characteristics of a predetermined test evaluation target included in the circuit after the change of the rated value as good, the layout means is activated to describe in the circuit board information at that time. A layout change control unit for laying out the circuit in question at a position different from the position described in the layout information, and a test evaluation after the layout means performs layout based on an instruction from the layout change control unit. As a result, with respect to the test evaluation target evaluated to have poor electrical characteristics by the test evaluation means, the countermeasure component deletion unit deleted It is possible to delete a countermeasure component adding section that re-adds countermeasure components in descending order of priority, and the priority added to the countermeasure component re-added by the deleting countermeasure component adding unit. It is indicated that the priority order changing unit for changing the priority order to indicate that it is not possible and the information added by the second circuit board information correction unit and indicating that the countermeasure component has been deleted are added again in the circuit. A fourth circuit board information correction unit that corrects the priority in the information describing the countermeasure component to the priority changed by the priority change unit and an instruction from the layout change control unit. After the layout means performs the layout and then the test evaluation means performs the test evaluation, the rated value changing means is put on standby, and the deletion countermeasure component is placed. Each time the adding unit once again adds the countermeasure component deleted by the layout unit to the circuit, the layout unit is activated, and the deletion countermeasure component adding unit adds all the deletion countermeasures that may be added again. When the test evaluation target in the circuit after adding the components does not evaluate the predetermined test evaluation target electrical characteristics as good by the test evaluation unit, the deletion measure component addition control for activating the rated value changing unit And a section.

According to a fifth aspect of the present invention, in the printed circuit board design system according to the second or fourth aspect, the countermeasure component addition means includes the countermeasure component addition portion recognized by the countermeasure component addition portion recognition unit. In the circuit part, a circuit simulation is performed on the circuit test evaluation target described in the evaluation information, and whether the circuit simulation output of the circuit test evaluation target satisfies the circuit test evaluation standard described in the evaluation information. If the circuit simulation output of the circuit test evaluation target does not satisfy the circuit test evaluation standard, the countermeasure component adding unit is activated, and the information described in the noise countermeasure information is Based on the information indicating the countermeasure component to be added in the circuit and the information indicating the rated value when the countermeasure component is added, Serial further comprising a countermeasure circuit test with parts recognizing section is added to countermeasure component specified in advance in the protection component adding place recognized.

According to a sixth aspect of the present invention, in the printed circuit board design system according to the second aspect, the fourth aspect, or the fifth aspect, the countermeasure component adding means is a circuit in which the countermeasure component adding unit adds countermeasure components. A circuit part in which the countermeasure component addition section adds a countermeasure component by performing a circuit simulation on the portion and determining whether or not a predetermined circuit test evaluation target circuit simulation output satisfies a predetermined circuit test evaluation criterion. The circuit test evaluation unit for evaluating whether the electrical characteristics of the circuit are good or bad, and the circuit test evaluation unit evaluates that the circuit part to which the countermeasure component is added is poor in the electrical characteristic by the circuit component, All countermeasure parts that can change the rated value included in the part are changed to countermeasure parts with different rated values. Each time the countermeasure component rated value changing unit changes the countermeasure component to a countermeasure component having a different rating value, the circuit test evaluation unit is activated and the circuit test evaluation unit is changed to a countermeasure component having a different rating value. And a countermeasure component rated value change control unit for evaluating electrical characteristics of the circuit portion.

The present invention according to claim 7 is the printed circuit board design system according to claim 1, claim 2, claim 4 or claim 6, wherein the rated value changing means is a measure capable of changing the rated value. Detecting the rated value of the countermeasure component added to the test evaluation target evaluated to have good electrical characteristics of the test evaluation target by the test evaluation means by changing the component to a countermeasure component having a different rated value, Measures after the rated value is changed as a result of changing the rated value of the detected rating value and the information described in the input noise countermeasure information, which is the countermeasure component added in the circuit Compare the information indicating the range of the rated value when the component becomes unnecessary for the circuit, and if the detected rated value is within the range of the rated value shown in the information, change the rated value. As a result, the unnecessary countermeasure component recognition unit that recognizes the countermeasure component whose rated value falls within the rated value range shown in the information as an unnecessary countermeasure component and the countermeasure component recognized by the unnecessary countermeasure component recognition unit are deleted, and the circuit is deleted. The board information is modified to describe the circuit after the unnecessary countermeasure component is deleted, and the unnecessary countermeasure component deleting unit for activating the layout means is further included.

The present invention according to claim 8 is to be followed in the printed circuit board design system according to claim 1, 4 or 7 for laying out a circuit on a board based on inputted circuit board information. Information for creating a design standard that is a layout limitation, information indicating an object for which the design standard should be created, and information indicating a parameter for defining an allowable range of values that the design standard creation target can take. The design standard creation information input section for inputting the design standard creation information, and the design standard creation target predetermined according to the design standard creation information, the possible values of the design standard creation target under the predetermined parameters are set in advance. Each time the value that is changed by the specified value is changed and the possible value of the design standard creation target is changed by the predetermined value, The simulation result is repeated, and the change of the value of the design standard creation target and the evaluation by the simulation are repeated until the simulation result satisfies the predetermined design standard creation evaluation standard, and the simulation result satisfies the predetermined design standard creation evaluation standard. The design standard creation unit that creates a design standard by using the value of the design standard creation target at this time as the allowable value of the design standard creation target, and the design standard creation unit changes all possible values of the design standard creation target within a possible range. Even if it is done, if the simulation result does not satisfy the design standard preparation evaluation standard, the fact is output, and if the simulation result satisfies the predetermined design standard preparation evaluation standard, the design standard preparation unit Output the design standard created by Based on the total of the reference further comprises a design reference output unit for instructing the layout section to perform layout.

According to a ninth aspect of the present invention, in the printed circuit board design system according to the eighth aspect, the test evaluation means is the position of the component, the wiring length, and the connection between the layers when the circuit is laid out on the actual substrate. Condition, physical shape of wiring,
It includes a transmission line simulator for calculating an output waveform when a predetermined input waveform is given to a net connecting each component terminal in the circuit based on the dielectric constant of the substrate.

The present invention according to claim 10 is the printed circuit board design system according to claim 8 or 9,
The design standard creation unit is configured to position each component in the circuit based on the position of the component when the circuit is laid out on the actual substrate, the wiring length, the connection state between layers, the physical shape of the wiring, the dielectric constant of the substrate, and the like. It includes a transmission line simulator for calculating an output waveform when a predetermined input waveform is given to a net connecting terminals.

The present invention according to claim 11 should be followed in the printed circuit board design system according to claim 1, 4 or 7 for laying out a circuit on the board based on the input circuit board information. Information for creating design criteria that is a layout limitation,
A design standard creation information input section for inputting information indicating a design standard creation target and design standard creation information indicating information indicating parameters for defining an allowable range of values that the design standard creation target can take; A design standard storage unit that stores a design standard corresponding to the value of the predetermined parameter for each design standard creation target defined, and a design that is predetermined based on the design standard creation information input by the design standard creation information input unit For the standard creation target, the parameter value is read from the circuit board information, the design standard defined by the read parameter value is read from the design standard storage unit, and the read design standard is set as the design standard for the design standard creation target. The design standard creating unit outputs the design standard defined by the design standard creating unit, and the design standard creating unit outputs the design standard. Based on the established design criteria further includes a design reference output unit for instructing the layout section to perform layout.

According to a twelfth aspect of the present invention, in the printed circuit board design system according to the eighth aspect, the test evaluation means is added to a circuit portion including the test evaluation target for each predetermined test evaluation target. A test evaluation reference storage unit that stores the type of countermeasure parts and the range of their rated values, and information described in the evaluation information,
A test evaluation target recognition unit that recognizes a test evaluation target in the circuit described by the layout information and the circuit board information at that time based on information indicating a test evaluation target on the circuit after layout; It is determined whether the type and rating value of the countermeasure component added to the circuit portion including the test evaluation target recognized by the test evaluation target recognition unit satisfies the test evaluation standard stored in the test evaluation standard storage unit. By doing so, a test evaluation unit for evaluating the quality of the electrical characteristics of the test evaluation target is included.

According to a thirteenth aspect of the present invention, in order to prevent a circuit board information used for a circuit board to be designed, a circuit to be laid out on the circuit board and components included therein, and noise generated in the circuit board. Is a circuit board designing method for designing a circuit board from noise countermeasure information related to the countermeasures described above and evaluation information related to electrical characteristic evaluation of the circuit board at the design stage, wherein the circuit board information, the noise countermeasure information, and the evaluation information are input. Based on the input step and the information about the countermeasure component described in the input noise countermeasure information, the countermeasure component is added to the circuit shown in the circuit board information, and the circuit board information is added to the countermeasure component. The countermeasure component adding step of modifying the circuit to describe the subsequent circuit, and the modification in the countermeasure component adding step Based on the route board information and the information indicating a predetermined layout limitation, the parts and wirings are laid out on the board described by the circuit board information, and the positions of the laid-out parts and wirings are determined on the board. While creating layout information as coordinate values of the layout step based on the layout step of modifying the circuit board information so as to further describe the circuit after layout, and the evaluation information regarding the electrical characteristic evaluation of the circuit board at the design stage, A test evaluation step for evaluating the quality of the electrical characteristics of the test evaluation target in the circuit described by the layout information and the circuit board information at that time; and the information described in the noise countermeasure information, Information indicating the countermeasure parts that can change the rated value and the range of the changeable rated value of the countermeasure parts Based on this information, the countermeasure components added to the test evaluation target evaluated to have poor electrical characteristics in the test evaluation step, and the countermeasure components whose rated value can be changed, have predetermined values. Each time the rated value is changed, the test evaluation in the test evaluation step is repeated, and the rated value of the countermeasure component is changed until the electrical characteristics of the test evaluation target are evaluated as good in the test evaluation step. A step of changing the rated value to modify the circuit board information so as to describe the circuit after changing the rated value, and a test in the circuit described in the circuit board information modified in the layout step and the layout information. Of the evaluation targets, all test evaluation targets were evaluated as having good electrical characteristics in the test evaluation step. In the case where it is done, it includes an output step of outputting the circuit board information and the layout information corrected in the rated value changing step.

The present invention as set forth in claim 14 is the printed circuit board design method as set forth in claim 13, wherein the countermeasure component adding step is information described in the noise countermeasure information and is a countermeasure component in a circuit. A countermeasure component that collates the information indicating the portion to be added with the input circuit board information and recognizes the portion to which the countermeasure component is to be added in the circuit described in the input circuit board information. In the additional part recognition sub-step, the countermeasure part recognition sub-step for recognizing the countermeasure part already added to the countermeasure part addition part recognized in the countermeasure part addition part recognition sub-step, and in the noise countermeasure information, Based on the information indicating the countermeasure parts to be added and the information indicating the rated value at the time of adding the countermeasure parts, which is predetermined for each place to add the countermeasure parts. Then, a countermeasure component addition sub-step of adding a predetermined countermeasure component to a countermeasure component addition portion recognized in the countermeasure component recognition sub-step, to which a countermeasure component has not yet been added, and the countermeasure component recognition sub-step In the priority setting substep for setting the priority to the countermeasure component recognized in step S1 and the countermeasure component newly added in the countermeasure adding subcomponent, and each countermeasure component having the priority set in the priority setting substep. In the case where a countermeasure component is added to the information describing the countermeasure component in the circuit board information and a new countermeasure component is added in the countermeasure component addition sub-step, the countermeasure component addition sub-step is performed. Input the above-mentioned circuit board information to describe the circuit after adding countermeasure parts. A first circuit board information correction sub-step to correct the layout step, wherein the layout step is an area on the board described in the circuit board information, and the layout step is corrected in the first circuit board information correction sub-step. The layout area recognition substep for recognizing the area in which the components included in the circuit described in the circuit board information and the wiring connecting the components may be laid out, and the area recognized in the layout area recognition substep, A layout sub-step of laying out components included in the circuit described in the circuit board information and wirings connecting the components in accordance with a layout limitation defined; and, in the layout sub-step, in the layout area recognition sub-step. All that should be laid out in the recognized area Layout determination sub-step for determining whether or not the layout of the components and the wiring can be completed, and in the layout determination sub-step, all the components and the wiring to be laid out in the layout sub-step When it is determined that the layout cannot be completed, the priority is given to the countermeasure component in the circuit described in the circuit board information corrected in the first circuit board information correction sub-step and which can be deleted. It should be deleted sequentially from the lowest priority set by the order setting sub-step, and every time the countermeasure component is deleted, the layout determination sub-step is executed, and the layout determination sub-step should perform the layout in the layout sub-step. Complete the layout of all the parts and wiring The countermeasure components that can be deleted are deleted until it is determined that the layout sub-step is still performed in the layout determination sub-step even after all the countermeasure components that can be deleted are deleted. If it is determined that the layout of all the components and the wiring that should be completed cannot be completed, a countermeasure component deletion sub-step that outputs that effect and the components and wiring laid out in the layout sub-step Which countermeasure component was deleted from the information describing the countermeasure component each time the countermeasure component was deleted in the layout information creation substep of creating layout information using the position as coordinate values on the board and the countermeasure component deletion substep Is added to the first circuit board information correction substrate. And a second circuit board information correction sub-step of further modifying the circuit board information modified in-flop.

According to a fifteenth aspect of the present invention, in the printed circuit board designing method according to the fourteenth aspect, the rated value changing step further includes the information described in the noise countermeasure information, which has different rated values. The test evaluation target evaluated as having poor electrical characteristics in the test evaluation step based on information indicating countermeasure parts that can be changed to countermeasure parts and information indicating the range of changeable rated values of the countermeasure parts. The countermeasure parts added to the countermeasure parts which can be changed to the countermeasure parts having different rating values, by executing the test evaluation step every time the countermeasure parts are changed to the countermeasure parts having different rating values. The test evaluation is repeated, and the countermeasure component has different rated values until the electrical characteristics of the test evaluation target are evaluated to be good in the test evaluation step. A rated value changing sub-step of changing to a countermeasure component, and a third circuit board information correcting sub-step of correcting the circuit board information corrected in the second circuit correcting sub-step so as to describe the circuit after the rated value change, Even if the rated value of the countermeasure component is changed within the range of changeable rated values in the rated value changing sub-step, all test evaluation targets included in the circuit after the rated value change in the test evaluation step If the electrical characteristics are not evaluated to be good, the layout step is executed again, and the circuit described in the circuit board information modified by the third circuit board information modification substep is described in the layout information. Layout change sub-step to re-layout at a position different from the specified position,
For all the test evaluation targets included in the circuit after the layout is performed again in the layout step, the test evaluation step is performed to perform the test evaluation, and the electrical characteristics in the test evaluation step among the test evaluation objects are With respect to the test evaluation target evaluated as bad, the countermeasure parts deleted in the countermeasure part deletion sub-step are re-added in order from the highest priority, and the countermeasure parts are added again every time the countermeasure parts are re-added. The layout step is performed so that the components are laid out on the substrate, and the circuit after the layout is subjected to the test evaluation by performing the test evaluation step. In the test evaluation step, it is evaluated that the electrical characteristics of all the test evaluation targets are good. The above-mentioned test evaluation that the electrical characteristics were evaluated as poor until For each elephant, every time the countermeasure component deleted in the countermeasure component deletion sub-step is added again in order from the one having the highest priority, the deletion countermeasure component addition sub-step and the countermeasure component deleted in the deletion countermeasure component addition sub-step In the priority sub-step for changing the priority added to the re-added countermeasure component to a priority indicating that the countermeasure component cannot be deleted, and the countermeasure is added in the deletion countermeasure component addition sub-step. Each time a component is added again, the second
Of the circuit board information corrected in the circuit board information correction sub-step, the information added in the second circuit board information correction sub-step and indicating that the countermeasure component has been deleted is again included in the circuit. In the fourth circuit board information correction sub-step of correcting to the information indicating that the countermeasure component has been added, and in the rated value changing step, all the countermeasure components among the countermeasure components once deleted in the deleted component addition sub-step are added again. Because of the later circuit,
If the electrical characteristics of all test evaluation targets are not evaluated as good in the test evaluation step, from the rated value change substep until the electrical characteristics of all test evaluation targets are evaluated as good in the test evaluation step. It includes repeating all the sub-steps up to the fourth circuit board information correction sub-step.

The present invention according to claim 16 is the method for designing a printed circuit board according to claim 14 or 15,
The countermeasure component adding step further performs a circuit simulation on a predetermined circuit part including the countermeasure component adding portion recognized in the countermeasure component adding portion recognition sub-step, and a circuit predetermined by a predetermined circuit test evaluation target circuit simulation output. It is determined whether or not the test evaluation criteria are satisfied, and if the circuit simulation output of the circuit test evaluation target does not satisfy the predetermined circuit test evaluation criteria, the countermeasure component addition sub-step is executed and the noise countermeasure information is added. The countermeasure recognized in the countermeasure component recognition sub-step based on the information indicating the countermeasure component to be added in the circuit and the information indicating the rated value when the countermeasure component is added. A circuit test subsystem that adds a predetermined countermeasure component to the component addition location. Including the flop.

The present invention according to claim 17 relates to claim 14,
The printed circuit board designing method according to claim 15 or 16, wherein in the countermeasure component adding step, a circuit simulation is performed on a circuit portion to which the countermeasure component is added in the countermeasure component adding sub-step, and a predetermined circuit test evaluation is performed. A circuit test evaluation for evaluating whether or not the electrical characteristics of the circuit portion to which the countermeasure component is added in the countermeasure component addition sub-step is evaluated by determining whether the target circuit simulation output satisfies a predetermined circuit test evaluation criterion. In the sub-step and the circuit test evaluation sub-step, when it is evaluated that the circuit part to which the countermeasure component is added has poor electrical characteristics in the countermeasure component addition sub-step, the rated value included in the circuit portion is changed. Countermeasure units with different rated values for all possible countermeasure components Each time it is changed to a countermeasure component with a different rated value, the circuit test evaluation sub-step is executed and a circuit simulation is performed on the circuit part changed to a countermeasure component with a different rated value. With respect to all the circuit parts changed to countermeasure parts, the rated value change and the evaluation in the circuit test evaluation sub-step are repeated until the electric characteristics are judged to be good in the circuit test evaluation sub-step And substeps.

The present invention according to claim 18 relates to claim 13,
In the printed circuit board designing method according to claim 14, claim 15 or claim 17, the rated value changing step comprises:
Further, by changing the countermeasure component whose rated value can be changed to a countermeasure component having a different rated value, it is added to the test evaluation target which has been evaluated as having good electrical characteristics in the test evaluation target in the test evaluation step. The rated value of the countermeasure component detected is detected, and the detected rated value and the information described in the input noise countermeasure information, which is the rated value of the countermeasure component added in the circuit, is changed. As a result, the countermeasure component after changing the rated value is compared with the information indicating the range of the rated value when the circuit becomes unnecessary, and the detected rated value is within the range of the rated value indicated in the information. In some cases, as a result of changing the rated value, the unnecessary countermeasure component recognition sub-step of recognizing the countermeasure component whose rated value falls within the range of the rated value shown in the above information as an unnecessary countermeasure component, Remove the countermeasure component recognized in main protection component recognition sub-step, and a required countermeasure component deletion sub-step of modifying to describe the circuit after unnecessary protection component deleting the circuit board information.

The present invention according to claim 19 relates to claim 13,
19. The printed circuit board designing method according to claim 15 or 18, wherein the circuit board designing method is a design criterion that is a layout limitation to be followed when laying out a circuit on the board based on the input circuit board information. Information for creating the design standard, and design standard creation information indicating information indicating a target for which the design standard should be created and information indicating a parameter for defining the allowable range of the value of the design standard creation target. Design reference creation information input sub-step, and for the design standard creation target predetermined according to the design standard creation information, change the possible value of the design standard creation target under the predetermined parameters by a predetermined value Each time the possible value of the standard creation target is changed by a predetermined value, the design standard creation target is stained. When the simulation result satisfies the predetermined design standard creation evaluation standard until the simulation result satisfies the predetermined design standard creation evaluation standard and the value of the design standard creation target is changed and the simulation evaluation is repeated. The design standard creation sub-step of creating a design standard with the value of the design standard creation target as the allowable value of the design standard creation target, and all the possible values of the design standard creation target in the design standard creation substep within the possible range Even if changed, if the simulation result does not satisfy the design standard creation evaluation standard, the fact is output, and if the simulation result satisfies the predetermined design standard creation evaluation standard, the design standard creation is performed. Output the design criteria created in the substeps In, and a design reference output substep that instructs the layout based on the design criteria created in the design criteria created substeps in the layout step subsequent thereto.

According to a twentieth aspect of the present invention, in the printed circuit board designing method according to the nineteenth aspect, in the test evaluation step, positions of components, wiring lengths, and connection between layers when a circuit is laid out on an actual substrate. It includes a transmission line simulation for calculating an output waveform when a predetermined input waveform is given to a net connecting each component terminal in the circuit based on the state, the physical shape of the wiring, the dielectric constant of the substrate, and the like.

The present invention according to claim 21 is the printed circuit board designing method according to claim 19 or 20,
The design standard creation sub-step is based on the positions of the parts when the circuit is laid out on the actual board, the wiring length, the connection state between layers, the physical shape of the wiring, the dielectric constant of the board, and the like. It includes a transmission line simulation for calculating an output waveform when a predetermined input waveform is given to a net connecting component terminals.

The present invention according to claim 22 provides a thirteenth aspect.
19. The printed circuit board design method according to claim 15 or 18, which is information for creating a design standard that is a layout restriction to be followed when laying out a circuit on the board based on the input circuit board information. The design standard creation information input substep for inputting information indicating a target for which a design standard is to be created and design standard creation information indicating information indicating parameters for defining an allowable range of the value that the design standard creation target can take. And, based on the design standard creation information input in the design standard creation information input sub-step, for a predetermined design standard creation target, the value of the parameter is read from the circuit board information, and the design standard defined by the read parameter value. To
The design standard corresponding to the value of the parameter is read from a memory in which it is stored in advance, and the read design standard is defined in the design standard creating substep and the design standard creating substep in which the design standard is defined as the design standard for which the design standard is created. And outputting a design standard, and outputting a design standard in the layout step, and outputting a design standard based on the design standard defined in the design standard creation sub-step.

According to a twenty-third aspect of the present invention, in the printed circuit board designing method according to the nineteenth aspect, the test evaluation step is information described in the evaluation information, which is a test on a circuit after layout. A test evaluation target recognition substep for recognizing a test evaluation target in the circuit described by the layout information and the circuit board information at that time based on information indicating an evaluation target, and the test evaluation target recognition substep The type and rating value of the countermeasure component added to the circuit portion including the test evaluation target that was recognized in Section 2 should be the type of the countermeasure component and the countermeasure component that should be added to the circuit portion including the predetermined test evaluation target. Tests that are pre-stored in memory, which are standards that are set for each test target that predetermine the range of rated values. By determining whether or not to satisfy the valence standards, and a test evaluation substep of evaluating the quality of the electrical characteristics of the test evaluation.

[0038]

As described above, according to the present invention of claim 1, the input means inputs the circuit board information, the noise countermeasure information, and the evaluation information. The countermeasure component adding means adds a countermeasure component in the circuit indicated by the circuit board information based on the inputted information regarding the countermeasure component described in the noise countermeasure information, and adds the circuit board information to the countermeasure component. Modify to describe the added circuit.

The layout means is described by the circuit board information on the basis of the circuit board information corrected by the countermeasure component adding means and the information indicating the layout limitation described in the noise countermeasure information. On the board
Layout of components and wiring is performed, layout information is created with the positions of the laid-out components and wiring as coordinate values on the board, and the circuit board information is further modified to describe the circuit after layout.

The test evaluation means is based on the evaluation information on the electrical characteristic evaluation of the circuit board in the design stage, and is based on the evaluation information, the electrical information of the test evaluation target in the circuit described by the layout information and the circuit board information at that time. Evaluate the quality of the characteristics. The rated value changing means, based on the information regarding the countermeasure component in the noise countermeasure information, regarding the countermeasure component added to the test evaluation target evaluated to have poor electrical characteristics by the test evaluating means, based on the information regarding the countermeasure component. Is changed to a countermeasure component having a different rated value, and the circuit board information is modified to describe the circuit after the rated value is changed.

The control means activates the test evaluation means each time the layout means completes the layout, and the test evaluation means each time the rated value changing means changes the rated value of the countermeasure component in the circuit. To start. The output means is
Of the test evaluation targets in the circuit described in the circuit board information and the layout information, if a predetermined test evaluation target is evaluated by the test evaluation means to have good electrical characteristics, the circuit board The information and the layout information are output.

As described above, according to the present invention, it is possible to reduce the noise generated when the basic designed electric circuit is laid out on an actual board and to design a circuit board having excellent electric characteristics. In addition, by automatically performing all the above-mentioned processing on the circuit of the basic design, it is possible to reduce the work load of the circuit board designer and improve the work efficiency of the circuit board design. A circuit board with excellent electrical characteristics, even when a board designer who is unfamiliar with the technology designs the circuit basically, as when a board designer who is familiar with the circuit board design technology designs the circuit board. Can be designed.

According to the invention of claim 2, claim 1
In the countermeasure component adding means described above, the countermeasure component addition portion recognition unit stores the information in the noise countermeasure information, which is the information indicating the portion in the circuit to which the countermeasure component should be added, and the input circuit board information. The collation is performed to recognize the portion to which the countermeasure component should be added in the circuit described in the input circuit board information.

The countermeasure component recognition unit recognizes the countermeasure component already added to the countermeasure component addition portion recognized by the countermeasure component addition portion recognition unit. The countermeasure component addition unit includes, in the noise countermeasure information, information indicating the countermeasure component to be added, which is determined corresponding to the countermeasure component addition location, and information indicating the rated value when the countermeasure component is added. On the basis of,
A predetermined countermeasure component is added to the countermeasure component addition portion recognized by the countermeasure component recognition unit and to which the countermeasure component has not been added yet.

The priority setting unit sets the priority to the countermeasure component recognized by the countermeasure component recognition unit and the countermeasure component newly added by the countermeasure component countermeasure adding unit. The first circuit board information correction unit adds information indicating the priority order to the information describing the countermeasure parts in the circuit board information for each countermeasure part for which the priority order setting unit has set the priority order, and the countermeasures are added. When the component addition unit newly adds the countermeasure component, the inputted circuit board information is corrected so that the circuit after the countermeasure component addition unit adds the countermeasure component is described.

In the layout means, the layout area recognizing unit is an area on the board described in the circuit board information, and the circuit board information corrected by the first circuit board information correcting unit is added to the circuit board information. Recognize areas in which the components included in the described circuit and the wiring connecting the components may be laid out. The layout section
In the area recognized by the layout area recognizing unit, according to the layout restrictions described in the noise countermeasure information, the components included in the circuit described in the circuit board information and the wiring connecting the components are provided. Lay out.

The layout determination unit determines whether or not the layout unit can complete the layout of all the components to be laid out and the wiring in the area recognized by the layout area recognition unit. . The countermeasure component deleting unit determines whether the circuit described in the circuit board information corrected by the first circuit board information correcting unit when the layout determining unit determines that the layout unit cannot complete the layout. The countermeasure components that can be deleted are deleted in order from the one having the lowest priority set by the priority setting unit.

The layout information creating unit creates layout information by using the positions of the components and wirings laid out by the layout unit as coordinate values on the board. The second circuit board information correction unit adds the information indicating which countermeasure component is deleted by the countermeasure component deletion unit to the information describing the component included in the circuit in the circuit board information, thereby adding the information (1) The circuit board information modified by the circuit board information modification unit is further modified.

The layout control unit activates the layout area recognition unit, the layout unit, and the layout determination unit every time the countermeasure component deletion unit deletes the countermeasure component. As described above, according to the present invention, it is possible to realize a more flexible automatic layout process, and at the same time, the countermeasure component deletion section deletes the countermeasure component important for the electrical characteristics of the circuit board to be designed. It is possible to prevent that.

According to the present invention of claim 3, claim 2
In the rated value changing means described, the rated value changing unit,
Information described in the noise suppression information,
Based on the information indicating a countermeasure component that can be changed to a countermeasure component having a different rating value and the information indicating the range of the rated value that can be changed for the countermeasure component, the test evaluation means evaluated that the electrical characteristic is bad. Among the countermeasure parts added to the test evaluation target and which can be changed to countermeasure parts having different rating values, the countermeasure parts are changed to countermeasure parts having different rating values.

The third circuit board information modifying unit modifies the circuit board information modified by the second circuit board information modifying unit so as to describe the circuit after the change of the rated value. According to a fourth aspect of the present invention, in the printed circuit board design system according to the third aspect, the layout change control unit further includes rated values of all the countermeasure components whose rated values can be changed by the rated value changing unit. However, if the test evaluation means does not evaluate the electrical characteristics of the predetermined test evaluation target included in the circuit after the change of the rated value as good, the layout means is activated and The circuit described in the circuit board information is laid out again at a position different from the position described in the layout information.

The deletion countermeasure component adding section evaluates that the electrical characteristics are bad by the test evaluation section as a result of the test evaluation after the layout section performs the layout based on the instruction of the layout change control section. With respect to the test evaluation target, the countermeasure components deleted by the countermeasure component deleting unit are added again in order from the highest priority. The priority changing unit changes the priority added to the countermeasure component added again by the deletion countermeasure component adding unit to a priority indicating that the countermeasure component cannot be deleted.

The fourth circuit board information correction unit corrects the information added by the second circuit board information correction unit to the information indicating that the countermeasure component has been deleted and added again in the circuit. At the same time, the priority in the information describing the countermeasure component is corrected to the priority changed by the priority changing unit. The deletion countermeasure component addition control unit puts the rated value changing unit on standby after the layout unit performs the layout based on the instruction of the layout changing control unit and the test evaluation unit subsequently performs the test evaluation. Every time the deletion countermeasure component addition unit re-adds the countermeasure component deleted by the layout unit to the circuit again, the layout unit is activated, and the deletion countermeasure component addition unit re-adds it. If the test evaluation target in the circuit after adding all good removal countermeasure components does not evaluate the predetermined electrical characteristics of the test evaluation target as good by the test evaluation unit, the rated value changing unit is activated. .

As described above, according to the present invention, after the rated value of the countermeasure component is changed, if the electrical characteristics of the laid out circuit are not improved, the layout of the circuit portion having poor electrical characteristics is changed. In addition, when the electrical characteristics of the circuit are still not improved, it is possible to re-add the countermeasure components among the countermeasure components deleted in the previous layout in accordance with the priority order thereof. It is possible to design a circuit board having excellent electrical characteristics.

According to the present invention of claim 5, claim 2
Alternatively, in the means for adding countermeasure parts according to claim 4,
The circuit test section is a circuit section including a countermeasure component addition portion recognized by the countermeasure component addition portion recognition unit,
A circuit simulation is performed on the circuit test evaluation target described in the evaluation information, and it is determined whether or not the circuit simulation output of the circuit test evaluation target satisfies the circuit test evaluation standard described in the evaluation information, When the circuit simulation output of the circuit test evaluation target does not satisfy the circuit test evaluation standard, the countermeasure component adding unit is activated to add the information described in the noise countermeasure information to the circuit. Based on the information indicating the countermeasure component to be processed and the information indicating the rated value when the countermeasure component is added, the countermeasure component is added to the countermeasure component addition portion recognized by the countermeasure component recognition unit.

As described above, according to the present invention, noise prevention measures can be taken in advance before the basically designed electric circuit is laid out on the substrate. According to the present invention described in claim 6, claim 2, claim 4 or claim 5
In the countermeasure component adding unit described above, the circuit test evaluation unit further performs circuit simulation on the circuit portion to which the countermeasure component addition unit adds the countermeasure component, and a circuit simulation output of a predetermined circuit test evaluation target is predetermined. By determining whether or not the circuit test evaluation criteria are satisfied, the countermeasure component addition unit evaluates whether or not the electrical characteristic of the circuit portion to which the countermeasure component is added is good.

The countermeasure component rated value changing unit determines whether the circuit portion to which the countermeasure component adding unit has added the countermeasure component does not evaluate the circuit electrical characteristics of the circuit portion to the circuit portion. Change all included countermeasure components whose rating value can be changed to countermeasure components with different rating values. The countermeasure component rated value change control unit activates the circuit test evaluation unit every time the countermeasure component rated value change unit changes the countermeasure component to a countermeasure component having another rated value, and causes the circuit test evaluation unit to operate. Evaluate the electrical characteristics of the circuit part that has been changed to a countermeasure component with another rated value.

As described above, according to the present invention, noise prevention measures can be taken in advance at a stage before the electric circuit after the countermeasure components are added is laid out on the substrate. According to the present invention described in claim 7, in the rated value changing means according to claim 1, claim 2, claim 4, or claim 6, the unnecessary countermeasure component recognition unit can change the rated value. As a result of changing the countermeasure component to a countermeasure component having a different rated value, the rated value of the countermeasure component added to the test evaluation target that is evaluated as having good electrical characteristics by the test evaluation means is detected, and the detected value is detected. When the rated value and the information described in the input noise countermeasure information are changed and the rated value of the countermeasure component added to the circuit is changed, the countermeasure component becomes unnecessary for the circuit. If the detected rated value is within the range of the rated value shown in the information by comparing with the information indicating the range of the rated value, as a result of changing the rated value, the rated value is shown in the information. Within the rated value range and Recognizes Tsu was a countermeasure component as unnecessary measures parts.

The unnecessary countermeasure component deleting unit deletes the countermeasure component recognized by the unnecessary countermeasure component recognizing unit, corrects the circuit board information to describe the circuit after the unnecessary countermeasure component is deleted, and activates the layout means. To do. As described above, according to the present invention, as a result of the change of the rated value of the countermeasure component, when the rated value of the changed countermeasure component becomes a small value such that the countermeasure component itself can be almost ignored, Alternatively, when the countermeasure component has a large value that is not necessary, the countermeasure component can be deleted. Further, this makes it possible to design a circuit board having excellent electrical characteristics, save resources consumed by the designed circuit board, and reduce the size of the circuit board.

According to the present invention of claim 8, in the printed circuit board design system of claim 1, claim 4 or claim 7, the design standard creation information input unit further comprises:
Information for creating a design standard that is a layout restriction to be followed when laying out a circuit on a board based on the input circuit board information, and information indicating an object for which the design standard should be created and the design. Design standard creation information indicating information indicating parameters for defining an allowable range of possible values for the standard creation target is input.

The design standard creation unit changes the possible values of the design standard creation target under the predetermined parameters for each design standard creation target predetermined according to the design standard creation information by a predetermined value. Each time the possible value of the creation target is changed by a predetermined value, a simulation is performed on the design standard creation target,
Repeating the change of the value of the design standard creation target and the evaluation by the simulation until the simulation result satisfies the predetermined design standard creation evaluation standard, and the design standard creation when the simulation result satisfies the predetermined design standard creation evaluation standard Create a design standard with the target value as the allowable value of the design standard creation target.

The design standard output unit, even if the design standard preparation unit changes all possible values of the design standard preparation target within a possible range, the simulation result still does not satisfy the design standard preparation evaluation standard. In that case, when the simulation result satisfies the predetermined design standard creation evaluation standard, the design standard created by the design standard creating unit is output and the design created by the design standard creating unit is output. The layout means is instructed to perform the layout based on the standard.

Therefore, according to the present invention, an optimal design standard is created for each circuit board to be designed, and a layout is performed based on the design standard to design a circuit board having more excellent electrical characteristics. As well as
Resources consumed for the designed circuit board can be saved, and the circuit board can be downsized. According to a ninth aspect of the present invention, in the test evaluation means according to the eighth aspect, the transmission line simulator includes a component position, a wiring length, a connection state between layers, when the circuit is laid out on an actual board. Based on the physical shape of the wiring, the dielectric constant of the substrate, etc., the output waveform when a predetermined input waveform is given to the net connecting each component terminal in the circuit is calculated.

As described above, according to the present invention, a circuit board having more excellent electrical characteristics is designed by successively evaluating the electrical characteristics of the circuit laid out on the board at the circuit board designing stage. be able to. According to the present invention of claim 10, in the design standard creating unit of claim 8 or claim 9, the transmission line simulator is configured such that the position of the component, the wiring length, and the like when the circuit is laid out on an actual board. An output waveform when a predetermined input waveform is given to a net connecting each component terminal in the circuit is calculated based on the connection state between layers, the physical shape of the wiring, the dielectric constant of the substrate, and the like.

Therefore, according to the present invention, an optimum design standard is created for each circuit board to be designed, and a layout is performed based on the design standard to design a circuit board having more excellent electrical characteristics. can do. Claim 1
According to the first aspect of the present invention, in the printed circuit board design system according to the first aspect, the fourth aspect, or the seventh aspect, the design standard creation information input unit creates a circuit on the board based on the input circuit board information. Information for creating a design standard, which is a layout restriction to be followed when laying out, information indicating an object for which the design standard should be created and an allowable range of values that the design standard creation target can take. Input design standard creation information indicating information indicating parameters.

The design standard storage unit stores a design standard corresponding to a predetermined value of the parameter for each predetermined design standard creation target. The design standard creation unit reads a parameter value from the circuit board information for a predetermined design standard creation target based on the design standard creation information input by the design standard creation information input unit, and uses the read parameter value. The determined design standard is read from the design standard storage unit, and the read design standard is defined as the design standard for which the design standard is created.

The design standard output unit outputs the design standard defined by the design standard preparation unit and instructs the layout means to perform layout based on the design standard defined by the design standard preparation unit. Therefore, according to the present invention, it is possible to design a circuit board having more excellent electrical characteristics by creating an optimum design standard for each circuit board to be designed and performing layout based on the design standard. it can.

According to the twelfth aspect of the present invention, in the test evaluation means of the printed circuit board design system according to the eighth aspect, the test evaluation reference storage unit stores the test evaluation object for each predetermined test evaluation object. The types of countermeasure components added to the circuit part including the components and their rated value ranges are stored.

The test evaluation target recognition unit is the information described in the evaluation information, and based on the information indicating the test evaluation target on the circuit after layout, the layout information and the circuit at that time. Recognize the test evaluation target in the circuit described by the board information. The test evaluation unit satisfies the test evaluation standard stored in the test evaluation standard storage unit with the type and rating value of the countermeasure component added to the circuit part including the test evaluation target recognized by the test evaluation target recognition unit. By determining whether or not to perform, the quality of the electrical characteristics of the test evaluation target is evaluated.

Therefore, according to the present invention, the characteristics of the circuit board laid out on the board can be successively tested and evaluated, and a circuit board having more excellent electrical characteristics can be obtained based on the result of the test evaluation. Can be designed. According to the thirteenth aspect of the present invention, in the input step, the circuit board information, the noise countermeasure information, and the evaluation information are input.

In the countermeasure component adding step, the countermeasure component is added to the circuit indicated in the circuit board information based on the information regarding the countermeasure component described in the input noise countermeasure information, and the circuit board information is added. Is corrected to describe the circuit after adding countermeasure parts. In the layout step, components and wirings are laid out on the board described by the circuit board information based on the circuit board information corrected in the countermeasure component adding step and information indicating a predetermined layout limitation. The layout information is created with the positions of the laid-out components and wirings as coordinate values on the board, and the circuit board information is further modified so as to describe the circuit after the layout.

In the test evaluation step, based on the evaluation information on the electrical characteristic evaluation of the circuit board in the design stage, the electrical evaluation target of the test in the circuit described by the layout information and the circuit board information at that time is described. Evaluate the quality of the characteristics. In the rated value changing step, the information described in the noise countermeasure information includes information indicating countermeasure components whose rated values can be changed and information indicating the range of changeable rated values of the countermeasure components. On the basis of the countermeasure components added to the test evaluation target evaluated to have poor electrical characteristics in the test evaluation step, and the countermeasure components whose rated values can be changed, the rated value is set for each predetermined value. Each time it is changed, the test evaluation in the test evaluation step is repeated, and the rated value of the countermeasure component is changed and the circuit board information is displayed until the electrical characteristics of the test evaluation target are evaluated to be good in the test evaluation step. Modify to describe the circuit after changing the rated value.

In the output step, among the test evaluation targets in the circuit described in the circuit board information corrected in the layout step and the layout information, all the test evaluation targets are the electrical characteristics in the test evaluation step. If it is evaluated as good, the circuit board information and the layout information corrected in the rated value changing step are output.

As described above, according to the present invention, it is possible to reduce the noise generated when the basically designed electric circuit is laid out on an actual board and design a circuit board having excellent electric characteristics. In addition, by automatically performing all the above-mentioned processing on the circuit of the basic design, it is possible to reduce the work load of the circuit board designer and improve the work efficiency of the circuit board design. A circuit board with excellent electrical characteristics, even when a board designer who is unfamiliar with the technology designs the circuit basically, as when a board designer who is familiar with the circuit board design technology designs the circuit board. Can be designed.

According to the fourteenth aspect of the present invention, in the countermeasure component adding step of the printed circuit board designing method according to the thirteenth aspect, the noise countermeasure information is described in the countermeasure component adding portion recognition sub-step. Information, which is a countermeasure component in the circuit described in the input circuit board information, by collating the information indicating the location in the circuit to which the countermeasure component should be added with the inputted circuit board information. Recognize where to add.

In the countermeasure component recognition substep, the countermeasure component already added to the countermeasure component addition portion recognized in the above-mentioned countermeasure component addition portion recognition substep is recognized. In the countermeasure component addition sub-step, in the noise countermeasure information, information indicating the countermeasure component to be added, which is predetermined for each location in the circuit where the countermeasure component is to be added, and the rating when the countermeasure component is added Based on the information indicating the value, a predetermined countermeasure component is added to the countermeasure component addition position recognized in the countermeasure component recognition sub-step, and the countermeasure component is not added yet.

In the priority order setting substep, the priority order is set for the countermeasure parts recognized in the countermeasure part recognition substep and the countermeasure parts newly added in the countermeasure measure countermeasure part adding substep. In the first circuit board information correction sub-step, information indicating the priority order is added to information describing the countermeasure part in the circuit board information for each countermeasure part whose priority order is set in the priority order setting sub-step, When a countermeasure component is newly added in the countermeasure component addition sub-step, the input circuit board information is corrected so as to describe a circuit after the countermeasure component is added in the countermeasure component addition sub-step.

In the layout step, in the layout area recognition sub-step, the area on the board described in the circuit board information, which is the circuit board information corrected in the first circuit board information correction sub-step, is added. Recognize areas in which the components included in the described circuit and the wiring connecting the components may be laid out.

In the layout sub-step, in the area recognized in the layout area recognition sub-step, according to a predetermined layout limitation, a component included in the circuit described in the circuit board information and a wiring for connecting the component are provided. Lay out. In the layout determination sub-step, it is determined whether or not the layout of all the components to be laid out and the wiring can be completed in the area recognized in the layout area recognition sub-step in the layout sub-step. .

In the countermeasure component deletion sub-step, when it is determined in the layout determination sub-step that the layout cannot be completed, the circuit board information corrected in the first circuit board information correction sub-step is described. Countermeasure components that can be deleted in the circuit are deleted in order from the lowest priority set by the priority setting substep, and the layout determination substep is performed each time the countermeasure component is deleted. Even if after executing and deleting all the countermeasure components that can be deleted, the countermeasure components that can be deleted are deleted until it is determined that the layout can be completed in the layout determination sub-step. In the layout determination sub-step, it is determined that the layout cannot be completed. If it is, the output to that effect.

In the layout information creation substep, the layout information is created with the positions of the components and wirings laid out in the layout substep as coordinate values on the board. In the second circuit board information correction sub-step, every time the countermeasure component is deleted in the countermeasure component deletion sub-step, by adding information indicating which countermeasure component is deleted to the information describing the countermeasure component, The circuit board information corrected in the 1 circuit board information correction sub-step is further corrected.

As described above, according to the present invention, a more flexible automatic layout process can be realized, and the countermeasure component important in the electrical characteristics of the circuit board to be designed is the countermeasure component deleting unit. It can be prevented from being deleted by. The present invention according to claim 15 is the printed circuit board designing method according to claim 14, wherein the rated value changing step is information described in the noise countermeasure information in the rated value changing substep, Based on information indicating countermeasure components that can be changed to countermeasure components having different rating values and information indicating the range of changeable rated values of the countermeasure components, the electrical characteristics were evaluated as poor in the test evaluation step. For the countermeasure component added to the test evaluation target, which can be changed to a countermeasure component having a different rating value, the test evaluation step is performed every time the countermeasure component is changed to a countermeasure component having a different rating value. Repeat the test evaluation by executing the test evaluation step until the electrical characteristics of the test evaluation target are evaluated to be good. To change the policy parts in different measures parts of the rated value.

In the third circuit board information modification sub-step, the circuit board information modified in the second circuit modification sub-step is modified so as to describe the circuit after the rated value change. In the layout change sub-step, even if the rated value of the countermeasure component is changed in the rated value change sub-step in the rated value change sub-step, it is still included in the circuit after the rated value change in the test evaluation step. If the electrical characteristics of all test evaluation targets are not evaluated as good,
The layout step is executed again, and the circuit described in the circuit board information corrected by the third circuit board information correction sub-step is laid out again at a position different from the position described in the layout information. .

In the sub-step of adding a countermeasure component for deletion,
For all the test evaluation targets included in the circuit after the layout is performed again in the layout step, the test evaluation step is performed to perform the test evaluation, and the electrical characteristics in the test evaluation step among the test evaluation objects are With respect to the test evaluation target evaluated as bad, the countermeasure parts deleted in the countermeasure part deletion sub-step are re-added in order from the highest priority, and the countermeasure parts are added again every time the countermeasure parts are re-added. The layout step is performed so that the components are laid out on the substrate, and the circuit after the layout is subjected to the test evaluation by performing the test evaluation step. In the test evaluation step, it is evaluated that the electrical characteristics of all the test evaluation targets are good. The above-mentioned test evaluation that the electrical characteristics were evaluated as poor until Elephant per again adds the countermeasure component was removed in the protection component removed substeps in order of decreasing precedence.

In the priority order changing sub-step, every time the countermeasure component is re-added in the deletion countermeasure component adding sub-step, the priority added to the re-attached countermeasure component may be deleted. Change the priority to indicate that you cannot. In the fourth circuit board information correction sub-step, every time the countermeasure parts are re-added in the deletion countermeasure part addition sub-step, the second of the circuit board information corrected in the second circuit board information correction sub-step The information added in the circuit board information correction sub-step and indicating that the countermeasure component has been deleted is corrected again to the information indicating that the countermeasure component has been added to the circuit.

In the rated value changing step, the circuit after the re-addition of all the remedy components among the remedy components once deleted in the erasure component addition sub-step is subjected to all the test evaluation target electrical circuits in the test evaluation step. If the electrical characteristics are not evaluated as good, the rated value changing substep to the fourth circuit board information correcting substep until the electrical characteristics of all test evaluation targets are evaluated as good in the test evaluation step. Repeat all substeps.

As described above, according to the present invention, if the electrical characteristics of the laid out circuit are not improved after the rated values of the countermeasure components are changed, the layout of the circuit portion having poor electrical characteristics is changed. In addition, when the electrical characteristics of the circuit are still not improved, it is possible to re-add the countermeasure components among the countermeasure components deleted in the previous layout in accordance with the priority order thereof. It is possible to design a circuit board having excellent electrical characteristics.

According to the sixteenth aspect of the present invention, in the countermeasure component adding step of the printed circuit board designing method according to the fourteenth aspect or the fifteenth aspect, in the circuit test sub-step, the countermeasure component adding point recognition sub-step is further performed. A circuit simulation is performed on a predetermined circuit portion including the countermeasure component addition portion recognized in step, and it is determined whether or not the predetermined circuit test evaluation target circuit simulation output satisfies a predetermined circuit test evaluation standard,
When the circuit simulation output of the circuit test evaluation target does not satisfy the predetermined circuit test evaluation criteria,
The information described in the noise countermeasure information, which is obtained by executing the countermeasure component adding sub-step, includes information indicating a countermeasure component to be added to a circuit and information indicating a rated value when the countermeasure component is added. Based on the above, a predetermined countermeasure component is added to the countermeasure component addition position recognized in the countermeasure component recognition sub-step.

As described above, according to the present invention, noise prevention measures can be taken in advance before the basically designed electric circuit is laid out on the substrate. According to the present invention of claim 17, in the countermeasure component adding step of the printed circuit board designing method according to claim 14, claim 15 or 16, further, in the circuit test evaluation sub-step, the countermeasure component adding sub-step. In the step, circuit simulation is performed on the circuit part to which the countermeasure component is added, and it is determined whether or not the predetermined circuit test evaluation target circuit simulation output satisfies the predetermined circuit test evaluation standard. In the step, the quality of the electrical characteristics of the circuit part to which the countermeasure component is added is evaluated.

In the countermeasure component rated value change sub-step, when the circuit test evaluation sub-step evaluates that the circuit part to which the countermeasure component is added in the countermeasure component addition sub-step has poor electrical characteristics, the circuit portion is evaluated. For all countermeasure components that can change the included rating value, change to a countermeasure component with a different rating value, and execute the circuit test evaluation substep each time you change to a countermeasure component with a different rating value. A circuit simulation is performed on the circuit part that has been changed to a countermeasure component with another rated value, and all the circuit parts that have been changed to countermeasure components with different rated values are judged to have good electrical characteristics in the circuit test evaluation substep. The change of the rated value and the evaluation in the circuit test evaluation sub-step are repeated until it is reached.

As described above, according to the present invention, noise prevention measures can be taken in advance at the stage before the electric circuit after the countermeasure components are added is laid out on the substrate. According to the present invention of claim 18, claim 13 and claim 1
4. In the rated value changing step of the printed circuit board designing method according to claim 15 or 17, further, in the unnecessary countermeasure component recognition sub-step, the countermeasure component whose rating value can be changed is changed to a countermeasure component having a different rated value. The rated value of the countermeasure component added to the test evaluation target, which has been evaluated to have good electrical characteristics in the test evaluation target by changing it, is detected, and the detected rated value is input. Information that is described in the noise countermeasure information, and when the rated value of the countermeasure component added in the circuit is changed and the countermeasure component after changing the rated value becomes unnecessary for the circuit. If the detected rated value is within the range of the rated value shown in the information, the rated value is changed as a result of the comparison. It recognizes the countermeasure component value becomes a range of nominal value indicated in the information as unnecessary countermeasure components.

In the sub-step of deleting unnecessary countermeasure parts,
The countermeasure component recognized in the unnecessary countermeasure component recognition sub-step is deleted, and the circuit board information is corrected to describe the circuit after the unnecessary countermeasure component is deleted. As described above, according to the present invention, as a result of the change of the rated value of the countermeasure component, when the rated value of the changed countermeasure component becomes a small value such that the countermeasure component itself can be almost ignored, Or when it becomes a big value that the countermeasure parts are not necessary,
The countermeasure component can be deleted. Further, this makes it possible to design a circuit board having excellent electrical characteristics, save resources consumed by the designed circuit board, and reduce the size of the circuit board.

According to the nineteenth aspect of the present invention, in the printed circuit board designing method of the thirteenth, fifteenth or eighteenth aspect of the present invention, further, in the design standard creation information input sub-step, an input is made. Information for creating a design standard that is a layout restriction to be followed when laying out a circuit on a board based on the created circuit board information, the information indicating an object for which the design standard is created, and the design standard. Design standard creation information indicating information indicating parameters for defining an allowable range of values that can be created is input.

In the design standard creation sub-step, with respect to the design standard creation target predetermined according to the design standard creation information, the possible value of the design standard creation target is changed by a predetermined value under the predetermined parameters, Each time the possible value of the standard creation target is changed by a predetermined value, a simulation is performed on the design standard creation target, and the value of the design standard creation target is changed until the simulation result satisfies the predetermined design standard creation evaluation standard. And evaluation by simulation are repeated, and a design standard is created with the value of the design standard creation target when the simulation result satisfies a predetermined design standard creation evaluation standard as the allowable value of the design standard creation target.

In the design standard output sub-step, even if all the possible values of the design standard preparation target are changed in the design standard preparation sub-step within a possible range, the simulation result still shows the design standard preparation evaluation standard. If not satisfied, it is output, and when the simulation result satisfies a predetermined design standard creation evaluation standard, the design standard created in the design standard creation substep is output, and the layout step is continued. In step 3, the layout is instructed to be performed based on the design standard created in the design standard creation substep.

Therefore, according to the present invention, an optimum design standard is created for each circuit board to be designed, and a layout is performed based on the design standard to design a circuit board having more excellent electrical characteristics. As well as
Resources consumed for the designed circuit board can be saved, and the circuit board can be downsized. According to the invention described in claim 20, in the test evaluation step of the printed circuit board designing method according to claim 19, in the transmission line simulation, the position of the component, the wiring length when the circuit is laid out on the actual substrate, An output waveform when a predetermined input waveform is given to the net connecting each component terminal in the circuit is calculated based on the connection state between layers, the physical shape of the wiring, the dielectric constant of the substrate, and the like.

As described above, according to the present invention, a circuit board having more excellent electrical characteristics is designed by successively evaluating the electrical characteristics of the circuit laid out on the board at the circuit board designing stage. be able to. According to the invention of claim 21, in the design standard creating sub-step of the printed circuit board designing method of claim 19 or 20, in the transmission line simulation, a component when a circuit is laid out on an actual board. Calculate the output waveform when a predetermined input waveform is given to the net connecting each component terminal in the circuit, based on the position, wiring length, connection state between layers, physical shape of wiring, dielectric constant of the board, etc. Ask by.

Therefore, according to the present invention, an optimal design standard is created for each circuit board to be designed, and a layout is performed based on the design standard to design a circuit board having more excellent electrical characteristics. can do. Claim 2
According to the second aspect of the present invention, in the design standard creation information input sub-step of the printed circuit board designing method according to the thirteenth, fifteenth or eighteenth aspect, there are layout restrictions to be followed when laying out a circuit on the substrate. Which is information for creating a design standard, which is information for indicating a target for which the design standard should be created, and a design standard for indicating a parameter for defining an allowable range of values that the design standard creation target can take. Enter the creation information.

In the design standard creation sub-step, based on the design standard creation information input in the design standard creation information input sub-step, the parameter values are read from the circuit board information for the predetermined design standard creation target and read. The design criteria defined by the parameter values
The design standard corresponding to the value of the parameter is read from a memory in which the design standard is stored in advance, and the read design standard is determined as the design standard for which the design standard is created.

In the design standard output sub-step, the design standard defined in the design standard preparation sub-step is output and at the same time the layout step is instructed to perform layout based on the design standard defined in the design standard preparation sub-step. .. Therefore, according to the present invention, an optimum design standard is created for each circuit board to be designed,
By performing layout based on the design criteria,
A circuit board having more excellent electrical characteristics can be designed.

According to the present invention of claim 23, in the test evaluation step of the printed circuit board designing method of claim 19, the information described in the evaluation information in the test evaluation object recognition substep is used. Then, the test evaluation target in the circuit described by the layout information and the circuit board information at that time is recognized based on the information indicating the test evaluation target on the circuit after the layout.

In the test evaluation sub-step, the type and rating value of the countermeasure component added to the circuit part including the test evaluation target recognized in the test evaluation target recognition sub-step are set in the circuit part including the predetermined test evaluation target. Whether the types of countermeasure parts that should be added and the range of rated values that the countermeasure parts should take are predetermined criteria for each test evaluation target, and satisfy the test evaluation criteria stored in advance in the memory? By determining whether or not the electrical characteristics of the test evaluation target are good or bad.

Therefore, according to the present invention, the characteristics of the circuit board laid out on the board can be successively tested and evaluated. Based on the result of the test evaluation, a circuit board having more excellent electrical characteristics can be obtained. Can be designed.

[0104]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The printed circuit board designing method and system of the present invention designs a circuit board including a printed circuit board such as a multi-chip module. In this embodiment, only the printed circuit board design will be described. FIG. 1 is a configuration diagram of a printed circuit board design system which is an embodiment of the present invention. The printed circuit board design system includes a CPU 101, an RO
The M 102, the RAM 103, the dialogue input unit 104, the external storage unit 107, the display unit 108, and the printing unit 109 are provided.

The RAM 103 has an interactive input command processing section 105, a design information input section 106, an output section 110, a circuit correction section 120, a test evaluation section 131, and a layout section 132.
And a program for realizing the design standard creation unit 133 is stored. The functions of these units are realized by the CPU 101 executing the programs. Also, R
The AM 103 includes a storage area for the design information storage unit 140.

The design information input unit 106 further includes a circuit information input unit 161, a component information input unit 162, and a board information input unit 163. The output unit 110 also includes a board design information output unit 171 and a circuit modification information output unit 172. Here, the circuit correction unit 120 includes the countermeasure component recognition unit 121, the countermeasure component addition unit 122, and the countermeasure component deletion unit 123.
And a rated value changing unit 124.

Further, the design information storage unit 140 includes the circuit information storage unit 141, the component information storage unit 142, the board information storage unit 143, the design standard storage unit 144, the countermeasure component circuit pattern information storage unit 145, and the test evaluation information storage unit. 146, countermeasure component circuit information storage unit 147, countermeasure component information storage unit 14
8. A board design information storage unit 149 and a circuit modification information storage unit 150 are provided.

The CPU 101 has a ROM 102 and an RA.
The program stored in M103 is executed.

The interactive input section 104 is a keyboard, a mouse, etc. and interactively inputs information from the board designer. The interactive input command processing unit 105 successively inputs information from the interactive input unit 104 to the printed circuit board design system by interrupt processing at the board designing stage by the printed circuit board design system of this embodiment.

The design information input unit 106 inputs design information necessary for designing a printed circuit board. Circuit information input unit 161
Inputs circuit information such as connection information on the circuit diagram. The circuit information input unit 161 inputs the circuit information regarding the connection between components from the logic information created by the circuit diagram CAD which is an external device. The circuit information input unit 161 is a circuit diagram C.
The circuit information created by AD may be input as it is or after data conversion.

The component information input section 162 inputs component information such as the name, shape, and electrical characteristics of the component. The board information input unit 163 inputs board information such as board shape, material, thickness, number of layers, dielectric constant, width of wiring foil, and wiring interval.
The board designer adds a layout restriction to be specified as a design standard to the board information so that the restriction is included in the design standard created by the design standard creating unit 133 described later. Good. The component information input unit 162 and the board information input unit 163.
Reads the component information and board information stored as files in the external storage unit 107 from the external storage unit 107 and inputs them.

The external storage unit 107 is a magnetic disk or the like and stores parts information, board information, design standards, countermeasure part circuit pattern information, test evaluation information, etc. as files. The printed circuit board design system of the present embodiment reads out these pieces of information at the time of startup, and the component information storage unit 142, the board information storage unit 143, the design standard storage unit 144, the countermeasure component circuit pattern information storage unit 145, and the test evaluation information storage unit. Write to 146. The external storage unit 107 also stores board design information and circuit modification information, which are the board design results of the printed circuit board design system of this embodiment. Other printed circuit board layout CAD and manufacturing CAM can be input by reading the board design information and the circuit correction information stored as files in the external storage unit 107 from the external storage unit 107.

The display unit 108 is a display device such as a CRT, and sequentially displays the design state of the board by the printed circuit board design system of this embodiment. If it is determined that a printed circuit board satisfying the required electrical characteristics cannot be designed under the conditions defined by the input design information, the fact is displayed. further,
When the design is completed by the printed circuit board design system of this embodiment, the board design information and the circuit correction information which are the design results are displayed.

The printing unit 109 is an external output device such as a printer, and prints and outputs the board design information and the circuit correction information, which are the board design results of the printed board design system of this embodiment, on the paper. The printing unit 109 may create and output a circuit diagram, or may print out as logic information. The output unit 110 outputs the board design result of the printed circuit board design system according to the present embodiment to the external storage unit 107 and the display unit 1.
08 and the printing unit 109, data conversion is performed according to each output form, and the data is output to each unit.

The board design information output unit 171 displays or prints the finally created printed board design information, or converts it into data usable for another CAD or CAM system and outputs it. . The circuit correction information output unit 172 displays the external storage unit 107, the display unit, and the like. The data is converted and output according to the output form of each of 108 and the printing unit 109. The circuit correction information output unit 172 may output the changed rated value as the rated value of the countermeasure component changed by the circuit corrected unit 120, or may output the difference from the rated value before the change. Is also good.

After the layout on the board is performed by the layout section 132, which will be described later, the circuit correction section 120 activates the test evaluation section 131 to perform the transmission line simulation of the circuit laid out on the board, and the simulation result. Based on the above, by adding and deleting countermeasure parts and changing the rated value, the circuit is modified so that the circuit laid out on the board satisfies the required electrical characteristics.

The countermeasure component recognizing section 121 collates the circuit information with the countermeasure component circuit pattern information, and recognizes the portion to which the countermeasure component should be added in the circuit created in the circuit diagram CAD. Furthermore, the countermeasure component recognition unit 121 recognizes a component already added as a countermeasure component in the circuit diagram,
In the circuit created in the circuit diagram CAD, the parts to which the countermeasure parts are to be added, to which the countermeasure parts have not yet been added, and the portions to which the countermeasure parts have already been added are the countermeasure parts as the circuit information of the countermeasure parts. Write to the circuit information storage unit 147. In this embodiment, the location to which the countermeasure component is to be added is determined using the net name, the connection position on the net, and the information indicating the connection method.

The countermeasure component adding section 122 stores countermeasure component circuit information from the countermeasure component circuit information storage unit 147, which indicates a portion to which the countermeasure component is to be added in the circuit and to which the countermeasure component has not been added yet. The countermeasure component is input and the countermeasure component is added based on the countermeasure component information stored in the countermeasure component information storage unit 148. At this time, the countermeasure component addition unit 122 assigns a priority to the newly added countermeasure component and writes the component information of the countermeasure component in the countermeasure component information storage unit 148.
Further, regarding the priority order, the countermeasure parts already added in the circuit may be given the same priority order as that of the newly added countermeasure parts.

When the layout unit 132, which will be described later, lays out components on the board and lays out connection wirings, the countermeasure component deletion unit 123 cannot arrange all components and their connection wirings on the board. When the determination is made, the component information stored in the countermeasure component information storage unit 148 is referred to, and the countermeasure components having lower priorities are deleted in order based on the priority assigned to each countermeasure component. At this time, the countermeasure component deletion unit 123 writes, to the countermeasure component information storage unit 148, deletion information indicating that the countermeasure component has been deleted.

The rated value changing unit 124 is the test evaluation unit 13
1 is started, output evaluation of the test evaluation location is performed based on the layout information of the printed circuit board, that is, the width of each connection wiring, the length of the connection wiring, the material of the board and the wiring foil, and the like.
Values such as a resistance value and a capacitance value of the countermeasure component, which are provisionally determined when the countermeasure component is added, are determined. The test evaluation unit 131 performs a transmission line simulation using an existing method after the layout unit 132, which will be described later, lays out on the board, and the test evaluation information storage unit 146.
The output value of the test evaluation location stored by is compared with the evaluation reference value to evaluate whether it is within the range of the evaluation reference.
Although the test evaluation unit 131 performs the transmission line simulation here, the simulation may be a crosstalk simulation, an electromagnetic radiation simulation (EMI), or a timing simulation. good. Further, the plurality of simulations may be combined.

Further, the test evaluation section 131 may evaluate the electrical characteristics of the circuit laid out on the substrate without performing the simulation. In this case, the test evaluation section 131 evaluates the electrical characteristics of the circuit laid out on the board with reference to the test evaluation database stored in the external storage section 107. The test evaluation database stores a predetermined test evaluation target, types of countermeasure parts that should be added to the test evaluation subject, a range of allowable rating values for the countermeasure parts, and the like. For example, “a signal line connected to an input pin of a component that may be damaged when the input signal level exceeds 7 V, and the signal input to the signal line is 5 V, the signal line is The terminating resistance added to is set to 70 to 80Ω. " From the test evaluation information, the test evaluation section 131 reads a “signal line connected to an input pin of a component that may be damaged when the input signal level exceeds 7V” from the test evaluation information, and at that time, The test evaluation target described in the circuit information is recognized, and the rated value of the termination resistance connected to the test evaluation target is recognized. The test evaluation unit 131 compares the recognized rated value of the terminating resistor with the allowable range of the rated value stored in the table, and if the rated value of the terminating resistor is within the allowable range, the test evaluation target electrical Evaluate the physical characteristics as good.

The layout section 132 arranges the parts and the wiring pattern between the parts based on the above-mentioned part information, board outline, board material, number of wiring layers, thickness of each layer, wiring width, wiring interval and the like. A board layout consisting of When a component and wiring that cannot be placed on the board are generated during the layout, the countermeasure component deleting unit 123 is activated to delete the countermeasure component having a lower priority and perform the layout again.
In the layout process of the layout unit 132,
The board designer may use the dialog input unit 104 to partially make corrections interactively. Layout unit 132
Is the board design information storage unit 14 every time the layout is changed.
The board design information in 9 is rewritten, and the board design information finally determined is output to the board design information output unit 171.

The design standard creating unit 133 creates a design standard of the printed circuit board including the wiring length limitation from the board information and the component information. The design standard creation unit 133 writes the created design standard in the design standard storage unit 144. The design standard creation will be described later in detail. The design information storage unit 140 stores information required when designing each board. The circuit information storage unit 141 stores circuit information. The circuit information is logical connection information of components input from the circuit diagram CAD, and which component pin,
It is information indicating which component pin is connected to the wiring, and the connected pin is an input pin or an output pin of the component. The circuit information includes a net name, a part number connected by the net, a part name, a connected pin number, an attribute of the pin, and the like.

FIG. 2 is a circuit diagram for explaining the contents of the circuit information input from the circuit diagram CAD. Component IC1
Is connected to the pin PIN1 of the component IC2 and the net (connection) is named NET-A, and the pin PIN2 of the component IC1 and the pin PIN3 of IC3 are connected to the net. It means that it is named B. In addition, information on characteristics of electric signals flowing in each net is also described separately.

The component information storage unit 142 stores component information. The component information describes the shapes and attributes of the components included in the circuit. The component information includes a component number, a component name, a component type, a component shape, a component pin input / output attribute, such as a pin output rise time, electrical characteristics such as pin capacitance, and component priority. In addition,
The order of priority of the parts does not have to be given at the stage of designing the circuit in the circuit diagram CAD, and the part information input unit 16
The same priority may be assigned to all the parts already described at the stage when 2 inputs the part information.

The board information storage unit 143 stores board information. The board information describes the shape and attributes of the board. The substrate information includes the shape of the substrate, the number of layers of the substrate, the thickness of each layer, the thickness of the substrate, the dielectric constant of the substrate material, and the like. FIG. 3 is a perspective view for specifically explaining the contents of the board information. The board information shown in FIG. 3 has a board thickness of 0.15c.
m, the number of layers of the substrate, the width of the wiring foil is 0.05 mm, the foil thickness of the wiring is 0.02 mm, the distance between the wiring foils is 0.1 mm, and the dielectric constant of the substrate material is 0.5. In addition, the board information is
It includes information such as the material of the wiring foil and the thickness of each layer of the board.

The design standard storage unit 144 stores design standards and design standard creation information. The design standards describe layout restrictions set as standards to be followed when designing a board. The design standard may be stored as a file in the external storage unit 107 in advance, taken out when the printed circuit board design system of the present embodiment is started, and written in the design standard storage unit 144. Also,
The design standard may be interactively input from the interactive input unit 104 when the design standard of the printed circuit board design system according to the present embodiment is created. Further, as the design standard, the input design standard may be changed based on the board information, or, as will be described later, the design standard creating unit 133 may newly create based on the board information and the component information. . The design standard is composed of information such as a gripping allowance of a part and a wiring length limit.

The design standard creation information describes a target such as a wiring length restriction which the design standard creating unit 133 should define as a design standard. The design standard creation information includes information indicating a design standard creation target, parameters defined for each design standard creation target, and information such as an amount of change when changing the value of the design standard creation target. The design standard creation target is, for example, a target such as a wiring length, a parallel wiring length, an equal length wiring designation, etc., which is to be restricted by the design standard.

FIG. 4 is a diagram showing a part of a concrete example of the design standard. The design criteria shown in FIG. 4 represent general restrictions on parallel and equal length wiring. In this example, the created design standard is expressed in sentences, but when passing this output to an external device such as a printed circuit board layout system, it is converted to the format used or used by the target system. The design criteria may be expressed in an easy-to-follow format.

Countermeasure component circuit pattern information storage unit 145
Stores countermeasure component circuit pattern information. The countermeasure component circuit pattern information describes the net to which the countermeasure component should be added according to the attribute of the component to be connected and the pin of the component. The countermeasure component circuit pattern information is stored in advance in the external storage unit 107 as a file, is taken out when the printed circuit board design system of the present embodiment is activated, and is written in the countermeasure component circuit pattern information storage unit 145. Here, the countermeasure component circuit pattern information may be interactively input from the interactive input unit 104 when modifying the circuit of the printed circuit board design system of the present embodiment.

The countermeasure component circuit pattern information includes the types of components connected by the countermeasure component addition target net, the attributes of the pins of the components to be connected, the types of countermeasure components to be added to the net, and the above types. Change the priority of the types of countermeasure parts that should be selectively added, the position on the net to which the countermeasure parts should be added, the priority of adding and deleting the countermeasure parts, the provisional rated value of the countermeasure parts, and the provisional rated value. In this case, the allowable change range, the range of the rated value at which the countermeasure component can be deleted, and the type of connection such as whether the countermeasure component is connected in parallel or in series are added.

FIG. 5 is a diagram showing an example of countermeasure component turn pattern information. In FIG. 5, the countermeasure component circuit pattern information is expressed in sentences, but is used by the target system.
Alternatively, it may be represented in a format that can be easily converted into the format used. The test evaluation information storage unit 146 stores the test evaluation information. The test evaluation information is the test evaluation unit 131.
Describes the points to be tested and evaluated by simulation and the evaluation criteria for those points. The test evaluation information is stored as a file in the external storage unit 107 in advance, is taken out when the printed circuit board design system of this embodiment is started, and is written in the test evaluation information storage unit 146. Further, the test evaluation information is stored in the dialogue input unit 10 when the circuit is modified by the printed circuit board design system of this embodiment.
It may be interactively input from 4.

The test evaluation information includes a circuit part to be simulated by the test evaluation part 131, an input signal at the time of simulation, a place where an output waveform as a simulation result is taken out, an evaluation reference value for evaluating the output waveform and its value. It consists of an allowable range. The countermeasure component circuit information storage unit 147 stores countermeasure component circuit information. Regarding the countermeasure component circuit information, the countermeasure component recognizing unit 121 makes a circuit diagram C
As a result of comparing the circuit information input from AD with the countermeasure component circuit pattern information read from the countermeasure component circuit pattern information storage unit 145, the countermeasure component addition target net recognized by the countermeasure component recognition unit 121 is described. The circuit designer may separately input the countermeasure component circuit information by dialogue.

The net to which the countermeasure parts are added is a circuit diagram C.
The net is described in the circuit information input from AD, and the countermeasure component should be added but the countermeasure component is not yet added. Therefore, the countermeasure component adding unit 122 rewrites the countermeasure component circuit information by adding the countermeasure component to the countermeasure component addition target net and then adding the information indicating that the countermeasure component has been added.

The countermeasure component circuit information includes the net number of the countermeasure component addition target net, the candidate of the countermeasure component type to be added to the net, the priority order when selecting from the candidates as the countermeasure component, the Priority for adding and deleting countermeasure parts, provisional rating value of countermeasure parts When adding countermeasure parts, type of connection such as parallel connection or series connection and input on the net to which the countermeasure parts are added It consists of information such as the connection method such as whether to connect near the pin or near the output pin.

The countermeasure component information storage unit 148 stores countermeasure component information. The countermeasure component described in the countermeasure component information is the component recognized by the countermeasure component recognition unit 121 as the countermeasure component and the countermeasure component added to the countermeasure component addition target net by the countermeasure component addition unit 122. Countermeasure component information includes the component number, component name, component type, component shape, pin attribute, pin capacitance, electrical characteristics,
Current rating value, candidate type of countermeasure parts when changing to another type, priority of the candidate, provisional rating value when changing and adding countermeasure parts to another type, when changing the rating value It consists of candidates for changed rated value, allowable range for changing the rated value, priority order for changing the rated value, priority order for addition and deletion, and range of rated value at which the countermeasure component can be deleted. The rated value is changed by replacing the currently added countermeasure component with a countermeasure component of the same type but having a different rated value. Therefore, the candidate of the changed rated value is selected on the assumption that the shape of the countermeasure component does not change even if the rated value is changed.

FIG. 6 is a circuit diagram showing an example of setting the allowable change range of the rated value. In order to change the resistance value and capacitance value of the countermeasure component once added according to the physical value such as the wiring length determined at the time of layout design, the provisional value and Indicates that a permissible range has been set. The resistor 801 has a provisional value of 51 ohms and an allowable range of 1 to 200 ohms, and the capacitor 802 has a provisional value of 47 pF and an allowable range of 10 to 100 pF. The provisional value and allowable range of the countermeasure component are output as countermeasure component information and can be used at the time of layout.

The board design information storage unit 149 stores board design information. The board design information is information describing the design result of the printed circuit board design system of the present embodiment,
Describe the location and wiring route of parts. The placement position of a component is described by the coordinate position on the board of each component, the board surface on which the component is mounted, the mounting angle, etc.The wiring path is the coordinate position on the board of the foil that connects the components and the foil thickness. It is described by the width of the foil, the surface of the substrate on which the wiring is formed by the foil, and the like. Further, board information indicating the board material, board shape, foil material, etc. is also output as the board design information.

FIG. 7A is a circuit diagram showing the circuit information finally determined by the printed circuit board design system of this embodiment. Here, this is a net that transmits a signal with a clock frequency of 30 MHz, and is a component IC4 and a component IC5.
It is shown that a ground and a resistor R6 are added on the net that connects to and. FIG. 7B is a plan view showing an arrangement on coordinates when the circuit is actually laid out on a printed circuit board. In FIG. 7 (b), for the sake of explanation, the format is displayed as a graphic on the display screen, but in reality, the board shape, the shape of the component IC4, the component IC5, the resistance R6,
It suffices to include the coordinate value, the width and connection of the wiring foil, and information indicating those coordinate values.

FIG. 7C is a diagram for explaining the board information included in the board design information. As shown in FIG. 7C, the board information represents information such as the thickness and material of the board, the dielectric constant, and the thickness and width of the wiring foil. In the printed circuit board design system of the present embodiment, the printed circuit board information of the present embodiment is not changed, but the printed circuit board information of the present embodiment needs to be passed to the manufacturing process which is the next stage of design. The system outputs the board information as a part of the board design information.

The board design information output by the board design information output unit 171 is as shown in FIGS.
The information shown in FIG. 7A, which is the information shown in FIG.
The circuit modification information output unit 172 outputs the information as logical information. The circuit modification information storage unit 150 stores the circuit modification information. The circuit correction information is the circuit correction unit 120.
The changed portion of the circuit information and component information input from the circuit diagram CAD will be described. Here, the final component information of the countermeasure component newly added by the circuit correction unit 120, the component whose rated value has been changed, and the component changed to another type is described. Describe the part number described in the part information input from the CAD. In addition, the circuit information after the change is also described when the connection is changed due to the change of countermeasure parts.

FIG. 8A shows a part of the net in the circuit input from the design information input unit 106, in which the countermeasure component recognition unit 121 adds a net to which electrical countermeasures should be applied, that is, countermeasure component addition. An example of a countermeasure component addition location recognized as a target net is shown. FIG. 8B shows the countermeasure component addition unit 1
22 shows an example in which a reflection preventing component is added to the net. FIG. 8C shows an example in which the rated value changing unit 124 modifies the component rated value of the anti-reflection component.

FIG. 9A shows signal waveforms input to the nets shown in FIGS. 8A, 8B and 8C during simulation. 9 (b), 9 (c) and 9 (d) show the simulation results on the input pin side of the net shown in FIGS. 8 (a), 8 (b) and 8 (c), respectively. The output waveform taken out is shown. Figure 1
FIG. 0 is a flowchart showing the design procedure of the printed circuit board design method according to the embodiment of the present invention.

In the net shown in FIG. 8 (a), for example, the control signal shown in FIG. 9 (a) is input to the input pin of a component which may be damaged when the input control signal exceeds the voltage value of 7V. Here, for example, although a control signal having a voltage value of 5 V is input to the circuit via the net, ringing or the like as shown in FIG. 9B due to reflection at both ends of the net on the control signal. When the overshoot of the control signal indicated by the point P1 becomes equal to or higher than the upper limit voltage value of 7 V due to the generation of the oscillating noise, the component that inputs the overshoot may be damaged.

As described above, regarding a net which connects between components which are liable to malfunction or break due to the generation of noise on the signal to be transmitted and which is likely to cause reflection, the countermeasure component circuit pattern information storage unit 145
Is described in the countermeasure component circuit pattern information stored by. The countermeasure component recognition unit 121 includes a circuit information storage unit 141.
The circuit information is read from the circuit and the countermeasure component circuit pattern information is collated to recognize the countermeasure component addition target net. The countermeasure component recognition unit 121 writes information on the recognized net number of the countermeasure component addition target net and candidate countermeasure components to be added to the net in the countermeasure component circuit information storage unit 147.

Next, the countermeasure component adding section 122 refers to the countermeasure component circuit information and adds the countermeasure component to the countermeasure component addition target net. Here, the type of countermeasure component is selected according to the priority order. The countermeasure component adding unit 122 attaches a component number, a component name, and a priority order regarding addition or deletion of the countermeasure component to the newly added countermeasure component, and further refers to the countermeasure component circuit pattern information to add the countermeasure. Information about the changeable attributes of the parts, for example, information about the kind of parts, rated value, etc.
It writes in 48 (step S1001). The board designer may add the countermeasure component by interactive input at the start of this process.

Here, the countermeasure component adding section 122 is shown in FIG.
As shown in FIG. 8B, a resistor 201 having a provisional resistance value of 51 ohms is added to the net shown in FIG. 8B as a countermeasure component. The countermeasure component adding unit 122 may add countermeasure components to all the nets having the same countermeasure component circuit pattern, or may provide a certain reference in advance and separately provide circuits for the nets having the same pattern. It is also possible to perform calculation such as simulation and add the countermeasure component only to the net in which a problem may occur. The circuit simulation here is information at the circuit diagram level, that is, using only component information and its connection information,
It is a program that calculates circuit signals.

Next, the design standard creating section 133 creates a design standard. Details of creating the design standard will be described later. (Step S1002) Next, the layout unit 132 lays out components and wiring using the corrected circuit information and design criteria, and stores coordinate values indicating the position of the laid out wiring on the board in the board design information. The data is written in the section 149 (step S1003). The layout unit 132 activates the countermeasure component deleting unit 123 when each component is arranged in the layout and the area for arranging the wiring for connecting them is insufficient (step S1004). According to the priority given to the countermeasure parts,
delete. The layout unit 132 deletes countermeasure components until all components are placed in the placement area on the board and can be connected by wiring (step S1005), and layout is performed again (step S1003). Here, when there is no countermeasure component that can be deleted (step S1006) and it is not possible to secure an arrangement area for arranging all the components and connecting them by wiring, a message to that effect is displayed on the display unit 108 ( In step S1007), the process ends.

The test evaluation section 131 performs a transmission line simulation based on the width and length of the laid out wiring pattern, and outputs the output waveform as a test evaluation standard stored in the test evaluation information storage section 146. The laid out circuits are evaluated by comparison (step S100).
8). The transmission line simulation here means component information such as rising and falling characteristics of component pin electrical waveforms, input / output impedance and pin capacitance, the shape and length of the wiring foil, and the dielectric constant of the board. It means calculating the signal waveform flowing on the transmission line based on the physical information of the board based on the program.

In this case, the output waveform shown in FIG. 9C is obtained, and the test evaluation section 131 indicates that the overshoot shown by the point P2 is still 7V and the test evaluation standard is set to a lower value. Since the value is still exceeded,
It is evaluated that the resistance 201 having the provisional rated value of 51Ω, which is the countermeasure component added by the countermeasure component adding unit 122, cannot be accepted.

The rated value changing unit 124 is the test evaluation unit 13
Based on the evaluation result of 1 (step S1009), the rated value of the countermeasure component corresponding to the test evaluation location where the output waveform does not satisfy the evaluation standard is changed (step S101).
0). At this time, the rated value changing unit 124 selects the rated value that is the next value to be changed from the candidates for the changed rated value described in the countermeasure component information. Here, the rated value changing unit 124 selects the resistance value 75Ω that is the next candidate of the changed rated value from the countermeasure component information, and as shown in FIG. 8C, the provisional resistance value 51 that is the countermeasure component. Ohm's resistance 201
Is changed to a resistor 202 having a resistance value of 75 ohms.

At this time, the rated value changing section 124 has already changed the changeable rated value up to the limit value of the changeable range for all countermeasure parts at the test evaluation points whose output waveform does not satisfy the evaluation standard. In this case, if there is a countermeasure component that can be changed to another type of component, change it to that component. When the type of countermeasure parts is changed, the rated value is changed again within the range of the changeable rated value from the provisional rated value. The rated value changing unit 124 rewrites the countermeasure component information in the countermeasure component information storage unit 148 every time the changeable attribute such as the rated value of the countermeasure component is changed. The type of countermeasure component may or may not be changed depending on the printed circuit board to be designed.

Next, the test evaluation section 131 performs the test evaluation of the test evaluation location (step S1011). If the output waveform of the test evaluation location does not satisfy the evaluation standard (step S1012), the layout section 132 executes the test. For the circuit portion including the test evaluation portion, the layout of the component arrangement and the connection wiring thereof is changed (step S1013). The test evaluation section 131 further performs test evaluation of the test evaluation location (step S101).
4) If the output waveform at the test evaluation point does not satisfy the evaluation standard (step S1015), the countermeasure component deletion unit 123 re-adds the previously-removed countermeasure component, and deletes the re-attached countermeasure component. The priority order is changed to disable and the countermeasure component information in the countermeasure component information storage unit 148 is rewritten (step S1016). After that, the countermeasure component deletion unit 123 deletes the countermeasure components that can be deleted until a placement area where all the components can be placed on the board and wiring connection can be secured (step S1005). When the countermeasure component deleting unit 123 cannot secure the arrangement region in which all the components can be arranged on the board and the wiring connection can be ensured (step S1006), the display unit 10
8 is displayed (step S1007), and the process ends. The printed circuit board design system of the present embodiment repeats the above operation until the output waveform at the test evaluation location satisfies the evaluation standard.

If the output waveforms of all the test evaluation points satisfy the evaluation criteria, the rated value changing unit 124 refers to the countermeasure component information stored in the countermeasure component information storage unit 148,
Is the rated value of the countermeasure component changed and finally determined by the rated value changing unit 124 within the range of values that have little influence on the electrical characteristics of the designed printed circuit board even if the countermeasure component is deleted? If it is judged that the rated value is within the range of the above value, it can be deleted and the countermeasure component is deleted. At this time, the rated value changing unit 124
Activates the test evaluation unit 131 and evaluates the output waveform at the test evaluation location again. If the evaluation result shows that the output waveform at the test evaluation location does not satisfy the evaluation standard, the deleted countermeasure component is You may add it again. This process may be omitted depending on the printed circuit board to be designed.

When the result of the test evaluation finally satisfies the evaluation standard, the rated value changing unit 124 outputs the final component information of the countermeasure component written in the countermeasure component information storage unit 148 to the circuit modification information storage unit 150. To the circuit correction information output unit 172. Hereinafter, the design standard creating operation of the design standard creating unit 133 will be described in detail. Here, the design standard creation unit 133 creates a design standard unique to each board based on the simulation result.

FIG. 11 is a flow chart showing an example of the procedure for creating the design standard in the design standard creating unit 133. The design standard creation unit 133 limits parallel wiring length, wiring length, and equal length wiring for satisfying electrical characteristics such as delay prevention, noise reduction, and unnecessary radiation reduction based on circuit information and board information. Create design criteria such as specifications. Specifically, the design standard creation unit 133 creates the design standard for the design standard creation target described in the design standard creation information, for example, the wiring length based on the circuit information, the component information, and the board information. Create a design standard corresponding to the target.

The design standard creating section 133 includes a circuit information storage section 141, a component information storage section 142 and a board information storage section 1.
The circuit information, the component information, and the board information are read from 43 (step S1101) and collated with the design standard creation information read from the design standard storage unit 144 (step S11).
02), recognize the design standard creation target (step S11)
03).

In the example shown in FIG. 11, the design standard creation information includes "the parallel wiring length of a signal line to which a high-frequency signal is input and a wire arranged in parallel to the signal line is a design standard creation target, The signal frequency of the signal transmitting the parameter, the wiring interval, the dielectric constant of the substrate, the width of the wiring foil, and the rise time at the output pin "are described. The design standard creation unit 133 defines the design standard creation target “parallel wiring length L” defined in the design standard creation information.
From the circuit information, component information, and board information based on the information indicating the signal and the information indicating the parameter "signal frequency of signal to be transmitted, wiring interval, board dielectric constant, wiring foil width, rise time at output pin". "Transmission frequency 30MHz of the net NET-A connected to the output pin PIN-1 of the component C which is a clock, wiring interval 0.1mm, board dielectric constant 0.5, wiring foil width 0.05mm, output pin Rise time of 2 nsec ”is read out. Here, the design standard creation unit 133 indicates that “frequency is 30 MHz, wiring interval is 0.1 m.
m, the dielectric constant of the substrate is 0.5, the width of the wiring foil is 0.05 mm, and the rise time at the output pin is 2 nsec ", the wiring" net NET-A and net NET-B "is recognized, and the net NET-A and A design standard is created as an individual parallel wiring length limit defined for the net NET-B. In addition, the design standard creation unit 133 may create the design standard as a layout restriction for a specific design standard creation target location recognized by a predetermined parameter as a layout restriction for the entire board.

In the design standard creation information, values of “parallel wiring length L = 30 cm” and a design standard creation target variation “ΔL = 1 cm” are set in advance as design standard creation target initial values. The design standard creation unit 133 is the test evaluation unit 13
1 is started, the design standard creation target “L”, the design standard creation target initial value “L = 30 cm”, and the design standard creation target change amount “ΔL = 1 cm” are passed to the test evaluation unit 131, and the test evaluation unit 131 Parameter value "Frequency 30MH
z, wiring interval 0.1 mm, substrate dielectric constant 0.5, wiring foil width 0.05 mm, rise time at output pin 2 ns
Under "ec", some simulations such as crosstalk simulation are executed (step S1104). Specifically, the test evaluation unit 131
When wiring is assumed to have a wiring foil width of 0.05 mm, a wiring interval of 0.1 mm, and a parallel wiring length of L on a substrate having a dielectric constant of 0.5, and a signal with a frequency of 30 MHz and a rise time of 2 nsec is input to one of them. The magnitude of the crosstalk appearing on the other wiring of is calculated and the influence of noise is evaluated.

As a result of the simulation, the design standard creating section 133 causes the adverse effects such as crosstalk generated between the parallel wirings on the electrical characteristics of the printed circuit board after designing.
Whether or not it is in a negligible range is evaluated by whether or not the output waveform at the test evaluation location satisfies a predetermined evaluation standard. If the output waveform at the test evaluation location does not satisfy the evaluation criteria, that is, if the adverse effects such as crosstalk cannot be ignored (step S
1105), the wiring length limitation is tightened, for example, by shortening the parallel wiring length L by 1 cm, that is, the parameter L is changed by the parameter change amount (-ΔL) (step S110).
6) The simulation is performed again (step S110).
4). The design standard creation unit 133 continues the above steps S1104 to S1106 until the output waveform of the test evaluation part satisfies the evaluation standard corresponding to the test evaluation part.
By repeating the above, the parameter amount when the output waveform at the test evaluation location satisfies the evaluation standard is set as the design standard (step S1107). After that, the design standard creation unit 133
The process returns to step S1101 to set the next design standard.

Here, as shown in FIG. 11, the design standard creating unit 133 sets the design standard "the parallel wiring length of the wiring laid out in parallel to the net NET-A and the net NET-B is 10 cm or less". Creating. The design standard creating unit 133 stores the created design standard in the design standard storage unit 1.
Write to 44. In addition, the design standard creation unit 133 displays the created design standard on the display unit 108 in response to the output request input from the dialogue input unit 104, prints it by the printing unit 109, and converts the data to another CAD or CAM. To the system through the design standard storage unit 144.

As a result, it is possible to create a design standard adapted to the electrical characteristics unique to the printed circuit board to be designed. FIG. 12 is a flowchart showing another example of the procedure for creating the design standard in the design standard creating unit 133. Here, the design standard creation unit 133 is configured to operate the external storage unit 1
The design standard is created with reference to the design standard creation database stored in 07.

The design standard creating section 133 includes a circuit information storage section 141, a component information storage section 142 and a board information storage section 1.
The circuit information, the component information, and the board information are read from 43 (step S1301), and the design standard creation information stored in the design standard storage unit 144 is read (step S1).
302). The design standard creation unit 133 defines a parameter, a parameter value, and a parameter value defined for each design standard creation target in the design standard creation information from the circuit information, the component information, and the board information. Recognize the location where the standard is created. Here, the design standard creation unit 133 uses the net NET as the design standard creation target location.
-A and Net NET-B are recognized, and Net NET-A and Net N are used as parameters and parameter values.
The ET-B clock frequency of 30 MHz and its wiring interval of 0.1 mm are recognized (step S1303).

The design standard creating unit 133 searches the design standard creating database and finds a design rule in which the recognized parameter value satisfies the condition. The design rule describes, for each design standard creation target, a limit value to be set as a design standard for the design standard creation target according to the value of the parameter. For example, if the design standard creation target is parallel wiring length,
"If the clock frequency is 30 MHz or less and the wiring interval is 0.1 mm or more, the parallel wiring length is 10 cm or less.""The clock frequency is 20 MHz or less and the wiring interval is 0.1 mm or more. For example, the parallel wiring length should be 15 cm or less. ”, Etc., and a limit value to be set as a design standard for design standard creation when the parameter satisfies the above condition, such as a parameter value range. It is described (step S1304).

The design standard creating section 133 searches the design standard creating database and displays "clock frequency 30 MH".
Search for a design rule in which the parameter values "z, wiring interval 0.1 mm" satisfy the conditions. Here, the design standard creation unit 133 obtains a design rule that "if the clock frequency is 30 MHz or less and the wiring interval is 0.1 mm or more, the parallel wiring length is 10 cm or less". The design standard creation unit 133 defines the limit value of the design rule obtained as a result of the search as the design standard of the design standard creation target location. As a result, the design standard creation unit 133 creates a design standard "the parallel wiring length is 10 cm or less" for the net NET-A and the net NET-B (step S1305).

The design standard creating section 133 has the step S
The operation of 1301 to step S1305 is repeated to create design standards for all design standard creation target locations and design standard creation targets. As a result, it is possible to create a design standard adapted to the electrical characteristics unique to the printed circuit board to be designed.

Here, the printed circuit board design system stores the design standard preparation information in the design standard storage unit 144, but instead of this, the design standard preparation information is stored in the design standard preparation database. You may keep it.

[0168]

As described above, according to the present invention as set forth in claim 1, the countermeasure component adding means adds a countermeasure component to the circuit basically designed, and the layout means adds a countermeasure component to the circuit. And evaluating the electrical characteristics of the printed circuit board on which the test evaluation means is laid out, and according to the evaluation result, the rated value changing means changes the rating of the added countermeasure component. By changing the value, it is possible to reduce the noise generated when the basically designed electric circuit is laid out on an actual board, and to design a circuit board having excellent electrical characteristics. In addition, by automatically performing all the above-mentioned processing on the circuit of the basic design, it is possible to reduce the work load of the circuit board designer and improve the work efficiency of the circuit board design. A circuit board with excellent electrical characteristics, even when a board designer who is unfamiliar with the technology designs the circuit basically, as when a board designer who is familiar with the circuit board design technology designs the circuit board. Can be designed.

As described above, according to the present invention as set forth in claim 2, after the necessary countermeasure component is added to the circuit in which the countermeasure component adding means is basically designed, the priority setting unit adds the countermeasure component into the circuit. Prioritize all countermeasure parts
In layout, if all the components and wirings included in the circuit cannot be laid out on the board, the countermeasure component deletion unit sequentially deletes the countermeasure components with lower priority and re-lays them out. It is possible to realize a more flexible automatic layout process, and it is possible to prevent the countermeasure component deletion unit from deleting the countermeasure component that is important for the electrical characteristics of the circuit board to be designed. . Therefore, a circuit board having more excellent electrical characteristics can be designed.

As described above, according to the present invention as set forth in claim 3, after the necessary countermeasure component is added to the circuit in which the countermeasure component adding means is basically designed, the priority setting unit adds the countermeasure component into the circuit. Prioritize all countermeasure parts
In layout, if all the components and wirings included in the circuit cannot be laid out on the board, the countermeasure component deletion unit sequentially deletes the countermeasure components with lower priority and re-lays them out. It is possible to realize a more flexible automatic layout process, and it is possible to prevent the countermeasure component deletion unit from deleting the countermeasure component that is important for the electrical characteristics of the circuit board to be designed. . Therefore, a circuit board having more excellent electrical characteristics can be designed.

As described above, according to the present invention as set forth in claim 4, when the electrical characteristics of the laid out circuit are not improved after the rated value of the countermeasure component is changed, the electrical characteristics are not good. When the layout of the circuit part is changed and the electrical characteristics of the circuit are still not improved, the countermeasure components can be re-added according to the priority order from the countermeasure components deleted in the previous layout. This makes it possible to design a circuit board having excellent electrical characteristics.

As described above, according to the present invention of claim 5, the circuit test section evaluates the characteristics of the electric circuit basically designed by performing a circuit simulation,
By adding appropriate countermeasure components to the poorly evaluated circuit portion by the countermeasure component adding unit, noise prevention measures can be taken in advance before the basic designed electric circuit is laid out on the board. it can. Therefore, a circuit board having more excellent electrical characteristics can be designed.

As described above, according to the present invention of claim 6, the circuit test evaluation section performs circuit simulation to evaluate the electrical characteristics of the circuit to which the countermeasure component is added by the countermeasure component addition unit. However, by changing the rated value of the countermeasure component added to the circuit part that is not evaluated well by the countermeasure component rated value changing unit, the electric circuit after the countermeasure component is added is laid out on the board before it is laid out. It is possible to take noise prevention measures in advance. Therefore, a circuit board having more excellent electrical characteristics can be designed.

As described above, according to the present invention as set forth in claim 7, as a result of changing the rated value of the countermeasure component, the changed rated value of the countermeasure component can almost ignore the countermeasure component itself. When the value becomes such a small value or the value becomes large that the countermeasure component is not necessary, the countermeasure component can be deleted. This also allows
It is possible to design a circuit board having excellent electrical characteristics, save resources used for the designed circuit board, and reduce the size of the circuit board.

As described above, according to the present invention of claim 8, an optimum design standard is created for each circuit board to be designed, and a layout is performed based on the design standard, so that more electrical performance is achieved. It is possible to design a circuit board having excellent characteristics, save resources used for the designed circuit board, and reduce the size of the circuit board.

As described above, according to the present invention as set forth in claim 9, the transmission line simulation is sequentially performed at the designing stage of the circuit board, and the electrical characteristics of the circuit laid out on the board are evaluated. A circuit board having more excellent electrical characteristics can be designed. As described above, according to the present invention of claim 10, an optimum design standard is created for each circuit board to be designed based on the evaluation of the electrical characteristics by the transmission line simulation, and the created design standard is created. By performing the layout based on (1), the layout can be performed based on the design standard more suitable for the circuit board to be designed, and the circuit board having more excellent electrical characteristics can be designed.

As described above, according to the present invention as set forth in claim 11, the design stored in advance in each of the design standard creation objects in the design standard storage unit according to the value of the parameter of the circuit board to be designed. By reading the standard and performing the layout based on the read design standard, it is possible to perform the layout based on the design standard that is more suitable for the circuit board to be designed, and to design a circuit board with better electrical characteristics. can do.

As described above, according to the present invention of claim 12, the type and rating value of the countermeasure component added to the circuit portion including the test evaluation target are stored in the test evaluation reference storage section. By judging whether or not the test evaluation criteria are satisfied, the characteristics of the circuit board laid out on the board can be successively tested and evaluated, and based on the result of the test evaluation, the electrical characteristics are more excellent. The circuit board can be designed.

As described above, according to the present invention as set forth in claim 13, the countermeasure component is added to the circuit basically designed in the countermeasure component adding step, and the circuit to which the countermeasure component is added in the layout step is formed on the substrate. In addition to the layout above, the electrical characteristics of the printed circuit board laid out in the test evaluation step are evaluated, and the changeable rated value of the countermeasure component added in the rated value changing step is changed according to the evaluation result. By doing so, it is possible to reduce noise that occurs when the basically designed electric circuit is laid out on an actual board, and to design a circuit board having excellent electrical characteristics. In addition,
By automatically performing all of the above processing for the circuit that was designed basic, it is possible to reduce the work load of the circuit board designer and improve the work efficiency of circuit board design,
Even if the board designer who is not familiar with the circuit board design technology designs the circuit basically, the electrical characteristics are excellent as in the case where the board designer who is familiar with the circuit board design technology designs the circuit board. Circuit board can be designed.

As described above, according to the present invention as set forth in claim 14, after the necessary countermeasure components are added to the circuit basically designed in the countermeasure component adding step, they are added to the circuit in the priority setting substep. Prioritize all the added countermeasure parts, and prioritize in the countermeasure part deletion sub-step if all the components and wirings included in the circuit cannot be laid out on the board during layout. It is possible to realize a more flexible automatic layout process by sequentially deleting the lower order countermeasure components and performing the layout again, and the important countermeasure components in terms of the electrical characteristics of the circuit board to be designed are described above. It can be prevented from being deleted in the countermeasure component deletion sub-step. Therefore, a circuit board having more excellent electrical characteristics can be designed.

As described above, according to the present invention as set forth in claim 15, after the rated value of the countermeasure component is changed, if the electrical characteristics of the laid out circuit are not improved, the electrical characteristics are not good. When the layout of the circuit part is changed and the electrical characteristics of the circuit are still not improved, the countermeasure components can be re-added according to the priority order from the countermeasure components deleted in the previous layout. This makes it possible to design a circuit board having excellent electrical characteristics.

As described above, according to the present invention of claim 16, in the circuit test sub-step, the characteristics of the basic designed electric circuit are evaluated by performing circuit simulation, and the countermeasure component addition sub-step is performed. In the above, by adding an appropriate countermeasure component to a circuit portion that is not well evaluated, noise prevention countermeasures can be taken in advance before the basically designed electric circuit is laid out on the substrate. Therefore, a circuit board having more excellent electrical characteristics can be designed.

As described above, according to the seventeenth aspect of the present invention, by performing the circuit simulation in the circuit test evaluation sub-step, the electrical characteristics of the circuit to which the countermeasure parts are added in the countermeasure part addition sub-step are described. By evaluating the characteristics and changing the rated value of the countermeasure component added to the circuit part where the evaluation is not good in the countermeasure component rated value change substep, the electric circuit after the countermeasure component is added is laid out on the board. Noise prevention measures can be taken in advance at the previous stage. Therefore,
A circuit board having more excellent electrical characteristics can be designed.

As described above, according to the eighteenth aspect of the present invention, as a result of changing the rated value of the countermeasure component, the changed rated value of the countermeasure component can almost ignore the countermeasure component itself. When the value becomes such a small value or the value becomes large that the countermeasure component is not necessary, the countermeasure component can be deleted. Further, this makes it possible to design a circuit board having excellent electrical characteristics, save resources consumed by the designed circuit board, and reduce the size of the circuit board.

As described above, according to the present invention of claim 19, an optimum design standard is created for each circuit board to be designed, and a layout is performed based on the design standard, so that more electrical operation is achieved. It is possible to design a circuit board having excellent characteristics, save resources used for the designed circuit board, and reduce the size of the circuit board.

As described above, according to the present invention, the transmission line simulation is sequentially performed at the designing stage of the circuit board, and the electrical characteristics of the circuit laid out on the board are evaluated. A circuit board having more excellent electrical characteristics can be designed. As described above, according to the present invention of claim 21, an optimum design standard is created for each circuit board to be designed based on the evaluation of the electrical characteristics by the transmission line simulation, and the created design standard is created. By performing the layout based on (1), the layout can be performed based on the design standard more suitable for the circuit board to be designed, and the circuit board having more excellent electrical characteristics can be designed.

As described above, according to the present invention as set forth in claim 22, the design standard stored in advance in the memory for each design standard creation target is read according to the value of the parameter of the circuit board to be designed. By performing the layout based on the read design standard, the layout can be performed based on the design standard more suitable for the circuit board to be designed, and the circuit board having more excellent electrical characteristics can be designed. it can.

As described above, according to the present invention of claim 23, the type and rating value of the countermeasure component added to the circuit portion including the test evaluation target are stored beforehand in the memory. The characteristics of the circuit board laid out on the board can be sequentially tested and evaluated by determining whether or not the above conditions are satisfied, and based on the result of the test evaluation, a circuit board having more excellent electrical characteristics can be obtained. Can be designed.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a printed circuit board design system that is an embodiment of the present invention.

FIG. 2 is a circuit diagram for explaining contents of circuit information input from a circuit diagram CAD.

FIG. 3 is a perspective view for specifically explaining the contents of board information.

FIG. 4 is a diagram showing a part of a specific example of a design standard.

FIG. 5 is a diagram showing an example of countermeasure component turn pattern information.

FIG. 6 is a circuit diagram showing an example of setting an allowable change range of a rated value.

FIG. 7A is a circuit diagram showing finally determined circuit information. (B) It is a top view which shows the arrangement | positioning on a coordinate when the said circuit is actually laid out on a printed circuit board. (C) It is a figure for demonstrating the board | substrate information contained in board | substrate design information.

FIG. 8A is a circuit diagram showing an example of a countermeasure component addition location recognized as a countermeasure component addition target net by the countermeasure component recognition unit 121. (B) A circuit diagram showing an example in which a countermeasure component adding unit 122 adds a reflection countermeasure component to the net. FIG. 7C is a circuit diagram showing an example in which the rated value changing unit 124 corrects the component rated value of the anti-reflection component.

9 (a) is a waveform diagram showing signal waveforms input to the nets shown in FIGS. 8 (a), 8 (b) and 8 (c) during simulation. FIG. 9B is a waveform diagram showing an output waveform extracted at the input pin side of the net shown in FIG. 8A as a result of the simulation. FIG. 9C is a waveform diagram showing an output waveform extracted on the input pin side of the net shown in FIG. 8B as a result of the simulation. FIG. 9D is a waveform diagram showing an output waveform extracted at the input pin side of the net shown in FIG. 8C as a result of the simulation.

FIG. 10 is a flowchart showing a design procedure of a printed circuit board design method according to an embodiment of the present invention.

FIG. 11 is a flowchart showing an example of a procedure for creating a design standard in a design standard creating unit 133.

FIG. 12 is a flowchart showing another example of the procedure for creating the design standard in the design standard creating unit 133.

FIG. 13 is a flowchart showing a conventional printed circuit board design procedure using CAD.

[Explanation of symbols]

 101 CPU 102 ROM 103 RAM 104 Interactive Input Section 105 Interactive Input Command Processing Section 106 Design Information Input Section 107 External Storage Section 108 Display Section 109 Printing Section 110 Output Section 120 Circuit Modification Section 121 Countermeasure Component Recognition Section 122 Countermeasure Component Addition Section 123 Countermeasures Component deletion unit 124 Rating value change unit 131 Test evaluation unit 132 Layout unit 133 Design standard creation unit 140 Design information storage unit 141 Circuit information storage unit 142 Component information storage unit 143 Board information storage unit 144 Design standard storage unit 145 Countermeasure component circuit pattern Information storage unit 146 Test evaluation information storage unit 147 Countermeasure component circuit information storage unit 148 Countermeasure component information storage unit 149 Board design information storage unit 150 Circuit modification information storage unit 161 Circuit information input unit 162 Component information input unit 163 Board information input unit 171 Circuit board design information output unit 172 Circuit correction information output unit

 ─────────────────────────────────────────────────── ─── Continued front page (72) Inventor Yuichi Nishimura 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Shinji Miura, 1006 Kadoma, Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd. 72) Inventor Yoshiyuki Saito, 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Nobuo Sueda, 1006, Kadoma, Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd.

Claims (23)

[Claims] 1. Circuit board information regarding a board used for a circuit board to be designed, a circuit to be laid out on the board, and components included therein, and noise countermeasure information regarding measures for preventing noise generated in the circuit board. A circuit board design system for designing a circuit board from evaluation information relating to the electrical characteristic evaluation of the circuit board at the design stage, comprising: input means for inputting the circuit board information, the noise countermeasure information, and the evaluation information. Based on the information about the countermeasure component described in the noise countermeasure information, the countermeasure component is added to the circuit shown in the circuit board information, and the circuit board information is used to describe the circuit after the countermeasure component is added. The countermeasure component adding means to be corrected, and the circuit board information and the noise countermeasure information corrected by the countermeasure component adding means. Based on the described information indicating the limitation on the layout, the parts and wiring are laid out on the board described by the circuit board information, and the positions of the laid-out parts and wiring are coordinated on the board. Layout information is created as a value, and the layout means is arranged to modify the circuit board information so as to further describe the circuit after the layout, and the layout based on the evaluation information on the electrical characteristic evaluation of the circuit board at the design stage. Information and the circuit board information at that point in time, the test evaluation means for evaluating the quality of the electrical characteristics of the test evaluation target in the circuit, and the test evaluation evaluated by the test evaluation means as having poor electrical characteristics. Regarding the countermeasure parts added to the target, regarding the countermeasure parts in the noise countermeasure information Based on the report, the countermeasure component is changed to a countermeasure component having a different rated value, and the circuit board information is modified so as to describe the circuit after the rated value is changed, and the layout unit changes the layout. Each time it is completed, the test evaluation means is activated, and each time the rated value changing means changes the rated value of the countermeasure component in the circuit, control means for activating the test evaluation means, the circuit board information and the Among the test evaluation targets in the circuit described in the layout information, if the predetermined test evaluation target is evaluated by the test evaluation means to have good electrical characteristics, the circuit board information and the layout information A printed circuit board design system comprising: 2. The countermeasure component adding means collates the information in the noise countermeasure information, which is the information indicating the place in the circuit to which the countermeasure component is to be added, with the inputted circuit board information, and inputs the information. In the circuit described in the above described circuit board information, the countermeasure component added portion recognition unit that recognizes the portion to which the countermeasure component added portion and the countermeasure component added portion recognized by the countermeasure component added portion recognition unit have already been detected. A countermeasure component recognition unit that recognizes the countermeasure component that has been added, and information that indicates the countermeasure component that should be added and that is specified in the noise countermeasure information that corresponds to the location where the countermeasure component is added. Based on the information indicating the rated value of the countermeasure component, the countermeasure component recognizing unit recognizes the countermeasure component addition portion, and the countermeasure component addition portion adds the predetermined countermeasure component to the portion where the countermeasure component has not been added yet. Unit, a priority setting unit that sets a priority to the countermeasure component recognized by the countermeasure component recognition unit and the countermeasure component newly added by the countermeasure component addition unit, and the priority setting unit sets the priority. For each set countermeasure component, if the information indicating the priority is added to the information describing the countermeasure component in the circuit board information, and the countermeasure component adding unit newly adds the countermeasure component, the countermeasure component is added. As the addition section describes the circuit after adding countermeasure parts,
A first circuit board information correction unit that corrects the input circuit board information, wherein the layout means is an area on the board described in the circuit board information, and the first circuit board information correction unit The layout area recognition unit that recognizes an area in which the components included in the circuit described in the circuit board information corrected by the unit and the wiring that connects the components may be laid out, and the layout area recognition unit, A layout unit that lays out, in a region, components included in a circuit described in the circuit board information and wirings that connect the components, in accordance with layout restrictions described in the noise countermeasure information; The layout section completes the layout of all the components to be laid out and the wiring within the area recognized by the area recognition section. A layout determining unit that determines whether or not the layout determining unit can perform the layout, and the first circuit board information correcting unit corrects when the layout determining unit determines that the layout unit cannot complete the layout. A countermeasure component deleting unit that sequentially deletes countermeasure components that can be deleted in the circuit described in the circuit board information from the lowest priority set by the priority setting unit; and the layout. A layout information creation unit that creates layout information by using the positions of the components and wiring that the unit has laid out as coordinate values on the board; and the countermeasure component in the information describing the components included in the circuit in the circuit board information. The circuit board information corrected by the first circuit board information correction section is further added by adding information indicating which countermeasure component is deleted by the deletion section. The first to positive 2
A circuit board information correction unit; and a layout control unit that activates the layout area recognition unit, the layout unit, and the layout determination unit every time the countermeasure component deletion unit deletes the countermeasure component. The printed circuit board design system according to claim 1. 3. The rated value changing means is information described in the noise countermeasure information,
Based on information indicating countermeasure components that can be changed to countermeasure components having different rating values and information indicating a range of changeable rated values of the countermeasure components, the test evaluation means evaluated that the electrical characteristics are bad. A countermeasure component added to the test evaluation target, which is a countermeasure component that can be changed to a countermeasure component having a different rating value, a rating value changing unit that changes the countermeasure component to a countermeasure component having a different rating value, 2 The circuit board information modified by the circuit board information modifying unit is modified so as to describe the circuit after the rated value is changed.
3. A circuit board information correction unit is included.
The printed circuit board design system described. 4. Even if the rated value changing unit changes the rated values of all the countermeasure parts whose rated values can be changed,
If the test evaluation means does not evaluate the electrical characteristics of the predetermined test evaluation target included in the circuit after the change of the rated value as good, the layout means is activated to describe the circuit board information at that time. A layout change control unit for laying out the existing circuit again at a position different from the position described in the layout information; and a test evaluation after the layout means performs layout based on an instruction from the layout change control unit. result,
With respect to the test evaluation target evaluated to have poor electrical characteristics by the test evaluation unit, a deletion countermeasure component addition unit that re-adds the countermeasure components deleted by the countermeasure component deletion unit in descending order of priority, A priority order changing unit that changes the priority order of the countermeasure parts added again by the deletion countermeasure part adding unit to a priority order indicating that the countermeasure parts cannot be deleted; and the second circuit board information correction. Information added by the department,
The information indicating that the countermeasure component has been deleted is corrected to the information indicating that the countermeasure component has been added again, and the priority in the information describing the countermeasure component is corrected to the priority changed by the priority changing unit. The fourth circuit board information correction unit and the layout unit performs layout based on an instruction from the layout change control unit, and then the test evaluation unit performs test evaluation, and then the rated value change unit is put on standby. At the same time, each time the deletion countermeasure component adding unit re-adds the countermeasure component deleted by the layout unit to the circuit again, the layout unit is activated, and the deletion countermeasure component adding unit re-adds it. As for the test evaluation target in the circuit after adding all the deletion countermeasure components, the electrical characteristics of the test evaluation target determined in advance by the test evaluation means are specified. 4. The printed circuit board design system according to claim 3, further comprising: a deletion countermeasure component addition control unit that activates the rated value changing unit when not evaluated as good. 5. The countermeasure component adding means is a circuit portion including a countermeasure component adding portion recognized by the countermeasure component adding portion recognizing unit, and performs a circuit simulation on a circuit test evaluation target described in the evaluation information. The circuit simulation output of the circuit test evaluation target determines whether or not the circuit simulation output of the circuit test evaluation target satisfies the circuit test evaluation standard described in the evaluation information. If not satisfied, the countermeasure component adding unit is activated, and the information described in the noise countermeasure information is information indicating the countermeasure component to be added to the circuit and the rating when the countermeasure component is added. Based on the information that indicates the value
The printed circuit board design system according to claim 2 or 4, further comprising a circuit test unit that adds a predetermined countermeasure component to the countermeasure component addition position recognized by the countermeasure component recognition unit. 6. The countermeasure component adding means performs a circuit simulation on the circuit portion to which the countermeasure component adding unit has added the countermeasure component, and sets a circuit test evaluation standard determined by a circuit simulation output of a predetermined circuit test evaluation target. A circuit test evaluation unit that evaluates whether or not the electrical characteristics of the circuit part to which the countermeasure component adding unit has added the countermeasure component by judging whether or not the countermeasure component adding unit determines whether or not it is satisfied; Section evaluates that the electrical characteristics of the circuit part to which the countermeasure component is added are poor, all the countermeasure components that can change the rated value included in the circuit component are changed to the countermeasure component of another rated value. The countermeasure component rated value changing unit to be changed, and each time the countermeasure component rated value changing unit changes the countermeasure component to a countermeasure component having a different rated value, the circuit test evaluation is performed. And a countermeasure component rated value change control unit for activating the evaluation unit to cause the circuit test evaluation unit to evaluate the electrical characteristics of the circuit portion changed to the countermeasure component having another rated value. The printed circuit board design system according to claim 2, claim 4, or claim 5. 7. The rated value changing means evaluates that the electrical characteristic of the test evaluation target is good by the test evaluation means by changing the countermeasure parts capable of changing the rated value to the countermeasure parts having different rated values. The rated value of the countermeasure component added to the test evaluation target is detected, and the detected rated value and the information described in the input noise countermeasure information are added to the circuit. As a result of changing the rated value of the countermeasure component, the countermeasure component after changing the rated value is compared with the information indicating the range of the rated value when it becomes unnecessary for the circuit, and the detected rated value is If the rated value is within the range of the rated value shown in the information, the countermeasure parts whose rated value is changed to the rated value range shown in the above information as a result of changing the rated value are recognized as unnecessary countermeasure parts. Remove the part, the protection component of the undesired countermeasure component recognition unit has recognized,
3. The circuit board information is modified to describe the circuit after the unnecessary countermeasure component is deleted, and further, an unnecessary countermeasure component deleting unit for activating the layout means is further included. 4. The printed circuit board design system according to claim 4 or claim 6. 8. Information for creating a design standard, which is a layout restriction to be followed when laying out a circuit on a board based on inputted circuit board information, and an object for which the design standard should be created. Design standard creation information input unit for inputting design standard creation information indicating information and information indicating parameters for defining an allowable range of values that can be taken by the design standard creation target; and predetermined according to the design standard creation information With respect to the design standard creation target, the possible values of the design standard creation target are changed by predetermined values under the predetermined parameters, and the design values are changed each time the possible values of the design standard creation target are changed by predetermined values. A simulation is performed on the standard creation target, and the simulation result satisfies the predetermined design standard creation evaluation standard. By repeating the change of the value of the design standard creation target and the evaluation by simulation, the value of the design standard creation target when the simulation result satisfies the predetermined design standard creation evaluation standard is set as the design standard creation target allowable value. Even if the design standard creation unit that creates the design standard creation unit changes all possible values of the design standard creation target within a possible range, the simulation result still does not satisfy the design standard creation evaluation standard. In that case, when the simulation result satisfies a predetermined design standard creation evaluation standard, the design standard created by the design standard creating unit is output and the design created by the design standard creating unit is output. And a design standard output unit for instructing the layout unit to perform layout based on a standard. Claim 1, claim 4 or claim 7 PCB design system, wherein the door. 9. The circuit for evaluating a circuit based on a position of a component when a circuit is laid out on an actual substrate, a wiring length, a connection state between layers, a physical shape of the wiring, a dielectric constant of the substrate, and the like. 9. The printed circuit board design system according to claim 8, further comprising a transmission line simulator for calculating an output waveform when a predetermined input waveform is given to a net connecting each component terminal therein. 10. The design standard creating unit, based on the position of components when the circuit is laid out on an actual board, the wiring length, the connection state between layers, the physical shape of the wiring, the dielectric constant of the board, and the like, 10. The printed circuit board design system according to claim 8 or 9, further comprising a transmission line simulator for calculating an output waveform when a predetermined input waveform is given to a net connecting each component terminal in the circuit. 11. Information for creating a design standard, which is a layout restriction to be followed when laying out a circuit on a board based on inputted circuit board information, and an object for which the design standard should be created. Design standard creation information input section for inputting design standard creation information indicating information and information indicating parameters for defining the allowable range of values that the design standard creation target can take, and for each predetermined design standard creation target, Based on the design standard creation information input by the design standard creation information input unit, the design standard storage unit that stores the design standard corresponding to the value of the predetermined parameter, and the circuit board for the predetermined design standard creation target. The parameter value is read from the information, and the design standard defined by the read parameter value is read from the design standard storage unit. , Based on the design standard created by the design standard creating unit, the design standard creating unit that defines the read design standard as the design standard of the design standard creating target, and outputs the design standard defined by the design standard creating unit. 2. A design reference output unit for instructing the layout means to perform layout, further comprising:
The printed circuit board design system according to claim 4 or 7. 12. The test evaluation reference storage unit stores, for each predetermined test evaluation target, a type of a countermeasure component added to a circuit portion including the test evaluation target and a range of its rated value. And a circuit described by the layout information and the circuit board information at that time based on the information described in the evaluation information, which indicates a test evaluation target on a circuit after layout. A test evaluation target recognition unit that recognizes a test evaluation target therein, and the type and rated value of the countermeasure component added to the circuit part including the test evaluation target recognized by the test evaluation target recognition unit is the test evaluation reference storage unit. Test evaluation that evaluates whether the electrical characteristics of the test evaluation target are good or bad by determining whether or not the test evaluation criteria stored in is satisfied. The printed circuit board design system according to claim 8, further comprising: 13. Circuit board information relating to a board used for a circuit board to be designed, a circuit to be laid out on the board, and components included therein, and noise countermeasure information related to measures for preventing noise generated in the circuit board. A circuit board design method for designing a circuit board from evaluation information relating to the electrical characteristic evaluation of the circuit board at the design stage, comprising an input step of inputting the circuit board information, the noise countermeasure information, and the evaluation information. Based on the information about the countermeasure component described in the noise countermeasure information, the countermeasure component is added to the circuit shown in the circuit board information, and the circuit board information is used to describe the circuit after the countermeasure component is added. The countermeasure component adding step to be corrected, and the circuit board information corrected in the countermeasure component adding step are set in advance. Based on the information indicating the layout limitation, the components and wirings are laid out on the board described by the circuit board information, and the layout information is obtained by using the positions of the laid-out parts and wirings as coordinate values on the board. And a layout step of modifying the circuit board information so as to describe the circuit after the layout, and the layout information and its time point based on the evaluation information on the electrical characteristic evaluation of the circuit board at the design stage. Circuit board information and a test evaluation step for evaluating the quality of the electrical characteristics of the test evaluation target in the circuit described by, and the information described in the noise countermeasure information,
Based on the information indicating the countermeasure parts that can change the rated value and the information indicating the changeable rated value range of the countermeasure parts,
For the countermeasure component added to the test evaluation target evaluated to have poor electrical characteristics in the test evaluation step, and the countermeasure component of which the rated value can be changed, every time the rated value is changed by a predetermined value. Repeat the test evaluation in the test evaluation step, and change the rated value of the countermeasure component and change the rated value of the circuit board information until the electrical characteristics of the test evaluation target are evaluated to be good in the test evaluation step. All of the test evaluation targets among the test evaluation targets in the circuit described in the circuit board information modified in the layout step and the layout information modified in the rated value changing step to describe the subsequent circuit. Is evaluated to have good electrical characteristics in the test evaluation step, the rated value is changed. A printed circuit board designing method, comprising: an output step of outputting the circuit board information and the layout information corrected in the step. 14. The countermeasure component adding step is information described in the noise countermeasure information,
A part of the circuit described in the input circuit board information to which the countermeasure part should be added, by collating the information indicating the part to which the countermeasure part is to be added in the circuit with the input circuit board information. Recognizing a countermeasure component added part recognition substep, a countermeasure component recognition substep for recognizing a countermeasure component already added to the countermeasure component addition place recognized in the countermeasure component addition portion recognition substep, and the noise countermeasure information On the basis of information indicating a countermeasure component to be added and information indicating a rated value when the countermeasure component is added, the countermeasure component is predetermined for each location in the circuit where the countermeasure component is to be added. Countermeasure component addition sub-set that adds a predetermined countermeasure component to the countermeasure component addition location recognized in the recognition substep and where the countermeasure component has not been added yet. And a priority setting substep for setting a priority to the countermeasure component recognized in the countermeasure component recognition substep and the countermeasure component newly added in the countermeasure countermeasure component addition substep, and the priority setting substep. For each countermeasure component whose priority order is set in step, information indicating the priority order is added to the information describing the countermeasure component in the circuit board information,
When a countermeasure component is newly added in the countermeasure component addition sub-step, the inputted circuit board information is corrected so as to describe the circuit after the countermeasure component addition sub-step in the countermeasure component addition sub-step. A circuit board information correction sub-step, wherein the layout step is an area on the board described in the circuit board information, wherein the circuit board information corrected in the first circuit board information correction sub-step A layout area recognition sub-step for recognizing an area in which components included in the described circuit and wirings connecting the parts may be laid out, and an area recognized in the layout area recognition sub-step are arranged on a predetermined layout. According to the restrictions, the parts included in the circuit described in the circuit board information and the parts A layout sub-step of laying out wirings to be connected, and in the layout sub-step, the layout of all the components to be laid out and the wirings can be completed in the area recognized in the layout area recognition sub-step. A layout determination sub-step for determining whether or not the layout determination sub-step cannot complete the layout of all the components and the wiring to be laid out in the layout sub-step, The countermeasure parts in the circuit described in the circuit board information corrected in the first circuit board information correction sub-step, which can be deleted, are listed in order of priority from the lower priority set by the priority setting sub-step. Delete sequentially and remove the countermeasure parts Each time you remove
The countermeasure component that can be deleted until the layout determination sub-step is executed and it is determined in the layout determination sub-step that the layout of all the components to be laid out and the wiring can be completed. And after deleting all deletable countermeasure components, the layout determination sub-step still completes the layout of all the components and wiring to be laid out in the layout sub-step. If it is determined that it is not possible, a countermeasure component deletion sub-step that outputs a message to that effect, and layout information that creates layout information using the positions of the components and wiring laid out in the layout sub-step as coordinate values on the board Creating substeps, and Measures component each time to remove the protection component removals substep, the first by adding information indicating whether to delete any countermeasure component information describing the countermeasure component
The printed circuit board design method according to claim 13, further comprising a second circuit board information correction sub-step of further correcting the circuit board information corrected in the circuit board information correction sub-step. 15. The rated value changing step further includes information described in the noise countermeasure information,
Based on information indicating countermeasure components that can be changed to countermeasure components having different rating values and information indicating the range of changeable rated values of the countermeasure components, the electrical characteristics were evaluated as poor in the test evaluation step. For the countermeasure parts added to the test evaluation target, which can be changed to countermeasure parts having different rating values, the test evaluation step is performed every time the countermeasure parts are changed to countermeasure parts having different rating values. Repeating the test evaluation by executing, the rated value changing substep of changing the countermeasure component to a countermeasure component having a different rated value until the electrical characteristics of the test evaluation target are evaluated to be good in the test evaluation step, and 2nd circuit board information modification for modifying the circuit board information modified in the 2 circuit modification substep so as to describe the circuit after the rated value change Even if the rated value of the countermeasure component is changed within the range of the rated value that can be changed in the sub-step and the rated value change sub-step,
In the test evaluation step, if the electrical characteristics of all the test evaluation targets included in the circuit after the change of the rated value are not evaluated to be good, the layout step is executed again, and the third circuit board information correction substep is performed. The circuit described in the modified circuit board information,
The layout change sub-step of re-laying out at a position different from the position described in the layout information, and the test evaluation step for all test evaluation targets included in the circuit after the layout is re-laid out in the layout step. Executing and performing a test evaluation, of the test evaluation targets that have been evaluated as having poor electrical characteristics in the test evaluation step among the test evaluation targets, the countermeasure parts deleted in the countermeasure part deletion sub-step are given priority orders. The higher order is added again, and every time the countermeasure component is added again, the layout step is executed so that the added countermeasure component is laid out on the board, and the circuit after the layout is executed the test evaluation step. Test evaluation, Until the electrical characteristics of all the test evaluation targets are evaluated to be good, the countermeasure components deleted in the countermeasure component deletion sub-step have a high priority for the test evaluation targets evaluated to have poor electrical properties. Every time the countermeasure component is added again in the deletion countermeasure component addition sub-step in which the countermeasure component is added again in order from the first, the priority added to the countermeasure component added again is Every time the countermeasure component is added again in the priority changing sub-step of changing to a priority indicating that the countermeasure component cannot be deleted, and in the second circuit board information correction sub-step, each time the countermeasure component is added again. In the circuit board information, the information added in the second circuit board information correction sub-step, A fourth circuit board information correction sub-step of again correcting the information indicating that the product has been deleted to the information indicating that the countermeasure component has been added to the circuit, and the rated-value changing step in the deleted-component adding sub-step. If the electrical characteristics of all the test evaluation targets are not evaluated as good in the test evaluation step for the circuit after adding all the countermeasure parts of the once deleted countermeasure parts, all the test evaluation steps are performed. 15. The method according to claim 14, further comprising repeating all of the sub steps from the rated value changing sub step to the fourth circuit board information correcting sub step until it is evaluated that the electrical characteristics of the test evaluation target are good. Printed circuit board design method. 16. The countermeasure component adding step further performs circuit simulation on a predetermined circuit portion including the countermeasure component adding portion recognized in the countermeasure component adding portion recognizing sub-step, and a circuit simulation of a predetermined circuit test evaluation target. It is determined whether the output satisfies a predetermined circuit test evaluation standard, and if the circuit simulation output of the circuit test evaluation target does not satisfy the predetermined circuit test evaluation standard, the countermeasure component addition sub-step is executed. , The countermeasure component recognition sub-information based on the information described in the noise countermeasure information, which indicates the countermeasure component to be added in the circuit and the information indicating the rated value when the countermeasure component is added. The time to add a predetermined countermeasure component to the countermeasure component addition position recognized in the step. Claim 14 or claim 15 printed circuit board design method according to, characterized in that it comprises a test sub-steps. 17. The countermeasure component adding step further performs circuit simulation for the circuit portion to which the countermeasure component is added in the countermeasure component adding sub-step,
By determining whether or not the predetermined circuit test evaluation target circuit simulation output satisfies the predetermined circuit test evaluation standard, it is determined whether or not the electrical characteristics of the circuit portion to which the countermeasure component is added in the countermeasure component addition substep are good or bad. In the circuit test evaluation sub-step to be evaluated, and in the circuit test evaluation sub-step, if the circuit part to which the countermeasure component is added is evaluated to have poor electrical characteristics in the countermeasure component addition sub-step, it is included in the circuit portion. For all countermeasure components whose rated value can be changed, change to a countermeasure component of a different rated value, and every time a countermeasure component of a different rated value is changed, execute the circuit test evaluation sub-step and perform another A circuit simulation is performed on the circuit part that has been changed to a rated value countermeasure component, and all of the components that have been changed to other rated value countermeasure components The circuit part includes a countermeasure component rated value change sub-step in which the rated value is changed and the evaluation in the circuit test evaluation sub-step is repeated until the electrical characteristics are determined to be good in the circuit test evaluation sub-step. 17. The printed circuit board designing method according to claim 14, 15, or 16. 18. The rated value changing step further includes changing a countermeasure component whose rating value can be changed to a countermeasure component having a different rated value so that the electrical characteristic of the test evaluation target in the test evaluation step is good. The rated value of the countermeasure component added to the test evaluation target that is evaluated as follows is detected, and the detected rated value and the information described in the input noise countermeasure information are included in the circuit. As a result of changing the rated value of the added countermeasure component, compare the information indicating the range of the rated value when the countermeasure component after changing the rated value becomes unnecessary for the circuit, and detect the rated value. Is within the range of the rated value shown in the above information, as a result of changing the rated value, the countermeasure parts whose rated value is within the range of the rated value shown in the above information are recognized as unnecessary countermeasure parts. An unnecessary countermeasure component recognizing substep, and a countermeasure component recognized in the unnecessary countermeasure component recognizing substep is deleted, and the circuit board information is corrected to describe the circuit after the unnecessary countermeasure component is deleted. 18. The printed circuit board designing method according to claim 13, claim 14, claim 15 or claim 17, comprising: 19. The circuit board design method further comprises information for creating a design standard, which is a layout restriction to be followed when laying out a circuit on the board based on the inputted circuit board information, A design standard creation information input sub-step for inputting design standard creation information indicating information indicating a target for which a design standard should be created and information indicating a parameter when defining an allowable range of values that the design standard creation target can take; With respect to the design standard creation target predetermined according to the design standard creation information, the possible value of the design standard creation target is changed by a predetermined value under the predetermined parameter, and the possible value of the design standard creation target is predetermined. Each time the value is changed, a simulation is performed for the design standard creation target, and the simulation result is Repeat the change of the value of the design standard creation target and the evaluation by simulation until the design standard creation evaluation standard is satisfied, and specify the value of the design standard creation target when the simulation result satisfies the predetermined design standard creation evaluation standard. A design standard creation substep of creating a design standard as an allowable value of the design standard creation target, and even if all possible values of the design standard creation target in the design standard creation substep are changed within a possible range, When the simulation result does not satisfy the design standard creation evaluation standard, the fact is output, and when the simulation result satisfies the predetermined design standard creation evaluation standard, the design standard created in the design standard creating substep is output. In addition to outputting, in the layout step that follows 19. The printed circuit board design method according to claim 13, 15 or 18, further comprising: a design standard output sub-step for instructing a layout based on the design standard created in the design standard creation sub-step. . 20. The test evaluation step is performed on the basis of a position of a component when a circuit is laid out on an actual board, a wiring length, a connection state between layers, a physical shape of the wiring, a dielectric constant of the board, and the like. 20. The printed circuit board designing method according to claim 19, further comprising a transmission line simulation for calculating an output waveform when a predetermined input waveform is given to a net connecting each component terminal therein. 21. The design standard creation sub-step is based on a position of a component when a circuit is laid out on an actual substrate, a wiring length, a connection state between layers, a physical shape of the wiring, a dielectric constant of the substrate, and the like. 21. The printed circuit board design method according to claim 19, further comprising: a transmission line simulation for calculating an output waveform when a predetermined input waveform is applied to a net connecting each component terminal in the circuit. . 22. Information for creating a design standard, which is a layout restriction to be followed when laying out a circuit on a board based on the input circuit board information, and an object for which the design standard should be created. Design standard creation information input sub-step for inputting design standard creation information indicating information and information indicating parameters for defining an allowable range of values that the design standard creation target can take; and the design standard creation information input sub-step Based on the design standard creation information input in, for the predetermined design standard creation target, the value of the parameter is read from the circuit board information, and the design standard defined by the read parameter value corresponds to the value of the parameter. The design standard is read from the memory in which it is stored in advance, and the read design standard is the target of the design standard creation. Design standard creation sub-step defined as a measurement standard, and outputting the design standard defined in the design standard creation sub-step, and instructing layout in the layout step based on the design standard defined in the design standard creation sub-step 19. The printed circuit board designing method according to claim 13, 15 or 18, further comprising: 23. The test evaluation step is based on information described in the evaluation information, which is information indicating a test evaluation target on a circuit after layout, and the layout information and the current time. A test evaluation target recognition sub-step for recognizing a test evaluation target in the circuit described by the circuit board information, and a countermeasure component added to the circuit portion including the test evaluation target recognized in the test evaluation target recognition sub-step The types and rated values of the above are the criteria that are set for each predetermined test evaluation target regarding the types of countermeasure parts that should be added to the circuit part including the predetermined test evaluation subject and the range of rated values that the countermeasure component should take. The test evaluation target stored in the memory to determine whether the test evaluation criteria stored in advance are satisfied. Printed circuit board design method according to claim 19, characterized in that it comprises a test evaluation substep of evaluating the quality of the electrical characteristics.