JPH07143659A - Protective relay - Google Patents

Abstract

PURPOSE:To reduce the effects of the distortion and offset of an input signal on phase measurement so as to improve the accuracy of the measurement by performing the measurement at the midpoints between the rises and falls of the square waves obtained by shaping input current and voltage. CONSTITUTION:A CPU 10 which is provided as a measuring means is constituted to measure the phases of current signals and voltage signals having square waveforms respectively shaped by waveform shaping circuits 11 and 15 at midpoints between the rises and falls of the signals. As a result, when an offset (DC amount) is superimposed upon the input signals or a threshold voltage at the time of shaping the waveforms of the signals to the square waves or the input signals are distorted, no error occurs in the phase measurement. Therefore, the phases of the square waves can be measured with high accuracy.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to protective relays.

[0002]

2. Description of the Related Art A conventional protective relay, for example, a ground fault direction relay, provides a required circuit breaker when a magnitude of a current input, a magnitude of a voltage input and a phase difference between them meet predetermined conditions. It provides an output for operation, and the phase difference between the current input and the voltage input is measured as follows.

That is, the sine wave voltage input and current input shown in FIGS. 9 (A) and 9 (B) are converted into square wave voltage signals and current inputs shown in FIGS. 9 (C) and 9 (D) by a waveform shaping circuit, respectively. The waveform was shaped into a current signal, and the phase difference was measured from the time difference between the rising and falling edges of the square wave.

[0004]

However, in the conventional protective relay which measures the phase difference by comparing the rising or falling edges of the square wave as described above, for example, as shown in FIGS. As shown, when the offset voltage (DC component) is superimposed on the threshold voltage when the waveform is shaped into the input signal or the square wave due to aging or variations in the elements, even if the phase is the same, Figure 10
As shown by T1 in (C) and (D), the rising edges of the square wave are deviated, and in addition, as shown in FIG.
As shown in FIG. 11B, when the input signal is distorted, even if the input signals have the same phase, FIG.
As indicated by T2 in (D), the rising of the square wave is deviated, which causes an error in the phase measurement.

The present invention has been made in view of the above points, and it is an object of the present invention to reduce the influence of distortion and offset of an input signal and improve the accuracy of phase measurement.

[0006]

In order to achieve the above-mentioned object, the present invention is constructed as follows.

That is, the present invention is a waveform shaping circuit for shaping a current input and a voltage input into square waves, respectively,
Each square wave is provided with a measuring means for measuring the phase at the intermediate point from the rising edge to the falling edge or from the falling edge to the rising edge.

[0008]

According to the above construction, the phase of the square wave is measured at the midpoint thereof instead of the conventional rising or falling, so that it is less susceptible to the distortion and offset of the input signal. , The accuracy of measurement will be improved.

[0009]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention.

The protective relay 1 of this embodiment is connected to a three-phase distribution line 2 via a current transformer 3, a voltage detecting transformer 4 and a power transformer 5. The current from the current transformer 3 is passed through the detection transformer 6, the over-input protection circuit 7, the filter circuit 8 and the amplification circuit 9 to the CPU.
The waveform is shaped into a square wave by the waveform shaping circuit 11 and is loaded into the CPU 10. Further, the voltage from the voltage detecting transformer 4 is
CPU 1 via filter circuit 13 and amplifier circuit 14
On the other hand, the waveform is shaped into a square wave by the waveform shaping circuit 15 and loaded into the CPU 10.

Based on these input data and the settling value of the settling circuit 16, the CPU 10 displays the operating state on the display circuit 17 and outputs to the output circuit 18 for operating the required breaker. Etc. In addition, 19 is
Reference numeral 20 is a memory that stores calibration values, which will be described later, and 20 is a power supply circuit that supplies power to each unit.

The protective relay 1 of this embodiment measures the phase of the current input and the voltage input as in the conventional example, but with a high accuracy, it is not affected by the distortion or offset of the input signal. In order to be able to measure, it is configured as follows.

That is, the CPU 10 as a measuring means
Is to measure the phase at the midpoint from the rising edge to the falling edge of the square-wave current signal and voltage signal that have been waveform-shaped by the waveform shaping circuits 11 and 15, for example, the intermediate point T in FIGS. 10 to 11. ing.

Therefore, as shown in FIGS. 10 to 11, in the conventional example, when the offset (DC component) is superimposed on the threshold voltage when the waveform is shaped into the input signal or the square wave, or the input signal is changed. In the case of distortion, an error occurs in the phase measurement, but the present invention does not cause such an error.

In this embodiment, the time difference between the midpoints of the square waves is not directly measured, but as shown in FIG. 2, the time TA from the rise of the current signal to the rise of the voltage signal and the current signal The average of the time TB from the fall to the fall of the voltage signal is calculated to obtain the phase difference. By doing so, the phase can be measured more easily than directly measuring the time difference between the midpoints of the square wave. In FIG. 2, (A) and (B) are current and voltage input waveforms, and (C) and (D) are waveform-shaped current and voltage signals.

FIG. 3 is a flow chart showing the above processing. First, if there is a current voltage input (step n
1) Measure the time TA from the rise of the current signal to the rise of the voltage signal (step n2), and measure the time TB from the fall of the current signal to the fall of the voltage signal (step n3), TA and TB Is calculated to calculate the phase difference (step n4) and the process returns.

Further, in this embodiment, in order to improve the measurement accuracy, calibration for adjusting the deviation of the gain is performed.
I try to do it in two ways.

That is, in the past, the intermediate frequency 55H between the frequencies of 60 Hz and 50 Hz, which are the frequencies of East Japan and West Japan, has been used.
Calibration is done only at 1 point of z.

FIG. 4 is a frequency characteristic diagram for explaining the calibration of the conventional example. A solid line shows a desired frequency characteristic, and a broken line shows an actually obtained frequency characteristic due to variations in elements. Is shown.

In the conventional example, the calibration value of the frequency of 55 Hz is stored in the memory, and the current and voltage of 55 Hz are input as shown in the flowchart of FIG. 5 (step n
1), the calibration value stored in the memory is compared and calibrated (step n2), and the calibration is completed (step n).
3).

Therefore, for example, in the case of the frequency characteristic shown by the broken line in FIG. 4, the gain at 55 Hz is
Since it is lower than the calibration value A, the gain is increased correspondingly at 50 Hz and 60 Hz. Therefore, the gain becomes too high for 60 Hz, and the measurement accuracy deteriorates in eastern Japan used at 60 Hz.

On the other hand, in this embodiment, 50 Hz
The calibration values B and C of 60 Hz and 60 Hz are stored in the memory 19, and as shown in the flowchart of FIG.
Input 0Hz current voltage (step n1)
The calibration value B stored in 9 is compared with the calibration value B of 50 Hz (step n2), then the current voltage of 60 Hz is input (step n3), and the 60 Hz stored in the memory 19 is input.
The calibration value C is compared with the calibration value C (step n4), and the calibration is completed (step n5).

Therefore, in this embodiment, in the frequency characteristic shown by the broken line in FIG. 4, the gain is increased at 50 Hz and decreased at 60 Hz, and the desired gain is obtained at 50 Hz and 60 Hz. You can

By thus performing calibration at two points of 50 Hz and 60 Hz, it is possible to improve the measurement accuracy.

Further, in this embodiment, in order to prevent the frequency measurement from being affected by the disturbance, the sampling frequency is set as follows.

That is, conventionally, as shown in the flow chart of FIG. 7, when current and voltage are input (step n1), the input frequency f (X) is set to the sampling frequency g (X) (step n2), The input is sampled at the determined sampling frequency (step n3). Where X is the Xth sampling, f (X)
Is the input frequency in the Xth sampling, g (X)
Indicates the sampling frequency in the Xth sampling.

In such a conventional example, since the input frequency is sampled after the frequency is determined, it takes time to sample at the rising time, and when the frequency determination is erroneous due to disturbance, the erroneous frequency is detected. It will be sampled.

Therefore, in this embodiment, at the time of rising or when it is determined that the input frequency is abnormal, the stored previous sampling frequency is used, and when it is determined that the input frequency is normal, The frequency is used as the sampling frequency.

FIG. 8 is a flow chart for explaining the operation of this embodiment. When current and voltage are input (step n1), the sampling frequency g at the rising edge is set.
As (X), sampling is performed using the previous normal frequency f (X-1) (step n2), and it is determined whether the input frequency is normal, 50 Hz or 60 Hz (step n3). When it is normal, the input frequency f (X) is set as the sampling frequency g (x) (step n4), and sampling is performed at the determined sampling frequency (step n5). When the input frequency is not normal, the previous normal input frequency f (X-1) is set as the sampling frequency g (X) (step n6), and sampling is performed at the determined sampling frequency (step n5).

As described above, since the previously stored normal sampling frequency is used at the rising time and the frequency abnormality, the time required for the sampling at the rising time is shortened as compared with the conventional example, and it is affected by the disturbance. Never receive.

[0032]

As described above, according to the present invention, the phase of a square wave in which the voltage input and the current input are shaped is respectively measured at an intermediate point instead of the conventional rising or falling. Therefore, it is less likely to be affected by the distortion of the input signal and the offset amount, and the measurement accuracy is improved.

Further, by storing a plurality of calibration values in the memory,
Since the calibration is performed at multiple points, the measurement accuracy is improved.

Furthermore, since the previous normal sampling frequency is used at the time of rising or when the input frequency is abnormal, the disturbance does not affect the frequency measurement.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a waveform diagram for explaining the phase measurement of the embodiment of FIG.

FIG. 3 is a flowchart of phase measurement of the embodiment of FIG.

FIG. 4 is a frequency characteristic diagram for explaining calibration.

FIG. 5 is a flowchart of calibration of a conventional example.

6 is a flow chart of calibration of the embodiment of FIG.

FIG. 7 is a flowchart of input frequency sampling of a conventional example.

8 is a flow chart of input frequency sampling for the embodiment of FIG.

FIG. 9 is a waveform diagram for explaining phase measurement of a conventional example.

10 is a waveform diagram for explaining the phase measurement of the conventional example and the example of FIG.

11 is a waveform diagram for explaining the phase measurement of the conventional example and the example of FIG.

[Explanation of symbols]

 1 Protective relay 10 CPU 11, 15 Waveform shaping circuit 19 Memory

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shogo Kawasaki 10 Hanazono Dodo-cho, Ukyo-ku, Kyoto City, Kyoto Prefecture Omron Co., Ltd. Within Muron Co., Ltd.

Claims (3)

[Claims] 1. A waveform shaping circuit for shaping each of a current input and a voltage input into a square wave, and a measuring means for measuring a phase at each intermediate point from the rising edge to the falling edge or from the falling edge to the rising edge of each square wave. And a protective relay. 2. The protective relay according to claim 1, further comprising a memory in which a plurality of calibration values respectively corresponding to a plurality of frequencies are stored, and the input of each frequency is calibrated with the calibration values. . 3. A protective relay having a sampling frequency when the input frequency is determined to be normal, the previous sampling frequency when rising or when it is determined that the input frequency is abnormal. The protective relay according to claim 1, wherein the protective relay is used.