JPH0713942A - Processor with plural processors - Google Patents

Abstract

PURPOSE:To improve the reliability of a pocessor by means of a multiprocessor by executing a first processing before executing the second processing at the time of receiving information indicating that the first processing has not been processed yet. CONSTITUTION:Execution control 22 is started after receiving transmission information, refers to the start processing 211 of a processing procedure table 21 and refers to an incidental execution condition 212. The execution control 22 recognizes a processing number in the execution condition 212, refers to a corresponding completion/non-completion tag in transmission information, starts the processing of the processing number in the execution condition 212 when the completion/non-completion tag is OFF and turns on the completion/ non-completion tag to which transmission information corresponds, after the processing is completed. When the completion/non-completion tag 32 is ON, it is judged whether the whole execution conditions are completed or not, the processing which is recorded in the start processing 211 is started when the whole execution conditions are completed and the completion/non-completion tag corresponding to the processing which is recorded in the start processing 211 is turned on.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a processing device provided with a plurality of processors for analyzing or synthesizing temporally continuous signals such as audio and video using a plurality of signal processing processors, and more particularly to a signal processing device. Is.

[0002]

2. Description of the Related Art Conventionally, various signal processing apparatuses have been devised in various configurations and control methods in the case of performing parallel processing or pipeline control by combining a plurality of signal processing processors. For example, in the technique disclosed in Japanese Patent Laid-Open No. 3-174646, conventionally, the connection between the signal processor and the signal processor was set to 1: 1 connection, but the parallel processing is mainly set to N: M connection. The feature is that the host computer can dynamically control the processor without interrupting the processing. The related art refers to a construction method capable of efficiently realizing a large-scale and flexible signal processing device. In the prior art, a net-like transmission path is provided between the processors, a plurality of signal processing processors can be operated in parallel, and the host computer can dynamically switch the transmission.

[0003]

However, in the prior art, when a failure occurs in the host computer, the plurality of signal processors connected to each other cannot be controlled at all, and transmission switching is performed. It also has the vulnerability that it cannot do. That is, in order to secure the reliability of the signal processing device, the control of the signal processor depends on an external host computer, and the device itself does not have a mechanism for ensuring the reliability.

Now that signal processing has been introduced in various fields, the system is becoming larger in scale and it is becoming more important to secure the operating rate of the device. Therefore, it is of course possible to improve the reliability of each component of the signal processing device, but how to cover the component as a whole when a component component fails is an important point.

The improvement of reliability is divided into reliability of data and reliability of device. In order to ensure the reliability of the device, in the case of a signal processing device including a plurality of signal processors, when one signal processor fails,
There are two methods: an automatic restoration method in which the failure is detected and the processing is replaced by another signal processor, and a multiplexing method in which the processing is always or sometimes performed simultaneously. On the other hand, in order to secure the reliability of the data, there is a method of ascertaining whether or not the processing applied to the data is correctly performed and ensuring the integrity of the data. That is, it is necessary to secure the reliability of the device itself and the reliability of data without requiring external control in the signal processing device itself including the multiprocessor.

It is an object of the present invention to improve the reliability of a processing device using a multiprocessor.

[0007]

In order to solve the above problems, the present invention performs a second process based on a first processor that executes a first process and a processing result of the first processor. In a processing device including a second processor,
When the second processor receives the processing result of the first processing from the first processor, the second processor executes the second processing based on the processing result, and the second processor executes the second processing. When the information indicating that the first process is unprocessed is received, the first process is executed prior to the execution of the second process.

In this case, the first processor stores, as the storage means for storing the procedure of the first processing, the execution means for executing the first processing, and the information indicating that the processing is unprocessed. Sending means for sending to the second processor completion information indicating execution completion / incompletion of the first processing by the execution means, wherein the second processor is
Receiving means for receiving the completion information from the first processor, accumulating means for accumulating the procedure of the first processing and the procedure of the second processing, and execution of the first processing being completed. That the execution condition stored in the storage unit is satisfied based on the storage unit storing the execution condition and the completion information received by the receiving unit. If the determination means determines whether or not the execution condition is satisfied, the determination means for determining whether or not the first and second processing can be executed, and the second processing The execution means is controlled so as to execute, and when it is determined that the execution condition is not satisfied, the execution is performed such that the first processing is executed prior to the execution of the second processing. Control means for controlling the means It may comprise a transmitting means for transmitting the processing result of processing in the execution unit. Further, the sending means of the first processor can add the result of the processing to the completion information and send it as transmission information.

As the completion information, a tag indicating completion / non-completion of all the processes in the processing device including the plurality of processors is provided, and the completion information of the tags corresponding to the processes executed in the processor is indicated as completion. Is set.

A plurality of the first processors are provided,
By storing the same first processing procedure in advance in each storage means of the plurality of first processors,
In the second processor, the receiving means receives the completion information from the plurality of first processors, and the determining means is based on each completion information received by the receiving means. And specify the processor corresponding to the completion information for which the execution condition is satisfied, and the control means executes the second processing based on the processing result from the specified processor. Can be controlled. In this case, the judging means, based on each completion information received by the receiving means,
For any of the multiple processors that are multiplexed,
When recognizing that there is no completion information satisfying the execution condition, the control unit controls the execution unit to execute the first process prior to the execution of the second process. You may

As a processing method of the processor in the processing apparatus, the first processor sends history information about the processing executed by the first processor to the second processor, and the second processor ,
Based on the history information from the first processor, it is determined whether or not the first processing is unprocessed, and if it is determined that the first processing is completed, When the second process is executed in the second processor and the first process is unprocessed, the first process and the second process are executed.
And the processing can be executed.

[0012]

The processor connected to the pipeline executes a single or a plurality of predetermined processes according to its processing capability. The connections are made mutually between the processors. That is, the first processor executes the first processing, and the second processor performs the second processing based on the processing result of the first processor.

The second processor, when receiving the processing result of the first processing from the first processor,
When the second processing is executed based on the processing result and the information indicating that the first processing is unprocessed is received from the first processor, prior to the execution of the second processing. The first process can be executed. As a result, even if the first process in the first processor is unprocessed, the second process can be executed in the second processor after the first process is executed. Can be improved.

More specifically, the following means can be provided.

The first processor stores the means for accumulating the procedure of the first process, the executing means for executing the first process, and the information indicating the unprocessed state by the executing means. And a sending means for sending completion information indicating execution / non-completion of the process No. 1 to the second processor. The second processor includes a receiving unit that receives the completion information from the first processor, and the first processor.
Storage procedure for accumulating the procedure of the second process and the procedure of the second process, and the completion of the execution of the first process is defined as the execution condition of the second process, and the execution condition is stored. Storage means, determination means for determining whether or not the execution condition stored in the storage means is satisfied based on the completion information received by the receiving means, and executing the first and second processes. If the execution condition is determined to be satisfied by the execution means and the determination means, the execution unit is controlled to execute the second process if the execution condition is not satisfied. When judged, prior to the execution of the second processing, control means for controlling the execution means to execute the first processing, and transmission for transmitting the processing result processed by the execution means And means

In this case, the first processor is
As a result of execution of the first process by the execution unit, if the process is not completed due to an error or the like, the sending unit sends completion information indicating that the execution of the first process is incomplete to the second processor. To send to. On the second processor,
The receiving means receives the completion information from the first processor, and the judging means judges whether or not the execution condition stored in the storage means is satisfied based on the completion information received by the receiving means. When the determination means determines that the execution condition is satisfied, the control means controls the execution means to execute the second process, and it is determined that the execution condition is not satisfied. In that case, the execution means is controlled to execute the first process prior to the execution of the second process.

Further, the sending means of the first processor can add the result of the processing to the completion information and send it as transmission information. Further, as the completion information, a tag indicating completion / non-completion of all the processes in the processing device including the plurality of processors is provided, and the completion information is set to indicate completion for tags corresponding to the processes executed in the processor. To be done. That is, in the transmission between the processors, it is possible to define a transmission format having a completion / incompletion tag for each processing. In the completed / uncompleted tag defined for each processing section, the section is turned ON after the processing in the processor is completed, and accordingly, the completion of the processing is recorded. The second processor determines whether the completed / uncompleted tag of the first process is ON or OFF before the second process which is normally processed. As a result, it is possible to determine how much processing has been completed by the time it is processed by the second processor. This allows
It can also be determined whether the received processing result is a processed processing result after the processing is completed. When it is determined that the first processing is not completed, the processing procedure (program) of the first processing is executed. As a result, the processing of the processor that did not perform the processing, that is, the failed processor is performed,
Automatic recovery is achieved.

A plurality of first processors are provided, and the same first storage unit is provided in each of the storage means of the plurality of first processors.
By accumulating the procedure of the process in advance, the process can be multiplexed. In this case, in the second processor, the receiving means receives the completion information from the plurality of first processors, and the determining means, based on each completion information received by the receiving means, The processor corresponding to the completion information satisfying the execution condition is specified, and the control unit controls the execution unit to execute the second process based on the processing result from the specified processor. To do. As a result, if a plurality of processors are connected and the same format and the same transmission processing result are sent, processing multiplexing is achieved and reliability is improved. Further, when the judging means recognizes that there is no completion information satisfying the execution condition for any of the plurality of multiplexed processors, based on each completion information received by the receiving means, The control unit controls the execution unit to execute the first process prior to the execution of the second process. Thereby, the reliability can be further improved.

[0019]

Embodiments of the present invention will now be described with reference to the drawings.

First, the configuration of a processor, which is a component of a processing apparatus including a plurality of processors, in this embodiment will be described with reference to FIG.

In FIG. 9, the processor includes an arithmetic unit 901 for performing various arithmetic operations and information control, a main memory unit 902 for storing various control information and programs, and an external memory for mainly storing input / output information. One or two or more data I / s for transmitting / receiving information between the unit 903 and other processors
And O904.

The data from the other processor is the data I
/ O904, and stored in the external storage unit 903. After that, the data is read in the calculation unit 901,
After receiving the predetermined data processing, the external storage unit 90 is again used.
3 is stored. Next, the data I / O 904 transmits the data stored in the external storage unit to the next processor.

FIG. 8 shows an internal block diagram of the processor. Further, for the sake of explanation, the processor shown in FIG. 8 is referred to as a second processor, and the processor in the preceding stage of this processor is referred to as a first processor. Also,
The first processor executes the first processing, and the second processor performs the second processing based on the processing result of the first processor.

In FIG. 8, the receiving unit 801 receives the completion information or the processing result from the first processor. The processing procedure storage unit 807 stores the first processing procedure and the second processing procedure. Execution condition storage unit 8
06 sets the completion of the execution of the process of the first processor as the execution condition of the second process, and stores the execution condition. The determination unit 804 determines the execution condition storage unit 80 based on the completion information received by the reception unit 801.
It is determined whether the execution conditions stored in 6 are satisfied. The execution unit 802 can execute the first and second processes. When the determination unit 804 determines that the execution condition is satisfied, the control unit 805 determines the second
When the execution condition is not satisfied, the execution unit 802 is controlled to execute the first process, and the first process is executed before the second process is executed. The execution unit 802 is controlled. Sending unit 803
Sends the processing result processed by the execution unit 802. The reception unit 801 and the transmission unit 803 correspond to the data I / O 904 in FIG. Further, the processing procedure storage unit 807 and the execution condition storage unit 806 correspond to the main storage unit 902 or the external storage unit 903 in FIG. 9.
The execution unit 802, the determination unit 804, and the control unit 805 are processed by the calculation unit 901 in FIG.

Next, the operation will be described. In the first processor, when the execution unit of the first processor executes the first process and the process is not completed due to the occurrence of an error or the like, the sending unit determines that the execution of the first process has not been completed. Completion information indicating completion is sent to the second processor.
In the second processor, the reception unit 801 receives the completion information from the first processor, and the determination unit 804 stores the completion information in the execution condition storage unit 806 based on the completion information received by the reception unit 801. Determine whether the execution conditions are met. When the determination unit 804 determines that the execution conditions are satisfied, the control unit 805 determines that
When the execution unit 802 is controlled to execute the second processing and it is determined that the execution condition is not satisfied, the first processing is executed before the execution of the second processing. The execution unit 802 is controlled to execute.

Next, more specifically, an embodiment in the case of being applied to a signal processing device as a processing device will be described.

Generally, in digital signal processing, one set of processing is performed by a combination of basic operations (gain control, frequency shift, filtering, correlation operation, fast Fourier transform, etc.), and one operation result is used. And the following calculation is performed. Therefore, the basic operation that constitutes a certain signal processing is divided according to the processing capability of each of the plurality of signal processing processors 1 to 7 (hereinafter, simply referred to as “processor”) having an interface mechanism with the previous stage or the next stage. And is distributed to each processor. With this divisional arrangement, the direction of data transfer between the processors is fixed in one direction, and the processors are connected by the coupling line 11.

In the present embodiment, in a signal processing device having a multiprocessor, basic operations of gain control, high frequency shift, middle frequency shift and low frequency shift are processed by the processor 1, and basic operations of filtering according to respective frequencies are performed. Are processed in the processors 2, 3 and 4, and the basic operation of the fast Fourier transform is processed by the processor 5,
It is assumed that processing is performed in 6 and 7. At this time, the transmission data flowing from the processor 1 to the processor 2 is high frequency data, the transmission data flowing to the processor 3 is medium frequency data, and the transmission data flowing to the processor 4 is low frequency data.

In the present embodiment, these three types of data are unified to unify the data, and the processing completion /
A tab indicating incompleteness is attached to achieve the completion of the process, which will be described in detail with reference to FIGS. 2, 3, and 4.

In addition, with the recent increase in memory capacity and the like, each processor is changing from a method of mounting individual programs to a method of mounting all the same or partially overlapping programs. Based on this trend, it is assumed that all the programs are installed in the processors 1 to 7 in the embodiment of the present invention as well. These programs are stored in the processing procedure storage means as processing procedures. FIG. 2 shows a configuration in which the processor operates. In FIG. 2, there are processes (1) to (3) as the processes of the basic calculation, and the programs of the processes (1) to (3) are stored in advance in each processor. Further, each of the processors includes a processing order table 21 indicating execution conditions. The processing order table 21 is defined in the execution condition storage unit 806 described above. The processing order table 21 stores a starting process indicating a process to be executed by the processor and an execution condition for starting the starting process. As the execution condition, the identification information of the process that should have been completed is stored. When activating the activation process, it is necessary that the process indicated by the execution condition be completed. in this case,
Instead of storing all the processing programs, each of the processors may store at least the program for the startup processing and the program indicated in the execution conditions. Further, the processing order table 21 may store the start-up processing to be processed by all the processors and the corresponding execution conditions. In that case, in the processor, a process or the like to be actually executed is marked so that the starting process in the processor is clarified.

FIG. 3 shows the transmission format. In FIG. 3, a completion / incompletion tag 32 is for indicating completion information, is divided for each process (-), and is divided into completion / incompletion tags 321 to 328. After that, the processing result 31 follows. In each processor,
The processing result 31 from another processor is extracted, and after the processing is executed, the processing result 31 is rewritten with the processing result executed by the processor and sent out. Also, the execution unit 802 and the determination unit 804
A processing flow in the control unit 805 is shown in FIG.

In this embodiment, the execution unit and the control unit of the processor 2 are collectively referred to as the execution control 22. The processing in the execution control unit 22 will be described. When the receiving unit of the processor 2 receives the transmission data as shown in FIG. 3, the execution control 22 is activated. The execution control 22 refers to the processing order table 21 and reads the start processing 211 therein. The process number to be executed by the processor 2 is registered in the start-up process 211, and the process of the stored number 5, that is, the high-frequency filter, is started and processed to perform the role of the processor 2. Ends. In this embodiment, at this time, it can be determined whether or not the process should be started, and when the process should not be executed, the process is backed up.

The operation will be described below with reference to FIG.

In FIG. 4, the execution control 22 is started after receiving the transmission information (S400). First, the starting process 211 of the processing procedure table 21 is referred to (S401), and the accompanying execution condition 212 is referred to (step S401). S402). For example,
In the processor 2, the high-frequency filtering 27 is registered in the activation process 211. In this high-frequency filtering process, it is necessary that the AGC process and the high-frequency shift process be executed as a preceding stage, and the execution condition 212 has the AGC process and the high-frequency shift registered. The execution control 22 is the execution condition 2
The process number in 12 is recognized, and the corresponding completed / incomplete tag in the transmission information is referred to (S403). It is determined whether or not the corresponding completed / incomplete tag in the transmission information is ON (completed) (S404). If the completed / uncompleted tag in the completed / uncompleted tag 32 is OFF, the process of the process number in the execution condition 212 is activated (S405), and after the process is completed, the corresponding completion of the transmission information is completed. / Turns on the incomplete tag (S406). In S404, when the tag of the completed / uncompleted tags 32 is ON, and after the processing of S406, it is determined whether all the execution conditions are completed (S407). If all the execution conditions have been completed, the process recorded in the start process 211 is started (S40
8), the completed / uncompleted tag corresponding to the process recorded in the activation process 211 is turned on. If all the execution conditions have not been completed, the process returns to S401, the execution control unit refers to other execution conditions, and executes the same processing.

For example, in the case of the processor 2, as described above, the AGC process and the high frequency shift process are required as a pre-stage of the high frequency utilization filtering, and the respective process numbers and the execution conditions 212 are recorded.
In this case, the execution control 22 refers to the execution condition 212,
Then, and are obtained, and then reference is made to the completed / incomplete tag 321 corresponding to and the completed / incomplete tag 322 in the transmission information transmitted from the processor 1, respectively. At this time, if both tags are ON, the start processing 211
Starts the high-frequency filtering process stored in. If, as shown in FIG.
When the incomplete tag 322 is OFF, the processing high frequency shift processing is started, and the start processing 2 is performed based on the processing result.
The high frequency filtering process stored in 11 is activated. After the processing is completed, the completion / incompletion tag 322 is turned on, and subsequently, the high-frequency filtering processing stored in the activation processing 211 is activated and executed.

With the configuration and processing described above, even if a failure occurs in the processing of the previous processor, the next processor can recover and the processing can be executed. Further, in S404, the completed / not completed tag 32
When the completed / uncompleted tag in the inside is OFF, it may be possible to notify the outside of the occurrence of a failure as an error has occurred.

Next, a second embodiment will be described with reference to FIGS. In the present embodiment, a case will be described where the processors 52 and 53 shown in FIG. 5 perform high frequency filtering processing to duplicate the processing. Further, it is assumed that the processor 51 performs AGC processing and sends the processing result to the processor 52 via the transmission path 511 and the processor 53 via the transmission path 512. At this time, the processing result 31 has the same contents in the transmission format shown in FIG. 2, and therefore, the same high-frequency filtering processing is stored in the activation processing 211 of the processor 52 and the processor 53. Therefore, the first
According to this embodiment, the high frequency filtering process is simultaneously executed by each processor. Due to this, duplication
The same processing can be performed by multiplexing, such as triplexing. Next, FIG. 6 shows the operation when the processor 54 in the subsequent stage performs the fast Fourier transform on the data subjected to the high frequency filtering process. The processor 54 receives all the multiplexed and processed results, and Completed transmission information is available. In FIG. 6, the processor 54 provides a transmission data buffer for accumulating transmission information for each connected line. In this embodiment,
Since the transmission data buffers 71 and 7 are duplicated,
Equipped with 2.

In this case, the execution control 62 first refers to the processing order table 61, and the start processing table 6 in the processing order table 61.
11 and the execution condition table 612 are read. At this time, the AGC process, the high frequency shift process, and the high frequency filtering process are obtained corresponding to the fast Fourier transform process. Therefore, first, reference is made to the completed / not completed tags 321, 322 and 325 in the transmission buffer 71 in which the transmission information sent from the processor 52 is stored. At this time, if all the completed / incomplete tags are ON, it is determined that the data from the processor 52 is correct.
Similarly, the data from the processor 53 is determined, and if both of the completed / uncompleted tags are ON, the fast Fourier transform processing stored in the start processing table 611 is started for either one of the data. At this time, if the status where the completed / uncompleted tag is not ON exists on one side, the data on the other side can be used to perform a correct operation. Furthermore, if there is a state in which both of the completed / unfinished tags are not ON, the processor 54 can execute the process corresponding to the unfinished tag.

By the above processing, the multiplexing of the processing and the subsequent data selection are automatically performed, and the reliability of the data against the processor failure can be secured. Further, by taking the exclusive OR of both processing results 31, it is possible to detect the coincidence / non-coincidence of the data, and if the two data at the time of multiplexing support coincide, this is set to be positive. Two out-of-three system configurations are possible.

According to the above embodiment, in the signal processing device which generally does not depend on the reliability of the data, when the performance of the processor can be confirmed and the process is not completed, the process is automatically backed up and the signal processing device As a result, it is possible to automatically recover from the failure of the processor, so that the reliability of the device can be secured. Moreover, regarding the reliability of data, the immediate restoration enables automatic restoration without causing data loss. Further, it is not necessary to operate from the outside, and therefore, it is possible to save time and effort for human beings to immediately intervene when a failure occurs, and it is possible to improve operational efficiency.

[0041]

The reliability of the entire device can be improved and the reliability of data can be improved against the failure of the processor of the signal processing device. Automatic recovery is possible without data loss.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a signal processing device using a multiprocessor.

FIG. 2 is an explanatory diagram showing a configuration of processing in the signal processing device.

FIG. 3 is a transmission format configuration diagram.

FIG. 4 is a flow chart of execution control.

FIG. 5 is a configuration diagram of a signal processing device.

FIG. 6 is an explanatory diagram showing a processing configuration in multiplexing.

FIG. 7 is a transmission format configuration diagram.

FIG. 8 is an internal block diagram of a processor.

FIG. 9 is a configuration diagram of a processor.

[Explanation of symbols]

1 to 7 and 51 to 54 ... Processor, 21 and 61
... Processing order table, 211 and 611 ... Startup processing,
212 and 612 ... Execution condition, 32 and 321 to 321
28 ... Complete / incomplete tag, 22 ... Execution control.

Claims (7)

[Claims] 1. A processing device comprising a first processor that executes a first process and a second processor that performs a second process based on a processing result of the first processor, wherein the second processor is provided. When the processing result of the first processing from the first processor is received, the second processing is executed based on the processing result, and the first processing is performed by the first processor. A processing device comprising a plurality of processors, wherein the first process is executed prior to the execution of the second process when the information indicating that the process is unprocessed is received. 2. The first processor according to claim 1, wherein the first processor stores a procedure of the first process, an executing unit that executes the first process, and the unprocessed state. As information, there is provided a sending means for sending to the second processor completion information indicating execution completion / non-completion of the first processing by the execution means, wherein the second processor is provided from the first processor. A receiving unit that receives the completion information, a storage unit that stores the procedure of the first process and the procedure of the second process, and that the execution of the first process is completed. Determination as the execution condition of the process, and a determination that determines whether the execution condition stored in the storage unit is satisfied based on the storage unit that stores the execution condition and the completion information received by the receiving unit. Means and before The executing means for executing the first and second processing, and the executing means for executing the second processing when the executing means determines that the executing condition is satisfied. If it is determined that the execution condition is not satisfied, the control is performed before the execution of the second process.
A processing device comprising a plurality of processors, comprising: a control unit that controls the execution unit to execute the first process; and a transmission unit that transmits the processing result processed by the execution unit. 3. A processing apparatus having a plurality of processors according to claim 2, wherein the sending means of the first processor adds the result of the processing to the completion information and sends it as transmission information. . 4. The completion information according to claim 2,
The processing device including the plurality of processors includes a tag indicating completion / non-completion of all processes, and completion information is set to indicate completion for tags corresponding to the processes executed in the processor. A processing device having a plurality of processors. 5. The processing according to claim 2, wherein a plurality of the first processors are provided, and the same first processing procedure is stored in advance in the storage means of each of the plurality of the first processors, whereby the processing is multiplexed. In the second processor, the receiving unit receives the completion information from the plurality of first processors, and the determining unit, based on each completion information received by the receiving unit, A processor corresponding to the completion information for which the execution condition is satisfied is specified, and the control unit controls the execution unit to execute the second process based on the processing result from the specified processor. A processing device comprising a plurality of processors. 6. The method according to claim 5, wherein the judgment means is based on each completion information received by the reception means.
For any of the multiple processors that are multiplexed,
When recognizing that there is no completion information satisfying the execution condition, the control means controls the execution means to execute the first processing prior to the execution of the second processing. A processing device comprising a plurality of processors. 7. A processing method of a processor in a processing device comprising a first processor that executes a first processing and a second processor that performs a second processing based on a processing result of the first processor. Then, the first processor sends history information about a process executed in the first processor to a second processor, and the second processor based on history information from the first processor. , It is determined whether or not the first process is unprocessed, and when it is determined that the first process is completed,
A plurality of second processings, wherein the second processing is executed by the second processor, and when the first processing is unprocessed, the first processing and the second processing are executed. Processing method in a processing device including the above processor.