JPH07135581A - Picture quality improving device - Google Patents

Abstract

PURPOSE:To improve the sharpness suitable for the signal level of a video signal by comparing a signal level of the video signal with a correction quantity so as to generate a reference level and using the reference level to control the suppression of a white level peak of a suppression circuit. CONSTITUTION:The device is made up of a correction signal generating circuit 11 generating a correction signal for sharpness improvement from a video signal, a phase adjustment circuit 14 making the phase of the video signal coincident with a phase of a correction signal, a reference signal generating circuit 13 generating a reference level signal with an output of the phase adjustment circuit 14 and a control signal adjusting the gain of the correction signal, a suppression circuit 12 suppressing a white level component of the correction signal with the reference level signal, and an adder circuit 15 adding an output of the suppression circuit 12 to an output of the phase adjustment circuit 14 and controls the suppression of the correction signal suitable for the level of the video signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image quality improving device in a video signal processing device of a color television receiver or a similar device.

[0002]

2. Description of the Related Art Conventionally, an image quality improving apparatus for improving sharpness often uses a circuit configured to generate a correction signal from a video signal using a delay line or the like and add the correction signal and the video signal. In the circuit having such a configuration, the amplitude of the correction signal is varied to adjust the correction amount. However, when a CRT is driven by a video signal having a high signal level that has undergone a large correction, the white peak exceeds a prescribed value, the electron beam is crushed, the spot size is widened, and the details of the image are lost. As a conventional circuit to prevent such image quality deterioration,
There is a circuit disclosed in Japanese Patent Laid-Open No. 2-1428.

FIG. 2 is a block diagram of this conventional image quality improving apparatus. In FIG. 2, 1 is an input terminal, 2 is an LPF, 3 is an adding circuit, 4 is a second-order differentiating circuit, 5 is an adjusting means, 6 is a large-amplitude white side suppressing circuit, 7 is an inverting circuit, and 8 is an output terminal.

In the conventional image quality improving apparatus configured as described above, the secondary differentiating circuit 4 is supplied with the video signal from the input terminal 1. The secondary differentiating circuit 4 differentiates the video signal twice to generate a correction signal S ₁ . The correction signal S ₁ is level-adjusted by the level adjusting means 5 and is output to the large-amplitude white side suppression circuit 6 as the correction signal S ₂ . The large amplitude white side suppression circuit 6
The white peak of the correction signal S ₂ is suppressed so as not to exceed a specified value. The correction signal S ₃ output from the large-amplitude white-side suppressing circuit 6 is added to the video signal by the adding circuit 3 via the inverting circuit 7.

The correction signal is suppressed so as not to reach the white peak, and since the black side correction signal is unchanged, a sufficient sharpness improving effect can be obtained.

[0006]

However, in the conventional structure as described above, since the state of the amplitude of the video signal is not grasped, for example, as shown in FIG. For video signals that are rare,
As in (B), the amplitude of the central correction signal S ₂ is small and is not suppressed. The signal obtained by adding the video signal and the correction signal is shown in FIG. However, if the level of the video signal is raised from this state, the correction signal in the unsuppressed portion of the central portion reaches a white peak and white blur occurs as shown in FIG. 3 (D).

Although the amplitude is small as shown in FIG.
In the case of a video signal having a frequency matching the frequency characteristic of the secondary differentiating circuit 4, the amplitude of the correction signal S ₂ is larger than that of a rectangular wave having the same amplitude level (FIG. 3 (F)). Therefore, as shown in FIG. 3G, the correction signal is suppressed before reaching the white peak, and the improvement effect is hindered.

In view of the above point, the present invention has an object to provide an image quality improving apparatus for performing white side suppression suitable for a signal level of a video signal.

It is another object of the present invention to provide an image quality improving device which improves sharpness to a greater extent in a portion where a change in video signal is small.

[0010]

In order to achieve the above object, the present invention has a correction signal generating circuit for generating a correction signal for improving sharpness from a video signal and a phase adjusting circuit for matching the phases of the video signal and the correction signal. And a reference signal generation circuit that generates a reference level signal from the output of the phase adjustment circuit and a control signal that adjusts the gain of the correction signal, a suppression circuit that suppresses the white-side component of the correction signal with the reference level signal, and a phase adjustment And an adder circuit for adding the output of the suppression circuit to the output of the circuit.

The present invention is also directed to a correction signal generation circuit for generating a correction signal for improving sharpness from a video signal, a phase adjustment circuit for matching the phases of the video signal and the correction signal, and a modulation inversely proportional to the change of the video signal. The configuration includes a modulation signal generation circuit that generates a signal, and an addition circuit that adds the output of the correction signal generation circuit to the output of the phase adjustment circuit.

[0012]

According to the present invention, the reference level is generated by comparing the signal level of the video signal with the correction amount in the reference signal generation circuit according to the above-mentioned configuration. The white level peak suppression of the suppression circuit is controlled by this reference level to improve the sharpness suitable for the signal level of the video signal.

The present invention also detects a change in the video signal,
The smaller the amount of change, the greater the sharpness improvement.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of an image quality improving apparatus according to the first embodiment of the present invention.
In FIG. 1, 11 is a correction signal generation circuit, 12 is a suppression circuit, 13 is a reference signal generation circuit, 14 is a phase adjustment circuit, 1
Reference numeral 5 is an adder circuit.

The operation of this embodiment having the above structure will be described below. The video signal input to the image quality improving device is corrected signal generation circuit 11 and phase adjustment circuit 1.
4 is supplied. The correction signal generation circuit 11 creates a signal for enhancing the edge of the image from the video signal, gain-controls the signal with the correction control signal, and outputs the signal as the correction signal S ₁ . Further, the phase adjustment circuit 14 adjusts the input video signal so as to match the phase of the correction signal S ₁ and outputs it.

The video signal output from the phase adjusting circuit 14 is input to the reference signal generating circuit 13 and the adding circuit 15. The reference signal generation circuit 13 generates a reference level signal according to changes in the video signal and the correction control signal. The suppression circuit 12 suppresses the correction signal S ₁ on the white side in accordance with the reference level signal from the reference signal generation circuit 13, and outputs it as the correction signal S ₂ . The adding circuit 15 adds the correction signal S ₂ to the video signal output from the phase adjusting circuit 14 and outputs the video signal as a corrected video signal.

Next, detailed operation of each circuit will be described. Figure 4
FIG. 3 is a block diagram of the correction signal generation circuit 11. In FIG. 4, 111 is a waveform generation circuit, 112 is a modulation circuit,
The waveform generation circuit 111 can be composed of a delay element and an adder as shown in FIG. 5, for example. 11 in FIG.
5, 116 and 117 are delay elements having a delay time τ, 1
18 is an adder. The input video signal is the delay element 1
Pass 15, 116, 117. Delay elements 115, 1
The outputs from 16 and 117 are multiplied by the coefficients of −1/2, 1 and −1/2, respectively, and added by the adder 118.

As shown in FIG. 6, the output of the waveform generation circuit 111 is a signal which emphasizes the edge portion of the video signal whose phase is delayed by τ (delay time of the delay element) with respect to the input video signal. That is, the rising edge is a signal that pulls down the rising edge and the rising edge is pulled up, and the falling edge is a signal that is the opposite of the rising edge. The correction signal output from the waveform generation circuit 111 is amplitude-modulated by the modulation circuit 112 according to the correction control signal and output as the correction signal S ₁ .

Next, the suppression circuit 12 will be described. The suppression circuit 12 can be composed of, for example, a limiter circuit shown in FIG. 7. In FIG. 7, 121 is a diode and 122 is a voltage source. The signal level of the correction signal S ₁ input to this circuit is the voltage source VL (more precisely, VL +
When the voltage exceeds the forward voltage drop of the diode), the diode 121 becomes conductive and the signal component above VL is not output.

Next, the reference signal generating circuit 13 will be described in detail. FIG. 8 is a block diagram of the reference signal generation circuit 13. In FIG. 8, 131 is a multiplication circuit, 132 is a comparison circuit, 133 and 134 are first and second subtractors,
The comparison circuit 1 includes the first subtractor 133 and the second subtractor 134.
32 is configured.

In the multiplication circuit 131, the video signal is amplitude-modulated by the correction control signal. The comparison circuit 132 outputs the reference level signal VL such that the suppression control is performed by the suppression circuit 12 only during the period when the output V of the multiplication circuit 131 becomes the reference value VC or more. In the suppression circuit 12 described above, the actual voltage source 122 becomes the reference level signal VL. The output V of the multiplication circuit 131 is V = k · VA · VS (k: constant, VA: correction control signal, VS: video signal).
If VA or VS decreases and the output V decreases and V <VC even during the video signal period in which V> VC, the comparison circuit 13
2 does not output the reference level signal. That is, when the correction control amount is decreased or when the video signal level is decreased by brightness control or the like, the suppression circuit 12 does not perform the suppression control.

First subtractor 1 constituting the comparison circuit 132
33 has a gain of k ₂ (k ₂ > 0) and subtracts the output V of the multiplication circuit 131 from the reference value VC. In addition, the second subtractor 13
4 has a gain of 1 and subtracts the output of the subtractor 133 from the voltage Vcc. Therefore, the output VL of the comparator circuit 132 becomes _{VL = VCC-k 2 · (} VC-V). At this time, if VCC is set to the power supply voltage VDD of the correction signal generating circuit 11 or more, k ₂ · (VC-V) ≧ 0, VL ≧ VCC ≧ VDD, and the white side amplitude of the correction signal S ₁ is output to VDD or more. Therefore, the suppression control is not performed when k ₂ · (VC-V) ≧ 0, that is, VC ≧ V. When VC <V, the larger the amplitude of V is, the smaller VL is, and the amount by which the correction signal S ₁ is suppressed by the suppression circuit 12 also increases.

Next, the operation of the comparison circuit 132 will be described in detail with reference to FIG. FIG. 9A shows the output V of the multiplication circuit 131.
₁ , FIG. 9B shows the output V of the comparison circuit 132 when the output V ₁
L ₁ , FIG. 9C shows the correction signal S ₂ suppressed by VL ₁ , and FIG.
(D) is a multiplication circuit 131 having a larger amplitude than (A).
Output V ₂ and FIG. 9E shows the multiplication circuit 131 when the output V ₂ is output.
Output VL ₂ , FIG. 9F shows the correction signal S suppressed by VL _2.
2 '. As described above, since the suppression circuit 12 does not perform the suppression control when VL ≧ VCC, the actual VL ₁ ,
The period in which VL ₂ is higher than V CC is also V CC in FIG.

As shown in FIG. 9A, the video signal has a rectangular wave with a large amplitude and a high frequency with a small amplitude (correction signal generation circuit 11
Peak frequency). In the rectangular wave part, the amplitude of the video signal is large, so the amplitude of the correction signal is large,
Since the peak of the frequency characteristic of the correction circuit 12 and the frequency of the video signal coincide with each other in the high frequency portion, the amplitude of the correction signal becomes large. Here, the output S ₁ of the correction signal generating circuit 11 has the same amplitude as the correction signal in the rectangular wave portion and the correction signal in the high frequency portion.

Here, consider the case where the amplitude of the video signal is increased by brightness control or the like from the state where the amplitude of the video signal is sufficiently small, as shown in FIG. 9 (A). Since the period exceeding the reference value VC is only in the rectangular wave portion, the reference level signal is a signal in which suppression control is performed only in the rectangular wave portion as shown in FIG. 9B. The correction signal S ₁ has the same amplitude in both the rectangular wave portion and the high frequency portion, but only the rectangular wave portion is suppressed by the reference level signal VL ₁ and becomes the S ₂ signal as shown in FIG. 9C.

Next, when the amplitude of the video signal is further increased, the high frequency portion also exceeds the reference value VC as shown in FIG. 9 (D), so that suppression control of the correction signal is performed. But comparison circuit 1
The output of 32 is _{VL = VCC-k 2 · (} VC-V),
The suppression level of the rectangular wave portion is lower than that in FIG. 9 (B). Therefore, the reference level signal becomes the reference level signal VL ₂ whose level in the rectangular wave portion is lower than that in the high frequency portion as shown in FIG. 9 (E). In the control of the suppression circuit 12, the correction signal of the rectangular wave portion is more suppressed than the correction signal of the high frequency portion according to the reference level signal VL _{2 as} shown in FIG. 9 (F).

As described above, the comparison circuit 132 determines that the reference value VC
The reference level signal VL is output so that the suppression control is performed for a period exceeding the reference value and the control amount of the suppression increases in proportion to the amount exceeding the reference value VC.

As another embodiment of the reference signal generating circuit 13, a block diagram of FIG. 10 is shown. In FIG. 10, 1
Reference numeral 36 is a second adder circuit, and 137 is an amplifier. In the second adder circuit 136, the correction control amount k ₂ · VA that has been multiplied by k ₃ by the amplifier 137 (k ₃ : gain of the amplifier) is added to the video signal. At this time, the output V of the second adder circuit 136 is
V = k ₂ · VA + VS. This output signal V is the reference value V
The comparator circuit 132 outputs the reference level signal only when the period exceeds C. The video signal period when V> VC is also VA or VS
If V goes down, V goes down, and if V <VC, the suppression circuit 12
The suppression control is not performed in the same manner as in the first embodiment of the reference signal generation circuit 13 described above.

As described above, in this embodiment, the correction signal generation circuit, the circuit for suppressing the white side component of the correction signal, and the circuit for generating the signal for controlling the suppression level
Since the white side of the correction signal is suppressed in accordance with not only the change in the correction amount but also the change in the level of the video signal, a good sharpness improving effect can always be obtained.

Next, a second embodiment of the present invention will be described. FIG. 11 is a block diagram of the second embodiment. Figure 11
In the figure, 16 is a modulation signal generation circuit, and the same circuits as those in the first embodiment are designated by the same numerals. In the second embodiment, the modulation circuit 112 which constitutes the correction signal generation circuit 11
Performs modulation according to the output signal from the modulation signal generation circuit 16.

The output S ₁ 'of the modulation circuit 112 and the video signal output from the phase adjustment circuit 14 are added by the addition circuit 15. Further, the modulation signal generation circuit 16 includes the phase adjustment circuit 1
A change in the video signal output from 4 is detected, and a modulation signal inversely proportional to the change amount VD is output. As a result, the amplitude of the correction signal becomes larger in the portion where the change in the video signal is smaller, and the improvement effect becomes higher in the portion where the sharpness is poor.

Next, the modulation signal generation circuit 16 will be described in detail. FIG. 12 is a block diagram of the modulation signal generation circuit 16, and FIG. 13 is a waveform diagram of each part by the modulation signal generation circuit 16. In FIG. 12, 161 is a differentiating circuit, 16
2 is an absolute value circuit, and 163 is a division circuit. FIG.
13A is the video signal VS input to the differentiating circuit 161, FIG. 13B is the output of the differentiating circuit 161, FIG. 13C is the output of the waveform generating circuit 111, and FIG. 13D is the modulating circuit 11.
2 output.

The video signal VS output from the phase adjusting circuit 14 is supplied to the differentiating circuit 161 to be differentiated. The output of the differentiating circuit 161 (FIG. 13 (B)) has a larger amplitude as the input video signal (FIG. 13 (A)) changes more rapidly. That is, the output of the differentiating circuit 161 increases as the change of the video signal increases, and the output of the differentiating circuit 161 decreases as the change of the video signal decreases. However, the output of the differentiating circuit 161 is output in the positive direction when the video signal rises and in the negative direction when the video signal falls. In the absolute value circuit 162 in the next stage, when the input signal is in the positive direction, it is output as it is, and when the input signal is in the negative direction, it is inverted and output in the positive direction. Becomes By the processing of the differentiating circuit 161 and the absolute value circuit 162, the change amount VD of the video signal can be detected.

The division circuit 163 divides the correction control signal VA by the output VD of the absolute value circuit. Division circuit 163
Output VM becomes VM = k ₄ VA / VD (k ₄ : constant), and the output VM of the division circuit 163 outputs the waveform generation circuit 1
The output S ₀ of 11 is modulated. Output of modulation circuit 112 S ₁ '
Becomes _{S 1 '= k 5 · S} 0 · VM = K 4 · k 5 · S 0 · VA / VD (k 5: constant). As a result, the waveform generation circuit 111
Output S ₀ (FIG. 13 (C)) is modulated and output as shown in FIG. 13 (D). S ₁ 'piece variations greater of the video signal compared with S ₀ is S ₁ becomes low degree of modulation of the S _0' the amplitude of is suppressed, fractional change of the video signal is small has a high degree of modulation S ₀ The amplitude of S ₁ 'is stretched. Therefore, the improvement effect is greater in the portion where the change in the video signal is small and the sharpness is poor.

[0035]

As described above, according to the present invention,
The amplitude of the correction signal is limited according to the amount of correction and the change of the video signal, and a good sharpness improving effect can always be obtained.

Further, since the amplitude of the correction signal is controlled in inverse proportion to the change in the video signal, the improvement effect is higher and the practical effect is greater in the portion having the poorer sharpness.

[Brief description of drawings]

FIG. 1 is a block diagram of an image quality improving device according to a first embodiment of the present invention.

FIG. 2 is a block diagram of a conventional image quality improving device.

FIG. 3 is a signal waveform diagram according to a conventional example.

FIG. 4 is a block diagram of a correction signal generation circuit according to this embodiment.

FIG. 5 is a block diagram of a waveform generation circuit according to this embodiment.

FIG. 6 is a waveform diagram showing a phase relationship between an input video signal and a correction signal according to this embodiment.

FIG. 7 is a circuit diagram of a suppression circuit according to this embodiment.

FIG. 8 is a block diagram of a reference signal generation circuit of this embodiment.

FIG. 9 is a waveform diagram showing the operation of the comparison circuit of the present embodiment.

FIG. 10 is a block diagram of another embodiment of the reference signal generation circuit.

FIG. 11 is a block diagram of an image quality improving device according to a second embodiment of the present invention.

FIG. 12 is a block diagram of a modulation signal generation circuit according to a second embodiment.

FIG. 13 is a waveform diagram of each part by the same modulation signal generation circuit.

[Explanation of symbols]

 11 Correction Signal Generation Circuit 12 Suppression Circuit 13 Reference Signal Generation Circuit 14 Phase Adjustment Circuit 15 Addition Circuit 16 Modulation Signal Generation Circuit

Claims (2)

[Claims] 1. A correction signal generation circuit for generating a correction signal for improving sharpness from a video signal, a phase adjustment circuit for matching the phases of the video signal and the correction signal, an output of the phase adjustment circuit and the correction. A reference signal generation circuit that generates a reference level signal from a control signal that adjusts the gain of the signal, a suppression circuit that suppresses the white-side component of the correction signal by the reference level signal, and the suppression at the output of the phase adjustment circuit. An image quality improving apparatus comprising: an adder circuit for adding the output of the circuit, and performing suppression control of a correction signal suitable for the signal level of the video signal. 2. A correction signal generation circuit that generates a correction signal for improving sharpness from a video signal, a phase adjustment circuit that matches the phases of the video signal and the correction signal, and a modulation signal that is inversely proportional to a change in the video signal. A modulation signal generating circuit for generating
An image quality improving apparatus comprising: an adder circuit for adding the output of the correction signal generating circuit to the output of the phase adjusting circuit.