JPH07134632A - Display device provided with coordinate input mechanism - Google Patents

Abstract

PURPOSE:To efficiently detect an X coordinate by applying voltage pulses to X electrodes in a specific pattern and successively converging a position area in contact with a detector. CONSTITUTION:During a vertical blanking interval coordinate detection circuit 111 supplies data for applying voltages to the X electrodes x0 to xm-1 in the different patterns for respective line periods through a selector 112 to an X electrode driving circuit 103. That is, the X electrodes x0 to xm-1 are successively equalized into line period number multiples 2 and the voltage is applied to the X electrode of the area on a very right side and the X electrodes of every other present area from the area. For instance, the detection voltage of a pen 104 in contact with the X electrode x2 becomes a voltage level higher for the voltage applying pulse of an (N-1)-th line period (m=2N) and detection data become '1'. By making the detection data and bit data successively correspond to each other in the coordinate detection circuit 111, it is detected that the X coordinate is 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device provided with a coordinate input mechanism, and more particularly to a technique for inputting coordinates.

[0002]

2. Description of the Related Art A conventional display device having a coordinate input mechanism is disclosed in, for example, Japanese Patent Laid-Open No. 2-255911.
The device described in Japanese Patent Publication is known.

According to this apparatus, the pencil-shaped detection device detects the drive voltage pulse of the display to obtain the coordinates of the position designated by the detection device. Therefore, according to this device, it is not necessary to provide a pressure-sensitive tablet or the like for inputting coordinates separately from the display.

The device disclosed in Japanese Patent Laid-Open No. 2-255911 will be described below.

FIG. 40 shows the structure of this apparatus.

In the figure, 201 is a thin film EL panel, y
0, y1, ..., Yn-1 are Y electrodes, and x0,
x1, ..., Xm-1 are X electrodes, and 202 is Y
Reference numeral 203 denotes an electrode drive circuit, and 203 denotes an X electrode drive circuit.
Reference numeral 204 is a timing generation circuit, and 205 is a pencil-shaped detection device for coordinate detection (hereinafter simply referred to as "pen").
, 206 is an amplifier circuit, and 207 is y.
A coordinate detection circuit, and 208 is an x-coordinate detection circuit.
The Y coordinate, that is, the line of the display screen of the thin film EL panel 201 is designated by the Y electrode, and the X coordinate, that is, the column is designated by the X electrode. Further, the pixels of the thin film EL panel 201 corresponding to the Y electrodes to which the selection voltage is applied and corresponding to the X electrodes to which the selection voltage is applied are turned on (display state).

The operation of this apparatus will be described below with reference to FIG.

FIG. 41 shows the timing of the drive voltage applied to the Y and X electrodes of the thin film EL panel 201.

As shown in FIG. 41, in this apparatus, one frame period, which is a period required to display one screen, is
It is divided into a period in the display / Y coordinate detection mode in which the display and the Y coordinate are detected and a period in the X coordinate detection mode in which the X coordinate is detected. During the display / Y coordinate detection mode, the voltage is applied to the X and Y electrodes for the actual display, and
The period of the coordinate detection mode is a period in which the voltage for display is not applied.

The operation during the Y-coordinate detection mode is as follows.

That is, each Y electrode y0, y1, y2, ...
......, Y electrode drive circuit 202 connected to yn-1 has Y electrodes y0, y1, y2, ..., y as shown in FIG.
Select voltage VyON (H) or VyON sequentially for n-1
(L) is applied. On the other hand, X electrodes x0, x1, x2, ...
..., the X electrode drive circuit 203 connected to xm-1 is
In synchronization with the scanning operation of the electrode driving circuit, the voltages corresponding to the display data to be displayed on the pixels corresponding to the lines corresponding to the Y electrodes to which the selection voltage is applied are respectively applied to the X electrodes x.
0, x1, x2, ..., Xm-1 are supplied.

By this operation, one screen is displayed during the display and X coordinate detection mode.

During this time, when the selection voltage is applied to the line with which the pen 205 is in contact, the pen 205 and the Y electrodes y0, y1, y2, ... Corresponding to this line.
A voltage pulse is supplied to the Y coordinate detection circuit 207 via the amplifier circuit 206 due to the capacitive coupling between yn-1.
Since the selection voltage VyON is sequentially applied to the Y electrodes y0, y1, y2, ..., Yn-1, the selection voltage Vy is applied to any of the Y electrodes y0, y1, y2 ,.
If a counter or the like for counting whether ON is applied is provided, if the counter value is stored at the timing of voltage pulse input via the pen 205 and the amplifier circuit 206, the Y coordinate with which the pen 205 is in contact is stored. Has been detected.

Next, the operation in the period of the X coordinate detection mode is as follows.

Similarly to the detection of the Y-coordinate, the X-coordinate is also detected by detecting the voltage pulse applied to the X electrodes x0, x1, x2, ..., Xm-1 by the pen 205. The X coordinate indicated by 205 can be detected.

Therefore, in this apparatus, the X electrode drive circuit 2
03, X electrodes x0, x1, x2, ..., Xm
The selection voltage VxON is applied to -1. As a result, the pen 205 and the X electrode x to which the selection voltage VxON is applied
0, x1, x2, ..., Xm−1 are capacitively coupled, so that a voltage pulse for detection passes through the amplifier circuit 206 and X
It is supplied to the coordinate detection circuit 208.

Therefore, like the Y coordinate detecting circuit 207, the X coordinate detecting circuit 208 is instructed which X electrode x0, x1,
The pen 205 is provided with a counter or the like for counting whether the selection voltage VxON is applied to x2 ,.
By storing this counter value at the timing when the voltage pulse is input via the amplifier circuit 206, the X coordinate with which the pen 205 is in contact can be detected.

[0018]

According to the device described in Japanese Patent Application Laid-Open No. 2-255911 described above, in addition to the period in which the selection voltage is applied to the X electrodes and the Y electrodes for display,
An X coordinate detection mode period, which is a period for detecting the X coordinate, is required.

Considering this period, for example, in the case of detecting the X coordinate of a personal computer operating at a frame period of 70 Hz, if the resolution is 640 dots in the horizontal direction and 480 lines in the vertical direction, the period in the X coordinate detection mode. , X electrodes x0, x1, x2, ..., x
The selection voltage VxON must be sequentially applied to 639. That is, the applied pattern of the selection voltage of 640 is set to X
It must be realized during the coordinate detection mode.

On the other hand, the period in the X-coordinate detection mode is a period called a vertical blanking period, and in order to realize a good display, it should normally be suppressed to about 5% of one frame period. Therefore, one frame period is 70H
If z, the period of the X coordinate detection mode is about 700 μs
Therefore, the period in which the selection voltage is applied to one of the X electrodes x0, x1, x2, ..., Xm−1 is about 1 μs.

Therefore, a different X electrode x is generated about every 1 μs.
In order to sequentially apply the selection voltage to 0, x1, x2, ..., Xm-1, it is necessary to charge the X electrode with a voltage that can be detected by the pen during this period. However, in order to realize such high-speed charging operation, a high-performance X electrode pole drive circuit is required.

On the other hand, such an X-electrode drive circuit capable of high-speed operation cannot be realized at low cost, leading to an increase in cost of the device. Further, realization of such high speed operation increases the power consumption of the device.

Therefore, an object of the present invention is to provide a display device which can detect the X coordinate more efficiently.

[0024]

In order to achieve the above object, the present invention provides, for example, M × N display elements arranged in a matrix of M rows and N columns and M connected to each row of the display elements. A flat display having N Y electrodes and N X electrodes connected to each column of display elements,
A detector for detecting, via capacitive coupling, a voltage pulse applied to the columns and rows corresponding to positions on the display surface of the flat display in contact, and each display pixel of the flat display. Is a display device which is in a display state when a predetermined voltage is applied to both the Y electrode and the X electrode to be connected. During the display period, voltage pulses are applied to the Y electrodes in the row arrangement order. A Y electrode drive circuit for applying a voltage pulse, an X electrode drive circuit for applying a voltage pulse to the N X electrodes with a voltage pulse application pattern designated by a given data string, and during a display period,
A means for supplying to the front X electrode drive circuit a data string for designating a voltage pulse application pattern corresponding to the display pattern to be displayed on the N display elements in the row to which the voltage pulse is applied, and non-display Means for sequentially supplying L data trains specifying L different voltage pulse application patterns to the X drive circuit during the period, and the detector detecting the voltage pulse during the display period. At the position where the detector is in contact with the Y electrode applying the voltage pulse
Y coordinate detection means for determining the coordinates and L during the non-display period
Applied to the N X electrodes according to the number of data strings,
For each of the L voltage pulse application patterns, the X coordinate of the position in contact with the detector according to the L detection value indicating whether or not the detector has detected the voltage pulse. X-coordinate detection means for determining, and the L number of voltage pulse application patterns are different from each other for arbitrary H number values k between 1 and H (where H ≦ L). The N X electrodes are equally divided into 2 × k areas according to the arrangement of the X electrodes, and a voltage is applied to the X electrodes belonging to every other area among the divided areas in the arrangement direction of the X electrodes. A display device is provided, which includes H voltage application patterns for applying a pulse.

[0025]

According to the above-described display device of the present invention, during the non-display period, the X drive circuit is provided with arbitrary H different values from 1 to H (where H≤L). For k, the N X electrodes are equally divided into 2 × k regions according to the arrangement of the X electrodes, and X belonging to every other region in each divided region in the direction of the arrangement of the X electrodes. L voltage pulse application patterns including H voltage application patterns for applying voltage pulses to the electrodes are supplied. Then, during the non-display period, the detector applies a voltage pulse to each of the L voltage pulse application patterns applied to the N X electrodes in accordance with the L data strings. The X coordinate of the position in contact with the detector is determined according to the L detection values indicating whether the detection is performed.

According to such H voltage application patterns, it is possible to make a determination by sequentially converging the contacting position regions of the detector, and therefore, it is less than the number of X electrodes. The X coordinate can be detected by the number of times the voltage pulse is applied.

[0027]

Embodiments of the display device according to the present invention will be described below.

The first embodiment of the present invention will be described below.

The configuration of the display device according to the first embodiment will be described.

FIG. 1 shows the configuration of the display device according to the first embodiment.

In FIG. 1, 101 is a liquid crystal panel, y0, y1, ..., Yn-1 are Y electrodes,
x0, x1, ..., Xm-1 are X electrodes, and
Reference numeral 2 is a Y electrode drive circuit, and 103 is an X electrode drive circuit. Reference numeral 104 is a pencil-shaped detection device (pen) for coordinate detection, 105 is a signal line for transferring voltage pulses detected by the pen, 106 is a detection voltage correction circuit for correcting the detected voltage, and 107 is , A signal line for transferring the voltage corrected by the detection voltage correction circuit.

Reference numeral 108 is a display data bus for transferring display data, and 109 is a signal bus for transferring a synchronizing signal. It is to be noted that the signal bus 109 displays a vertical sync signal that becomes valid for each frame, a horizontal sync signal that becomes valid for each horizontal period, and a display indicating that valid display data is transferred to the display data bus 108. A valid signal,
The dot clock synchronized with the display data transferred by the display data bus 108 is transferred.

Next, 110 is a control clock generation circuit, 111 is a coordinate detection circuit, and 112 is a selector. Reference numeral 113 is a signal line for transferring a control clock of the Y electrode drive circuit 102 and the coordinate detection circuit 111, and 1
Reference numeral 14 is a signal line for transferring the control clocks of the X electrode drive circuit 103 and the coordinate detection circuit 111, and 115 is a signal bus for transferring the control clocks of the selector 112 and the coordinate detection circuit 111, which transfers the display valid signal. . Also,
Reference numeral 116 transfers a liquid crystal alternating signal, which is a timing signal necessary for the liquid crystal panel to perform AC driving.

Reference numeral 117 is a data bus for transferring the data for detecting the X coordinate generated by the coordinate detecting circuit 111, and 118 is the transfer of the display data and the X coordinate detecting data input to the X electrode driving circuit 103. 119 is a liquid crystal display data bus for transferring the Y coordinate detection data and the X coordinate detection data. Also, 12
Reference numeral 0 is a power supply circuit, 121 is a voltage line for transferring a voltage that is a source of the voltage output from the Y electrode drive circuit 102,
Reference numeral 122 is a voltage line that transfers the voltage that is the source of the voltage output by the X electrode drive circuit 103, and 123 is a voltage line that transfers the threshold voltage used for comparison with the detection voltage in the detection voltage correction circuit 106. Is.

The structure of the pen 104 is shown in FIG.

In the figure, 601 is a pen tip, 602 is a switch, 605 is a pen tip 601 which is the liquid crystal panel 10.
This is a spring that turns on the switch 602 when it contacts 1. Reference numeral 603 is a signal line that transfers information detected by the switch 602 as to whether the pen tip 601 is in contact with the liquid crystal panel or not, and 604 is a signal line that transfers the detected voltage pulse. is there. Note that, in FIG. 1, the signal line 603 and the signal line 604 are put together and
Is represented.

Next, the detection voltage correction circuit 106 (see FIG.
FIG. 3 shows the configuration of the reference).

In the figure, reference numeral 801 denotes a threshold voltage generating circuit, which generates a threshold voltage for comparison with the detection voltage pulse transferred on the signal line 105. Reference numeral 802 denotes a voltage comparison circuit, which is a circuit for comparing the detection voltage pulse with the threshold voltage. 803 is a determination circuit, which is a voltage comparison circuit 8
It is a circuit that determines whether the detected voltage pulse is valid as a result of comparison in 02. Reference numeral 804 denotes a voltage amplitude modulation circuit, which converts the voltage value of the result determined by the determination circuit 803 into, for example, a digital signal.

Next, the X electrode drive circuit 103 (see FIG. 1)
The configuration of is shown in FIG.

In the figure, 1101 is a liquid crystal display data bus 11.
8 is a clock CL2 synchronized with the data transferred, and 1102 is a clock CL1 which becomes effective every time one horizontal line of liquid crystal display data is transferred. 1103
Is a shift register, which shifts the data transferred by the liquid crystal display data bus 118 to 1 in synchronization with the CL2 clock 1101.
Capture lines. Reference numeral 1104 denotes a line latch, which simultaneously takes in the data taken in the shift register 1103 for one line in synchronization with the CL1 clock 1102. 1
Reference numeral 105 denotes a voltage output circuit, which simultaneously outputs a voltage corresponding to the data for one line fetched in the line latch 1104 to each X electrode x0, x1, ..., Xm-2, xm-1.

Next, FIG. 5 shows the configuration of the coordinate detection circuit 111 (see FIG. 1).

In the figure, 1501 is a vertical counter,
Reference numeral 502 is a signal bus for transferring the output of the vertical counter 1501, 1503 is a Y coordinate latch for temporarily storing the Y coordinate, and 1504 is a data bus for transferring the latch data of the Y coordinate latch 1503. Reference numeral 1505 denotes a decoder that decodes the output of the vertical counter 1501.
A signal bus 506 transfers the decoding result. 15
Reference numeral 07 is a horizontal counter, and 1508 is a horizontal counter 1.
A signal bus for transferring the output of 507, and a selector 1509 for selecting the output of the horizontal counter 1507 from the output result of the decoder 1505. Reference numeral 1510 is an AND gate circuit, and 1511 is a signal bus for transferring a latch pulse. 1512 is an X coordinate latch (1), which is 1
513 is a data bus for transferring the output data of the X coordinate latch (1) 1512, 1514 is an X coordinate latch (2), and 1515 is an X coordinate latch (2) 1514.
Is a data bus for transferring the latch data. Also, 1
A status register 516 reflects whether the pen 104 is in contact or not, and 1517 is a status register 1516 and a status register 1516.
A data bus for data transfer with 18 interface circuits. Reference numeral 1519 is a data bus for transferring the detected X and Y coordinate values.

The configuration of the display device according to the first embodiment has been described above.

The operation of the display device according to the first embodiment will be described below.

As shown in FIG. 5, one frame period includes a display period in which valid display data is transferred on the display data bus 107 (see FIG. 1) and a period in which valid display data is not transferred. It is time-divided into a certain non-display period (hereinafter referred to as "vertical blanking period"). Since this vertical blanking period is about 5% of one frame period, one frame of a general personal computer is about 70 Hz, and therefore one vertical blanking period is about 700 μs.
As shown in the figure, the display valid signal is'
It becomes High level, and the display valid signal becomes Low level during the vertical blanking period.

In the first embodiment, the display operation and the Y coordinate detection operation are performed during this display period, and the X coordinate detection operation is performed during the vertical blanking period.

Therefore, first, the display operation performed during the display period will be described.

The Y electrode drive circuit 102 shown in FIG.
The electrodes y0, y1, y2, ..., Yn-1 are connected, and as shown in FIG. 6, in the display period, the Y electrodes y0, y1, y1 ,. The selection voltage VyON (H) or VyON (L) is applied to yn-1.

On the other hand, the selector 112 selects the liquid crystal display data bus 118 during the display period, and during the display period,
The display data serially transferred via the liquid crystal display data bus 118 is sequentially transferred to the X electrode drive circuit 103.

During the display period, the X electrode drive circuit 103 sequentially fetches the display data serially transferred via the liquid crystal display data bus 118 into the shift register 1103 in synchronization with the Cl2 clock 1101. When the shift register 1103 finishes the operation of fetching data for one line, the CL1 clock 1102 becomes valid, and the data for one line fetched in the shift register 1103 becomes
It is taken in by the line latch 1104 in parallel. The data for one line fetched by the line latch 1104 is converted into a voltage corresponding to the data by the voltage output circuit 1105, and at the same time, the corresponding X electrodes x0 to xn-1.
Will be output.

As shown in FIG. 7, the shift register 1
After the first line data is fetched by the 103, the shift register 1103 performs an operation of fetching the data of the next line during a period in which the first line data is converted and output. As described above, by repeating such an operation, the X electrode driving circuit 103 synchronizes with the scanning operation of the Y electrode driving circuit during the display period, and the X electrode driving circuit 103 performs X operation.
A voltage corresponding to display data is supplied to the electrodes x0, x1, x2, ..., Xm−1.

By the operations of the Y electrode drive circuit 102 and the X electrode drive circuit 103 during the display period described above, one screen of display is performed within the display period.

Next, the Y coordinate detecting operation performed during the display period will be described.

Now, the pen tip 60 of the pen shown in FIG.
When 1 contacts the liquid crystal panel 101, the spring 605 contracts, the switch 602 is turned on, and the signal line 603 transfers the GND level voltage to the detection voltage correction circuit (106 in FIG. 1). The pen tip 601 is the liquid crystal panel 101.
, The switch 602 is turned off, and the signal line 603 transfers the voltage of the VCC level. The state of this signal line is shown in FIG. By doing so, it is possible to easily detect whether or not the pen 104 is in contact with the liquid crystal panel 101. Signal line 60
3 is sent to the coordinate detection circuit 111, and the coordinate detection circuit 11
Whether or not the pen tip 601 is in contact with the liquid crystal panel 101 is set in the No. 1 status register 1516 according to the state of this signal line.

Further, as described above, the voltage pulse detected by the pen 104 is transferred to the detection voltage correction circuit (106 in FIG. 1) via the signal line 604 and is corrected.

The correction in the detection voltage correction circuit (106 in FIG. 1) is performed for the following reason.

That is, as shown in FIG. 6, the liquid crystal panel 101 needs to be driven by alternating current, and the X electrode and Y
Since the voltage levels of the electrodes are different, there are multiple voltage levels applied to each electrode. Further, it can be easily assumed that the waveform distortion is generated in the voltage pulse using the capacitive coupling obtained via the pen 104. Therefore,
It is necessary to correct the detected voltage to determine which voltage pulse is valid or invalid.

Therefore, the detection voltage correction circuit 106 corrects the detection voltage. This correction is performed as follows.

That is, the threshold voltage generation circuit 801 (see FIG. 3) of the detection voltage correction circuit 106 generates the threshold voltage (Vth) in synchronization with the display valid signal 115 and the liquid crystal alternating signal 116. . This threshold voltage (Vth)
Is input to the voltage comparison circuit 802 and compared with the voltage pulse detected by the pen 104. Then, the result of the comparison is input to the determination circuit 803. The determination circuit 803 has a condition which becomes valid when the detected voltage pulse is higher than the threshold voltage (Vth) and a condition which becomes valid when it is lower than the threshold voltage (Vth). Which condition should be used according to the above, and determines whether the voltage pulse is valid or invalid. Then, the determined voltage pulse is modulated by the voltage amplitude modulation circuit 804 to, for example, a "0" or "1" level of the digital signal. In the present embodiment, description will be made assuming that when the voltage pulse is valid, it is "1", and when the voltage pulse is invalid, it is "0". As described above, the Y electrode sequentially applies a voltage to the Y electrode during the display period. Therefore, as schematically shown in FIG. 9, in the first line period, the Y electrode y0
Voltage is applied to the Y electrode y1 during the second line period, and the voltage is applied to the Y electrode y1 in sequence.
1) A voltage is applied to the Y electrode yn-2 in the line period, and a voltage is applied to the Y electrode yn-1 in the nth line period.

Assuming that the pen 104 is in contact with the Y electrode yn-2, the voltage pulse detected by the pen 104 has a detected voltage waveform shown in FIG. Therefore, the detection voltage pulse is the liquid crystal alternating signal 116.
Is a “High” level, a voltage higher than the threshold voltage (Vth) is regarded as an effective voltage, and the detected voltage correction data is set to “1”. Also, the liquid crystal alternating signal 116 is'LO
At the W ′ level, a voltage lower than the threshold voltage (Vth) is regarded as an effective voltage, and the detection data is set to “1”. In the period other than the display period, it is considered that the detection voltage is not valid, and the detection data is set to “0”.

This detection correction data is used for the coordinate detection circuit 11
It is output to 1. The coordinate detection circuit 111 detects the Y coordinate indicated by the pen 104 based on the output timing of the detection correction data.

The coordinate detection circuit 111 has a vertical counter 1501 and a Y coordinate latch 1503 as shown in FIG.
have. The vertical counter 1501 is. When the display valid signal 115 becomes “High” level and becomes valid,
As shown in 0, the vertical counter 1501 has 0, 1, 2, ...
.. and the CL1 clock 1102 in synchronization with each other. At this time, the Y electrode drive circuit 102 also synchronizes with the CL1 clock 1102 and sequentially applies the selection voltage V to each Y electrode.
yON (H) or VyON (L) is applied.

On the other hand, the Y coordinate latch 1503 latches the count value of the vertical counter 1501 in synchronization with the detection data transferred by the signal line 107.

If the pen 104 is in contact with the Y electrode yn-2, when the selection voltage VyON is applied to the Y electrode Yn-2, the detection data becomes "1" and the Y coordinate latch 1
The data of “n−2” of the Y coordinate is stored in 503.

The stored data is the Y coordinate value and is output to the data bus 1504 which transfers the Y coordinate detection data.

With the above operation, the Y coordinate with which the pen is in contact can be detected during the display period.

The X coordinate detecting operation performed during the vertical blanking period will be described below.

During the vertical blanking period, the selector 112 selects the data from the coordinate detection circuit 117. Pen 104
Then, the detection correction circuit 106 operates in the same manner as during the Y coordinate detection operation.

During the vertical bright line period, the coordinate detection circuit 117
As schematically shown in FIG. 12, data for applying a voltage to the X electrodes x0, x1, ..., Xm−1 in different patterns for each line period is supplied to the X electrode driving circuit via the selector 112. Supply to 103. That is, in the first line period, the X electrodes x0 to xn−1 are equally divided into two, and a voltage is applied to one (right half in this example), and in the second line period, X
The electrodes x0 to xn-1 are divided into four equal parts, and a voltage is applied to the X electrode in the rightmost region and the X electrodes in the two regions to the left of the two regions. Then, in this way, the X electrodes x0 to xn−1 are sequentially equally divided into the powers of 2 line period numbers, and the X electrode in the rightmost region and this region are
A voltage is applied to the X electrodes in the regions that exist every other. When this is repeated, in the (N−1) th line period, the X electrode that applies the voltage and the electrode that does not apply the voltage become every two X electrodes, and in the Nth line period, the X electrode that applies the voltage and the X electrode that applies the voltage. The electrode to which no voltage is applied is one X
For each electrode. Here, N is the number of bits required when the X coordinate is represented by a binary expression, and if the number of X electrodes is the Kth power of 2, N = K. Note that log ₂
If K is not an integer, N is the smallest integer greater than log ₂ K.

FIG. 13 shows a voltage waveform diagram and a voltage detection state of the pen 104 when a voltage is applied to the X electrode in this way. However, it is assumed that the pen is in contact with the X electrode x2. As shown in FIG. In the voltage application pattern in the first line period, since the voltage is applied to the X electrodes xm / 2 to xm−1, the detection voltage of the pen 104 becomes a voltage level lower than the threshold voltage (Vth), and the detection voltage is detected. The detection data of the voltage correction circuit 106 becomes “0”. Also, regarding the voltage application pattern in the second line period, the pen 10
The detection voltage of 4 has a voltage level lower than the threshold voltage (Vth), and the detection data is "0". When this is repeated in order, the detection voltage of the pen 104 is the threshold voltage (Vt) until the voltage application pattern in the (N−2) th line period.
The voltage level is lower than that of h), and the detection data is "0".
Becomes Then, regarding the voltage application pattern in the (N−1) th line period, the detection voltage of the pen 104 becomes a voltage level higher than the threshold voltage (Vth), and the detection data becomes “1”. Then, regarding the voltage application pattern in the Nth line period, the detection voltage of the pen 104 becomes a voltage level lower than the threshold voltage (Vth), and the detection data becomes “0”.

Therefore, in the coordinate detection circuit 111, the detection data in the first line period is set as the most significant bit of the X coordinate value, and the detection data in the second line period is set as the upper 2nd bit in the X coordinate, and detected in order. The data and the bit data are associated with each other, the detection data in the (N−1) th line period is the lower second bit of the X coordinate value, and the detection data in the Nth line period is the least significant bit of the X coordinate value. By doing so, the X coordinate becomes “2”, which means that the X coordinate can be detected.

Now, during the X coordinate detection operation as described above, the horizontal counter 1507 (see FIG. 5) of the coordinate detection circuit 111 performs a count up operation in synchronization with the CL2 clock 1101. On the other hand, the vertical counter 1501 is enabled by the display enable signal 115 during the vertical blanking period,
The count-up operation is performed in synchronization with the CL1 clock 1102. When the vertical counter 1501 is “0”, the decoder 1505 has the selector 1509 with the horizontal counter 150
The most significant bit of 7 is controlled to be output as data to the X electrode drive circuit.

The most significant bit of the horizontal counter 1507 is
The value is 0 during the first half of the 1-line period, and 1 during the latter half.
Therefore, the X electrode drive circuit 1 that captures this data
In No. 03, the non-selection voltage is applied to half of the screen and the selection voltage is applied to the other half of the screen as shown in the first line period of FIG.

On the other hand, when the vertical counter 1501 is “0”, the decoder 1505 outputs a signal for selecting only the most significant bit of the X coordinate latch (1) 1512 to the AND circuit 1511.
Send to. The AND circuit 1510 takes the logical product of this signal and the display valid signal 115, and sends this signal as a latch pulse to the most significant bit of the X coordinate latch (1) 1512 during the vertical blanking period. With this latch pulse, the detection data transferred from the detection voltage correction circuit 106 through the signal line 107 is stored in the most significant bit of the X coordinate latch (1) 1512. At this time, the latch pulse is not sent to the other bits of the X coordinate latch (1) 1512, and the previous value is maintained.

Next, when the vertical counter 1501 is "1", the decoder 1505 controls the selector 1509 to output the upper 2nd bit of the horizontal counter 1507 as data to the X electrode drive circuit.

Since the upper 2nd bit of the horizontal counter 1507 changes to 0101 every quarter period of one line period, the X electrode drive circuit 103 which takes in this data.
In the region equally divided into four as shown in the second line period of FIG. 12, the selection voltage is applied to the X electrode in the rightmost region and the region to the left of the two, and the other region is not selected. A voltage will be applied.

On the other hand, when the vertical counter 1501 is '1', the decoder 1505 outputs a signal for selecting only the upper 2nd bit of the X coordinate latch (1) 1512 to the AND circuit 151.
Send to 1. The AND circuit 1510 takes the logical product of this signal and the display valid signal 115, and during the vertical retrace line period, this signal is used as a latch pulse and the X coordinate latch (1) 1512.
Sent to the upper 2 bits of With this latch pulse,
The detection data transferred from the detection voltage correction circuit 106 via the signal line 107 is stored in the most significant bit of the X coordinate latch (1) 1512. At this time, the latch pulse is not sent to the other bits of the X coordinate latch (1) 1512, and the previous value is maintained.

This operation is performed by the vertical counter 1501'n.
It is repeated until it becomes -1 ', and each bit of the X coordinate value is sequentially loaded into the corresponding bit of the X coordinate latch (1) 1512, and after all the bits are loaded into the X coordinate latch (1) 1512, the X coordinate latch (1) All bits of 1512 are simultaneously taken into the X coordinate latch (2) 1514, and the data is aligned.

As described above, the X coordinate with which the pen 104 is in contact is stored in the X coordinate latch (2) 1514.
Both the coordinate and the X coordinate are complete.

As described above, according to the first embodiment, the external system checks the state of the status register 1516, confirms that the pen 104 is in contact with the liquid crystal panel 101, and then the data bus 1519. Through
The interface circuit 1518 can detect the X coordinate value and the Y coordinate value with which the pen 104 is in contact.

Further, the time for applying the voltage to the X electrode for detecting the X coordinate can be made longer than before. For example, the frame period is 70 Hz and the number of horizontal pixels is 64.
In the case of 0 dots, the vertical counter 601 is activated during the vertical blanking period.
Is enough to count up to '10', so 10 times X
It may be applied to the electrodes. Therefore, it takes about 70 μs to apply the voltage to the X electrode. Here, since one line period is usually about 30 μs, it is sufficient to charge the X electrodes at the same speed as during the display period of the conventional device.

In the first embodiment, the X coordinate detection control in the vertical blanking period is performed by the horizontal counter 150 for each line.
Although the higher bits of 7 are sequentially output to the lower bits, they may be output in any order. However, in this case, the selection of the output bit is made to coincide with the selection of the bit of the X coordinate latch (1) 1512.

Further, regarding the detection operation of the X coordinate, when the definition is not so demanded, the detection operation may be ended in the middle line period without detecting until the Nth line period. In this case, only the upper part of the X coordinate is obtained.

Further, although the present embodiment has been described assuming that the number of X electrodes is 2 to the Nth power, the present invention can be implemented in the same manner even if the number of X electrodes is an odd number.

The second embodiment of the display device according to the present invention will be described below.

The display device according to the second embodiment is
The display device according to the first embodiment is different from the configuration of the coordinate detection circuit 111, and only the X coordinate detection operation is different.

Therefore, first, FIG. 14 shows a configuration of the coordinate detection circuit 111 according to the second embodiment.

As shown in the figure, the coordinate detection circuit 111 according to the second embodiment is provided with a data conversion circuit 1801 instead of the selector 1509 of the coordinate detection circuit according to the first embodiment shown in FIG. It has been configured.

The X coordinate detecting operation performed by the coordinate detecting circuit 111 will be described below.

In the second embodiment, during the non-display period, as shown in FIG.
In the first line period, the X electrode x
The data conversion circuit 1801 transfers the most significant bit data of the horizontal counter 1507 to the coordinate detection data bus 117 so as to apply a voltage from m / 2 to xm−1. Therefore, the voltage generation by the X electrode drive circuit 103 during this first line period is the same as the state during the first line period of the first embodiment (see FIG. 12).

In the voltage application pattern of the first line period,
As shown in the timing chart of FIG. 16, the pen 104
Cannot detect the voltage pulse, the detection voltage correction circuit 106 detects the detection data 'through the signal line 1102.
Transfer 0 '. From this, as in the first embodiment,
The most significant bit of the X coordinate latch (1) 1512 is'
0'is stored.

In the second line period, the data conversion circuit 1801 detects the most significant bit of the horizontal counter 1507 and X.
The exclusive OR of the coordinate latch (1) 1512 and the most significant bit is calculated, the logical product of the inverted value and the bit of the second bit of the horizontal counter 1507 is taken, and this is output to the X electrode ninth degree circuit 103. . As a result, a voltage is applied to the X electrodes xm / 4 to xm / 2-1. If the pen is located after the X electrode xm / 2,
The detection data becomes "1" in the first line period, and the voltage is applied to the X electrodes xm / 2 to 3xm / 4-1 by the above operation.

When the pen 104 cannot detect the voltage even during the operation of the second line period, the X coordinate latch (1) 15
'0' is also stored in the upper 2nd bit of 12.

In the third line period, the data conversion circuit 18
01 is the inverted value of the exclusive OR of the most significant bit of the horizontal counter 1507 and the most significant bit of the X coordinate latch (1) 1512, the second most significant bit of the horizontal counter 1507 and the X coordinate latch (1) 1512. The logical product of the inverted value of the exclusive OR with the upper 2nd bit and the 3rd bit of the horizontal counter 1507 is calculated, and this is calculated.
Output to 03. As a result, the X electrode xm / 8 to xm
A voltage is applied to / 8-1.

As described above, the data conversion circuit 1801
Then, the logical product of the inverted value of each exclusive OR of the bit of the X coordinate latch (1) 1512 which has been detected and the bit of the horizontal counter 1507 corresponding to this, and the bit for detecting the horizontal counter 1507 is calculated. By repeating the output in each line period until the Nth line period shown in FIG. 15, the voltage application pattern shown in FIG. 15 and the storage of the X coordinate in the X coordinate latch (1) 1512 are realized. .

When the storage of the X coordinate in the X coordinate latch (1) 1512 is completed, the contents are transferred to the X coordinate latch (2) 1514.

By these operations, the external system is
The detected X and Y coordinate values can be accessed via the interface circuit 1518 and the data bus 119 as in the first embodiment.

The third embodiment of the display device according to the present invention will be described below.

The third embodiment relates to the case where the pen 104 has a wide pen tip width and the pen 104 erroneously detects even a voltage pulse applied to an electrode in the vicinity of an electrode which is in actual contact. Is. In the third embodiment, the coordinate value is accurately detected even when the pen tip is thick.

Now, description will be made assuming that the pen tip width of the pen 104 is thick and the voltage pulse applied to both sides of the contacting electrode is also erroneously detected.

The display device according to the third embodiment is
The display device according to the first embodiment differs from the configuration of the coordinate detection circuit 111 only in the Y coordinate detection operation and the X coordinate detection operation.

Therefore, first, FIG. 17 shows the configuration of the coordinate detecting circuit 111 according to the third embodiment.

As shown in the figure, the coordinate detection circuit 111 according to the third embodiment is similar to the coordinate detection circuit 111 according to the first embodiment shown in FIG.
Mask circuit 2203, delay circuit 2204, adder circuit 22
05 is added to the configuration.

First, the Y coordinate detection operation according to the third embodiment will be described.

Here, FIG. 18 schematically shows the relationship between the voltage pattern applied to the Y electrodes and the range that the pen 104 erroneously detects.

In this figure, for example, in the second line period, even if the pen 104 is in contact with the Y electrode y2, it is determined that the effective voltage is applied to the pen 104 by applying the voltage to the Y electrode y1. It represents that.

In the third embodiment, as in the first embodiment, the voltage is sequentially applied from the Y electrodes 0 to yn−1 during the display period, but when the pen 104 is thick, the Y contact is made. Even if a voltage is applied to the electrodes above and below the electrode, it will be detected.

This situation will be described with reference to FIG. 19. If the pen 104 is in contact with the Y electrode yn-2, Y
With the voltage applied to the electrode yn-3, the voltage pulse detected by the pen 104 is higher than the threshold voltage (Vth), so the voltage is detected and the detection data is set to '1'.
It will be transferred to the coordinate detection circuit 111.

As a result, in the coordinate detection circuit 111, when the previous Y electrode becomes valid, the valid detection data is fetched and stored in the Y coordinate latch 1516. Therefore, in the third embodiment, the coordinate detection circuit 111 adds the value of the detection control width register 2201 to the data output from the Y coordinate latch 1503.
02 is provided, and the value “1” stored in advance in the detection control width register 2201 is added to the value stored in the Y coordinate latch 1503 and output. As a result, the Y coordinate to be actually detected is output.

If the pen 104 erroneously detects the Y electrode voltage in a wider range, the data value set in the detection control width register 2201 can be increased accordingly. . If the Y electrode voltage is not detected by mistake as in the first embodiment,
Set the data value to be set in the detection control width register 2201 to '
It can be handled by setting it to 0 '.

Next, the operation of detecting the X coordinate will be described.

FIG. 20 schematically shows a pattern of applied voltage to the X electrode and a range in which the pen 104 erroneously detects. As shown in the figure, the pen 104 detects three electrodes at the same time, so the pen 104 detects 1 in the left-right direction.
The electrodes will be detected. That is, the pen 10
The voltage is detected even when the voltage is applied with a shift of 1X electrode to the left and right where 4 is actually in contact. Therefore, in the fourth embodiment, no voltage is applied to the left and right one electrodes in the range to which the voltage is applied in each applied voltage pattern shown in the first embodiment. Even with this,
Pen 10 in contact with X electrodes xm / 2 to xm-1
4 can detect the voltage applied to the electrodes from xm / 2 + 1 to xm-2X.

The mask circuit 220 suppresses the voltage application to one electrode on the left and right in the range of voltage application in each of the applied voltage patterns shown in the first embodiment.
It is 3.

The mask circuit 2203 has a selector 1509.
"1" for the number of values set in the detection control width register 2201 from the first "1" of the continuous "1" row in the data row sent from the "1" and the detection control width from the last "1" The value "1" from the previous value "1" set in the register 2201 to the final value "1" is masked to be "0". Consecutive '1's in the data string sent from the selector 1509
Since the length of the column of 1 is determined according to the output value of the decoder 1505, the mask circuit 2203 sets the first '1' in the sequence of 1's in the data sequence sent from the selector 1509. If detected, the output value of the decoder 1505,
The mask operation described above can be performed based on the value set in the detection control width register 2201.

Now, in this way, X for applying voltage is applied.
When the operation is repeated in the same manner as in the first embodiment while reducing the number of electrodes, in the (N−2) th line period, as shown in FIG.
As shown in FIG. 4, a position where the pen 104 can detect the voltage and a position where the voltage cannot be detected occur for every four X electrodes.

Therefore, the operation up to this point realizes the detection of the bits except the lower 2 bits of the X coordinate.

However, the lower 2 bits (coordinates for 4 electrodes)
Regarding the detection of (2), it is necessary to apply a voltage to every 2X electrodes or to each electrode, and therefore it cannot be detected by a method of reducing the X electrodes to which the voltage is applied. Therefore, in the third embodiment, the applied voltage pattern in the (N−2) th line period in FIG. 20 is changed to the (N−1) th line period and the Nth line period.
As shown in the line period, the (N + 1) th line period, and the (N + 1) th line period, one electrode is horizontally shifted. By doing so, the lower 2 bits of the coordinate can be detected.

That is, from the (N-1) line to (N +
During the period up to 1) line, the selector 1509 selects the upper (N-2) th bit of the horizontal counter 1507, and the delay circuit 2204 outputs the data to be output to the X electrode drive circuit 103 on the (N-1) line. Delayed by 5 bits, N
6-bit delay on line, 7 on (N + 1) line
Delay a bit.

On the other hand, the AND circuit 15 according to the third embodiment.
08 is an operation for setting the least significant bit and the second least significant bit of the X coordinate latch (1) 1512 according to the column of the detected data detected in the period from the (N−2) line to the (N + 1) line. To do. That is, in Table 1, a column of detection data detected in the period from the (N−2) line to the (N + 1) line, the least significant bit and the value of the least significant second bit of the X coordinate latch (1) 1512 to be set. Shows the correspondence of.

[0120]

[Table 1]

The storage of the lower 2 bits is as follows.
This can be realized by performing the following operation in the AND circuit 1508.

That is, when the detection data detected in the (N-2) line period is "0", (N-
1) The detection data detected in the line period is stored in the least significant bit of the X coordinate latch (1) 1512, and the detection data detected in the N line period is stored in the X coordinate latch (1) 1512.
If the detection data stored in the lower 2nd bit of, and detected in the N line period is '1', then (N +
1) Store the detection data detected in the line period in the least significant bit of the X coordinate latch (1) 1512. When the detection data detected in the N line period is “0”,
The detection data detected in the (N + 1) line period is not stored in the X coordinate latch (1) 1512.

On the other hand, when the detection data detected during the (N-2) line period is "1", (N-1)
The inverted value of the detected data detected during the line period is stored in the least significant bit of the X coordinate latch (1) 1512, and the inverted value of the detected data detected during the N line period is stored in the X coordinate latch (1) 1512. When the detection data stored in the lower 2nd bit and detected in the N line period is '0', a value obtained by inverting the detection data detected in the (N + 1) line period is further added to the X coordinate latch (1 ) Store in the least significant bit of 1512. If the detection data detected in the N line period is '1', the X coordinate latch (1) 1512 of the detection data detected in the (N + 1) line period is obtained.
Is not remembered.

By the above operation, all the bits of the X coordinate can be detected.

As shown in FIG. 21, when the voltage pattern applied to the X electrodes is used in the X coordinate detection operation of the display device according to the second embodiment, the same as in the third embodiment. , It can be used with a thick pen. In this case, the data conversion circuit (FIG. 14, 1801) described in the second embodiment is provided in place of the selector of the coordinate detection circuit 111 according to the third embodiment shown in FIG. 17, and this data conversion circuit 1801 is provided. The same operation as in the second embodiment may be performed, except that the same conversion is performed during the period from the (N-1) line to the (N + 1) line.

The fourth embodiment of the display device according to the present invention will be described below.

FIG. 22 shows the configuration of the display device according to the third embodiment.

In the figure, reference numeral 2401 denotes a liquid crystal panel, which is a vertically divided liquid crystal panel in which X electrodes x0, x1, ..., Xm-1 are vertically separated in the middle of the panel. 24
Reference numeral 02 denotes a Y electrode drive circuit, which is used for Y electrodes y0 to yn / 2.
-1 drives the upper screen of the liquid crystal panel 2401, and the Y electrodes yn / 2 to yn-1 drive the lower screen of the liquid crystal panel 2401. Therefore, the Y electrodes y0 and yn / 2 are applied with voltage at the same time to operate so as to perform display. Two
Reference numeral 403 is an X electrode drive circuit for the upper screen of the liquid crystal panel 2401, and 2404 is an X electrode drive circuit for the lower screen of the liquid crystal panel 2401.

Further, 2405 is a display data bus for transferring display data for the upper screen of the liquid crystal panel 2401, and 2406 is a display data bus for transferring display data for the lower screen of the liquid crystal panel 2401. Reference numeral 2407 is a coordinate detection circuit, and 2408 and 2409 are data buses for transferring coordinate detection data. 2410, 241
Reference numeral 1 is a selector, 2412 is a liquid crystal display data bus for transferring data for the upper screen, and 2413 is a liquid crystal display data bus for transferring data for the lower screen.

Next, FIG. 23 shows the configuration of the coordinate detection circuit 2407.

In the figure, reference numeral 2701 is a scanning register, which stores a value of 1/2 of the number of vertical scanning lines of the liquid crystal panel 2401. In the fourth embodiment, since the number of vertical scanning lines is n, n / 2 is stored. 2702 is
A data bus for transferring the data output from the scan register 2702, and an adder circuit 2703. Reference numeral 2704 is a data bus for transferring the addition result of the addition circuit.
Reference numeral 05 is a Y coordinate latch. Reference numeral 2706 is a data bus for transferring the data latched by the Y coordinate latch.
Reference numeral 7 is a selector, and 2708 is a data bus for transferring the Y coordinate value selected by the selector 2707. 270
Reference numerals 9 and 2710 denote selectors, each of which is an X electrode drive circuit 2
Detection data for detecting the X coordinate is selected in 403 and 2404.

The other parts are the same as those in the coordinate detecting circuit 11 according to the first embodiment shown in FIG.
The description is omitted because it is the same part as No. 1.

Now, as shown in FIG. 22, in the fourth embodiment collar, unlike the above-mentioned respective embodiments, as the liquid crystal panel, the upper screen and the lower screen have different X electrode drive circuits 2403.
And a liquid crystal panel 2401 driven by 2404.

When such a liquid crystal panel is used, since the Y electrode drive circuit 2403 drives the upper and lower screens at the same time, a voltage is simultaneously applied to the upper screen, the Y electrode, and the two Y electrodes of the corresponding Y electrodes of the lower screen. To operate. That is, as shown schematically in FIG.
Since the voltage is applied to the electrodes, when the voltage is detected by the pen 104 in the Y coordinate detection operation, the two Y electrodes to which the voltage is applied at that time are
It is necessary to determine which side the pen 104 is in contact with.

Therefore, in the fourth embodiment, in the X coordinate detecting operation, first, the liquid crystal panel 240 in the first line period.
The voltage is applied to all X electrodes on the upper screen of No. 1. Thus, when the pen 104 is on the upper screen side, the pen 104 can detect the voltage, and thus it can be determined whether the pen 104 is in contact with the upper screen side. If the pen 104 is on the lower screen,
Since the pen 104 cannot detect the voltage, it can be seen that the pen 104 is in contact with the lower screen side.

That is, the Y-coordinate is detected by the Y-coordinate detection operation during the display period, and the most significant bit of the Y-coordinate is obtained during the first line period of the non-display period. Is detected. Note that, as shown in FIG. 25, the X-coordinate is detected by the same pattern as that described in the first, second, and third embodiments, and the upper screen in contact with the pen 104, or It is performed by applying a voltage to the X electrode on the lower screen and detecting this. FIG. 25 shows the case where a voltage is applied by the same pattern as in the first embodiment.

That is, in the X first line period of the non-display period, a voltage is applied to the Y electrodes y0 and yn / 2, and in the second line period, a voltage is applied to the Y electrodes y1 and yn / 2 + 1. And the voltage is applied to the Y electrodes yn / 2-2 and yn-2 in the (n / 2−1) th line period.
In the n / 2-th line period, Y electrodes yn / 2-1 and yn-
A voltage was applied to 1.

The coordinate detection circuit 2407 (see FIG. 23) carries out the application of such a pattern voltage and the detection of the Y coordinate.

That is, first, during the Y coordinate detection operation, when "1" is detected as the detection data of 107, the Y coordinate latch 1503 and the Y coordinate latch 2 of the coordinate detection circuit 2407 are detected.
The Y coordinate value is latched in 705. Y coordinate latch 150
3 stores the value of the vertical counter 1501, and the Y coordinate latch 2705 stores the count value of the vertical counter 1501 in the scan register 2701.
The value obtained by adding the half value of the vertical resolution of 401 by the adding circuit in 2703 is stored.

As a result, the value of the Y electrode of the upper screen of the two Y electrodes to which the voltage is applied when the voltage is detected by the pen 104 is stored in the Y coordinate latch 1503, and the Y electrode of the lower screen is displayed. The electrode value is stored in the Y coordinate latch 2705.

Next, when the Y coordinate detecting operation is completed and the operation moves to the X coordinate detecting operation, the decoder 1505 is operated during the first line period.
The selector 2709 outputs the value “1”, and the selector 2710 outputs the value “0” according to the output of the above. As a result,
This means that the voltage application pattern of the first line period shown in 6 is realized.

During the first line period, the obtained detection data is stored in the latch 2711. If the value of this detection data is "1", it means that the pen 104 is in contact with the upper screen side, and if the value is "0", it means that the pen 104 is in contact with the lower screen side. ing.

After the second line period, this latch 2711
2709 and 2710 depending on the output of
Among them, the selector corresponding to the screen to which the pen is not touched outputs the value “0”. The other selector operates in the same manner as in the first line period and thereafter similar to the first embodiment. As a result, the X coordinate is stored in the X coordinate latch (2) in the same manner as described in the first embodiment.

In response to the output of the latch 2711, the selector 2708 selects the output of the Y coordinate latch 1503 if the pen 104 is in contact with the upper screen side, and the pen 104
Is touching the lower screen side, the output of the Y coordinate latch 2705 is selected.

Therefore, even if the liquid crystal panel 2401 is of a type in which the screen is divided into upper and lower parts, the external system uses the pen 104 through the interface circuit 1518.
It is possible to access the X and Y coordinate values of the position touched by.

By the way, in the X electrode voltage application pattern shown in FIG. 12 described in the first and fourth embodiments, the voltage for which "1" should be detected as the detection voltage correction data is continuously applied to a plurality of lines. The X coordinate of the X electrode to be input is input to the detection voltage correction circuit 106 as the number of X electrodes included in each of the region to which the selection voltage is applied and the region to which the non-selection voltage is applied decreases. In some cases, the peak of the applied voltage drops like the (N-3) th line onward shown in FIG.

In this case, since the detected voltage becomes equal to or lower than the threshold voltage Vth in the line period in which the voltage application pattern in which the number of X electrodes in each area is small is applied, the detected voltage correction data which should actually be '1'. Becomes "0", and the correct X coordinate value cannot be detected. Further, when the number of X electrodes in each region of the voltage application pattern becomes small, the detected voltage of the X coordinate may be easily affected by the voltage of the adjacent region. In this case, for example, the pen 104 has an X coordinate value of 2
If it is in contact with the X electrode x4 that is 0 ... 0100 in the decimal notation, a voltage application pattern in which the number of X electrodes in one region is small is applied as in the (N-1) th line and subsequent lines shown in FIG. In the line period, the detection voltage for actually detecting the non-selection voltage is affected by the selection voltage in the adjacent region and becomes a voltage level higher than Vth. Therefore, the detected voltage correction data of the lower 2 bits which is actually "0" becomes "1", and the correct X coordinate value cannot be detected.

As a fifth embodiment of the present invention, a display device capable of solving such a problem will be described below.

Here, the minimum value of the number of X electrodes in each area that can detect the correct X coordinate will be described as Xmin.

In the fifth embodiment, the detection accuracy is improved by making the voltage application pattern applied after the line period in which the voltage application pattern having this minimum X electrode number is applied different from that of the previous embodiment. . That is, the voltage application pattern having the minimum X electrode number Xmin is horizontally shifted by an arbitrary value from 1 to (Xmin-1) after the line period in which the pattern is applied (Xmin-
1) The voltage application patterns are sequentially applied every one line period to detect the applied voltage, and the detected value is calculated,
X in a region having a width corresponding to the minimum number X of electrodes Xmin
Determine the coordinate value (lower bit of the X coordinate). By doing so, the correct coordinate value of the lower bit of the contact position of the pen 104 can be obtained by the combination of "1" and "0" of the detected data. The details will be described below.

The display device according to the fifth embodiment is
Only the X-coordinate detection operation and the configuration of the coordinate detection circuit 111 differ from the display device of the first embodiment described above.

Now, in the following, the resolution of the liquid crystal panel 101 is 640 dots × 480 lines, and the minimum number X of electrodes Xmin of the voltage application pattern that can detect the correct X coordinate is 4.
As described below.

FIG. 28 shows the structure of a display device according to the fifth embodiment.

In the figure, reference numeral 3301 denotes a coordinate detection circuit according to the fifth embodiment.

FIG. 29 shows the coordinate detection circuit 3 of this embodiment.
The structure of 301 is shown.

In FIG. 29, 3401 is a 9-bit vertical counter, 3402 is a coordinate data generation circuit for generating coordinate data from the data stored in the X coordinate latch (1) 1512, and 3403 is coordinate data generation. Circuit 3
A data bus for transferring the coordinate data output by 402. 3404 indicates X from the output signal of the horizontal counter 1507.
Data indicating the voltage pattern applied to the electrodes (hereinafter,
This is a data generation circuit for generating “scan data”). The other parts are the same as the parts indicated by the same reference numerals in FIG.

The data generation circuit 3404 is composed of a logical operation element, and is an output signal from the most significant bit output Dh1 to the eighth bit output Dh8 of the 10-bit horizontal counter 1507 transferred via the data bus 1508. Is transferred to the selector 1509 via the signal bus 1508 as scan data in the first line period to the eighth line period without being converted. Therefore, the voltage application pattern shown in FIG. 12 is applied to the X electrodes from the first line period of the first embodiment to the eighth line period in which the number of X electrodes included in one region is 4, which is Xmin. The scan data will be transferred to the selector 1509.

Further, the data generation circuit 3404 generates the scan data shown in FIG. 30 and transfers it to the selector 1509 in the line period after the number of X electrodes included in one region becomes Xmin which is the number 4. To do.

In FIG. 30, Dh10, Dh9, and Dh8 represent output signals of the least significant bit (10th bit), 9th bit, and 8th bit of the horizontal counter 1507, respectively.

That is, as shown in the figure, the data generation circuit 3405 calculates Dh8 and the ninth bit output Dh9 in the ninth line period, and calculates from the voltage application pattern of four X electrodes displayed in the eighth line period. X shifted by 2 electrodes
Scan data is generated so that a voltage application pattern with four electrodes is applied. In the fifth embodiment, the shift is made to the right. Similarly, in the 10th line and 11th line periods, Dh8, Dh9, and the 10th bit output Dh10 are calculated, and each electrode is shifted to the left and right from the voltage application pattern in the 9th line period by X. Scan data is generated so that a voltage application pattern with four electrodes is applied. In the fifth embodiment, the tenth line, the eleventh line
In the line period, the voltage application pattern in the ninth line period is shifted rightward and leftward, respectively.

On the other hand, when the vertical counter 3401 is "0", the decoder 1503 outputs the scan data of the first line period output from the data conversion circuit 3404 to the data bus 1
The selector 1509 is controlled to output to the X electrode drive circuit 103 via 17, and the vertical counter 3401 sets “1”.
In the case of, the selector 1509 is similarly controlled to output the scan data of the second line period. Less than,
Similarly, the selector 1509 is controlled to sequentially output the scan data in the third line period to the eleventh line period, and the scan data in all line periods are sequentially output to the X electrode drive circuit 103.

Next, the X coordinate detection operation when the pen 104 is in contact with the X electrode x3 will be described. In this case, the X coordinate value is represented by a binary number of "0000000011".
Becomes

In FIG. 31, the pen 104 indicates the X electrode x3 whose X coordinate value is 0 ... 011 in binary notation,
The voltage waveform input to the detection voltage correction circuit 106 when the voltage is applied in the pattern shown in FIG. 30, the output value of the detection voltage correction circuit 106, and the X coordinate latch (1) 1512
Detection data stored in the coordinate data generation circuit 340
2 shows coordinate data output by No. 2.

As described above, the detection voltage correction data for 11 lines is the same as that in the first embodiment, and the signal line 1
The data is sequentially fetched as detection data into the X coordinate latch (1) 1512 via 07. X coordinate latch (1) 1512
As shown in FIG. 31, "0" is taken in from the most significant bit (first bit) to the eighth bit, and "0" is taken in from the ninth bit to the eleventh bit.
1'is taken in. The detection data captured in the X coordinate latch (1) 1512 is transferred to the coordinate data generation circuit 3402 via the signal bus 1513.

In the coordinate data generation circuit 3402, the detection data transferred from the most significant bit to the eighth bit of the X coordinate latch (1) 1512 is transferred to the data bus 3403 as the coordinate data as it is. Also, the 8th bit and the 9th bit of the X coordinate latch (1) 1512
The detection data of the bit is operated to generate the coordinate data of the 9th bit of the X coordinate. Similarly, the 10th bit and 11th bit detection data of the X coordinate latch (1) 1512 and the 9th bit coordinate data of the X coordinate generated by the coordinate data generation circuit 3402 are calculated, and the X coordinate is calculated. The coordinate data of the 10th bit of is generated. In the fifth embodiment, the portion of the coordinate data generation circuit 3402 that performs such an operation is composed of an EOR element. That is, X
The exclusive OR of the 8th bit and the 9th bit detection data of the coordinate latch (1) 1512 is used as the coordinate data of the 9th bit of the X coordinate, and the 9th bit of the X coordinate and the X coordinate latch (1 ) The exclusive OR of any two exclusive ORs of the 10th and 11th bits of 1512 and the remaining one is the 10th bit.

The generated coordinate data of the 9th bit and the 10th bit of the X coordinate are also from the 1st bit to the 8th bit of the X coordinate.
It is output to the data bus 3403 similarly to the coordinate data of the bit. As a result, the X coordinate latch (2) 1514 is loaded with 10-bit X coordinate data.

Other operations of the coordinate detecting circuit 3301 are the same as those in the first embodiment.

By the above operation, the external system can access the detected X and Y coordinate values through the interface circuit 1518 and the data bus 119 as in the first embodiment.

The X electrode in contact with the pen 104 is x
In cases other than 3, the X-coordinate value can be obtained by similarly calculating the detected voltage correction data. The coordinate detecting circuit 3301 of the fifth embodiment, correctly, but the detection of the X coordinate is the minimum X a number of electrodes 4 was the circuit configuration allows a minimum X number of electrodes is from 2 ⁰ 2 N-th power Vertical counter 3401, decoder 150 for any value up to
3, data generation circuit 3404, selector 1509, AN
This can be dealt with by modifying the configurations of the D circuit 1510, the X coordinate latch (1) 1512, and the coordinate data generation circuit 3402 so as to match them.

Also, regarding the above-mentioned fourth embodiment,
Similarly, X coordinate detection can be performed using a voltage application pattern having a minimum X electrode number greater than one.

By the way, in each of the embodiments described above, as shown in FIG. 32, the pen 104 and the liquid crystal panel 1 are used.
The detected voltage waveform of the X coordinate input to the detected voltage correction circuit 106 may be a differential waveform depending on the capacity of 01 or the CL1 clock cycle. In the first to fifth embodiments, the detected voltage correction data is fetched into the X coordinate latch (1) using the CL1 clock. However, when the detected voltage waveform is a differential waveform, the correction data '1' width Becomes smaller,
If the number of X electrodes included in each of the region to which the selection voltage is applied and the region to which the non-selection voltage is applied is small, a correct value may not be detected. Further, when the polarities of the detection voltages are the same, such as when performing frame alternating current, when the selection voltage that continuously becomes '1' is detected, the voltage change is small, so the voltage peak drops and is lower than Vth. It may be a voltage level. In this case, the detected voltage correction data, which is actually "1", becomes "0", so that correct X coordinate detection cannot be performed.

Therefore, as a sixth embodiment of the present invention, a display device capable of solving such a problem will be described.

In the sixth embodiment, the configuration of the coordinate detecting circuit 111 shown in FIG. 5 described in the first embodiment is adopted so that correct data can be taken in even when the correction data has a narrow "1" width. Fixed.

Further, in the sixth embodiment, in order to prevent the voltage peak drop of the above-mentioned detected voltage waveform, the voltage application pattern shown in FIG. 12 described in the first embodiment and all of the horizontal direction are described. The pattern of applying the non-selection voltage to the X electrodes is alternately applied every one line period, and the configuration of the coordinate detection circuit 111 is modified so that the correct X coordinate value is captured. By doing so, even when the polarity of the detection voltage is constant, the voltage applied every one line period becomes a non-selection voltage, so that the voltage change becomes large and correct coordinate detection can be performed.

Now, the minimum value of the number of X electrodes (minimum number of X electrodes) included in each of the region to which the selection voltage is applied and the region to which the non-selection voltage is applied, in which the correct X coordinate can be detected. Will be described as being 8 or more.

FIG. 33 is a block diagram of the display device of this embodiment, and 3801 is the coordinate detection circuit modified in the sixth embodiment.

FIG. 34 shows the structure of the coordinate detecting circuit 3801 according to the sixth embodiment.

In the figure, reference numeral 3901 denotes a register, and the minimum X
The timing of applying the voltage application pattern of the number of electrodes is stored. Reference numeral 3902 is a signal bus for transferring the timing signal output from the register 3901. Reference numeral 3903 denotes a clock control circuit that generates a counter clock and a mask signal from the CL1 clock and the timing signal output from the register 3901. Reference numerals 3904 and 3905 denote signal lines for transferring the counter clock and mask signal generated by the clock control circuit 3903, respectively. 3906 is a selector 1509
Is a data bus for transferring the scan data output by, and 3907 is a mask circuit for masking the scan data according to the mask signal output by the clock control circuit 3903. Reference numeral 3908 denotes an AND circuit configured by an AND element that generates a latch clock from the detected voltage correction data transferred via the signal line 107 and the decode signal generated by the decoder 1505. Reference numeral 3909 denotes a signal that transfers the latch clock. It's a bus. Reference numeral 3910 is an X coordinate latch (1) that fetches data in accordance with the latch clock generated by the AND circuit 3908.

In the sixth embodiment, since the minimum number of X electrodes of the voltage application pattern that can correctly detect the X coordinate is 8, the coordinate detection circuit 3801 can change from the first line period to the first line period as shown in FIG. Until the (N-3) th line period in which the number of X electrodes becomes eight, scan data is output so as to apply the same voltage application pattern as in the first embodiment. Then, in the (N−2) th line period to the (N + 2) th line period, the same voltage pattern of X electrode numbers 4, 2, and 1 of the first embodiment and a pattern for applying only the non-selection voltage (white The scan data for alternately displaying the (line display pattern) every one line period is generated.

The operation of the coordinate detection circuit 3801 will be described below.

FIG. 36 shows the operation timing of the coordinate detection circuit 3801.

In the register 3901, a value designating the timing corresponding to the (N-2) th line period in which the number of X electrodes of the voltage application pattern becomes 4 is set in advance. In the clock control circuit 3903, as a counter clock to be transferred to the vertical counter 1501, as shown in FIG.
According to the timing signal output from the register 3901, the CL1 clock is output before the timing setting value, and when the timing setting value is reached, the CL1 clock is divided and output. Therefore, the vertical counter 1501 counts every horizontal cycle before the timing setting value, and counts twice the horizontal cycle after the setting value. That is, after the timing of the set value set in the register 3901, the output period of the scan data instructing the voltage application pattern in each line period becomes two horizontal periods. Therefore, the decoder 1503 sequentially selects the output of the horizontal counter 1507 from the most significant bit for each horizontal cycle before the timing setting value, and outputs the bits of the horizontal counter 1507 for every two horizontal cycles after the timing setting value. The selector 1509 is controlled so as to switch.

The mask circuit 3907 outputs the mask signal
When it is 1 ', the scan data output from the selector 1509 is output, and when it is'0','0' is output. As shown in FIG. 36, the mask signal is set to “1” before the timing set value of the register 3901 as shown in FIG.
1 ', the CL1 divided clock is generated after the set value, so the selector 15 is set after the timing set value.
Of the two horizontal cycles in which the scan data is selected in 09, the first half horizontal cycle in which the CL1 divided clock is “1” outputs the scan data output by the selector 1509, and the CL1 divided clock is set to “0”. '0' will be output in the remaining 1 horizontal period which is'. Therefore, FIG.
As shown in FIG. 5, the number of X electrodes is 4, 2 every 1 line period,
The voltage application pattern of 1 and the white line corresponding to '0' are displayed alternately.

Next, the X when the coordinates of the X electrode in contact with the pen 104 are '101 ... 11' in binary notation.
The coordinate detection operation will be described.

The output of the AND circuit 3908 is the decoder 1
The decode signal output by 505 and the detected voltage correction data transferred via the voltage line 107 are calculated, and the value is "1" only when the decoded signal is valid and the detected voltage correction data is "1". The latch clock N is generated from the latch clock 1 and is transferred to the X coordinate latch (1) 3910 via the signal bus 3909. Therefore, FIG.
As shown in (1), since the detected voltage correction data becomes “1” in the first line period and the third to Nth line periods, the latch clock 1 corresponds to the latch clock 3 to the latch clock N. It becomes "1" in each line period, and the detected voltage correction data becomes "1" in the second line period.
Since it becomes 0 ', the latch clock 2 does not become' 1 '.

In the X coordinate latch (1) 3910, data is cleared in all the latches during the display period and becomes "0".
Also, "1" is given as data in the non-display period.
When the latch clock becomes “1”, the given “1” is taken into the bit corresponding to the vertical counter 1501. Therefore, the most significant bit where the latch clock becomes "1" and "1" is taken in from the third bit to the Nth bit, and the second bit where the latch clock does not become "1" is "0". Up to now, X coordinate latch (1) 39
This means that the coordinate data '101 ... 1'corresponding to the X coordinate value with which the pen 104 is in contact is stored in 10. X
When all the coordinate data is fetched in the coordinate latch (1) 3910, all the data stored in the X coordinate latch (1) 3910 is stored in the corresponding bits of the X coordinate latch (2) 1514 via the data bus 1513. Is captured.

Other operations of the coordinate detection circuit 3801 are the same as those in the first embodiment.

With the above operation, the external system can access the detected X and Y coordinate values via the interface circuit 1518 and the data bus 119 as in the first embodiment.

Even when the X coordinate value with which the pen 104 is in contact is not the above example, the X coordinate can be similarly detected. Further, in the sixth embodiment, the case where the minimum number of X electrodes that can correctly detect the X coordinate is 8 has been described, but the minimum number of X electrodes is 2 to 2
Any value up to the Nth power can be dealt with by changing the set value of the register 3901.

The sixth embodiment can be applied to the second to fifth embodiments to detect the coordinates.

The display device described in each of the above embodiments can be used, for example, in a device as shown in FIG.

Reference numeral 104 is a pen, and the housing 2801 has a
In addition to the liquid crystal panel 101 (2401), the previously described X and Y electrode drive circuit, coordinate detection circuit, and the like are incorporated. Reference numeral 2802 denotes an interface signal line, which is a data bus 108 (2400, 240) for inputting display data.
5) A signal bus 109 for inputting a synchronizing signal and a data bus 119 for outputting coordinate data are included. Well, Figure 3
The device shown in FIG. 7 is connected to an external system such as a personal computer by an interface signal line 2802. Then, the display according to the display data sent from the personal computer or the like is displayed on the liquid crystal panel 101 (2
401). In addition, as described above, the personal computer or the like is connected to the pen 10 via the data bus 119.
The contact coordinates of 4 are fetched from the display device.

Further, the display device according to each of the embodiments described above and the external system may be configured as an integrated device.

Therefore, a pen input type computer in which the display device according to each of the embodiments and the external system are integrally formed will be described below.

FIG. 38 shows such a pen input type computer.
FIG. 39 shows the external appearance of the computer, and FIG. 39 shows the configuration of the pen input type computer.

As shown in FIG. 38, the present apparatus has a notebook type casing 3000 with a liquid crystal panel 101 (2401) incorporated therein. In addition to a drive circuit, a coordinate detection circuit, and the like, a CPU that executes a program and the like are incorporated. That is, as shown in FIG. 39, the present apparatus has a built-in CPU 2901, a main memory 2902, a display controller 2904, a display memory 2906, etc. in addition to the display apparatus 2900 according to each of the above-described embodiments.

The CPU 2901 has a main memory 2903.
Run the program stored in
Display data is displayed in the display memory 2906 Controller 2
Write 904. The display data written in the display memory 2906 is sent by the display controller 2904 to the display device 2900 via the read data bus 108 (2400, 2405). The display controller 2904 also sends a synchronization signal to the display device 2900 via the signal bus 109.

The display device 2900 uses the received display data and the synchronization signal to display the graphic, characters, etc. designated by the display data on the liquid crystal panel 101 (240).
Display in 1).

Now, for example, in the state where the icon 2908 is displayed on the liquid crystal panel 101 by the display data, the CPU 2901 periodically, for example, the X,
By taking in the Y coordinate via the data bus 119, the contact position of the pen 104 is monitored, and when the contact position of the pen 104 overlaps with the icon, processing according to the icon is performed.

The embodiments of the display device according to the present invention have been described above. In the above embodiments, the case where a simple matrix type liquid crystal display having no switching element in the pixel portion is used as the liquid crystal panel has been described as an example. However, as the liquid crystal panel, an active matrix having a switching element in the pixel portion is used. Type liquid crystal displays (STN, GH, ferroelectric type, etc.) can also be used in the same manner.
L (Electro-Luminescence) system and PDP (Plasma-Display-pane)
The same can be realized by using the l) type flat display. That is, only when the selection voltage is simultaneously applied to the corresponding X electrode and Y electrode,
As long as the display device has elements in a display state arranged in a matrix, the above-mentioned respective embodiments can be similarly applied.

As described above, according to each embodiment of the display device of the present invention, the coordinate position of the display screen with which the pen is in contact can be easily detected by using the drive electrode of the liquid crystal panel. Since it is not necessary to provide a new tablet or the like for coordinate detection and it is not necessary to newly develop an X electrode drive circuit, the display device can be inexpensively constructed.

Further, in the X coordinate detecting operation, since the time for applying the voltage to the X electrode can be sufficiently taken, the high speed operation is not required and the power consumption can be reduced.

Furthermore, since the display device can recognize whether the pen is in contact or not, the system does not detect an incorrect coordinate value.

Further, there is an effect that the coordinate value can be surely detected regardless of the thickness of the pen.

Furthermore, various liquid crystal displays can be easily used as tablets.

Further, in the X coordinate detection operation, by changing the voltage application pattern for X coordinate detection and the configuration of the coordinate detection circuit, it is possible to prevent the voltage peak of the detection voltage waveform from dropping and detect the correct coordinate value. There is an effect that can be done.

Further, in the X coordinate detection operation, even when the detected voltage waveform is a differential waveform, it is possible to prevent the voltage peak of the detected voltage waveform from dropping and to correctly capture the detected data. Can be detected.

[0208]

As described above, according to the present invention, it is possible to provide a display device capable of more efficiently detecting the X coordinate.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a display device according to a first exemplary embodiment of the present invention.

FIG. 2 is a block diagram showing the configuration of the pen according to the first embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a detection voltage correction circuit according to the first embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of an X electrode drive circuit according to the first embodiment of the present invention.

FIG. 5 is a block diagram showing the configuration of a coordinate detection circuit according to the first embodiment of the present invention.

FIG. 6 is a timing chart showing the timing of data transfer in the display device according to the first embodiment of the present invention.
It is

FIG. 7 is a timing chart showing a selection voltage application timing in the display device according to the first exemplary embodiment of the present invention.
It is

FIG. 8 is a timing chart showing the operation of the pen according to the first embodiment of the present invention.

FIG. 9 is a timing chart showing the operation of the X electrode drive circuit according to the first embodiment of the present invention.

FIG. 10 is an explanatory view schematically showing a selection voltage application pattern to the Y electrodes in the display device according to the first embodiment of the present invention.

FIG. 11 is a timing chart showing Y electrode voltage detection timing in the display device according to the first exemplary embodiment of the present invention.

FIG. 12 is an explanatory view schematically showing a selection voltage application pattern to the X electrodes in the display device according to the first embodiment of the present invention.

FIG. 13 is a timing chart showing the X electrode voltage detection timing in the display device according to the first exemplary embodiment of the present invention.

FIG. 14 is a block diagram showing a configuration of a coordinate detection circuit according to a second embodiment of the present invention.

FIG. 15 is an explanatory view schematically showing a selection voltage application pattern to the X electrodes in the display device according to the second embodiment of the present invention.

FIG. 16 is a timing chart showing an X electrode voltage detection timing in the display device according to the second exemplary embodiment of the present invention.

FIG. 17 is a block diagram showing a configuration of a coordinate detection circuit according to a third embodiment of the present invention.

FIG. 18 is an explanatory view schematically showing a selection voltage applying pattern to the Y electrodes in the display device according to the third embodiment of the present invention.

FIG. 19 is a timing chart showing the Y electrode voltage detection timing in the display device according to the third embodiment of the present invention.

FIG. 20 is an explanatory diagram schematically showing a first selection voltage applying pattern to the X electrodes in the display device according to the third embodiment of the present invention.

FIG. 21 is an explanatory view schematically showing a second selection voltage applying pattern to the X electrodes in the display device according to the third embodiment of the present invention.

FIG. 22 is a block diagram showing a configuration of a display device according to a fourth exemplary embodiment of the present invention.

FIG. 23 is a block diagram showing a configuration of a coordinate detection circuit according to a fourth embodiment of the present invention.

FIG. 24 is an explanatory diagram schematically showing a pattern for applying a selection voltage to the Y electrodes in the display device according to the fourth example of the present invention.

FIG. 25 is an explanatory diagram schematically showing a selection voltage applying pattern to the X electrodes in the display device according to the fourth embodiment of the present invention.

FIG. 26 is a diagram showing an X coordinate detection error due to a drop in detection voltage.

FIG. 27 is a diagram showing an X coordinate detection error caused by a drive voltage of an adjacent X electrode.

FIG. 28 is a block diagram showing a configuration of a display device according to a fifth exemplary embodiment of the present invention.

FIG. 29 is a block diagram showing a configuration of a coordinate detection circuit according to a fifth embodiment of the present invention.

FIG. 30 is an explanatory diagram schematically showing a selection voltage application pattern to the X electrodes in the display device according to the fifth embodiment of the present invention.

FIG. 31 is a timing chart showing the X electrode voltage detection timing in the display device according to the fifth example of the present invention.

FIG. 32 is a diagram showing an X coordinate detection error due to differential waveform formation of a detection voltage.

FIG. 33 is a block diagram showing a configuration of a display device according to a sixth exemplary embodiment of the present invention.

FIG. 34 is a block diagram showing a configuration of a coordinate detection circuit according to a sixth embodiment of the present invention.

FIG. 35 is an explanatory diagram schematically showing a selection voltage applying pattern to the X electrodes in the display device according to the sixth embodiment of the present invention.

FIG. 36 is a timing chart showing the X electrode voltage detection timing in the display device according to the sixth embodiment of the present invention.

FIG. 37 is an explanatory diagram showing an appearance of a display device according to an example of the present invention.

FIG. 38 is an explanatory diagram showing the external appearance of a pen input type computer configured using the display device according to the example of the present invention.

FIG. 39 is a block diagram showing a configuration of a pen input type computer configured using the display device according to the example of the present invention.

FIG. 40 is an explanatory diagram showing a configuration of a conventional display device.

FIG. 41 is a timing chart showing a selection voltage application timing in a conventional display device.

[Explanation of symbols]

 101 liquid crystal panel 102 Y electrode drive circuit 103 X electrode drive circuit 104 pen 106 detection voltage correction circuit 110 control clock generation circuit 111 coordinate detection circuit 112 selector 120 power supply circuit

Front page continuation (72) Inventor ▲ Shin ▼ Hiroyuki Nono 1099 Ozenji, Aso-ku, Kawasaki-shi, Kanagawa Hitachi, Ltd. System Development Laboratory (72) Inventor Shigeyuki Nishitani 1099 Ozenji, Aso-ku, Kawasaki-shi, Kanagawa Hitachi, Ltd. Manufacturing Systems Development Laboratory (72) Inventor Isao Takita 1099 Ozenji, Aso-ku, Kawasaki-shi, Kanagawa Stock Company Hitachi Systems Development Laboratory (72) Inventor Satoru Tsunekawa 5-20-1 Kamimizumoto-cho, Kodaira-shi, Tokyo Ceremony Company Hitachi Ltd. Semiconductor Division (72) Inventor Tatsuzo Hamada 810 Shimoimaizumi, Ebina, Kanagawa Stock Company Hitachi Ltd. Office System Division (72) Inventor Masaaki Kitajima 7-1, 1-1 Omikacho, Hitachi City, Ibaraki Prefecture Hitachi, Ltd., Hitachi, Ltd. (72) Tetsuya Suzuki, 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Prefecture

Claims (22)

[Claims] 1. M × arranged in a matrix of M rows and N columns.
N display elements, M Y electrodes connected to each row of the display elements, and N connected to each column of the display elements.
A flat display provided with X electrodes, and a detector for detecting, via capacitive coupling, a voltage pulse applied to the columns and rows corresponding to positions on the display surface of the flat display which are in contact with each other. Further, each display pixel of the flat display is a display device which is in a display state when a predetermined voltage is applied to both the Y electrode and the X electrode to be connected, and during the display period, A Y electrode drive circuit for applying a voltage pulse to the Y electrodes in the order of rows, and a voltage pulse application pattern specified by a given data string.
And an X electrode drive circuit that applies a voltage pulse to the N X electrodes, and displays on the N display elements in the row to which the voltage pulse is applied to the previous X electrode drive circuit during the display period. A means for supplying a data string designating a voltage pulse application pattern corresponding to a display pattern and L different voltage pulse application patterns are designated to the X drive circuit during a non-display period. Means for sequentially supplying L data strings, and a position where the detector is in contact with the Y electrode applying the voltage pulse at the time when the detector detects the voltage pulse during the display period. Y-coordinate detection means for determining the Y-coordinate of the X-axis, and the N X-axis according to the L data strings during the non-display period.
With respect to each of the L voltage pulse application patterns applied to the electrodes, the detector comes into contact according to L detection values indicating whether or not the detector detects a voltage pulse. X-coordinate detection means for determining the X-coordinate of the current position, and the L number of voltage pulse application patterns are different from each other at any arbitrary H from 1 to H (where H≤L). For each value k, the N X electrodes are equally divided into 2 × k regions according to the arrangement of the X electrodes, and every other region among the divided regions exists in the direction of the arrangement of the X electrodes. A display device including H voltage application patterns for applying a voltage pulse to the X electrodes belonging to the above. 2. The display device according to claim 1, wherein H = L = log ₂ N, and the L voltage pulse application patterns are from 1 to log ₂
For each arbitrary log ₂ N number of values k up to N, the N X electrodes are equally divided into 2 × k regions according to the arrangement of X electrodes, and X of each divided region is divided.
A display device comprising log ₂ N voltage application patterns for applying a voltage pulse to X electrodes belonging to regions that are present in every other electrode arrangement direction. 3. M × arranged in a matrix of M rows and N columns.
N display elements, M Y electrodes connected to each row of the display elements, and N connected to each column of the display elements.
A flat display provided with X electrodes, and a detector for detecting, via capacitive coupling, a voltage pulse applied to the columns and rows corresponding to positions on the display surface of the flat display which are in contact with each other. Further, each display pixel of the flat display is a display device which is in a display state when a predetermined voltage is applied to both the Y electrode and the X electrode to be connected, and during the display period, A Y electrode drive circuit for applying a voltage pulse to the Y electrodes in the order of rows, and a voltage pulse application pattern specified by a given data string.
And an X electrode drive circuit that applies a voltage pulse to the N X electrodes, and displays on the N display elements in the row to which the voltage pulse is applied to the previous X electrode drive circuit during the display period. A means for supplying a data string designating a voltage pulse application pattern corresponding to a display pattern, and L different voltage pulse application patterns sequentially to the X drive circuit during a non-display period. And a means for supplying a data string designating Y, at a position where the detector is in contact according to the Y electrode applying the voltage pulse at the time when the detector detects the voltage pulse during the display period. Y-coordinate detection means for determining the coordinates, and the N X-values corresponding to the L data strings during the non-display period.
For each of the L voltage pulse application patterns applied to the electrodes, the range of the X electrode in contact with the detector is sequentially determined according to whether or not the detector detects the voltage pulse. And X coordinate detecting means for determining the X coordinate of the position where the detector is in contact by making a determination, and the L voltage pulse application patterns include the N X electrodes. According to the arrangement of the X electrodes, it is equally divided into two regions, and one voltage application pattern for applying a voltage pulse to the X electrode belonging to one of the two divided regions, and from 2 to H in sequence. While increasing the value k by 1 until (H ≦ L), the range in which it is determined that the pen is in contact with the previous detection of the voltage application pattern is determined according to the arrangement of the X electrodes. It is divided into two areas and belongs to one of the two divided areas. That X electrodes H-1 single voltage application applying a voltage pulse to the pattern - the emissions, H-number of voltage application pattern - a display device which comprises a down. 4. The display device according to claim 3, wherein H = L = log ₂ N, and the L voltage pulse application patterns are sequentially arranged from 2 to l.
The range in which the pen is determined to be in contact with the previous detection of the voltage application pattern is sequentially divided into two regions according to the arrangement of the X electrodes while increasing the value k by 1 up to og ₂ N. In addition, log ₂ N-1 voltage application patterns for applying a voltage pulse to the X electrode belonging to one of the two divided areas and log ₂ N voltage application patterns are included. A display device characterized by the above. 5. M × arranged in a matrix of M rows and N columns.
N display elements, M Y electrodes connected to each row of the display elements, and N connected to each column of the display elements.
A flat display provided with X electrodes, and a detector for detecting, via capacitive coupling, a voltage pulse applied to the columns and rows corresponding to positions on the display surface of the flat display which are in contact with each other. And each of the display pixels of the flat display is in a display state when a predetermined voltage is applied to both of the connected Y electrode and X electrode, and each of the columns has an A bit A display device to which an X coordinate represented by a binary value is given, wherein a Y electrode drive circuit applies a voltage pulse to the Y electrodes in a row arrangement order during a display period, and a given data string Specified voltage pulse application pattern
And an X electrode drive circuit that applies a voltage pulse to the N X electrodes, and displays on the N display elements in the row to which the voltage pulse is applied to the previous X electrode drive circuit during the display period. A means for supplying a data sequence for designating a voltage pulse application pattern corresponding to a display pattern, and H units from 1 to H (where H ≦ A) to H during the non-display period, respectively. For different arbitrary values j, the value of the upper j-th bit of the given X coordinate is "1".
H voltage pulse application pattern for applying a voltage pulse to only one of the X electrode and the X electrode whose upper j-th bit value of the given X coordinate is “0”. Means for supplying to the X drive circuit a data string designating L voltage pulse application patterns including, and applying a voltage pulse when the detector detects the voltage pulse during the display period. Y coordinate detection means for determining the Y coordinate of the position where the detector is in contact with the corresponding Y electrode, and for each of the H number of values j sequentially during the non-display period, Depending on whether or not the detector detects a voltage pulse with respect to the corresponding voltage pulse application pattern, the upper jth position of the X coordinate of the position where the detector is in contact is detected.
And a X-coordinate detecting means for determining the value of the bit at the bit position. 6. M × arranged in a matrix of M rows and N columns
N display elements, M Y electrodes connected to each row of the display elements, and N connected to each column of the display elements.
A flat display provided with X electrodes, and a detector for detecting, via capacitive coupling, a voltage pulse applied to the columns and rows corresponding to positions on the display surface of the flat display which are in contact with each other. And each of the display pixels of the flat display is in a display state when a predetermined voltage is applied to both of the connected Y electrode and X electrode, and each of the columns has an A bit A display device to which an X coordinate represented by a binary value is given, wherein a Y electrode drive circuit applies a voltage pulse to the Y electrodes in a row arrangement order during a display period, and a given data string Specified voltage pulse application pattern
And an X electrode drive circuit that applies a voltage pulse to the N X electrodes, and displays on the N display elements in the row to which the voltage pulse is applied to the previous X electrode drive circuit during the display period. A means for supplying a data train designating a voltage pulse application pattern corresponding to a display pattern, and H number of 1 to H (where H≤A) to Sequentially during non-display period. The H data strings designating L voltage pulse application patterns including H voltage pulse application patterns corresponding to the respective values j increasing by 1 are represented by the above X
Means for sequentially supplying to the drive circuit, and a Y coordinate of a position where the detector is in contact with the Y electrode applying the voltage pulse at the time when the detector detects the voltage pulse during the display period. The Y-coordinate detecting means for determining and the voltage pulse application pattern corresponding to the value of j for each of the values j sequentially increasing by 1 during the non-display period are detected by the detector. X-coordinate detection means for sequentially determining the value of the upper j-th bit of the X-coordinate of the position where the detector is in contact with the detector. In the voltage pulse application pattern corresponding to, the value of the first high-order bit of the given X coordinate is "1".
A pattern for applying a voltage pulse to one of the X electrode having the value of 0 and the X electrode having the value of the first high-order bit of the given X coordinate is '0', wherein the value is 2 The voltage pulse application pattern corresponding to j from H to H is given X for each corresponding j.
An X electrode whose value of the upper jth bit of the coordinate is "1",
One of the X electrodes whose upper j-th bit value of the given X coordinate is “0” and which is the upper first bit to the upper j−1 of the given X coordinate. A voltage pulse is applied to the X electrode whose value up to the bit is equal to the value determined as the value of the bit from the upper first bit to the upper j−1th bit of the X coordinate of the position where the detector is in contact. A display device characterized by being a pattern for applying a voltage. 7. M × arranged in a matrix of M rows and N columns
N display elements, M Y electrodes connected to each row of the display elements, and N connected to each column of the display elements.
Two flat displays each having X electrodes are provided, and voltage pulses applied to the columns and rows corresponding to positions on the display surface of the flat displays that are in contact are detected via capacitive coupling. The flat display with two detectors is arranged so as to form one screen, and each display pixel of the flat display has a predetermined voltage applied to both the Y electrode and the X electrode to be connected. When is applied, it becomes the display state,
A display device, which is a display device in which each of the columns is provided with an X coordinate expressed in binary by a value of A bit, wherein the two-sided flat display is arranged in a row arrangement order during a display period. And a Y electrode drive circuit for applying a voltage pulse in parallel to the Y electrodes of the corresponding row of the above, and a voltage pulse application pattern designated by a given data column provided corresponding to each of the two flat displays. The corresponding N of the flat display
Two X electrode drive circuits for applying voltage pulses to the X electrodes, and N pieces of rows in which the corresponding flat display voltage pulses are applied to the two X electrode drive circuits, respectively, during the display period. Means for supplying a data train designating a voltage pulse application pattern corresponding to the display pattern to be displayed on the display element, and to one of the two X drive circuits during the non-display period. A means for supplying a data string for applying a voltage pulse to all of the X electrodes of the flat display, and supplying to the other X drive circuit a data string for not applying a voltage pulse to all of the X electrodes of the corresponding flat display; During the period, the position in the flat display with which the detector is in contact is determined according to the Y electrode that is applying the voltage pulse when the detector detects the voltage pulse. Then, during the non-display period, when the detector detects the voltage pulse, the flat display in which the voltage pulse is applied to all the X electrodes is determined to be the flat display in contact with the detector. And a Y-coordinate detection unit that determines the Y-coordinate on the screen with which the detector is in contact. 8. The display device according to claim 7, wherein during the non-display period, H different values j from 1 to H (where H ≦ A) are sequentially obtained. , The value of the upper j-th bit of the given X coordinate is "1"
H voltage pulse application patterns for applying voltage pulses to only one of the X electrode and the X electrode whose upper j-th bit value of the given X coordinate is '0'. A data string that specifies L voltage pulse application patterns including
Means for sequentially supplying the X drive circuit corresponding to the flat display that the Y coordinate detecting means determines that the detector is in contact with, and for each of the H number of values j sequentially during the non-display period. , The upper j-th position of the X coordinate of the position in contact with the detector depending on whether or not the detector detects a voltage pulse with respect to the voltage pulse application pattern corresponding to the value of j.
And a X-coordinate detecting means for determining the value of the bit at the bit position. 9. The display device according to claim 7, wherein during the non-display period, each of H values j increasing from 1 to H (where H ≦ A) is incremented by 1. A flat pattern in which the Y-coordinate detecting means determines that the detector is in contact with H data strings designating L voltage pulse application patterns including corresponding H voltage pulse application patterns. Means for sequentially supplying to the X drive circuit corresponding to the display, and for each of the values j sequentially increasing by 1 during the non-display period, the voltage pulse application pattern corresponding to the value of the j X-coordinate detection means for sequentially determining the value of the upper j-th bit of the X-coordinate of the position where the detector is in contact, depending on whether or not the detector has detected a voltage pulse. Voltage pulse corresponding to j whose value is 1 Pressure pattern - down, the value of the upper first bit of the X coordinate given '1'
Is a pattern for applying a voltage pulse to one of the X electrode which is 0 and the X electrode whose value of the first high-order bit of the given X coordinate is '0'. Voltage pulse application pattern corresponding to j which is H
For the corresponding j, the X electrode whose upper j-th bit value of the given X coordinate is '1' and the upper j-th bit value of the given X coordinate are '0'. Some X
One of the electrodes and the X electrode, and the value from the upper first bit to the upper j−1th bit of the given X coordinate is the X coordinate of the position in contact with the detector. A display device, which is a pattern for applying a voltage pulse to an X electrode having a value determined as a value of a bit from an upper first bit to an upper j-1th bit. 10. The display device according to claim 1, wherein H <L, and the L voltage pulse application patterns are the H voltage pulse application patterns and k = H, the display device is characterized in that it includes P voltage application patterns obtained by shifting the voltage application patterns in the row direction of the display element by different shift amounts S for the X electrodes. . 11. The display device according to claim 5, 6, 8 or 9, wherein H <A, and the L number of voltage pulse application patterns are the H number of voltage pulse application patterns. , And P voltage application patterns obtained by shifting the voltage application patterns when j = H by different shift amounts S for the X electrodes in the row direction of the display element. Display device. 12. The display device according to claim 7, wherein during the non-display period, L data strings for designating L different voltage pulse application patterns are sequentially supplied to the X drive circuit. Means for supplying, and N number of X's corresponding to L number of data strings during the non-display period.
With respect to each of the L voltage pulse application patterns applied to the electrodes, the detector comes into contact according to L detection values indicating whether or not the detector detects a voltage pulse. X-coordinate detection means for determining the X-coordinate of the current position, wherein the L voltage pulse application patterns are arranged such that the N X electrodes are arranged from 1 to H according to the arrangement of the X electrodes.
(However, up to H <L)
For each value k, the N X electrodes are equally divided into 2 × k regions according to the arrangement of the X electrodes, and every other region among the divided regions exists in the direction of the arrangement of the X electrodes. H voltage application patterns for applying a voltage pulse to the X electrode and the voltage application pattern when k = H are set in the row direction of the display element by different shift amounts S with respect to the X electrode. A display device comprising P voltage application patterns shifted with respect to each other. 13. A display device according to claim 10, 11 or 12, wherein: And the shift amount S is 1 ≦ S ≦ P or −P ≦ S ≦ −1, and the X-coordinate detection means detects the detection value according to the L detection values. A display device, characterized in that it determines the X coordinate represented by log ₂ N bits of the position where the vessel is touching. 14. The display device according to claim 1, wherein the L voltage pulse application patterns are the H voltage pulse application patterns, and the N X electrodes are voltage-applied. A voltage pulse application pattern without applying a pulse, wherein 1 to Q of the H voltage pulse application patterns are included.
(However, for the k corresponding to the values up to Q <H), the data strings designating the Q voltage application patterns are sequentially assigned to the X electrode circuit from the one having the smaller value of k. Of the H number of voltage pulse application patterns, the data string designating H-Q number of voltage application patterns for k corresponding to a value between Q + 1 and H is k. The display device is characterized in that the voltage is applied to the X electrode circuit alternately with the voltage pulse application pattern to which the voltage pulse is not applied. 15. The display device according to claim 5, 6, 8 or 9, wherein the L voltage pulse application patterns are the H voltage pulse application patterns and the N voltage pulse application patterns. A voltage pulse application pattern in which no voltage pulse is applied to the X electrode, wherein 1 to Q of the H number of voltage pulse application patterns
(However, the data string designating the Q number of voltage application patterns for j corresponding to the values up to Q <H) is sequentially assigned to the X electrode circuit from the one having a smaller value of j. Of the H voltage pulse application patterns supplied, the data string designating HQ voltage application patterns for j corresponding to a value between Q + 1 and H is j. The display device is characterized in that the voltage is applied to the X electrode circuit alternately with the voltage pulse application pattern to which the voltage pulse is not applied. 16. The display device according to claim 7, wherein during the non-display period, L data strings for designating L different voltage pulse application patterns are sequentially supplied to the X drive circuit. Means for supplying, and N number of X's corresponding to L number of data strings during the non-display period.
With respect to each of the L voltage pulse application patterns applied to the electrodes, the detector comes into contact according to L detection values indicating whether or not the detector detects a voltage pulse. X-coordinate detection means for determining the X-coordinate of the current position, wherein the L voltage pulse application patterns are arranged such that the N X electrodes are arranged from 1 to H according to the arrangement of the X electrodes.
(However, up to H <L)
For each value k, the N X electrodes are equally divided into 2 × k regions according to the arrangement of the X electrodes, and every other region among the divided regions exists in the direction of the arrangement of the X electrodes. H voltage application patterns for applying voltage pulses to the X electrodes belonging to the above, and voltage pulse application patterns for not applying voltage pulses to the N X electrodes, the H voltage pulse application patterns -From 1 to Q
(However, for the k corresponding to the values up to Q <H), the data strings designating the Q voltage application patterns are sequentially assigned to the X electrode circuit from the one having the smaller value of k. Of the H number of voltage pulse application patterns, the data string designating H-Q number of voltage application patterns for k corresponding to a value between Q + 1 and H is k. The display device is characterized in that the voltage is applied to the X electrode circuit alternately with the voltage pulse application pattern to which the voltage pulse is not applied. 17. The display device according to claim 14, 15 or 16, wherein said X-coordinate detecting means is a detection device corresponding to said H voltage pulse application patterns among said L detection values. Log ₂ N of the position where the detector is in contact, depending only on the value
A display device, characterized in that it determines the X coordinate represented by a bit. 18. The display device according to claim 1, wherein the Y-coordinate detecting means has means for correcting the determined Y-coordinate by adding a predetermined number. Display device. 19. The display device according to claim 1, wherein each of the data strings is applied with the voltage pulse application pattern designated by the data string, and a voltage pulse is applied in the voltage pulse application. And a means for correcting the voltage pulse application pattern changed so as not to apply a voltage pulse to a predetermined number of X electrodes from both ends of each X electrode row, and supplying it to the X electrode drive circuit. A display device characterized by the above. 20. The display device according to claim 1, wherein the detector detects the voltage pulse when the voltage level of the voltage pulse detected by the detector does not satisfy a predetermined voltage level condition. A display device comprising means for invalidating results. 21. The display device according to claim 1, further comprising means for detecting whether or not the detector is in contact with a display surface of the flat display and supplying a detection result. A display device characterized by the above. 22. The display device according to any one of claims 1 to 21, wherein data designating contents to be displayed on the flat display is supplied to the display device, and an X coordinate determined by an X coordinate detecting means of the display device, and Y-coordinates The determined Y-coordinates are imported and the imported X-coordinates and Y-coordinates are acquired.
An information processing device comprising: a processing device that executes a process according to coordinates.