JPH0713311Y2 - Carrier sense circuit - Google Patents

Description

[Detailed description of the device]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a carrier sense circuit used for data communication and the like.

[0002]

2. Description of the Related Art A conventional carrier sense circuit is shown in FIG. In the figure, 1 is an antenna tuning circuit, 2 is a carrier detection circuit, and 3 is a DC amplification circuit. The carrier signal tuned to the carrier frequency by the antenna tuning circuit 1 is detected and rectified by the carrier detection circuit 2 and extracted, and this DC signal is DC-amplified by the DC amplification circuit 3 to obtain the carrier sense output.

[0003]

In the prior art as described above, it was generally necessary to increase the impedance after the carrier detection circuit as much as possible in order to increase the operation sensitivity during carrier reception. However, if the impedance is raised too much, the carrier accumulation effect of the transistor causes the charge to be accumulated between the base and emitter of the first stage transistor of the DC amplifier circuit, and it takes time for this charge to be completely discharged, and the carrier is turned off. There was a delay action in the attack time in.

There is also a means for connecting a resistor between the base and the ground in order to discharge the accumulated charge between the base and the emitter of the first-stage transistor, but for the above-mentioned reason, it is said that when the circuit impedance decreases, the operation sensitivity also decreases. There was a flaw. The present invention aims to remedy such drawbacks of previously known carrier sense circuits.

[0005]

The output of the antenna tuning circuit 1 is output to a circuit which detects the output of the antenna tuning circuit 1 by a carrier detection circuit 2 and amplifies the output by a DC amplification circuit 3 to output a carrier sense signal. A carrier detection circuit 4 for branching and detecting the side, and a switching circuit 5 for dropping the input side of the DC amplification circuit 3 to a reference potential when the detection output is at a high level and the DC amplification circuit 3 is in a normal operating state. Is provided to rapidly discharge the charge accumulated in the DC amplifier circuit to remove the delay distortion of carrier sense.

[0006]

Operation When there is no carrier signal, there is no output from the antenna tuning circuit 1 and therefore no output from the carrier detection circuit 2 and the carrier detection circuit 4. The switching circuit 5 is a PNP transistor Q ₁ so there is no input to the base of the PNP transistor Q ₁ is turned on, the DC amplification circuit 3
The input side of is the reference potential, and the input side accumulated charge of the DC amplification circuit 3 is rapidly discharged.

Next, when the carrier is input, there is an output from the antenna tuning circuit. Therefore, both the carrier detection circuit 2 and the carrier detection circuit 4 output the detection rectification signal. The output of the carrier detection circuit 4 is input to the PNP transistor Q ₁ of the switching circuit 5 to drive the PNP transistor Q ₁ off, so that the DC amplification circuit 3 becomes operable. On the other hand, there is also an output from the carrier detection circuit 2, and the DC amplification circuit 3 amplifies this signal and outputs it as a carrier sense signal.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail with reference to FIG. The antenna tuning circuit 1 is composed of a loop antenna L _P and a tuning capacitor C _T. The output of the antenna tuning unit 1 is supplied to the carrier detection circuit 2 and the carrier detection circuit 4 having the same configuration. The output of the carrier detection circuit 2 is input to the base of the transistor Q ₂ via the resistance R ₁ of the DC amplification circuit 3. The DC amplification circuit 3 is directly input collector output of the transistor Q ₂ to the base of the transistor Q ₃ outputs a carrier sense signal from the transistor Q _3.

The output of the carrier detection circuit 4 is grounded by a resistor R ₄ and supplied to a switching circuit 5 composed of a PNP transistor Q ₁ having an input circuit for supplying the base to the resistor R ₅ . As can be seen from the drawing, the switching circuit 5 is a switching circuit that is turned on by the bias voltage of the resistors R ₄ and R ₅ when there is no input signal and turned off when the input is at high level. In this switching operation, the base of the input side transistor Q ₂ of the DC amplification circuit 3 is dropped to the reference potential in the ON operation, and the base of the transistor Q ₂ is cut off from the reference potential in the OFF operation to cut off the DC amplification circuit 3
Can be amplified.

Describing the operation from the above configuration, neither the carrier detection circuit 2 nor the carrier detection circuit 4 outputs when there is no signal in the state where the antenna tuning circuit 1 is tuned to the data carrier, and in this state, the DC amplification circuit. No carrier sense is output from 3. However, the carrier detection circuit 4
Since there is no output, the PNP transistor Q ₁ of the switching circuit 5 is on-operation as described above. Therefore, the base of the transistor Q ₂ on the input side of the DC amplifying circuit 3 is connected to the reference potential and is rapidly discharged when the transistor Q ₂ has accumulated charge.

Next, when a data carrier is input and carrier detection circuits 2 and 4 output detection outputs, the PNP transistor Q ₁ of the switching circuit 5 is turned off, and the base of the transistor Q ₂ of the DC amplification circuit 3 is at the reference potential. Be cut off. Therefore, the detection signal from the carrier detection circuit 2 is amplified and carrier sense is output.

[0012]

According to the present invention, a carrier detection circuit is provided in addition to the conventional carrier sense circuit, and a DC amplification circuit is connected to or cut off from the input of the DC amplification circuit by a switching circuit that operates by its output. There is an effect of improving the delay operation of the carrier sense off time due to the carrier accumulation effect of the first stage amplifier. In addition, since the present invention operates by the detection voltage of the carrier, no current flows in the DC amplifier circuit when there is no signal, which has the effect of reducing power consumption during the reception waiting period.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention.

FIG. 2 is a configuration diagram of a conventional carrier sense circuit.

[Explanation of symbols]

1 Antenna tuning circuit 2/4 Carrier sense circuit 3 DC amplification circuit 5 Switching circuit Q ₁ / Q ₂ / Q ₃ transistor R ₁ / R ₂ / R ₃ / R ₄ resistance

Claims (1)

[Scope of utility model registration request] 1. An antenna tuning circuit 1, a carrier detection circuit 2, and a DC amplification circuit 3 are connected in series, and the output side of the antenna tuning circuit 1 is branched to a circuit for detecting a data carrier and outputting carrier sense. An input carrier detection circuit 4 and a switching circuit 5 that connects the input side of the DC amplification circuit 3 to a reference potential at a low level and cuts off the reference potential at a high level using the output of the carrier detection circuit 4 as a control signal. And a carrier sense circuit for eliminating stored charge on the input side of the DC amplification circuit 3 and saving electricity.