JPH07122783A - Drive circuit for light emitting diode - Google Patents

Drive circuit for light emitting diode

Info

Publication number
JPH07122783A
JPH07122783A JP26652093A JP26652093A JPH07122783A JP H07122783 A JPH07122783 A JP H07122783A JP 26652093 A JP26652093 A JP 26652093A JP 26652093 A JP26652093 A JP 26652093A JP H07122783 A JPH07122783 A JP H07122783A
Authority
JP
Japan
Prior art keywords
light emitting
emitting diode
transistor
diode
turned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26652093A
Other languages
Japanese (ja)
Other versions
JP3181770B2 (en
Inventor
Hiroaki Ito
弘朗 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP26652093A priority Critical patent/JP3181770B2/en
Publication of JPH07122783A publication Critical patent/JPH07122783A/en
Application granted granted Critical
Publication of JP3181770B2 publication Critical patent/JP3181770B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To shorten a light emitting diode in both a turn-on time and a turn-off time by a method wherein a bias voltage low enough not to turn the light emitting diode ON is applied while the diode is OFF to forcibly discharge inner electrical charge stored while the diode is ON. CONSTITUTION:When a bias current Io low enough in intensity not to enable a light emitting diode D to emit light is made to flow through the diode D while the diode D is OFF, a current I flowing through the emitter of a transistor Q5 is represented by a formula, I=Ih-Io. Therefore, a voltage Voff, which is equal to the sum of a voltage across a base and an emitter of the transistor Q5 and a drop voltage of a resistor, is applied to the ends of the light emitting diode D. The transistor Q5 makes the stored electric charge of the light emitting diode D discharge through an emitter current (Ih-Io, so that the light emitting diode D can be lessened in a turn-off time. As a bias voltage low enough not to turn the diode D ON is applied to the diode D while the diode D is OFF, the diode can be lessened in turn-on time.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、光通信機器等に使用す
る発光ダイオードを点滅駆動するための発光ダイオード
駆動回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting diode drive circuit for blinking a light emitting diode used in optical communication equipment and the like.

【0002】[0002]

【従来の技術】発光ダイオードの点灯および消灯によっ
て信号を伝送する場合、発光ダイオードの順方向電圧V
fは、図2に示す発光ダイオードの等価回路において、
直列抵抗Rsと拡散容量Cdおよび並列抵抗Rp(ただ
し、順方向電流Ifによって変動する)の並列回路との
直列回路から求められる時定数にしたがって上昇・下降
する。このため、一定電流で発光ダイオードを点灯させ
ようとすると、高速の信号伝送時に不都合が生じる。
2. Description of the Related Art When a signal is transmitted by turning on and off a light emitting diode, a forward voltage V of the light emitting diode is transmitted.
f is the equivalent circuit of the light emitting diode shown in FIG.
It rises and falls according to the time constant obtained from the series circuit of the series resistance Rs, the diffusion capacitance Cd, and the parallel circuit of the parallel resistance Rp (which varies depending on the forward current If). Therefore, if an attempt is made to turn on the light emitting diode with a constant current, inconvenience occurs during high speed signal transmission.

【0003】そこで、従来の発光ダイオード駆動回路
は、図3に示すように、差動増幅回路を構成する一対の
トランジスタQ1,Q2の一方のトランジスタQ1のコ
レクタ側に発光ダイオードDを接続し、さらにトランジ
スタQ1のベース側にコンデンサC1および抵抗R1の
並列回路を、トランジスタQ2のベース側にコンデンサ
C2および抵抗R2の並列回路を、それぞれ並列ピーキ
ングとして接続する構成を有する。
Therefore, in a conventional light emitting diode drive circuit, as shown in FIG. 3, a light emitting diode D is connected to the collector side of one transistor Q1 of a pair of transistors Q1 and Q2 that form a differential amplifier circuit. The parallel circuit of the capacitor C1 and the resistor R1 is connected to the base side of the transistor Q1 and the parallel circuit of the capacitor C2 and the resistor R2 is connected to the base side of the transistor Q2 as parallel peaking.

【0004】この構成において、トランジスタQ1側の
入力電圧v1がトランジスタQ2側の入力電圧v2より
大きくなると発光ダイオードDが点灯し、トランジスタ
Q2側の入力電圧v2がトランジスタQ1側の入力電圧
v1より大きくなると発光ダイオードDが消灯する。
In this structure, when the input voltage v1 on the transistor Q1 side becomes larger than the input voltage v2 on the transistor Q2 side, the light emitting diode D lights up, and when the input voltage v2 on the transistor Q2 side becomes larger than the input voltage v1 on the transistor Q1 side. The light emitting diode D is turned off.

【0005】しかも、この構成によれば、高速の信号伝
送時にトランジスタQ1,Q2のベース電圧にピーキン
グをかけることで、一時的に発光ダイオードDの順方向
電流を増加させ、発光ダイオードDの点灯に要する時間
を短縮できる。
Moreover, according to this structure, the forward voltage of the light emitting diode D is temporarily increased by peaking the base voltage of the transistors Q1 and Q2 during high-speed signal transmission, and the light emitting diode D is turned on. The time required can be shortened.

【0006】[0006]

【発明が解決しようとする課題】ところが、従来の発光
ダイオード駆動回路では、発光ダイオードDの消灯時は
発光ダイオードDの順方向電流をゼロにして内部容量C
dの自然放電によって消灯するようにしているため、消
灯時間の短縮が図れなかった。
However, in the conventional light emitting diode drive circuit, when the light emitting diode D is turned off, the forward current of the light emitting diode D is set to zero and the internal capacitance C is reduced.
Since the light was turned off by the natural discharge of d, the time for turning off could not be shortened.

【0007】また、発光ダイオードDの電圧−電流特性
は、図4に示すように、順方向電圧Vfが所定の電位を
超えると順方向電流Ifが急峻に立ち上がる順方向特性
と、逆方向電圧Vrが所定の電位を超えると逆方向電流
Irが急峻に立ち下がる逆方向特性とを有し、しかも発
光ダイオードDの発光強度は順方向電流Ifに比例する
ため、一度発光ダイオードDの蓄積電荷を放電し切って
しまうと、再度点灯するには発光ダイオードDが発光し
始める電位(図4のA点)まで内部容量Cdを充電しな
ければならず、点灯までの時間を短縮する妨げとなって
いた。
As for the voltage-current characteristic of the light emitting diode D, as shown in FIG. 4, when the forward voltage Vf exceeds a predetermined potential, the forward current If rises sharply and the reverse voltage Vr. Has a reverse characteristic in which the reverse current Ir sharply falls when the voltage exceeds a predetermined potential, and the light emission intensity of the light emitting diode D is proportional to the forward current If, so that the accumulated charge of the light emitting diode D is once discharged. If it is exhausted, the internal capacitance Cd must be charged to the potential (point A in FIG. 4) at which the light emitting diode D starts to emit light again, which is an obstacle to shortening the time until lighting. .

【0008】本発明の目的は、発光ダイオードの消灯お
よび点灯時間を短縮して高速な信号伝送が可能な発光ダ
イオード駆動回路を提供することにある。
It is an object of the present invention to provide a light emitting diode drive circuit capable of high-speed signal transmission by reducing the turn-off time and light-on time of the light emitting diode.

【0009】[0009]

【課題を解決するための手段】本発明による発光ダイオ
ード駆動回路は、一方のトランジスタの出力に発光ダイ
オードを接続した第1の差動増幅回路と、この第1の差
動増幅回路と同一の入力を有し一方のトランジスタの出
力に抵抗を接続した第2の差動増幅回路と、コレクタ端
子およびエミッタ端子が発光ダイオードの両端に接続さ
れ、コレクタ端子およびベース端子が抵抗の両端に接続
された放電用トランジスタとを設け、第1および第2の
差動増幅回路の各一方のトランジスタのオンによって発
光ダイオードが点灯すると共に放電用トランジスタが遮
断し、第1および第2の差動増幅回路の各一方のトラン
ジスタのオフによって発光ダイオードが消灯すると共に
放電用トランジスタが導通して発光ダイオードの内部電
荷を放電するように構成する。
A light emitting diode drive circuit according to the present invention comprises a first differential amplifier circuit in which a light emitting diode is connected to the output of one transistor, and an input having the same input as the first differential amplifier circuit. And a second differential amplifier circuit having a resistor connected to the output of one of the transistors, a collector terminal and an emitter terminal connected to both ends of the light emitting diode, and a collector terminal and a base terminal connected to both ends of the resistor And a discharge transistor is provided, and the discharge transistor is cut off while the light emitting diode is turned on by turning on one of the transistors of the first and second differential amplifier circuits, and the one of the first and second differential amplifier circuits is provided. Turn off the transistor to turn off the light emitting diode and turn on the discharge transistor to discharge the internal charge of the light emitting diode. To configure.

【0010】この場合、放電用トランジスタは、発光ダ
イオードの消灯時にベース・エミッタ間に流れる一定電
流によって発生する電位によって発光ダイオードの順方
向のバイアス電圧を一定に保つように構成する。
In this case, the discharging transistor is configured to keep the forward bias voltage of the light emitting diode constant by the potential generated by the constant current flowing between the base and the emitter when the light emitting diode is turned off.

【0011】[0011]

【作用】本発明の構成において、発光ダイオード消灯時
は、発光ダイオードに流れる順方向電流をゼロにすると
共に、放電用トランジスタを導通させて発光ダイオード
の両端の電圧を強制的に消灯電位に下げることで発光ダ
イオードに蓄積された電荷の放電を促し、消灯にかかる
時間を短縮する。
In the structure of the present invention, when the light emitting diode is turned off, the forward current flowing through the light emitting diode is set to zero, and the discharge transistor is turned on to forcibly reduce the voltage across the light emitting diode to the off potential. The discharge of electric charge accumulated in the light emitting diode is promoted by, and the time taken to turn off the light is shortened.

【0012】発光ダイオード点灯時は、発光ダイオード
消灯時も発光ダイオードに一定量の蓄積電荷が残ってい
るため、順方向電流の印加と共に発光が始まり、ピーキ
ングによる順方向電流の増加とあわせて点灯にかかる時
間を短縮する。
When the light emitting diode is turned on, since a certain amount of accumulated charge remains in the light emitting diode even when the light emitting diode is turned off, light emission starts with application of a forward current, and the forward current increases due to peaking, and the light is turned on. It takes less time.

【0013】[0013]

【実施例】図1は、本発明による発光ダイオード駆動回
路の一実施例を示す構成図で、図3に示す構成と同一部
分には同一符号を付して説明する。本実施例は、差動増
幅回路1を構成するトランジスタQ1,Q2の一方のト
ランジスタQ1のコレクタ側に発光ダイオードDを接続
し、トランジスタQ1のベースに並列ピーキングとして
のコンデンサC1および抵抗R1の並列回路を接続し、
トランジスタQ2のベースに並列ピーキングとしてのコ
ンデンサC2および抵抗R2の並列回路を接続する構成
を有する。
1 is a block diagram showing an embodiment of a light emitting diode drive circuit according to the present invention. The same parts as those shown in FIG. 3 are designated by the same reference numerals. In this embodiment, a light emitting diode D is connected to the collector side of one of the transistors Q1 and Q2 constituting the differential amplifier circuit 1, and a parallel circuit of a capacitor C1 and a resistor R1 as parallel peaking at the base of the transistor Q1. Connect
It has a configuration in which a parallel circuit of a capacitor C2 and a resistor R2 as parallel peaking is connected to the base of the transistor Q2.

【0014】また、差動増幅回路1と並列に一対のトラ
ンジスタQ3,Q4からなる差動増幅回路2を備え、さ
らに、発光ダイオードDの蓄積電荷を放電するために差
動増幅回路1と並列に接続されたトランジスタQ5を備
え、トランジスタQ5のベース端子はトランジスタQ3
のコレクタおよび抵抗R3の接続中点に、トランジスタ
Q5のエミッタ端子は発光ダイオードDのカソードに、
トランジスタQ5のコレクタ端子は発光ダイオードDの
アノードに、それぞれ接続されている。
Further, a differential amplifier circuit 2 including a pair of transistors Q3 and Q4 is provided in parallel with the differential amplifier circuit 1, and further in parallel with the differential amplifier circuit 1 in order to discharge the accumulated charge of the light emitting diode D. A transistor Q5 connected to the base terminal of the transistor Q3.
, The emitter terminal of the transistor Q5 is the cathode of the light emitting diode D,
The collector terminal of the transistor Q5 is connected to the anode of the light emitting diode D, respectively.

【0015】さらに、トランジスタQ1,Q2のエミッ
タ側は定電流源IFに接続され、トランジスタQ3,Q
4のエミッタ側は定電流源IGに接続され、トランジス
タQ5のエミッタ側は定電流源IHに接続され、それぞ
れ定電流If ,Ig ,Ih が流れるように構成されてい
る。
Further, the emitter sides of the transistors Q1 and Q2 are connected to a constant current source IF and the transistors Q3 and Q2 are connected.
The emitter side of 4 is connected to the constant current source IG, and the emitter side of the transistor Q5 is connected to the constant current source IH so that the constant currents If, Ig and Ih respectively flow.

【0016】この構成において、外部から消灯信号が入
ると、トランジスタQ2,Q4側の入力電圧v2がトラ
ンジスタQ1,Q3側の入力電圧v1より大きくなるの
で、トランジスタQ2,Q4がオンとなり、トランジス
タQ1,Q3がオフとなる。これにより、トランジスタ
Q1のコレクタには電流が流れないため発光ダイオード
Dは消灯する。
In this configuration, when an extinguishing signal is input from the outside, the input voltage v2 on the side of the transistors Q2 and Q4 becomes larger than the input voltage v1 on the side of the transistors Q1 and Q3, so that the transistors Q2 and Q4 are turned on and the transistor Q1, Q3 turns off. As a result, no current flows in the collector of the transistor Q1, so that the light emitting diode D is turned off.

【0017】しかし、この場合、発光ダイオードDが光
らない程度のバイアス電流I0 を流すとすると、トラン
ジスタQ5のエミッタに流れる電流は、Ih −I0 とな
る。したがって、発光ダイオードDの両端には、次式で
定まる電圧Voff がかかることになる。
However, in this case, assuming that the bias current I 0 is such that the light emitting diode D does not emit light, the current flowing through the emitter of the transistor Q5 is Ih −I 0 . Therefore, the voltage Voff determined by the following equation is applied to both ends of the light emitting diode D.

【0018】 Voff =kT/q・ln ((Ih −I0 )/Is ) +R3・(Ih −I0 )/hfe ただし、k:ボルツマン定数 T:周囲温度(K) q:電子のエネルギー Is :トランジスタQ5の逆方向飽和電流 hfe:トランジスタQ5の電流増幅率Voff = kT / q.ln ((Ih- I0 ) / Is) + R3. (Ih- I0 ) / hfe where k: Boltzmann's constant T: ambient temperature (K) q: electron energy Is : Reverse saturation current of transistor Q5 h fe : Current amplification factor of transistor Q5

【0019】この電圧Voff はトランジスタQ5のベー
ス・エミッタ間電圧と抵抗R3の降下電圧との和であ
る。また、トランジスタQ5はエミッタ電流(Ih −I
0 )で発光ダイオードDの蓄積電荷を放電するため、発
光ダイオードDの消灯までの時間を短縮することができ
る。
This voltage Voff is the sum of the base-emitter voltage of the transistor Q5 and the voltage drop of the resistor R3. Further, the transistor Q5 has an emitter current (Ih-I
Since the accumulated charge of the light emitting diode D is discharged in 0 ), the time until the light emitting diode D is turned off can be shortened.

【0020】次に、外部から点灯信号が入ると、トラン
ジスタQ1,Q3側の入力電圧v1がトランジスタQ
2,Q4側の入力電圧v2より大きくなるので、トラン
ジスタQ1,Q3がオンとなり、トランジスタQ2,Q
4がオフとなる。これにより、トランジスタQ1のコレ
クタに電流If が流れ、トランジスタQ3のコレクタに
電流Ig が流れる。
Next, when a lighting signal is input from the outside, the input voltage v1 on the side of the transistors Q1 and Q3 changes to the transistor Q.
Since it becomes larger than the input voltage v2 on the 2 and Q4 side, the transistors Q1 and Q3 are turned on and the transistors Q2 and Q3 are turned on.
4 turns off. As a result, the current If flows in the collector of the transistor Q1 and the current Ig flows in the collector of the transistor Q3.

【0021】発光ダイオードDの点灯時の順方向電圧を
Vfとすると、抵抗R3の降下電圧Ig ×R3が電圧V
fより大きくなるように電流Ig を設定すれば、発光ダ
イオードDの点灯時にはトランジスタQ5が遮断し、発
光ダイオードDに流れる電流は「If +Ih 」とな
る。
Assuming that the forward voltage when the light emitting diode D is lit is Vf, the voltage drop Ig * R3 of the resistor R3 is the voltage Vf.
If the current Ig is set to be larger than f, the transistor Q5 is cut off when the light emitting diode D is turned on, and the current flowing through the light emitting diode D becomes "If + Ih".

【0022】したがって、この電流がピーキングによっ
て急峻に発光ダイオードDに流れ込み、さらに発光ダイ
オードDは消灯時に電圧Voff 分の電荷を予め蓄積して
いるため点灯までの時間が短縮される。
Therefore, this current steeply flows into the light emitting diode D due to peaking, and the light emitting diode D accumulates the electric charge corresponding to the voltage Voff in advance when the light is turned off.

【0023】[0023]

【発明の効果】本発明によれば、発光ダイオードの消灯
時は、点灯時に蓄積された内部電荷を強制的に放電する
ので消灯にかかる時間を短縮することができる。また、
発光ダイオードの点灯時は、消灯時に点灯しない程度の
バイアス電圧をかけてあるので点灯にかかる時間を短縮
することができる。これにより既存の発光ダイオードを
用いてより高速な信号伝送が可能になる。
According to the present invention, when the light emitting diode is turned off, the internal charge accumulated at the time of lighting is forcibly discharged, so that the time required for turning off the light can be shortened. Also,
When the light emitting diode is turned on, a bias voltage that does not turn on when the light is turned off is applied, so that the time required for lighting can be shortened. This enables higher speed signal transmission using the existing light emitting diode.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による発光ダイオード駆動回路の一実施
例を示す構成図である。
FIG. 1 is a configuration diagram showing an embodiment of a light emitting diode drive circuit according to the present invention.

【図2】発光ダイオードの等価回路である。FIG. 2 is an equivalent circuit of a light emitting diode.

【図3】従来の発光ダイオード駆動回路の構成図であ
る。
FIG. 3 is a configuration diagram of a conventional light emitting diode drive circuit.

【図4】発光ダイオードの電圧−電流特性図である。FIG. 4 is a voltage-current characteristic diagram of a light emitting diode.

【符号の説明】[Explanation of symbols]

1,2 差動増幅回路 C1,C2 コンデンサ D 発光ダイオード IF,IG,IH 定電流源 Q1,Q2,Q3,Q4,Q5 トランジスタ R1,R2,R3 抵抗 Cd 拡散容量 Rp 並列抵抗 Rs 直列抵抗 1,2 Differential amplifier circuit C1, C2 Capacitor D Light emitting diode IF, IG, IH Constant current source Q1, Q2, Q3, Q4, Q5 Transistor R1, R2, R3 Resistance Cd Diffusion capacity Rp Parallel resistance Rs Series resistance

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 一方のトランジスタの出力に発光ダイオ
ードを接続した第1の差動増幅回路と、 前記第1の差動増幅回路と同一の入力を有し一方のトラ
ンジスタの出力に抵抗を接続した第2の差動増幅回路
と、 コレクタ端子およびエミッタ端子が前記発光ダイオード
の両端に接続され、コレクタ端子およびベース端子が前
記抵抗の両端に接続された放電用トランジスタとを備
え、 前記第1および第2の差動増幅回路の各一方のトランジ
スタのオンによって前記発光ダイオードが点灯すると共
に前記放電用トランジスタが遮断し、 前記第1および第2の差動増幅回路の各一方のトランジ
スタのオフによって前記発光ダイオードが消灯すると共
に前記放電用トランジスタが導通して前記発光ダイオー
ドの内部電荷を放電することを特徴とする発光ダイオー
ド駆動回路。
1. A first differential amplifier circuit in which a light emitting diode is connected to the output of one transistor, and a resistor connected to the output of one transistor having the same input as that of the first differential amplifier circuit. A second differential amplifier circuit; and a discharge transistor having a collector terminal and an emitter terminal connected to both ends of the light emitting diode, and a collector terminal and a base terminal connected to both ends of the resistor. The light emitting diode is turned on and the discharge transistor is shut off by turning on one of the transistors of the second differential amplifier circuit, and the light is emitted by turning off one of the transistors of the first and second differential amplifier circuits. When the diode is turned off, the discharging transistor is turned on to discharge the internal charge of the light emitting diode. Diode drive circuit.
【請求項2】 前記放電用トランジスタは、前記発光ダ
イオードの消灯時にベース・エミッタ間に流れる一定電
流によって発生する電位によって前記発光ダイオードの
順方向バイアス電圧を一定に保つことを特徴とする請求
項1記載の発光ダイオード駆動回路。
2. The discharge transistor keeps a forward bias voltage of the light emitting diode constant by a potential generated by a constant current flowing between a base and an emitter when the light emitting diode is turned off. The light emitting diode drive circuit described.
JP26652093A 1993-10-25 1993-10-25 Light emitting diode drive circuit Expired - Fee Related JP3181770B2 (en)

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Application Number Priority Date Filing Date Title
JP26652093A JP3181770B2 (en) 1993-10-25 1993-10-25 Light emitting diode drive circuit

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Application Number Priority Date Filing Date Title
JP26652093A JP3181770B2 (en) 1993-10-25 1993-10-25 Light emitting diode drive circuit

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JPH07122783A true JPH07122783A (en) 1995-05-12
JP3181770B2 JP3181770B2 (en) 2001-07-03

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JP26652093A Expired - Fee Related JP3181770B2 (en) 1993-10-25 1993-10-25 Light emitting diode drive circuit

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012028820A (en) * 2011-11-07 2012-02-09 Omron Corp Led drive circuit
JP2013055330A (en) * 2011-08-05 2013-03-21 Toyo Univ Semiconductor light-emitting device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008041488A1 (en) * 2008-08-22 2010-02-25 BSH Bosch und Siemens Hausgeräte GmbH Household appliance for installation in a furniture frame

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013055330A (en) * 2011-08-05 2013-03-21 Toyo Univ Semiconductor light-emitting device
JP2012028820A (en) * 2011-11-07 2012-02-09 Omron Corp Led drive circuit

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